From 86bf97a73001b3ffc856755a80097ee303d0492b Mon Sep 17 00:00:00 2001 From: Zahary Karadjov Date: Sun, 20 Jan 2013 21:19:49 +0200 Subject: [PATCH] cleaned up some debugging code --- compiler/ccgexprs.nim | 10 ----- compiler/cgen.nim | 22 +++++----- compiler/cgendata.nim | 5 ++- compiler/lexer.nim | 6 +-- compiler/main.nim | 27 +++++++----- lib/system/gc.nim | 99 +++++++++++++------------------------------ lib/system/mmdisp.nim | 6 +-- lib/system/sysstr.nim | 1 - 8 files changed, 66 insertions(+), 110 deletions(-) diff --git a/compiler/ccgexprs.nim b/compiler/ccgexprs.nim index 67d7b1a38e..1ac3dad7d2 100755 --- a/compiler/ccgexprs.nim +++ b/compiler/ccgexprs.nim @@ -188,19 +188,9 @@ proc genRefAssign(p: BProc, dest, src: TLoc, flags: TAssignmentFlags) = linefmt(p, cpsStmts, "#asgnRef((void**) $1, $2);$n", addrLoc(dest), rdLoc(src)) else: - if cnimdbg: - echo "ASSIGN REF ", dest.k, " ", dest.s, " ", dest.r.ropeToStr - if dest.heapRoot != nil: - echo "ROOTED AT ", dest.heapRoot.ropeToStr - linefmt(p, cpsStmts, "#asgnRefNoCycle((void**) $1, $2);$n", addrLoc(dest), rdLoc(src)) else: - if cnimdbg: - echo "ASSIGN REF ", dest.k, " ", dest.s, " ", dest.r.ropeToStr - if dest.heapRoot != nil: - echo "ROOTED AT ", dest.heapRoot.ropeToStr - linefmt(p, cpsStmts, "#unsureAsgnRef((void**) $1, $2);$n", addrLoc(dest), rdLoc(src)) if needToKeepAlive in flags: keepAlive(p, dest) diff --git a/compiler/cgen.nim b/compiler/cgen.nim index fafa08ef49..71d55c8798 100755 --- a/compiler/cgen.nim +++ b/compiler/cgen.nim @@ -1133,18 +1133,16 @@ proc rawNewModule(module: PSym): BModule = result = rawNewModule(module, module.filename) proc newModule(module: PSym): BModule = - result = getCgenModule(module) - if result == nil: - result = rawNewModule(module) - growCache gModules, module.position - gModules[module.position] = result + # we should create only one cgen module for each module sym + InternalAssert getCgenModule(module) == nil - if (optDeadCodeElim in gGlobalOptions): - if (sfDeadCodeElim in module.flags): - InternalError("added pending module twice: " & module.filename) - else: - echo "CGEN CACHED MODULE: ", result.filename - assert optCaasEnabled in gGlobalOptions + result = rawNewModule(module) + growCache gModules, module.position + gModules[module.position] = result + + if (optDeadCodeElim in gGlobalOptions): + if (sfDeadCodeElim in module.flags): + InternalError("added pending module twice: " & module.filename) proc myOpen(module: PSym): PPassContext = result = newModule(module) @@ -1260,7 +1258,6 @@ proc updateCachedModule(m: BModule) = let cfilenoext = changeFileExt(cfile, "") if mergeRequired(m): - echo "MERGE REQUIRED FOR ", m.filename mergeFiles(cfile, m) genInitCode(m) finishTypeDescriptions(m) @@ -1271,6 +1268,7 @@ proc updateCachedModule(m: BModule) = addFileToLink(cfilenoext) proc cgenCaasUpdate* = + # XXX(zah): clean-up the fromCache mess for m in cgenModules(): if m.fromCache: m.updateCachedModule diff --git a/compiler/cgendata.nim b/compiler/cgendata.nim index 846acbd2c7..32e9fb4ce6 100644 --- a/compiler/cgendata.nim +++ b/compiler/cgendata.nim @@ -143,7 +143,8 @@ proc newProc*(prc: PSym, module: BModule): BProc = iterator cgenModules*: var BModule = for i in 0..high(gModules): - # some modules (like stdin) may exist only in memory. - # they won't have a cgen BModule for them and we must skip them. + # ultimately, we are iterating over the file ids here. + # some "files" won't have an associated cgen module (like stdin) + # and we must skip over them. if gModules[i] != nil: yield gModules[i] diff --git a/compiler/lexer.nim b/compiler/lexer.nim index 89a9497df4..02f63aee81 100755 --- a/compiler/lexer.nim +++ b/compiler/lexer.nim @@ -509,10 +509,10 @@ proc getEscapedChar(L: var TLexer, tok: var TToken) = else: lexMessage(L, errInvalidCharacterConstant) else: lexMessage(L, errInvalidCharacterConstant) -proc newString(s: cstring, l: int): string = +proc newString(s: cstring, len: int): string = ## XXX, how come there is no support for this? - result = newString(l) - for i in 0 .. = 0: if d[j] == ol: - #writecell("replaced old", ol) d[j] = res - #writecell("replaced new", res) break dec(j) if ol.isBitUp(rcInCycleRoots): for i in 0 .. 0: repeat - # quit 1 - var gcDebugging* = false -var vis*: proc (a: pointer, b: PNimType) - -proc debugNode(n: ptr TNimNode) = - c_fprintf(c_stdout, "node %s\n", n.name) - for i in 0..n.len-1: - debugNode(n.sons[i]) - -proc debugTyp(x: PNimType) = - c_fprintf(c_stdout, "type %d\n", x.kind) - if x.node != nil: - debugNode(x.node) var seqdbg* : proc (s: PGenericSeq) {.cdecl.} @@ -992,7 +973,7 @@ proc gcMark(gch: var TGcHeap, p: pointer) {.inline.} = # mark the cell: if objStart.isBitDown(rcReallyDead): if gcDebugging: - writeCell("marking ", objStart) + # writeCell("marking ", objStart) else: inc objStart.refcount, rcIncrement gch.decStack.add objStart @@ -1174,18 +1155,14 @@ proc releaseCell(gch: var TGcHeap, cell: PCell) = prepareDealloc(cell) cell.setColor rcReallyDead - #writecell("RELEASING ", cell) - let l1 = gch.tempStack.len cell.forAllChildren waPush let l2 = gch.tempStack.len for i in l1 .. 0: var c = gch.zct.d[0] - if c.isBitDown(rcZct): - writecell("BAD ZCT", c) - quit 1 - # writecell("ZCT PROCESS", c) + sysAssert c.isBitUp(rcZct), "CollectZCT: rcZct missing!" sysAssert(isAllocatedPtr(gch.region, c), "CollectZCT: isAllocatedPtr") - # remove from ZCT: - sysAssert((c.refcount and rcZct) == rcZct, "collectZCT") + # remove from ZCT: c.clearBit(rcZct) gch.zct.d[0] = gch.zct.d[L[] - 1] dec(L[]) @@ -1238,13 +1207,9 @@ proc CollectZCT(gch: var TGcHeap): bool = # freed. **KEEP THIS IN MIND WHEN MAKING THIS INCREMENTAL!** if c.color == rcRetiredBuffer: if c.isBitDown(rcInCycleRoots): - # writecell("retired buffer", c) freeCell(gch, c) else: - if c.color == rcReallyDead: - # writeCell("ReallyDead in ZCT?", c) - - # writecell("bad cell in zct", c) + # if c.color == rcReallyDead: writeCell("ReallyDead in ZCT?", c) releaseCell(gch, c) when withRealtime: if steps == 0: @@ -1270,7 +1235,6 @@ proc unmarkStackAndRegisters(gch: var TGcHeap) = sysAssert c.typ != nil, "unmarkStackAndRegisters 2" if c.color == rcRetiredBuffer: - # writecell("unmark retired", c) continue # XXX no need for an atomic dec here: @@ -1284,11 +1248,8 @@ proc unmarkStackAndRegisters(gch: var TGcHeap) = # a leak if it's orphaned through the stack reference # that's because the write-barrier won't be executed for stack # locations - #writeCell("restoring balance cycle roots", c) addCycleRoot(gch.cycleRoots, c) - #writecell("unmark stack cell", c) - gch.decStack.len = 0 proc collectCTBody(gch: var TGcHeap) = diff --git a/lib/system/mmdisp.nim b/lib/system/mmdisp.nim index 28ef67781d..9bf9c1e674 100755 --- a/lib/system/mmdisp.nim +++ b/lib/system/mmdisp.nim @@ -14,14 +14,14 @@ {.push checks:off.} const - debugGC = true # we wish to debug the GC... + debugGC = false # we wish to debug the GC... logGC = false - traceGC = true # extensive debugging + traceGC = false # extensive debugging alwaysCycleGC = false alwaysGC = false # collect after every memory allocation (for debugging) leakDetector = false overwriteFree = false - trackAllocationSource = true or leakDetector + trackAllocationSource = leakDetector cycleGC = true # (de)activate the cycle GC reallyDealloc = true # for debugging purposes this can be set to false diff --git a/lib/system/sysstr.nim b/lib/system/sysstr.nim index 8314362f3b..bd830d2133 100755 --- a/lib/system/sysstr.nim +++ b/lib/system/sysstr.nim @@ -213,7 +213,6 @@ proc setLengthSeq(seq: PGenericSeq, elemSize, newLen: int): PGenericSeq {. doDecRef(gch.tempStack.d[i], LocalHeap, MaybeCyclic) gch.tempStack.len = len0 - # XXX add a proper addCycleRoot barrier here! # and set the memory to nil: zeroMem(cast[pointer](cast[TAddress](result) +% GenericSeqSize +% (newLen*%elemSize)), (result.len-%newLen) *% elemSize)