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https://github.com/nim-lang/Nim.git
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373e667dbc
* ucontext backend (default on unix)
* setjmp backend
* fibers backend (default and required on windows)
* Fixed coroutine loop timing issues
* Fixed saving of xmm registers on x64 windows
* Fixed alignment issues
* Updated coroutine sample with cooperative fibonacci calculation.
* Disable glibc security features only when platform jump functions are used
* Removed dependency on fasm.
* Using fiber api on windows.
* Other platforms and compilers will use built in assembler and .S files or API provided by platform libc.
* Replaced stack switching procs with `coroExecWithStack()` which never returns. This makes compiler always generate proper code.
97 lines
2.9 KiB
ArmAsm
97 lines
2.9 KiB
ArmAsm
#
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#
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# Nim's Runtime Library
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# (c) Copyright 2015 Rokas Kupstys
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#
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# See the file "copying.txt", included in this
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# distribution, for details about the copyright.
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#
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# Partially based on code from musl libc Copyright © 2005-2014 Rich Felker, et al.
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.globl narch_coroExecWithStack
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.globl narch_setjmp
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.globl narch_longjmp
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.text
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# SysV ABI - first argument is rdi.
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# MS ABI - first argument is rcx.
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#if defined(__MINGW32__) || defined(__MINGW64__)
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#define REG_ARG1 rcx
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#define REG_ARG2 rdx
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#else
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#define REG_ARG1 rdi
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#define REG_ARG2 rsi
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#endif
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narch_coroExecWithStack:
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mov %REG_ARG2, %rsp # swap stack with one passed to func
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sub $0x30, %rsp # shadow space (for ms ABI) 0x20 + 0x10 for possible misalignment
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and $-0x10, %rsp # 16-byte stack alignment
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call *%REG_ARG1
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narch_setjmp:
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add $0x10, %REG_ARG1 # 16-byte alignment
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and $-0x10, %REG_ARG1
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mov %rbx, 0x00(%REG_ARG1) # jmp_buf, move registers onto it
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mov %rbp, 0x08(%REG_ARG1)
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mov %r12, 0x10(%REG_ARG1)
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mov %r13, 0x18(%REG_ARG1)
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mov %r14, 0x20(%REG_ARG1)
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mov %r15, 0x28(%REG_ARG1)
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lea 0x08(%rsp), %rdx # this is our rsp WITHOUT current ret addr
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mov %rdx, 0x30(%REG_ARG1)
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mov (%rsp), %rdx # save return addr ptr for new rip
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mov %rdx, 0x38(%REG_ARG1)
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mov %rsi, 0x40(%REG_ARG1)
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mov %rdi, 0x48(%REG_ARG1)
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#if defined(__MINGW32__) || defined(__MINGW64__)
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movaps %xmm6, 0x50(%REG_ARG1)
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movaps %xmm7, 0x60(%REG_ARG1)
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movaps %xmm8, 0x70(%REG_ARG1)
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movaps %xmm9, 0x80(%REG_ARG1)
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movaps %xmm10, 0x90(%REG_ARG1)
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movaps %xmm11, 0xA0(%REG_ARG1)
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movaps %xmm12, 0xB0(%REG_ARG1)
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movaps %xmm13, 0xC0(%REG_ARG1)
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movaps %xmm14, 0xD0(%REG_ARG1)
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movaps %xmm15, 0xE0(%REG_ARG1)
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#endif
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xor %rax, %rax # always return 0
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ret
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narch_longjmp:
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add $0x10, %REG_ARG1 # 16-byte alignment
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and $-0x10, %REG_ARG1 #
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mov %REG_ARG2, %rax # val will be longjmp return
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test %rax, %rax
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jnz narch_longjmp_1
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inc %rax # if val==0, val=1 per longjmp semantics
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narch_longjmp_1:
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mov 0x00(%REG_ARG1), %rbx # jmp_buf, restore regs from it
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mov 0x08(%REG_ARG1), %rbp
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mov 0x10(%REG_ARG1), %r12
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mov 0x18(%REG_ARG1), %r13
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mov 0x20(%REG_ARG1), %r14
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mov 0x28(%REG_ARG1), %r15
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mov 0x30(%REG_ARG1), %rsp # this ends up being the stack pointer
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mov 0x38(%REG_ARG1), %rdx # this is the instruction pointer
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mov 0x40(%REG_ARG1), %rsi
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mov 0x48(%REG_ARG1), %rdi
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#if defined(__MINGW32__) || defined(__MINGW64__)
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movaps 0x50(%REG_ARG1), %xmm6
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movaps 0x60(%REG_ARG1), %xmm7
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movaps 0x70(%REG_ARG1), %xmm8
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movaps 0x80(%REG_ARG1), %xmm9
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movaps 0x90(%REG_ARG1), %xmm10
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movaps 0xA0(%REG_ARG1), %xmm11
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movaps 0xB0(%REG_ARG1), %xmm12
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movaps 0xC0(%REG_ARG1), %xmm13
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movaps 0xD0(%REG_ARG1), %xmm14
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movaps 0xE0(%REG_ARG1), %xmm15
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#endif
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jmp *%rdx # goto saved address without altering rsp
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