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Correct clobber_table.odin

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gingerBill
2026-08-18 11:44:35 +01:00
parent 80d7f6462a
commit 18df1ed23e
3 changed files with 20 additions and 20 deletions
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20
core/rexcode/isa/x86/tablegen/clobber_table.odin
View File

@@ -4386,16 +4386,16 @@ CLOBBER_TABLE := [Mnemonic][]x86.Clobber{
{implicit_wr={.FPU_ST}, implicit_rd={.FPU_ST}, flags_rd={.PF}},
},
.FCOM = { // sets x87 condition codes C0-C3 (status word), not EFLAGS
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true}, // m32
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true}, // m64
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}}, // ST(i)
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}}, // no operand (ST(1))
},
.FCOMP = { // sets x87 condition codes C0-C3 (status word), not EFLAGS
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true}, // m32
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true}, // m64
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}}, // ST(i)
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}}, // no operand (ST(1))
},
.FCOMPP = { // sets x87 condition codes C0-C3 (status word), not EFLAGS
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
@@ -4714,7 +4714,7 @@ CLOBBER_TABLE := [Mnemonic][]x86.Clobber{
{side_effects={.CET}},
},
.RSTORSSP = { // CET shadow-stack management
{side_effects={.CET}},
{read={0}, reads_mem=true, writes_mem=true, side_effects={.CET}}, // reads restore token, writes previous-ssp token
},
.WRSSD = { // writes to shadow stack
{read={0, 1}, writes_mem=true, side_effects={.CET}},
@@ -4732,7 +4732,7 @@ CLOBBER_TABLE := [Mnemonic][]x86.Clobber{
{side_effects={.CET}},
},
.CLRSSBSY = { // CET shadow-stack management
{side_effects={.CET}},
{read={0}, reads_mem=true, writes_mem=true, side_effects={.CET}}, // reads token, clears busy bit
},
.ENDBR64 = { // CET landing pad; NOP-like
{side_effects={.HINT, .CET}},

12
core/rexcode/isa/x86/tablegen/generated/encode_tables.odin
View File

@@ -6860,13 +6860,13 @@ CLOBBER_FORMS := [2395]lib.Clobber{
// .FCMOVNU
{implicit_wr={.FPU_ST}, implicit_rd={.FPU_ST}, flags_rd={.PF}},
// .FCOM
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
// .FCOMP
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}, reads_mem=true},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
{implicit_wr={.FPU_SW}, implicit_rd={.FPU_ST}},
// .FCOMPP
@@ -7085,7 +7085,7 @@ CLOBBER_FORMS := [2395]lib.Clobber{
// .SAVEPREVSSP
{side_effects={.CET}},
// .RSTORSSP
{side_effects={.CET}},
{read={0}, writes_mem=true, reads_mem=true, side_effects={.CET}},
// .WRSSD
{read={0, 1}, writes_mem=true, side_effects={.CET}},
// .WRSSQ
@@ -7097,7 +7097,7 @@ CLOBBER_FORMS := [2395]lib.Clobber{
// .SETSSBSY
{side_effects={.CET}},
// .CLRSSBSY
{side_effects={.CET}},
{read={0}, writes_mem=true, reads_mem=true, side_effects={.CET}},
// .ENDBR64
{side_effects={.HINT, .CET}},
// .ENDBR32