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riscv compiler support

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Laytan
2024-09-01 15:51:39 +02:00
parent 722b638e2c
commit 28c643d23f
5 changed files with 34 additions and 4 deletions
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3
src/threading.cpp
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@@ -529,6 +529,9 @@ gb_internal gb_inline void yield_thread(void) {
_mm_pause();
#elif defined(GB_CPU_ARM)
__asm__ volatile ("yield" : : : "memory");
#elif defined(GB_CPU_RISCV)
// I guess?
__asm__ volatile ("nop" : : : "memory");
#else
#error Unknown architecture
#endif