diff --git a/core/rexcode/isa/riscv/mnemonics.odin b/core/rexcode/isa/riscv/mnemonics.odin
index adf5effb4..e492c4e82 100644
--- a/core/rexcode/isa/riscv/mnemonics.odin
+++ b/core/rexcode/isa/riscv/mnemonics.odin
@@ -125,6 +125,7 @@ Mnemonic :: enum u16 {
 	C_NOP, C_EBREAK,
 	C_ADDI4SPN,                                  // rd', sp, imm
 	C_LW, C_LD, C_SW, C_SD,                      // (RV64 LD/SD; RV32 has LW/SW)
+	C_FLW, C_FSW,
 	C_FLD, C_FSD,                                // double-precision FP load/store
 	C_ADDI, C_ADDIW, C_LI, C_LUI,
 	C_ADDI16SP,                                  // sp, imm
@@ -137,4 +138,5 @@ Mnemonic :: enum u16 {
 	C_LWSP, C_LDSP, C_SWSP, C_SDSP,
 	C_FLDSP, C_FSDSP,
 	C_JR, C_JALR, C_MV, C_ADD,
+	C_FLWSP, C_FSWSP,
 }
diff --git a/core/rexcode/isa/riscv/tablegen/encoding_table.odin b/core/rexcode/isa/riscv/tablegen/encoding_table.odin
index 0b9eb9d41..3aa4433d9 100644
--- a/core/rexcode/isa/riscv/tablegen/encoding_table.odin
+++ b/core/rexcode/isa/riscv/tablegen/encoding_table.odin
@@ -328,6 +328,12 @@ ENCODING_TABLE:= #partial [Mnemonic][]Encoding{
 	// C.SD rs2', imm(rs1')   = 111 imm[5:3] rs1' imm[7:6] rs2' 00   (RV64-only)
 	.C_SD  = { {.C_SD,  {.GPR_C, .MEM_C_D, .NONE, .NONE}, {.C_RS2_PRIMED, .C_OFFSET_BASE_D, .NONE, .NONE}, 0xE000, 0xE003, .C, {rv64_only=true}} },
 
+	// C.FLW rd', imm(rs1')   = 011 imm[5:3] rs1' imm[2,6] rd' 00     (RV32-only)
+	.C_FLW  = { {.C_FLW,  {.FPR_C, .MEM_C_W, .NONE, .NONE}, {.C_RD_PRIMED,  .C_OFFSET_BASE_W, .NONE, .NONE}, 0x6000, 0xE003, .F, {rv32_only=true}} },
+
+	// C.FSW rs2', imm(rs1')  = 111 imm[5:3] rs1' imm[2,6] rs2' 00    (RV32-only)
+	.C_FSW  = { {.C_FSW,  {.FPR_C, .MEM_C_W, .NONE, .NONE}, {.C_RS2_PRIMED, .C_OFFSET_BASE_W, .NONE, .NONE}, 0xE000, 0xE003, .F, {rv32_only=true}} },
+
 	// ---- Quadrant 1 (op = 01) ----------------------------------------------
 
 	// C.NOP = 0x0001 = C.ADDI x0, 0 (fully fixed encoding).
@@ -417,4 +423,10 @@ ENCODING_TABLE:= #partial [Mnemonic][]Encoding{
 
 	// C.SDSP rs2, imm  = 111 imm[5:3,8:6] rs2 10   (RV64)
 	.C_SDSP = { {.C_SDSP, {.GPR, .MEM_C_SP_D, .NONE, .NONE}, {.C_RS2, .C_IMM_CSS_D, .NONE, .NONE}, 0xE002, 0xE003, .C, {rv64_only=true}} },
+
+	// C.FLWSP rd, imm  = 011 imm[5] rd imm[4:2,7:6] 10               (RV32-only)
+	.C_FLWSP = { {.C_FLWSP, {.FPR, .MEM_C_SP_W, .NONE, .NONE}, {.C_RD_RS1, .C_SP_OFFSET_W, .NONE, .NONE}, 0x6002, 0xE003, .F, {rv32_only=true}} },
+
+	// C.FSWSP rs2, imm = 111 imm[5:2,7:6] rs2 10                     (RV32-only)
+	.C_FSWSP = { {.C_FSWSP, {.FPR, .MEM_C_SP_W, .NONE, .NONE}, {.C_RS2, .C_IMM_CSS_W, .NONE, .NONE}, 0xE002, 0xE003, .F, {rv32_only=true}} },
 }
diff --git a/core/rexcode/isa/riscv/tablegen/generated/decode_tables.odin b/core/rexcode/isa/riscv/tablegen/generated/decode_tables.odin
index bdcc82a26..a737af544 100644
--- a/core/rexcode/isa/riscv/tablegen/generated/decode_tables.odin
+++ b/core/rexcode/isa/riscv/tablegen/generated/decode_tables.odin
@@ -8,7 +8,7 @@ package rexcode_riscv_generated
 import lib "../.."
 
 @(rodata)
-DECODE_ENTRIES := [194]lib.Decode_Entry{
+DECODE_ENTRIES := [198]lib.Decode_Entry{
 	{ .LB, {.GPR,.MEM,.NONE,.NONE}, {.RD,.OFFSET_BASE_I,.NONE,.NONE}, 0x00000003, 0x0000707F, .I, {} },
 	{ .LH, {.GPR,.MEM,.NONE,.NONE}, {.RD,.OFFSET_BASE_I,.NONE,.NONE}, 0x00001003, 0x0000707F, .I, {} },
 	{ .LW, {.GPR,.MEM,.NONE,.NONE}, {.RD,.OFFSET_BASE_I,.NONE,.NONE}, 0x00002003, 0x0000707F, .I, {} },
@@ -177,9 +177,11 @@ DECODE_ENTRIES := [194]lib.Decode_Entry{
 	{ .C_LI, {.GPR_NONZERO,.IMM_C6S,.NONE,.NONE}, {.C_RD_RS1,.C_IMM_CI_S,.NONE,.NONE}, 0x00004001, 0x0000E003, .C, {} },
 	{ .C_LWSP, {.GPR_NONZERO,.MEM_C_SP_W,.NONE,.NONE}, {.C_RD_RS1,.C_SP_OFFSET_W,.NONE,.NONE}, 0x00004002, 0x0000E003, .C, {} },
 	{ .C_LD, {.GPR_C,.MEM_C_D,.NONE,.NONE}, {.C_RD_PRIMED,.C_OFFSET_BASE_D,.NONE,.NONE}, 0x00006000, 0x0000E003, .C, {rv64_only=true} },
+	{ .C_FLW, {.FPR_C,.MEM_C_W,.NONE,.NONE}, {.C_RD_PRIMED,.C_OFFSET_BASE_W,.NONE,.NONE}, 0x00006000, 0x0000E003, .F, {rv32_only=true} },
 	{ .C_ADDI16SP, {.GPR_SP,.IMM_C10S,.NONE,.NONE}, {.NONE,.C_IMM_ADDI16SP,.NONE,.NONE}, 0x00006101, 0x0000EF83, .C, {} },
 	{ .C_LUI, {.GPR_NONZERO,.IMM_C18S,.NONE,.NONE}, {.C_RD_RS1,.C_IMM_LUI,.NONE,.NONE}, 0x00006001, 0x0000E003, .C, {} },
 	{ .C_LDSP, {.GPR_NONZERO,.MEM_C_SP_D,.NONE,.NONE}, {.C_RD_RS1,.C_SP_OFFSET_D,.NONE,.NONE}, 0x00006002, 0x0000E003, .C, {rv64_only=true} },
+	{ .C_FLWSP, {.FPR,.MEM_C_SP_W,.NONE,.NONE}, {.C_RD_RS1,.C_SP_OFFSET_W,.NONE,.NONE}, 0x00006002, 0x0000E003, .F, {rv32_only=true} },
 	{ .C_SUB, {.GPR_C,.GPR_C,.NONE,.NONE}, {.C_RD_RS1_PRIMED,.C_RS2_PRIMED,.NONE,.NONE}, 0x00008C01, 0x0000FC63, .C, {} },
 	{ .C_XOR, {.GPR_C,.GPR_C,.NONE,.NONE}, {.C_RD_RS1_PRIMED,.C_RS2_PRIMED,.NONE,.NONE}, 0x00008C21, 0x0000FC63, .C, {} },
 	{ .C_OR, {.GPR_C,.GPR_C,.NONE,.NONE}, {.C_RD_RS1_PRIMED,.C_RS2_PRIMED,.NONE,.NONE}, 0x00008C41, 0x0000FC63, .C, {} },
@@ -201,8 +203,10 @@ DECODE_ENTRIES := [194]lib.Decode_Entry{
 	{ .C_BEQZ, {.GPR_C,.REL9,.NONE,.NONE}, {.C_RS1_PRIMED,.C_BRANCH9,.NONE,.NONE}, 0x0000C001, 0x0000E003, .C, {branch=true} },
 	{ .C_SWSP, {.GPR,.MEM_C_SP_W,.NONE,.NONE}, {.C_RS2,.C_IMM_CSS_W,.NONE,.NONE}, 0x0000C002, 0x0000E003, .C, {} },
 	{ .C_SD, {.GPR_C,.MEM_C_D,.NONE,.NONE}, {.C_RS2_PRIMED,.C_OFFSET_BASE_D,.NONE,.NONE}, 0x0000E000, 0x0000E003, .C, {rv64_only=true} },
+	{ .C_FSW, {.FPR_C,.MEM_C_W,.NONE,.NONE}, {.C_RS2_PRIMED,.C_OFFSET_BASE_W,.NONE,.NONE}, 0x0000E000, 0x0000E003, .F, {rv32_only=true} },
 	{ .C_BNEZ, {.GPR_C,.REL9,.NONE,.NONE}, {.C_RS1_PRIMED,.C_BRANCH9,.NONE,.NONE}, 0x0000E001, 0x0000E003, .C, {branch=true} },
 	{ .C_SDSP, {.GPR,.MEM_C_SP_D,.NONE,.NONE}, {.C_RS2,.C_IMM_CSS_D,.NONE,.NONE}, 0x0000E002, 0x0000E003, .C, {rv64_only=true} },
+	{ .C_FSWSP, {.FPR,.MEM_C_SP_W,.NONE,.NONE}, {.C_RS2,.C_IMM_CSS_W,.NONE,.NONE}, 0x0000E002, 0x0000E003, .F, {rv32_only=true} },
 }
 
 @(rodata)
@@ -271,19 +275,19 @@ DECODE_INDEX_RVC := [32]lib.Decode_Index{
 	0x08 = { 164,   1},
 	0x09 = { 165,   1},
 	0x0A = { 166,   1},
-	0x0C = { 167,   1},
-	0x0D = { 168,   2},
-	0x0E = { 170,   1},
-	0x11 = { 171,   9},
-	0x12 = { 180,   5},
-	0x14 = { 185,   1},
-	0x15 = { 186,   1},
-	0x16 = { 187,   1},
-	0x18 = { 188,   1},
-	0x19 = { 189,   1},
-	0x1A = { 190,   1},
-	0x1C = { 191,   1},
-	0x1D = { 192,   1},
-	0x1E = { 193,   1},
+	0x0C = { 167,   2},
+	0x0D = { 169,   2},
+	0x0E = { 171,   2},
+	0x11 = { 173,   9},
+	0x12 = { 182,   5},
+	0x14 = { 187,   1},
+	0x15 = { 188,   1},
+	0x16 = { 189,   1},
+	0x18 = { 190,   1},
+	0x19 = { 191,   1},
+	0x1A = { 192,   1},
+	0x1C = { 193,   2},
+	0x1D = { 195,   1},
+	0x1E = { 196,   2},
 }
 
diff --git a/core/rexcode/isa/riscv/tablegen/generated/encode_tables.odin b/core/rexcode/isa/riscv/tablegen/generated/encode_tables.odin
index 50a7581ac..9d8328206 100644
--- a/core/rexcode/isa/riscv/tablegen/generated/encode_tables.odin
+++ b/core/rexcode/isa/riscv/tablegen/generated/encode_tables.odin
@@ -8,7 +8,7 @@ package rexcode_riscv_generated
 import lib "../.."
 
 @(rodata)
-ENCODE_FORMS := [194]lib.Encoding{
+ENCODE_FORMS := [198]lib.Encoding{
 	// .LUI
 	{ .LUI, {.GPR,.IMM20,.NONE,.NONE}, {.RD,.IMM_U,.NONE,.NONE}, 0x00000037, 0x0000007F, .I, {} },
 	// .AUIPC
@@ -335,6 +335,10 @@ ENCODE_FORMS := [194]lib.Encoding{
 	{ .C_SW, {.GPR_C,.MEM_C_W,.NONE,.NONE}, {.C_RS2_PRIMED,.C_OFFSET_BASE_W,.NONE,.NONE}, 0x0000C000, 0x0000E003, .C, {} },
 	// .C_SD
 	{ .C_SD, {.GPR_C,.MEM_C_D,.NONE,.NONE}, {.C_RS2_PRIMED,.C_OFFSET_BASE_D,.NONE,.NONE}, 0x0000E000, 0x0000E003, .C, {rv64_only=true} },
+	// .C_FLW
+	{ .C_FLW, {.FPR_C,.MEM_C_W,.NONE,.NONE}, {.C_RD_PRIMED,.C_OFFSET_BASE_W,.NONE,.NONE}, 0x00006000, 0x0000E003, .F, {rv32_only=true} },
+	// .C_FSW
+	{ .C_FSW, {.FPR_C,.MEM_C_W,.NONE,.NONE}, {.C_RS2_PRIMED,.C_OFFSET_BASE_W,.NONE,.NONE}, 0x0000E000, 0x0000E003, .F, {rv32_only=true} },
 	// .C_FLD
 	{ .C_FLD, {.FPR_C,.MEM_C_D,.NONE,.NONE}, {.C_RD_PRIMED,.C_OFFSET_BASE_D,.NONE,.NONE}, 0x00002000, 0x0000E003, .D, {} },
 	// .C_FSD
@@ -397,6 +401,10 @@ ENCODE_FORMS := [194]lib.Encoding{
 	{ .C_MV, {.GPR_NONZERO,.GPR_NONZERO,.NONE,.NONE}, {.C_RD_RS1,.C_RS2,.NONE,.NONE}, 0x00008002, 0x0000F003, .C, {} },
 	// .C_ADD
 	{ .C_ADD, {.GPR_NONZERO,.GPR_NONZERO,.NONE,.NONE}, {.C_RD_RS1,.C_RS2,.NONE,.NONE}, 0x00009002, 0x0000F003, .C, {} },
+	// .C_FLWSP
+	{ .C_FLWSP, {.FPR,.MEM_C_SP_W,.NONE,.NONE}, {.C_RD_RS1,.C_SP_OFFSET_W,.NONE,.NONE}, 0x00006002, 0x0000E003, .F, {rv32_only=true} },
+	// .C_FSWSP
+	{ .C_FSWSP, {.FPR,.MEM_C_SP_W,.NONE,.NONE}, {.C_RS2,.C_IMM_CSS_W,.NONE,.NONE}, 0x0000E002, 0x0000E003, .F, {rv32_only=true} },
 }
 
 @(rodata)
@@ -565,35 +573,39 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{
 	.C_LD       = {  160,   1},
 	.C_SW       = {  161,   1},
 	.C_SD       = {  162,   1},
-	.C_FLD      = {  163,   1},
-	.C_FSD      = {  164,   1},
-	.C_ADDI     = {  165,   1},
-	.C_ADDIW    = {  166,   1},
-	.C_LI       = {  167,   1},
-	.C_LUI      = {  168,   1},
-	.C_ADDI16SP = {  169,   1},
-	.C_SRLI     = {  170,   1},
-	.C_SRAI     = {  171,   1},
-	.C_ANDI     = {  172,   1},
-	.C_SUB      = {  173,   1},
-	.C_XOR      = {  174,   1},
-	.C_OR       = {  175,   1},
-	.C_AND      = {  176,   1},
-	.C_SUBW     = {  177,   1},
-	.C_ADDW     = {  178,   1},
-	.C_J        = {  179,   1},
-	.C_JAL      = {  180,   1},
-	.C_BEQZ     = {  181,   1},
-	.C_BNEZ     = {  182,   1},
-	.C_SLLI     = {  183,   1},
-	.C_LWSP     = {  184,   1},
-	.C_LDSP     = {  185,   1},
-	.C_SWSP     = {  186,   1},
-	.C_SDSP     = {  187,   1},
-	.C_FLDSP    = {  188,   1},
-	.C_FSDSP    = {  189,   1},
-	.C_JR       = {  190,   1},
-	.C_JALR     = {  191,   1},
-	.C_MV       = {  192,   1},
-	.C_ADD      = {  193,   1},
+	.C_FLW      = {  163,   1},
+	.C_FSW      = {  164,   1},
+	.C_FLD      = {  165,   1},
+	.C_FSD      = {  166,   1},
+	.C_ADDI     = {  167,   1},
+	.C_ADDIW    = {  168,   1},
+	.C_LI       = {  169,   1},
+	.C_LUI      = {  170,   1},
+	.C_ADDI16SP = {  171,   1},
+	.C_SRLI     = {  172,   1},
+	.C_SRAI     = {  173,   1},
+	.C_ANDI     = {  174,   1},
+	.C_SUB      = {  175,   1},
+	.C_XOR      = {  176,   1},
+	.C_OR       = {  177,   1},
+	.C_AND      = {  178,   1},
+	.C_SUBW     = {  179,   1},
+	.C_ADDW     = {  180,   1},
+	.C_J        = {  181,   1},
+	.C_JAL      = {  182,   1},
+	.C_BEQZ     = {  183,   1},
+	.C_BNEZ     = {  184,   1},
+	.C_SLLI     = {  185,   1},
+	.C_LWSP     = {  186,   1},
+	.C_LDSP     = {  187,   1},
+	.C_SWSP     = {  188,   1},
+	.C_SDSP     = {  189,   1},
+	.C_FLDSP    = {  190,   1},
+	.C_FSDSP    = {  191,   1},
+	.C_JR       = {  192,   1},
+	.C_JALR     = {  193,   1},
+	.C_MV       = {  194,   1},
+	.C_ADD      = {  195,   1},
+	.C_FLWSP    = {  196,   1},
+	.C_FSWSP    = {  197,   1},
 }
diff --git a/core/rexcode/isa/riscv/tables/riscv.encode_forms.bin b/core/rexcode/isa/riscv/tables/riscv.encode_forms.bin
index d943520d4..e4f7de28d 100644
Binary files a/core/rexcode/isa/riscv/tables/riscv.encode_forms.bin and b/core/rexcode/isa/riscv/tables/riscv.encode_forms.bin differ
diff --git a/core/rexcode/isa/riscv/tables/riscv.encode_runs.bin b/core/rexcode/isa/riscv/tables/riscv.encode_runs.bin
index cc1520970..48103309b 100644
Binary files a/core/rexcode/isa/riscv/tables/riscv.encode_runs.bin and b/core/rexcode/isa/riscv/tables/riscv.encode_runs.bin differ
diff --git a/core/rexcode/isa/riscv/tables/riscv.entries.bin b/core/rexcode/isa/riscv/tables/riscv.entries.bin
index dbbbaab08..5e57948aa 100644
Binary files a/core/rexcode/isa/riscv/tables/riscv.entries.bin and b/core/rexcode/isa/riscv/tables/riscv.entries.bin differ
diff --git a/core/rexcode/isa/riscv/tables/riscv.idx_rvc.bin b/core/rexcode/isa/riscv/tables/riscv.idx_rvc.bin
index eb8429c0a..9a3625db5 100644
Binary files a/core/rexcode/isa/riscv/tables/riscv.idx_rvc.bin and b/core/rexcode/isa/riscv/tables/riscv.idx_rvc.bin differ