diff --git a/.gitignore b/.gitignore index d8b99b806..fa74a443d 100644 --- a/.gitignore +++ b/.gitignore @@ -251,7 +251,6 @@ paket-files/ # Project Specific -bin/ *.sln !misc/llvm-bim/lli.exe !misc/llvm-bim/opt.exe diff --git a/bin/CODE_OWNERS.TXT b/bin/CODE_OWNERS.TXT new file mode 100644 index 000000000..da0e7a471 --- /dev/null +++ b/bin/CODE_OWNERS.TXT @@ -0,0 +1,200 @@ +This file is a list of the people responsible for ensuring that patches for a +particular part of LLVM are reviewed, either by themself or by someone else. +They are also the gatekeepers for their part of LLVM, with the final word on +what goes in or not. + +The list is sorted by surname and formatted to allow easy grepping and +beautification by scripts. The fields are: name (N), email (E), web-address +(W), PGP key ID and fingerprint (P), description (D), and snail-mail address +(S). Each entry should contain at least the (N), (E) and (D) fields. + +N: Joe Abbey +E: jabbey@arxan.com +D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*) + +N: Owen Anderson +E: resistor@mac.com +D: SelectionDAG (lib/CodeGen/SelectionDAG/*) + +N: Rafael Avila de Espindola +E: rafael.espindola@gmail.com +D: Gold plugin (tools/gold/*) + +N: Justin Bogner +E: mail@justinbogner.com +D: InstrProfiling and related parts of ProfileData + +N: Chandler Carruth +E: chandlerc@gmail.com +E: chandlerc@google.com +D: Config, ADT, Support, inlining & related passes, SROA/mem2reg & related passes, CMake, library layering + +N: Evan Cheng +E: evan.cheng@apple.com +D: parts of code generator not covered by someone else + +N: Eric Christopher +E: echristo@gmail.com +D: Debug Information, autotools/configure/make build, inline assembly + +N: Greg Clayton +E: gclayton@apple.com +D: LLDB + +N: Marshall Clow +E: mclow.lists@gmail.com +D: libc++ + +N: Peter Collingbourne +E: peter@pcc.me.uk +D: llgo + +N: Quentin Colombet +E: qcolombet@apple.com +D: Register allocators + +N: Duncan P. N. Exon Smith +E: dexonsmith@apple.com +D: Branch weights and BlockFrequencyInfo + +N: Hal Finkel +E: hfinkel@anl.gov +D: BBVectorize, the loop reroller, alias analysis and the PowerPC target + +N: Dan Gohman +E: sunfish@mozilla.com +D: WebAssembly Backend (lib/Target/WebAssembly/*) + +N: Renato Golin +E: renato.golin@linaro.org +D: ARM Linux support + +N: Venkatraman Govindaraju +E: venkatra@cs.wisc.edu +D: Sparc Backend (lib/Target/Sparc/*) + +N: Tobias Grosser +E: tobias@grosser.es +D: Polly + +N: James Grosbach +E: grosbach@apple.com +D: MC layer + +N: Justin Holewinski +E: jholewinski@nvidia.com +D: NVPTX Target (lib/Target/NVPTX/*) + +N: Lang Hames +E: lhames@gmail.com +D: MCJIT, RuntimeDyld and JIT event listeners + +N: Galina Kistanova +E: gkistanova@gmail.com +D: LLVM Buildbot + +N: Anton Korobeynikov +E: anton@korobeynikov.info +D: Exception handling, Windows codegen, ARM EABI + +N: Benjamin Kramer +E: benny.kra@gmail.com +D: DWARF Parser + +N: Sergei Larin +E: slarin@codeaurora.org +D: VLIW Instruction Scheduling, Packetization + +N: Chris Lattner +E: sabre@nondot.org +W: http://nondot.org/~sabre/ +D: Everything not covered by someone else + +N: David Majnemer +E: david.majnemer@gmail.com +D: IR Constant Folder, InstCombine + +N: Dylan McKay +E: dylanmckay34@gmail.com +D: AVR Backend + +N: Tim Northover +E: t.p.northover@gmail.com +D: AArch64 backend, misc ARM backend + +N: Diego Novillo +E: dnovillo@google.com +D: SampleProfile and related parts of ProfileData + +N: Jakob Olesen +E: stoklund@2pi.dk +D: TableGen + +N: Richard Osborne +E: richard@xmos.com +D: XCore Backend + +N: Krzysztof Parzyszek +E: kparzysz@codeaurora.org +D: Hexagon Backend + +N: Paul Robinson +E: paul_robinson@playstation.sony.com +D: Sony PlayStation®4 support + +N: Chad Rosier +E: mcrosier@codeaurora.org +D: Fast-Isel + +N: Nadav Rotem +E: nrotem@apple.com +D: X86 Backend, Loop Vectorizer + +N: Daniel Sanders +E: daniel.sanders@imgtec.com +D: MIPS Backend (lib/Target/Mips/*) + +N: Duncan Sands +E: baldrick@free.fr +D: DragonEgg + +N: Kostya Serebryany +E: kcc@google.com +D: AddressSanitizer, ThreadSanitizer (LLVM parts) + +N: Michael Spencer +E: bigcheesegs@gmail.com +D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size + +N: Alexei Starovoitov +E: alexei.starovoitov@gmail.com +D: BPF backend + +N: Tom Stellard +E: thomas.stellard@amd.com +E: mesa-dev@lists.freedesktop.org +D: Release manager for the 3.5 and 3.6 branches, R600 Backend, libclc + +N: Evgeniy Stepanov +E: eugenis@google.com +D: MemorySanitizer (LLVM part) + +N: Andrew Trick +E: atrick@apple.com +D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling + +N: Ulrich Weigand +E: uweigand@de.ibm.com +D: SystemZ Backend + +N: Bill Wendling +E: isanbard@gmail.com +D: libLTO, IR Linker + +N: Peter Zotov +E: whitequark@whitequark.org +D: OCaml bindings + +N: Andrey Churbanov +E: andrey.churbanov@intel.com +D: OpenMP runtime library diff --git a/bin/CREDITS.TXT b/bin/CREDITS.TXT new file mode 100644 index 000000000..da1fb010e --- /dev/null +++ b/bin/CREDITS.TXT @@ -0,0 +1,467 @@ +This file is a partial list of people who have contributed to the LLVM +project. If you have contributed a patch or made some other contribution to +LLVM, please submit a patch to this file to add yourself, and it will be +done! + +The list is sorted by surname and formatted to allow easy grepping and +beautification by scripts. The fields are: name (N), email (E), web-address +(W), PGP key ID and fingerprint (P), description (D), snail-mail address +(S), and (I) IRC handle. + + +N: Vikram Adve +E: vadve@cs.uiuc.edu +W: http://www.cs.uiuc.edu/~vadve/ +D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM + +N: Owen Anderson +E: resistor@mac.com +D: LCSSA pass and related LoopUnswitch work +D: GVNPRE pass, DataLayout refactoring, random improvements + +N: Henrik Bach +D: MingW Win32 API portability layer + +N: Aaron Ballman +E: aaron@aaronballman.com +D: __declspec attributes, Windows support, general bug fixing + +N: Nate Begeman +E: natebegeman@mac.com +D: PowerPC backend developer +D: Target-independent code generator and analysis improvements + +N: Daniel Berlin +E: dberlin@dberlin.org +D: ET-Forest implementation. +D: Sparse bitmap + +N: David Blaikie +E: dblaikie@gmail.com +D: General bug fixing/fit & finish, mostly in Clang + +N: Neil Booth +E: neil@daikokuya.co.uk +D: APFloat implementation. + +N: Misha Brukman +E: brukman+llvm@uiuc.edu +W: http://misha.brukman.net +D: Portions of X86 and Sparc JIT compilers, PowerPC backend +D: Incremental bitcode loader + +N: Cameron Buschardt +E: buschard@uiuc.edu +D: The `mem2reg' pass - promotes values stored in memory to registers + +N: Brendon Cahoon +E: bcahoon@codeaurora.org +D: Loop unrolling with run-time trip counts. + +N: Chandler Carruth +E: chandlerc@gmail.com +E: chandlerc@google.com +D: Hashing algorithms and interfaces +D: Inline cost analysis +D: Machine block placement pass +D: SROA + +N: Casey Carter +E: ccarter@uiuc.edu +D: Fixes to the Reassociation pass, various improvement patches + +N: Evan Cheng +E: evan.cheng@apple.com +D: ARM and X86 backends +D: Instruction scheduler improvements +D: Register allocator improvements +D: Loop optimizer improvements +D: Target-independent code generator improvements + +N: Dan Villiom Podlaski Christiansen +E: danchr@gmail.com +E: danchr@cs.au.dk +W: http://villiom.dk +D: LLVM Makefile improvements +D: Clang diagnostic & driver tweaks +S: Aarhus, Denmark + +N: Jeff Cohen +E: jeffc@jolt-lang.org +W: http://jolt-lang.org +D: Native Win32 API portability layer + +N: John T. Criswell +E: criswell@uiuc.edu +D: Original Autoconf support, documentation improvements, bug fixes + +N: Anshuman Dasgupta +E: adasgupt@codeaurora.org +D: Deterministic finite automaton based infrastructure for VLIW packetization + +N: Stefanus Du Toit +E: stefanus.du.toit@intel.com +D: Bug fixes and minor improvements + +N: Rafael Avila de Espindola +E: rafael.espindola@gmail.com +D: The ARM backend + +N: Dave Estes +E: cestes@codeaurora.org +D: AArch64 machine description for Cortex-A53 + +N: Alkis Evlogimenos +E: alkis@evlogimenos.com +D: Linear scan register allocator, many codegen improvements, Java frontend + +N: Hal Finkel +E: hfinkel@anl.gov +D: Basic-block autovectorization, PowerPC backend improvements + +N: Eric Fiselier +E: eric@efcs.ca +D: LIT patches and documentation. + +N: Ryan Flynn +E: pizza@parseerror.com +D: Miscellaneous bug fixes + +N: Brian Gaeke +E: gaeke@uiuc.edu +W: http://www.students.uiuc.edu/~gaeke/ +D: Portions of X86 static and JIT compilers; initial SparcV8 backend +D: Dynamic trace optimizer +D: FreeBSD/X86 compatibility fixes, the llvm-nm tool + +N: Nicolas Geoffray +E: nicolas.geoffray@lip6.fr +W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ +D: PPC backend fixes for Linux + +N: Louis Gerbarg +E: lgg@apple.com +D: Portions of the PowerPC backend + +N: Saem Ghani +E: saemghani@gmail.com +D: Callgraph class cleanups + +N: Mikhail Glushenkov +E: foldr@codedgers.com +D: Author of llvmc2 + +N: Dan Gohman +E: sunfish@mozilla.com +D: Miscellaneous bug fixes +D: WebAssembly Backend + +N: David Goodwin +E: david@goodwinz.net +D: Thumb-2 code generator + +N: David Greene +E: greened@obbligato.org +D: Miscellaneous bug fixes +D: Register allocation refactoring + +N: Gabor Greif +E: ggreif@gmail.com +D: Improvements for space efficiency + +N: James Grosbach +E: grosbach@apple.com +I: grosbach +D: SjLj exception handling support +D: General fixes and improvements for the ARM back-end +D: MCJIT +D: ARM integrated assembler and assembly parser +D: Led effort for the backend formerly known as ARM64 + +N: Lang Hames +E: lhames@gmail.com +D: PBQP-based register allocator + +N: Gordon Henriksen +E: gordonhenriksen@mac.com +D: Pluggable GC support +D: C interface +D: Ocaml bindings + +N: Raul Fernandes Herbster +E: raul@dsc.ufcg.edu.br +D: JIT support for ARM + +N: Paolo Invernizzi +E: arathorn@fastwebnet.it +D: Visual C++ compatibility fixes + +N: Patrick Jenkins +E: patjenk@wam.umd.edu +D: Nightly Tester + +N: Dale Johannesen +E: dalej@apple.com +D: ARM constant islands improvements +D: Tail merging improvements +D: Rewrite X87 back end +D: Use APFloat for floating point constants widely throughout compiler +D: Implement X87 long double + +N: Brad Jones +E: kungfoomaster@nondot.org +D: Support for packed types + +N: Rod Kay +E: rkay@auroraux.org +D: Author of LLVM Ada bindings + +N: Eric Kidd +W: http://randomhacks.net/ +D: llvm-config script + +N: Anton Korobeynikov +E: asl@math.spbu.ru +D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. +D: x86/linux PIC codegen, aliases, regparm/visibility attributes +D: Switch lowering refactoring + +N: Sumant Kowshik +E: kowshik@uiuc.edu +D: Author of the original C backend + +N: Benjamin Kramer +E: benny.kra@gmail.com +D: Miscellaneous bug fixes + +N: Sundeep Kushwaha +E: sundeepk@codeaurora.org +D: Implemented DFA-based target independent VLIW packetizer + +N: Christopher Lamb +E: christopher.lamb@gmail.com +D: aligned load/store support, parts of noalias and restrict support +D: vreg subreg infrastructure, X86 codegen improvements based on subregs +D: address spaces + +N: Jim Laskey +E: jlaskey@apple.com +D: Improvements to the PPC backend, instruction scheduling +D: Debug and Dwarf implementation +D: Auto upgrade mangler +D: llvm-gcc4 svn wrangler + +N: Chris Lattner +E: sabre@nondot.org +W: http://nondot.org/~sabre/ +D: Primary architect of LLVM + +N: Tanya Lattner (Tanya Brethour) +E: tonic@nondot.org +W: http://nondot.org/~tonic/ +D: The initial llvm-ar tool, converted regression testsuite to dejagnu +D: Modulo scheduling in the SparcV9 backend +D: Release manager (1.7+) + +N: Sylvestre Ledru +E: sylvestre@debian.org +W: http://sylvestre.ledru.info/ +W: http://llvm.org/apt/ +D: Debian and Ubuntu packaging +D: Continuous integration with jenkins + +N: Andrew Lenharth +E: alenhar2@cs.uiuc.edu +W: http://www.lenharth.org/~andrewl/ +D: Alpha backend +D: Sampling based profiling + +N: Nick Lewycky +E: nicholas@mxc.ca +D: PredicateSimplifier pass + +N: Tony Linthicum, et. al. +E: tlinth@codeaurora.org +D: Backend for Qualcomm's Hexagon VLIW processor. + +N: Bruno Cardoso Lopes +E: bruno.cardoso@gmail.com +I: bruno +W: http://brunocardoso.cc +D: Mips backend +D: Random ARM integrated assembler and assembly parser improvements +D: General X86 AVX1 support + +N: Duraid Madina +E: duraid@octopus.com.au +W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ +D: IA64 backend, BigBlock register allocator + +N: John McCall +E: rjmccall@apple.com +D: Clang semantic analysis and IR generation + +N: Michael McCracken +E: michael.mccracken@gmail.com +D: Line number support for llvmgcc + +N: Vladimir Merzliakov +E: wanderer@rsu.ru +D: Test suite fixes for FreeBSD + +N: Scott Michel +E: scottm@aero.org +D: Added STI Cell SPU backend. + +N: Kai Nacke +E: kai@redstar.de +D: Support for implicit TLS model used with MS VC runtime +D: Dumping of Win64 EH structures + +N: Takumi Nakamura +E: geek4civic@gmail.com +E: chapuni@hf.rim.or.jp +D: Cygwin and MinGW support. +D: Win32 tweaks. +S: Yokohama, Japan + +N: Edward O'Callaghan +E: eocallaghan@auroraux.org +W: http://www.auroraux.org +D: Add Clang support with various other improvements to utils/NewNightlyTest.pl +D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings +D: and error clean ups. + +N: Morten Ofstad +E: morten@hue.no +D: Visual C++ compatibility fixes + +N: Jakob Stoklund Olesen +E: stoklund@2pi.dk +D: Machine code verifier +D: Blackfin backend +D: Fast register allocator +D: Greedy register allocator + +N: Richard Osborne +E: richard@xmos.com +D: XCore backend + +N: Devang Patel +E: dpatel@apple.com +D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate +D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements +D: Optimizer improvements, Loop Index Split + +N: Ana Pazos +E: apazos@codeaurora.org +D: Fixes and improvements to the AArch64 backend + +N: Wesley Peck +E: peckw@wesleypeck.com +W: http://wesleypeck.com/ +D: MicroBlaze backend + +N: Francois Pichet +E: pichet2000@gmail.com +D: MSVC support + +N: Vladimir Prus +W: http://vladimir_prus.blogspot.com +E: ghost@cs.msu.su +D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass + +N: Kalle Raiskila +E: kalle.rasikila@nokia.com +D: Some bugfixes to CellSPU + +N: Xerxes Ranby +E: xerxes@zafena.se +D: Cmake dependency chain and various bug fixes + +N: Alex Rosenberg +E: alexr@leftfield.org +I: arosenberg +D: ARM calling conventions rewrite, hard float support + +N: Chad Rosier +E: mcrosier@codeaurora.org +I: mcrosier +D: AArch64 fast instruction selection pass +D: Fixes and improvements to the ARM fast-isel pass +D: Fixes and improvements to the AArch64 backend + +N: Nadav Rotem +E: nrotem@apple.com +D: X86 code generation improvements, Loop Vectorizer. + +N: Roman Samoilov +E: roman@codedgers.com +D: MSIL backend + +N: Duncan Sands +E: baldrick@free.fr +I: baldrick +D: Ada support in llvm-gcc +D: Dragonegg plugin +D: Exception handling improvements +D: Type legalizer rewrite + +N: Ruchira Sasanka +E: sasanka@uiuc.edu +D: Graph coloring register allocator for the Sparc64 backend + +N: Arnold Schwaighofer +E: arnold.schwaighofer@gmail.com +D: Tail call optimization for the x86 backend + +N: Shantonu Sen +E: ssen@apple.com +D: Miscellaneous bug fixes + +N: Anand Shukla +E: ashukla@cs.uiuc.edu +D: The `paths' pass + +N: Michael J. Spencer +E: bigcheesegs@gmail.com +D: Shepherding Windows COFF support into MC. +D: Lots of Windows stuff. + +N: Reid Spencer +E: rspencer@reidspencer.com +W: http://reidspencer.com/ +D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid + +N: Alp Toker +E: alp@nuanti.com +W: http://atoker.com/ +D: C++ frontend next generation standards implementation + +N: Craig Topper +E: craig.topper@gmail.com +D: X86 codegen and disassembler improvements. AVX2 support. + +N: Edwin Torok +E: edwintorok@gmail.com +D: Miscellaneous bug fixes + +N: Adam Treat +E: manyoso@yahoo.com +D: C++ bugs filed, and C++ front-end bug fixes. + +N: Lauro Ramos Venancio +E: lauro.venancio@indt.org.br +D: ARM backend improvements +D: Thread Local Storage implementation + +N: Bill Wendling +I: wendling +E: isanbard@gmail.com +D: Release manager, IR Linker, LTO +D: Bunches of stuff + +N: Bob Wilson +E: bob.wilson@acm.org +D: Advanced SIMD (NEON) support in the ARM backend. + diff --git a/bin/LICENSE.TXT b/bin/LICENSE.TXT new file mode 100644 index 000000000..84090c07a --- /dev/null +++ b/bin/LICENSE.TXT @@ -0,0 +1,70 @@ +============================================================================== +LLVM Release License +============================================================================== +University of Illinois/NCSA +Open Source License + +Copyright (c) 2003-2015 University of Illinois at Urbana-Champaign. +All rights reserved. + +Developed by: + + LLVM Team + + University of Illinois at Urbana-Champaign + + http://llvm.org + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal with +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimers. + + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimers in the + documentation and/or other materials provided with the distribution. + + * Neither the names of the LLVM Team, University of Illinois at + Urbana-Champaign, nor the names of its contributors may be used to + endorse or promote products derived from this Software without specific + prior written permission. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE +SOFTWARE. + +============================================================================== +Copyrights and Licenses for Third Party Software Distributed with LLVM: +============================================================================== +The LLVM software contains code written by third parties. Such software will +have its own individual LICENSE.TXT file in the directory in which it appears. +This file will describe the copyrights, license, and restrictions which apply +to that code. + +The disclaimer of warranty in the University of Illinois Open Source License +applies to all code in the LLVM Distribution, and nothing in any of the +other licenses gives permission to use the names of the LLVM Team or the +University of Illinois to endorse or promote products derived from this +Software. + +The following pieces of software have additional or alternate copyrights, +licenses, and/or restrictions: + +Program Directory +------- --------- +Autoconf llvm/autoconf + llvm/projects/ModuleMaker/autoconf +Google Test llvm/utils/unittest/googletest +OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex} +pyyaml tests llvm/test/YAMLParser/{*.data, LICENSE.TXT} +ARM contributions llvm/lib/Target/ARM/LICENSE.TXT +md5 contributions llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h diff --git a/bin/llc.exe b/bin/llc.exe new file mode 100644 index 000000000..a7bb7cc25 Binary files /dev/null and b/bin/llc.exe differ diff --git a/bin/lli.exe b/bin/lli.exe new file mode 100644 index 000000000..7691672dc Binary files /dev/null and b/bin/lli.exe differ diff --git a/bin/opt.exe b/bin/opt.exe new file mode 100644 index 000000000..9b34c9ac8 Binary files /dev/null and b/bin/opt.exe differ diff --git a/src/main.cpp b/src/main.cpp index 0ae2f684d..e4bf5fb7d 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -40,7 +40,7 @@ i32 win32_exec_command_line_app(char *fmt, ...) { } } - +// #define DISPLAY_TIMING #if defined(DISPLAY_TIMING) #define INIT_TIMER() f64 start_time = gb_time_now(), end_time = 0, total_time = 0 #define PRINT_TIMER(section) do { \ @@ -67,6 +67,18 @@ int main(int argc, char **argv) { gb_printf_err("Please specify a .odin file\n"); return 1; } + char module_path_buf[300] = {}; + String module_path = {}; + module_path.text = cast(u8 *)module_path_buf; + module_path.len = GetModuleFileNameA(NULL, module_path_buf, gb_size_of(module_path_buf)); + for (isize i = module_path.len-1; i >= 0; i--) { + u8 c = module_path.text[i]; + if (c == '/' || c == '\\') { + break; + } + module_path.len--; + } + INIT_TIMER(); @@ -81,12 +93,14 @@ int main(int argc, char **argv) { Parser parser = {0}; - if (!init_parser(&parser)) + if (!init_parser(&parser)) { return 1; + } // defer (destroy_parser(&parser)); - if (parse_files(&parser, init_filename) != ParseFile_None) + if (parse_files(&parser, init_filename) != ParseFile_None) { return 1; + } PRINT_TIMER("Syntax Parser"); @@ -109,8 +123,9 @@ int main(int argc, char **argv) { #endif #if 1 ssaGen ssa = {}; - if (!ssa_gen_init(&ssa, &checker)) + if (!ssa_gen_init(&ssa, &checker)) { return 1; + } // defer (ssa_gen_destroy(&ssa)); ssa_gen_tree(&ssa); @@ -124,73 +139,68 @@ int main(int argc, char **argv) { char const *output_name = ssa.output_file.filename; isize base_name_len = gb_path_extension(output_name)-1 - output_name; + String output = make_string(cast(u8 *)output_name, base_name_len); i32 exit_code = 0; - { - char buf[300] = {}; - u32 buf_len = GetModuleFileNameA(GetModuleHandleA(NULL), buf, gb_size_of(buf)); - for (isize i = buf_len-1; i >= 0; i--) { - if (buf[i] == '\\' || - buf[i] == '/') { - break; - } - buf_len--; - } - - // For more passes arguments: http://llvm.org/docs/Passes.html - exit_code = win32_exec_command_line_app( - // "../misc/llvm-bin/opt %s -o %.*s.bc " - "\"%.*sbin\\opt.exe\" %s -o %.*s.bc " - "-memcpyopt " - "-mem2reg " - "-die -dse " - "-dce " - // "-S " - // "-debug-pass=Arguments " - "", - buf_len, buf, - output_name, - cast(int)base_name_len, output_name); - if (exit_code != 0) - return exit_code; - - PRINT_TIMER("llvm-opt"); + // For more passes arguments: http://llvm.org/docs/Passes.html + exit_code = win32_exec_command_line_app( + "%.*sbin/opt %s -o %.*s.bc " + "-memcpyopt " + "-mem2reg " + "-die -dse " + "-dce " + // "-S " + // "-debug-pass=Arguments " + "", + LIT(module_path), + output_name, LIT(output)); + if (exit_code != 0) { + return exit_code; } -#if 1 - gbString lib_str = gb_string_make(gb_heap_allocator(), "-lKernel32"); + PRINT_TIMER("llvm-opt"); + + // For more arguments: http://llvm.org/docs/CommandGuide/llc.html + exit_code = win32_exec_command_line_app( + "%.*sbin/llc %.*s.bc -filetype=obj -O0 " + "-march=x86-64 " + "", + LIT(module_path), + LIT(output)); + if (exit_code != 0) { + return exit_code; + } + + PRINT_TIMER("llvm-llc"); + + gbString lib_str = gb_string_make(gb_heap_allocator(), "Kernel32.lib"); // defer (gb_string_free(lib_str)); char lib_str_buf[1024] = {}; gb_for_array(i, parser.system_libraries) { String lib = parser.system_libraries[i]; isize len = gb_snprintf(lib_str_buf, gb_size_of(lib_str_buf), - " -l%.*s", LIT(lib)); + " %.*s.lib", LIT(lib)); lib_str = gb_string_appendc(lib_str, lib_str_buf); } + char *linker_flags = "-nologo -DEFAULTLIB:libcmt -machine:x64 -incremental:no -opt:ref -subsystem:console"; exit_code = win32_exec_command_line_app( - "clang %.*s.bc -o %.*s.exe " - "-O0 -g " - // "-O2 " - "-Wno-override-module " - "%s", - cast(int)base_name_len, output_name, - cast(int)base_name_len, output_name, - lib_str); - - if (exit_code != 0) + "link %.*s.obj -OUT:%.*s.exe %s %s " + "", + LIT(output), LIT(output), + lib_str, linker_flags); + if (exit_code != 0) { return exit_code; + } - PRINT_TIMER("clang-compiler"); - + PRINT_TIMER("msvc-link"); +#endif PRINT_ACCUMULATION(); if (run_output) { win32_exec_command_line_app("%.*s.exe", cast(int)base_name_len, output_name); } -#endif -#endif return 0; }