mirror of
https://github.com/odin-lang/Odin.git
synced 2026-08-28 16:01:31 +00:00
core:rexcode: regenerate x86 encoding tables
This commit is contained in:
File diff suppressed because it is too large
Load Diff
@@ -2185,25 +2185,25 @@ VEX_DECODE_ENTRIES := [707]lib.VEX_Decode_Entry{
|
||||
}
|
||||
|
||||
@(rodata)
|
||||
EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
EVEX_DECODE_ENTRIES := [421]lib.VEX_Decode_Entry{
|
||||
{._0F, 1, 0x6F, 0xFF, .W0, .L1, .VMOVDQA32, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x6F, 0xFF, .W0, .L0, .VMOVDQA32, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x6F, 0xFF, .W1, .L0, .VMOVDQA64, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x6F, 0xFF, .W1, .L2, .VMOVDQA64, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x6F, 0xFF, .W1, .L1, .VMOVDQA64, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x6F, 0xFF, .W0, .L2, .VMOVDQA32, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W0, .L2, .VPROLD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W1, .L1, .VPROLQ, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W0, .L0, .VPROLD, {.XMM, .XMM_M128, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W0, .L1, .VPROLD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W0, .L2, .VPROLD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W1, .L2, .VPROLQ, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W1, .L0, .VPROLQ, {.XMM, .XMM_M128, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W1, .L1, .VPROLQ, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W0, .L2, .VPRORD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0x01, .W0, .L1, .VPROLD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, modrm_reg_ext=true, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W1, .L0, .VPRORQ, {.XMM, .XMM_M128, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W1, .L1, .VPRORQ, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W0, .L2, .VPRORD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W0, .L1, .VPRORD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W1, .L2, .VPRORQ, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W0, .L0, .VPRORD, {.XMM, .XMM_M128, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W0, .L1, .VPRORD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x72, 0xFF, .W1, .L1, .VPRORQ, {.YMM, .YMM_M256, .IMM8, .NONE}, {.VVVV, .MR, .IB, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F, 1, 0x7F, 0xFF, .W1, .L0, .VMOVDQA64, {.XMM_M128, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x7F, 0xFF, .W1, .L1, .VMOVDQA64, {.YMM_M256, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F, 1, 0x7F, 0xFF, .W1, .L2, .VMOVDQA64, {.ZMM_M512, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
@@ -2234,81 +2234,84 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F, 3, 0x7F, 0xFF, .W0, .L1, .VMOVDQU8, {.YMM_M256, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=3, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F, 3, 0x7F, 0xFF, .W0, .L2, .VMOVDQU8, {.ZMM_M512, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=3, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F, 3, 0x7F, 0xFF, .W1, .L1, .VMOVDQU16, {.YMM_M256, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F, prefix=3, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x10, 0xFF, .W1, .L2, .VPSRLVW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x10, 0xFF, .W1, .L0, .VPSRLVW, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x10, 0xFF, .W1, .L1, .VPSRLVW, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x10, 0xFF, .W1, .L0, .VPSRLVW, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x10, 0xFF, .W1, .L2, .VPSRLVW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x11, 0xFF, .W1, .L1, .VPSRAVW, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x11, 0xFF, .W1, .L2, .VPSRAVW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x11, 0xFF, .W1, .L0, .VPSRAVW, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x11, 0xFF, .W1, .L1, .VPSRAVW, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x12, 0xFF, .W1, .L1, .VPSLLVW, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x12, 0xFF, .W1, .L2, .VPSLLVW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x12, 0xFF, .W1, .L0, .VPSLLVW, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x12, 0xFF, .W1, .L2, .VPSLLVW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x13, 0xFF, .WIG, .L2, .VCVTPH2PS, {.ZMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W0, .L0, .VPRORVD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W1, .L0, .VPRORVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W0, .L2, .VPRORVD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W1, .L2, .VPRORVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W0, .L2, .VPRORVD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W0, .L0, .VPRORVD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W0, .L1, .VPRORVD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W1, .L1, .VPRORVQ, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W0, .L1, .VPROLVD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x14, 0xFF, .W1, .L0, .VPRORVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W1, .L2, .VPROLVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W1, .L1, .VPROLVQ, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W1, .L0, .VPROLVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W0, .L1, .VPROLVD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W0, .L0, .VPROLVD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W0, .L2, .VPROLVD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W1, .L2, .VPROLVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L1, .VPTESTMW, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L2, .VPTESTMW, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x15, 0xFF, .W1, .L0, .VPROLVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W0, .L2, .VPTESTMB, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W0, .L1, .VPTESTMB, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L0, .VPTESTMW, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L1, .VPTESTMW, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L2, .VPTESTMW, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W0, .L0, .VPTESTMB, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x26, 0xFF, .W1, .L0, .VPTESTMW, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W1, .L1, .VPTESTMQ, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W0, .L0, .VPTESTMD, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W0, .L1, .VPTESTMD, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W0, .L2, .VPTESTMD, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W1, .L2, .VPTESTMQ, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W1, .L0, .VPTESTMQ, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W1, .L1, .VPTESTMQ, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x27, 0xFF, .W0, .L1, .VPTESTMD, {.K, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W0, .L1, .VSCALEFPS, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W1, .L1, .VSCALEFPD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W0, .L0, .VSCALEFPS, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W1, .L0, .VSCALEFPD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W1, .L2, .VSCALEFPD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W0, .L2, .VSCALEFPS, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W0, .L1, .VSCALEFPS, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W1, .L0, .VSCALEFPD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W0, .L0, .VSCALEFPS, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2C, 0xFF, .W1, .L1, .VSCALEFPD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2D, 0xFF, .W1, .LIG, .VSCALEFSD, {.XMM, .XMM, .XMM_M64, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x2D, 0xFF, .W0, .LIG, .VSCALEFSS, {.XMM, .XMM, .XMM_M32, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L2, .VGETEXPPS, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L0, .VGETEXPPS, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W1, .L1, .VGETEXPPD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L1, .VGETEXPPS, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W1, .L0, .VGETEXPPD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W1, .L2, .VGETEXPPD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L1, .VGETEXPPS, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L2, .VGETEXPPS, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W1, .L0, .VGETEXPPD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W1, .L1, .VGETEXPPD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x42, 0xFF, .W0, .L0, .VGETEXPPS, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x43, 0xFF, .W1, .LIG, .VGETEXPSD, {.XMM, .XMM, .XMM_M64, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x43, 0xFF, .W0, .LIG, .VGETEXPSS, {.XMM, .XMM, .XMM_M32, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L0, .VPLZCNTD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L2, .VPLZCNTD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W1, .L0, .VPLZCNTQ, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L1, .VPLZCNTD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W1, .L1, .VPLZCNTQ, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W1, .L2, .VPLZCNTQ, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x46, 0xFF, .W1, .L0, .VPSRAVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x46, 0xFF, .W1, .L2, .VPSRAVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W1, .L1, .VPLZCNTQ, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L2, .VPLZCNTD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L1, .VPLZCNTD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W1, .L0, .VPLZCNTQ, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x44, 0xFF, .W0, .L0, .VPLZCNTD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x46, 0xFF, .W1, .L1, .VPSRAVQ, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W1, .L0, .VRCP14PD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W0, .L2, .VRCP14PS, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x46, 0xFF, .W1, .L2, .VPSRAVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x46, 0xFF, .W1, .L0, .VPSRAVQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W1, .L2, .VRCP14PD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W1, .L1, .VRCP14PD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W0, .L2, .VRCP14PS, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W1, .L0, .VRCP14PD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W0, .L1, .VRCP14PS, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W0, .L0, .VRCP14PS, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4C, 0xFF, .W1, .L1, .VRCP14PD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4D, 0xFF, .W0, .LIG, .VRCP14SS, {.XMM, .XMM, .XMM_M32, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4D, 0xFF, .W1, .LIG, .VRCP14SD, {.XMM, .XMM, .XMM_M64, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L0, .VRSQRT14PD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L2, .VRSQRT14PD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L1, .VRSQRT14PD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W0, .L1, .VRSQRT14PS, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W0, .L2, .VRSQRT14PS, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W0, .L0, .VRSQRT14PS, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L2, .VRSQRT14PD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L0, .VRSQRT14PD, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W1, .L1, .VRSQRT14PD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4E, 0xFF, .W0, .L1, .VRSQRT14PS, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4F, 0xFF, .W1, .LIG, .VRSQRT14SD, {.XMM, .XMM, .XMM_M64, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x4F, 0xFF, .W0, .LIG, .VRSQRT14SS, {.XMM, .XMM, .XMM_M32, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x52, 0xFF, .W0, .L2, .VPDPWSSD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x52, 0xFF, .W0, .L1, .VPDPWSSD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x52, 0xFF, .W0, .L0, .VPDPWSSD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x64, 0xFF, .W1, .L0, .VPBLENDMQ, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x64, 0xFF, .W0, .L2, .VPBLENDMD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x64, 0xFF, .W1, .L1, .VPBLENDMQ, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
@@ -2328,33 +2331,33 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F38, 1, 0x66, 0xFF, .W0, .L1, .VPBLENDMB, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x66, 0xFF, .W0, .L2, .VPBLENDMB, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W0, .L0, .VPERMI2B, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W0, .L1, .VPERMI2B, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W0, .L2, .VPERMI2B, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W1, .L1, .VPERMI2W, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W1, .L0, .VPERMI2W, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W1, .L2, .VPERMI2W, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W0, .L1, .VPERMI2B, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x75, 0xFF, .W0, .L2, .VPERMI2B, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W0, .L0, .VPERMI2D, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W0, .L1, .VPERMI2D, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W0, .L2, .VPERMI2D, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W1, .L0, .VPERMI2Q, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W1, .L2, .VPERMI2Q, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x76, 0xFF, .W1, .L1, .VPERMI2Q, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L1, .VPERMI2PD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L0, .VPERMI2PD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L2, .VPERMI2PD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W0, .L1, .VPERMI2PS, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W0, .L0, .VPERMI2PS, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L0, .VPERMI2PD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L1, .VPERMI2PD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W1, .L2, .VPERMI2PD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x77, 0xFF, .W0, .L2, .VPERMI2PS, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W0, .L1, .VPERMT2B, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W0, .L2, .VPERMT2B, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W1, .L0, .VPERMT2W, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W1, .L1, .VPERMT2W, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W0, .L2, .VPERMT2B, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W0, .L1, .VPERMT2B, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W1, .L0, .VPERMT2W, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W1, .L2, .VPERMT2W, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7D, 0xFF, .W0, .L0, .VPERMT2B, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W0, .L0, .VPERMT2D, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W1, .L1, .VPERMT2Q, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W0, .L2, .VPERMT2D, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W0, .L1, .VPERMT2D, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W1, .L1, .VPERMT2Q, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W1, .L0, .VPERMT2Q, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7E, 0xFF, .W1, .L2, .VPERMT2Q, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x7F, 0xFF, .W0, .L1, .VPERMT2PS, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
@@ -2390,36 +2393,36 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F38, 1, 0x8B, 0xFF, .W0, .L2, .VPCOMPRESSD, {.ZMM_M512, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8B, 0xFF, .W1, .L0, .VPCOMPRESSQ, {.XMM_M128, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8B, 0xFF, .W1, .L1, .VPCOMPRESSQ, {.YMM_M256, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W1, .L2, .VPERMW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W0, .L0, .VPERMB, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W1, .L1, .VPERMW, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W0, .L2, .VPERMB, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W0, .L1, .VPERMB, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W1, .L0, .VPERMW, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0x8D, 0xFF, .W1, .L2, .VPERMW, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W1, .L2, .VPSCATTERDQ, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W1, .L0, .VPSCATTERDQ, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W1, .L1, .VPSCATTERDQ, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W1, .L0, .VPSCATTERDQ, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W0, .L2, .VPSCATTERDD, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W0, .L1, .VPSCATTERDD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W0, .L0, .VPSCATTERDD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W0, .L0, .VPSCATTERQD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA0, 0xFF, .W0, .L1, .VPSCATTERDD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W0, .L2, .VPSCATTERQD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W1, .L0, .VPSCATTERQQ, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W0, .L0, .VPSCATTERQD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W0, .L1, .VPSCATTERQD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W1, .L1, .VPSCATTERQQ, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W1, .L2, .VPSCATTERQQ, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA1, 0xFF, .W0, .L2, .VPSCATTERQD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W1, .L2, .VSCATTERDPD, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W0, .L1, .VSCATTERDPS, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W0, .L0, .VSCATTERDPS, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W0, .L2, .VSCATTERDPS, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W1, .L0, .VSCATTERDPD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W1, .L1, .VSCATTERDPD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W0, .L0, .VSCATTERQPS, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W1, .L0, .VSCATTERDPD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W0, .L0, .VSCATTERDPS, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA2, 0xFF, .W0, .L1, .VSCATTERDPS, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W1, .L2, .VSCATTERQPD, {.M, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W0, .L2, .VSCATTERQPS, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W1, .L1, .VSCATTERQPD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W0, .L1, .VSCATTERQPS, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W1, .L0, .VSCATTERQPD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W1, .L1, .VSCATTERQPD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W0, .L2, .VSCATTERQPS, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xA3, 0xFF, .W0, .L0, .VSCATTERQPS, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xC4, 0xFF, .W0, .L2, .VPCONFLICTD, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xC4, 0xFF, .W0, .L1, .VPCONFLICTD, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xC4, 0xFF, .W1, .L0, .VPCONFLICTQ, {.XMM, .XMM_M128, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
@@ -2427,8 +2430,8 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F38, 1, 0xC4, 0xFF, .W1, .L1, .VPCONFLICTQ, {.YMM, .YMM_M256, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 1, 0xC4, 0xFF, .W1, .L2, .VPCONFLICTQ, {.ZMM, .ZMM_M512, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x10, 0xFF, .W0, .L2, .VPMOVUSWB, {.YMM_M256, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x10, 0xFF, .W0, .L1, .VPMOVUSWB, {.XMM_M128, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x10, 0xFF, .W0, .L0, .VPMOVUSWB, {.XMM_M64, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x10, 0xFF, .W0, .L1, .VPMOVUSWB, {.XMM_M128, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x11, 0xFF, .W0, .L0, .VPMOVUSDB, {.XMM_M32, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x11, 0xFF, .W0, .L1, .VPMOVUSDB, {.XMM_M64, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x11, 0xFF, .W0, .L2, .VPMOVUSDB, {.XMM_M128, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
@@ -2453,14 +2456,14 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F38, 2, 0x22, 0xFF, .W0, .L2, .VPMOVSQB, {.XMM_M64, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x22, 0xFF, .W0, .L0, .VPMOVSQB, {.XMM_M32, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x22, 0xFF, .W0, .L1, .VPMOVSQB, {.XMM_M32, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x23, 0xFF, .W0, .L1, .VPMOVSDW, {.XMM_M128, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x23, 0xFF, .W0, .L0, .VPMOVSDW, {.XMM_M64, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x23, 0xFF, .W0, .L1, .VPMOVSDW, {.XMM_M128, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x23, 0xFF, .W0, .L2, .VPMOVSDW, {.YMM_M256, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x24, 0xFF, .W0, .L1, .VPMOVSQW, {.XMM_M64, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x24, 0xFF, .W0, .L0, .VPMOVSQW, {.XMM_M32, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x24, 0xFF, .W0, .L2, .VPMOVSQW, {.XMM_M128, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x25, 0xFF, .W0, .L2, .VPMOVSQD, {.YMM_M256, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x25, 0xFF, .W0, .L0, .VPMOVSQD, {.XMM_M64, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x25, 0xFF, .W0, .L2, .VPMOVSQD, {.YMM_M256, .ZMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x25, 0xFF, .W0, .L1, .VPMOVSQD, {.XMM_M128, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x26, 0xFF, .W1, .L2, .VPTESTNMW, {.K, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F38, 2, 0x26, 0xFF, .W1, .L0, .VPTESTNMW, {.K, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
@@ -2516,17 +2519,17 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F38, 2, 0x39, 0xFF, .W0, .L0, .VPMOVD2M, {.K, .XMM, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x39, 0xFF, .W0, .L2, .VPMOVD2M, {.K, .ZMM, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=2, needs_modrm=true}},
|
||||
{._0F38, 2, 0x39, 0xFF, .W1, .L0, .VPMOVQ2M, {.K, .XMM, .NONE, .NONE}, {.REG, .MR, .NONE, .NONE}, {esc=._0F38, prefix=2, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=2, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W1, .L0, .VALIGNQ, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W0, .L0, .VALIGND, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W1, .L1, .VALIGNQ, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W0, .L1, .VALIGND, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W0, .L2, .VALIGND, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W1, .L2, .VALIGNQ, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W0, .L0, .VALIGND, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W0, .L2, .VALIGND, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W1, .L1, .VALIGNQ, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x03, 0xFF, .W1, .L0, .VALIGNQ, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x08, 0xFF, .W0, .L0, .VRNDSCALEPS, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x08, 0xFF, .W0, .L1, .VRNDSCALEPS, {.YMM, .YMM_M256, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x08, 0xFF, .W0, .L2, .VRNDSCALEPS, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x09, 0xFF, .W1, .L0, .VRNDSCALEPD, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x08, 0xFF, .W0, .L1, .VRNDSCALEPS, {.YMM, .YMM_M256, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x09, 0xFF, .W1, .L1, .VRNDSCALEPD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x09, 0xFF, .W1, .L0, .VRNDSCALEPD, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x09, 0xFF, .W1, .L2, .VRNDSCALEPD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x0A, 0xFF, .W0, .LIG, .VRNDSCALESS, {.XMM, .XMM, .XMM_M32, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x0B, 0xFF, .W1, .LIG, .VRNDSCALESD, {.XMM, .XMM, .XMM_M64, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=4, needs_modrm=true}},
|
||||
@@ -2544,17 +2547,17 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F3A, 1, 0x1F, 0xFF, .W0, .L1, .VPCMPD, {.K, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x1F, 0xFF, .W1, .L1, .VPCMPQ, {.K, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W0, .L0, .VPTERNLOGD, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W0, .L1, .VPTERNLOGD, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W1, .L0, .VPTERNLOGQ, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W1, .L1, .VPTERNLOGQ, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W0, .L2, .VPTERNLOGD, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W0, .L1, .VPTERNLOGD, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W1, .L2, .VPTERNLOGQ, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W1, .L0, .VPTERNLOGQ, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x25, 0xFF, .W0, .L2, .VPTERNLOGD, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W1, .L0, .VGETMANTPD, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W1, .L1, .VGETMANTPD, {.YMM, .YMM_M256, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W0, .L1, .VGETMANTPS, {.YMM, .YMM_M256, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W0, .L0, .VGETMANTPS, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W1, .L2, .VGETMANTPD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W0, .L2, .VGETMANTPS, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W1, .L2, .VGETMANTPD, {.ZMM, .ZMM_M512, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x26, 0xFF, .W0, .L0, .VGETMANTPS, {.XMM, .XMM_M128, .IMM8, .NONE}, {.REG, .MR, .IB, .NONE}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=3, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x27, 0xFF, .W1, .LIG, .VGETMANTSD, {.XMM, .XMM, .XMM_M64, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x27, 0xFF, .W0, .LIG, .VGETMANTSS, {.XMM, .XMM, .XMM_M32, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x3E, 0xFF, .W1, .L2, .VPCMPUW, {.K, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
@@ -2569,8 +2572,8 @@ EVEX_DECODE_ENTRIES := [418]lib.VEX_Decode_Entry{
|
||||
{._0F3A, 1, 0x3F, 0xFF, .W0, .L0, .VPCMPB, {.K, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x3F, 0xFF, .W0, .L2, .VPCMPB, {.K, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x3F, 0xFF, .W1, .L2, .VPCMPW, {.K, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x42, 0xFF, .W0, .L0, .VDBPSADBW, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x42, 0xFF, .W0, .L1, .VDBPSADBW, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x42, 0xFF, .W0, .L0, .VDBPSADBW, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x42, 0xFF, .W0, .L2, .VDBPSADBW, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x50, 0xFF, .W1, .L1, .VRANGEPD, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, op_count=4, needs_modrm=true}},
|
||||
{._0F3A, 1, 0x50, 0xFF, .W0, .L2, .VRANGEPS, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, op_count=4, needs_modrm=true}},
|
||||
@@ -3643,52 +3646,53 @@ EVEX_INDEX_0F38 := [4][256]lib.Decode_Index{
|
||||
0x4D = {113, 2},
|
||||
0x4E = {115, 6},
|
||||
0x4F = {121, 2},
|
||||
0x64 = {123, 6},
|
||||
0x65 = {129, 6},
|
||||
0x66 = {135, 6},
|
||||
0x75 = {141, 6},
|
||||
0x76 = {147, 6},
|
||||
0x77 = {153, 6},
|
||||
0x7D = {159, 6},
|
||||
0x7E = {165, 6},
|
||||
0x7F = {171, 6},
|
||||
0x83 = {177, 3},
|
||||
0x88 = {180, 6},
|
||||
0x89 = {186, 6},
|
||||
0x8A = {192, 6},
|
||||
0x8B = {198, 6},
|
||||
0x8D = {204, 6},
|
||||
0xA0 = {210, 6},
|
||||
0xA1 = {216, 6},
|
||||
0xA2 = {222, 6},
|
||||
0xA3 = {228, 6},
|
||||
0xC4 = {234, 6},
|
||||
0x52 = {123, 3},
|
||||
0x64 = {126, 6},
|
||||
0x65 = {132, 6},
|
||||
0x66 = {138, 6},
|
||||
0x75 = {144, 6},
|
||||
0x76 = {150, 6},
|
||||
0x77 = {156, 6},
|
||||
0x7D = {162, 6},
|
||||
0x7E = {168, 6},
|
||||
0x7F = {174, 6},
|
||||
0x83 = {180, 3},
|
||||
0x88 = {183, 6},
|
||||
0x89 = {189, 6},
|
||||
0x8A = {195, 6},
|
||||
0x8B = {201, 6},
|
||||
0x8D = {207, 6},
|
||||
0xA0 = {213, 6},
|
||||
0xA1 = {219, 6},
|
||||
0xA2 = {225, 6},
|
||||
0xA3 = {231, 6},
|
||||
0xC4 = {237, 6},
|
||||
},
|
||||
2 = { /* prefix = F3 */
|
||||
0x10 = {240, 3},
|
||||
0x11 = {243, 3},
|
||||
0x12 = {246, 3},
|
||||
0x13 = {249, 3},
|
||||
0x14 = {252, 3},
|
||||
0x15 = {255, 3},
|
||||
0x20 = {258, 3},
|
||||
0x21 = {261, 3},
|
||||
0x22 = {264, 3},
|
||||
0x23 = {267, 3},
|
||||
0x24 = {270, 3},
|
||||
0x25 = {273, 3},
|
||||
0x26 = {276, 6},
|
||||
0x27 = {282, 6},
|
||||
0x28 = {288, 6},
|
||||
0x29 = {294, 6},
|
||||
0x30 = {300, 3},
|
||||
0x31 = {303, 3},
|
||||
0x32 = {306, 3},
|
||||
0x33 = {309, 3},
|
||||
0x34 = {312, 3},
|
||||
0x35 = {315, 3},
|
||||
0x38 = {318, 6},
|
||||
0x39 = {324, 6},
|
||||
0x10 = {243, 3},
|
||||
0x11 = {246, 3},
|
||||
0x12 = {249, 3},
|
||||
0x13 = {252, 3},
|
||||
0x14 = {255, 3},
|
||||
0x15 = {258, 3},
|
||||
0x20 = {261, 3},
|
||||
0x21 = {264, 3},
|
||||
0x22 = {267, 3},
|
||||
0x23 = {270, 3},
|
||||
0x24 = {273, 3},
|
||||
0x25 = {276, 3},
|
||||
0x26 = {279, 6},
|
||||
0x27 = {285, 6},
|
||||
0x28 = {291, 6},
|
||||
0x29 = {297, 6},
|
||||
0x30 = {303, 3},
|
||||
0x31 = {306, 3},
|
||||
0x32 = {309, 3},
|
||||
0x33 = {312, 3},
|
||||
0x34 = {315, 3},
|
||||
0x35 = {318, 3},
|
||||
0x38 = {321, 6},
|
||||
0x39 = {327, 6},
|
||||
},
|
||||
3 = { /* prefix = F2 */ },
|
||||
}
|
||||
@@ -3697,28 +3701,28 @@ EVEX_INDEX_0F38 := [4][256]lib.Decode_Index{
|
||||
EVEX_INDEX_0F3A := [4][256]lib.Decode_Index{
|
||||
0 = { /* prefix = none */ },
|
||||
1 = { /* prefix = 66 */
|
||||
0x03 = {330, 6},
|
||||
0x08 = {336, 3},
|
||||
0x09 = {339, 3},
|
||||
0x0A = {342, 1},
|
||||
0x0B = {343, 1},
|
||||
0x1D = {344, 1},
|
||||
0x1E = {345, 6},
|
||||
0x1F = {351, 6},
|
||||
0x25 = {357, 6},
|
||||
0x26 = {363, 6},
|
||||
0x27 = {369, 2},
|
||||
0x3E = {371, 6},
|
||||
0x3F = {377, 6},
|
||||
0x42 = {383, 3},
|
||||
0x50 = {386, 6},
|
||||
0x51 = {392, 2},
|
||||
0x54 = {394, 6},
|
||||
0x55 = {400, 2},
|
||||
0x56 = {402, 6},
|
||||
0x57 = {408, 2},
|
||||
0x66 = {410, 6},
|
||||
0x67 = {416, 2},
|
||||
0x03 = {333, 6},
|
||||
0x08 = {339, 3},
|
||||
0x09 = {342, 3},
|
||||
0x0A = {345, 1},
|
||||
0x0B = {346, 1},
|
||||
0x1D = {347, 1},
|
||||
0x1E = {348, 6},
|
||||
0x1F = {354, 6},
|
||||
0x25 = {360, 6},
|
||||
0x26 = {366, 6},
|
||||
0x27 = {372, 2},
|
||||
0x3E = {374, 6},
|
||||
0x3F = {380, 6},
|
||||
0x42 = {386, 3},
|
||||
0x50 = {389, 6},
|
||||
0x51 = {395, 2},
|
||||
0x54 = {397, 6},
|
||||
0x55 = {403, 2},
|
||||
0x56 = {405, 6},
|
||||
0x57 = {411, 2},
|
||||
0x66 = {413, 6},
|
||||
0x67 = {419, 2},
|
||||
},
|
||||
2 = { /* prefix = F3 */ },
|
||||
3 = { /* prefix = F2 */ },
|
||||
|
||||
@@ -8,7 +8,7 @@ package rexcode_x86_generated
|
||||
import lib "../.."
|
||||
|
||||
@(rodata)
|
||||
ENCODE_FORMS := [2451]lib.Encoding{
|
||||
ENCODE_FORMS := [2454]lib.Encoding{
|
||||
// .MOV
|
||||
{.MOV, {.RM8, .R8, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, 0x88, 0, {explicit_count=2}},
|
||||
{.MOV, {.RM16, .R16, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, 0x89, 0, {explicit_count=2}},
|
||||
@@ -3015,6 +3015,10 @@ ENCODE_FORMS := [2451]lib.Encoding{
|
||||
{.VPTERNLOGQ, {.XMM, .XMM, .XMM_M128, .IMM8}, {.REG, .VVVV, .MR, .IB}, 0x25, 0, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, explicit_count=4}},
|
||||
{.VPTERNLOGQ, {.YMM, .YMM, .YMM_M256, .IMM8}, {.REG, .VVVV, .MR, .IB}, 0x25, 0, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, explicit_count=4}},
|
||||
{.VPTERNLOGQ, {.ZMM, .ZMM, .ZMM_M512, .IMM8}, {.REG, .VVVV, .MR, .IB}, 0x25, 0, {esc=._0F3A, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L2, explicit_count=4}},
|
||||
// .VPDPWSSD
|
||||
{.VPDPWSSD, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x52, 0, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L0, explicit_count=3}},
|
||||
{.VPDPWSSD, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x52, 0, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L1, explicit_count=3}},
|
||||
{.VPDPWSSD, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x52, 0, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W0, vex_l=.L2, explicit_count=3}},
|
||||
// .VPMULTISHIFTQB
|
||||
{.VPMULTISHIFTQB, {.XMM, .XMM, .XMM_M128, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x83, 0, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L0, explicit_count=3}},
|
||||
{.VPMULTISHIFTQB, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x83, 0, {esc=._0F38, prefix=1, vex_type=.EVEX, vex_w=.W1, vex_l=.L1, explicit_count=3}},
|
||||
@@ -3700,7 +3704,7 @@ ENCODE_FORMS := [2451]lib.Encoding{
|
||||
}
|
||||
|
||||
@(rodata)
|
||||
CLOBBER_FORMS := [2451]lib.Clobber{
|
||||
CLOBBER_FORMS := [2454]lib.Clobber{
|
||||
// .MOV
|
||||
{written={0}, read={1}, writes_mem=true, reads_mem=true},
|
||||
{written={0}, read={1}, writes_mem=true, reads_mem=true},
|
||||
@@ -6707,6 +6711,10 @@ CLOBBER_FORMS := [2451]lib.Clobber{
|
||||
{written={0}, read={1, 2, 3}, reads_mem=true},
|
||||
{written={0}, read={1, 2, 3}, reads_mem=true},
|
||||
{written={0}, read={1, 2, 3}, reads_mem=true},
|
||||
// .VPDPWSSD
|
||||
{written={0}, read={1, 2}, reads_mem=true},
|
||||
{written={0}, read={1, 2}, reads_mem=true},
|
||||
{written={0}, read={1, 2}, reads_mem=true},
|
||||
// .VPMULTISHIFTQB
|
||||
{written={0}, read={1, 2}, reads_mem=true},
|
||||
{written={0}, read={1, 2}, reads_mem=true},
|
||||
@@ -8347,294 +8355,295 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{
|
||||
.VDBPSADBW = { 2044, 3},
|
||||
.VPTERNLOGD = { 2047, 3},
|
||||
.VPTERNLOGQ = { 2050, 3},
|
||||
.VPMULTISHIFTQB = { 2053, 3},
|
||||
.KADDW = { 2056, 1},
|
||||
.KADDB = { 2057, 1},
|
||||
.KADDQ = { 2058, 1},
|
||||
.KADDD = { 2059, 1},
|
||||
.KANDW = { 2060, 1},
|
||||
.KANDB = { 2061, 1},
|
||||
.KANDQ = { 2062, 1},
|
||||
.KANDD = { 2063, 1},
|
||||
.KANDNW = { 2064, 1},
|
||||
.KANDNB = { 2065, 1},
|
||||
.KANDNQ = { 2066, 1},
|
||||
.KANDND = { 2067, 1},
|
||||
.KMOVW = { 2068, 4},
|
||||
.KMOVB = { 2072, 4},
|
||||
.KMOVQ = { 2076, 4},
|
||||
.KMOVD = { 2080, 4},
|
||||
.KNOTW = { 2084, 1},
|
||||
.KNOTB = { 2085, 1},
|
||||
.KNOTQ = { 2086, 1},
|
||||
.KNOTD = { 2087, 1},
|
||||
.KORW = { 2088, 1},
|
||||
.KORB = { 2089, 1},
|
||||
.KORQ = { 2090, 1},
|
||||
.KORD = { 2091, 1},
|
||||
.KORTESTW = { 2092, 1},
|
||||
.KORTESTB = { 2093, 1},
|
||||
.KORTESTQ = { 2094, 1},
|
||||
.KORTESTD = { 2095, 1},
|
||||
.KSHIFTLW = { 2096, 1},
|
||||
.KSHIFTLB = { 2097, 1},
|
||||
.KSHIFTLQ = { 2098, 1},
|
||||
.KSHIFTLD = { 2099, 1},
|
||||
.KSHIFTRW = { 2100, 1},
|
||||
.KSHIFTRB = { 2101, 1},
|
||||
.KSHIFTRQ = { 2102, 1},
|
||||
.KSHIFTRD = { 2103, 1},
|
||||
.KTESTW = { 2104, 1},
|
||||
.KTESTB = { 2105, 1},
|
||||
.KTESTQ = { 2106, 1},
|
||||
.KTESTD = { 2107, 1},
|
||||
.KUNPCKBW = { 2108, 1},
|
||||
.KUNPCKWD = { 2109, 1},
|
||||
.KUNPCKDQ = { 2110, 1},
|
||||
.KXNORW = { 2111, 1},
|
||||
.KXNORB = { 2112, 1},
|
||||
.KXNORQ = { 2113, 1},
|
||||
.KXNORD = { 2114, 1},
|
||||
.KXORW = { 2115, 1},
|
||||
.KXORB = { 2116, 1},
|
||||
.KXORQ = { 2117, 1},
|
||||
.KXORD = { 2118, 1},
|
||||
.FADD = { 2119, 4},
|
||||
.FADDP = { 2123, 2},
|
||||
.FIADD = { 2125, 2},
|
||||
.FSUB = { 2127, 4},
|
||||
.FSUBP = { 2131, 2},
|
||||
.FISUB = { 2133, 2},
|
||||
.FSUBR = { 2135, 4},
|
||||
.FSUBRP = { 2139, 2},
|
||||
.FISUBR = { 2141, 2},
|
||||
.FMUL = { 2143, 4},
|
||||
.FMULP = { 2147, 2},
|
||||
.FIMUL = { 2149, 2},
|
||||
.FDIV = { 2151, 4},
|
||||
.FDIVP = { 2155, 2},
|
||||
.FIDIV = { 2157, 2},
|
||||
.FDIVR = { 2159, 4},
|
||||
.FDIVRP = { 2163, 2},
|
||||
.FIDIVR = { 2165, 2},
|
||||
.FSQRT = { 2167, 1},
|
||||
.FABS = { 2168, 1},
|
||||
.FCHS = { 2169, 1},
|
||||
.FPREM = { 2170, 1},
|
||||
.FPREM1 = { 2171, 1},
|
||||
.FRNDINT = { 2172, 1},
|
||||
.FSCALE = { 2173, 1},
|
||||
.FXTRACT = { 2174, 1},
|
||||
.FXAM = { 2175, 1},
|
||||
.FLD = { 2176, 4},
|
||||
.FILD = { 2180, 3},
|
||||
.FBLD = { 2183, 1},
|
||||
.FST = { 2184, 3},
|
||||
.FSTP = { 2187, 4},
|
||||
.FIST = { 2191, 2},
|
||||
.FISTP = { 2193, 3},
|
||||
.FISTTP = { 2196, 3},
|
||||
.FBSTP = { 2199, 1},
|
||||
.FXCH = { 2200, 2},
|
||||
.FCMOVB = { 2202, 1},
|
||||
.FCMOVE = { 2203, 1},
|
||||
.FCMOVBE = { 2204, 1},
|
||||
.FCMOVU = { 2205, 1},
|
||||
.FCMOVNB = { 2206, 1},
|
||||
.FCMOVNE = { 2207, 1},
|
||||
.FCMOVNBE = { 2208, 1},
|
||||
.FCMOVNU = { 2209, 1},
|
||||
.FCOM = { 2210, 4},
|
||||
.FCOMP = { 2214, 4},
|
||||
.FCOMPP = { 2218, 1},
|
||||
.FICOM = { 2219, 2},
|
||||
.FICOMP = { 2221, 2},
|
||||
.FCOMI = { 2223, 1},
|
||||
.FCOMIP = { 2224, 1},
|
||||
.FUCOMI = { 2225, 1},
|
||||
.FUCOMIP = { 2226, 1},
|
||||
.FUCOM = { 2227, 2},
|
||||
.FUCOMP = { 2229, 2},
|
||||
.FUCOMPP = { 2231, 1},
|
||||
.FTST = { 2232, 1},
|
||||
.FLDZ = { 2233, 1},
|
||||
.FLD1 = { 2234, 1},
|
||||
.FLDPI = { 2235, 1},
|
||||
.FLDL2T = { 2236, 1},
|
||||
.FLDL2E = { 2237, 1},
|
||||
.FLDLG2 = { 2238, 1},
|
||||
.FLDLN2 = { 2239, 1},
|
||||
.FSIN = { 2240, 1},
|
||||
.FCOS = { 2241, 1},
|
||||
.FSINCOS = { 2242, 1},
|
||||
.FPTAN = { 2243, 1},
|
||||
.FPATAN = { 2244, 1},
|
||||
.F2XM1 = { 2245, 1},
|
||||
.FYL2X = { 2246, 1},
|
||||
.FYL2XP1 = { 2247, 1},
|
||||
.FINIT = { 2248, 1},
|
||||
.FNINIT = { 2249, 1},
|
||||
.FINCSTP = { 2250, 1},
|
||||
.FDECSTP = { 2251, 1},
|
||||
.FFREE = { 2252, 1},
|
||||
.FFREEP = { 2253, 1},
|
||||
.FNOP = { 2254, 1},
|
||||
.FWAIT = { 2255, 1},
|
||||
.FCLEX = { 2256, 1},
|
||||
.FNCLEX = { 2257, 1},
|
||||
.FSTCW = { 2258, 1},
|
||||
.FNSTCW = { 2259, 1},
|
||||
.FLDCW = { 2260, 1},
|
||||
.FSTENV = { 2261, 1},
|
||||
.FNSTENV = { 2262, 1},
|
||||
.FLDENV = { 2263, 1},
|
||||
.FSAVE = { 2264, 1},
|
||||
.FNSAVE = { 2265, 1},
|
||||
.FRSTOR = { 2266, 1},
|
||||
.FSTSW = { 2267, 2},
|
||||
.FNSTSW = { 2269, 2},
|
||||
.FXSAVE = { 2271, 1},
|
||||
.FXSAVE64 = { 2272, 1},
|
||||
.FXRSTOR = { 2273, 1},
|
||||
.FXRSTOR64 = { 2274, 1},
|
||||
.LGDT = { 2275, 2},
|
||||
.SGDT = { 2277, 2},
|
||||
.LIDT = { 2279, 2},
|
||||
.SIDT = { 2281, 2},
|
||||
.LLDT = { 2283, 1},
|
||||
.SLDT = { 2284, 3},
|
||||
.LTR = { 2287, 1},
|
||||
.STR = { 2288, 3},
|
||||
.LMSW = { 2291, 1},
|
||||
.SMSW = { 2292, 3},
|
||||
.CLTS = { 2295, 1},
|
||||
.ARPL = { 2296, 1},
|
||||
.LAR = { 2297, 3},
|
||||
.LSL = { 2300, 3},
|
||||
.VERR = { 2303, 1},
|
||||
.VERW = { 2304, 1},
|
||||
.INVD = { 2305, 1},
|
||||
.WBINVD = { 2306, 1},
|
||||
.INVLPG = { 2307, 1},
|
||||
.INVPCID = { 2308, 2},
|
||||
.RSM = { 2310, 1},
|
||||
.RDMSR = { 2311, 1},
|
||||
.WRMSR = { 2312, 1},
|
||||
.VMCALL = { 2313, 1},
|
||||
.VMLAUNCH = { 2314, 1},
|
||||
.VMRESUME = { 2315, 1},
|
||||
.VMXOFF = { 2316, 1},
|
||||
.VMXON = { 2317, 1},
|
||||
.VMCLEAR = { 2318, 1},
|
||||
.VMPTRLD = { 2319, 1},
|
||||
.VMPTRST = { 2320, 1},
|
||||
.VMREAD = { 2321, 1},
|
||||
.VMWRITE = { 2322, 1},
|
||||
.VMFUNC = { 2323, 1},
|
||||
.INVEPT = { 2324, 1},
|
||||
.INVVPID = { 2325, 1},
|
||||
.ENCLS = { 2326, 1},
|
||||
.ENCLU = { 2327, 1},
|
||||
.ENCLV = { 2328, 1},
|
||||
.RDPKRU = { 2329, 1},
|
||||
.WRPKRU = { 2330, 1},
|
||||
.INCSSPD = { 2331, 1},
|
||||
.INCSSPQ = { 2332, 1},
|
||||
.RDSSPD = { 2333, 1},
|
||||
.RDSSPQ = { 2334, 1},
|
||||
.SAVEPREVSSP = { 2335, 1},
|
||||
.RSTORSSP = { 2336, 1},
|
||||
.WRSSD = { 2337, 1},
|
||||
.WRSSQ = { 2338, 1},
|
||||
.WRUSSD = { 2339, 1},
|
||||
.WRUSSQ = { 2340, 1},
|
||||
.SETSSBSY = { 2341, 1},
|
||||
.CLRSSBSY = { 2342, 1},
|
||||
.ENDBR64 = { 2343, 1},
|
||||
.ENDBR32 = { 2344, 1},
|
||||
.XSAVE = { 2345, 1},
|
||||
.XSAVE64 = { 2346, 1},
|
||||
.XRSTOR = { 2347, 1},
|
||||
.XRSTOR64 = { 2348, 1},
|
||||
.XSAVEOPT = { 2349, 1},
|
||||
.XSAVEOPT64 = { 2350, 1},
|
||||
.XSAVEC = { 2351, 1},
|
||||
.XSAVEC64 = { 2352, 1},
|
||||
.XSAVES = { 2353, 1},
|
||||
.XSAVES64 = { 2354, 1},
|
||||
.XRSTORS = { 2355, 1},
|
||||
.XRSTORS64 = { 2356, 1},
|
||||
.PREFETCHT0 = { 2357, 1},
|
||||
.PREFETCHT1 = { 2358, 1},
|
||||
.PREFETCHT2 = { 2359, 1},
|
||||
.PREFETCHNTA = { 2360, 1},
|
||||
.PREFETCHW = { 2361, 1},
|
||||
.CLFLUSHOPT = { 2362, 1},
|
||||
.CLWB = { 2363, 1},
|
||||
.CLDEMOTE = { 2364, 1},
|
||||
.BSWAP = { 2365, 2},
|
||||
.CMPXCHG = { 2367, 4},
|
||||
.CMPXCHG8B = { 2371, 1},
|
||||
.CMPXCHG16B = { 2372, 1},
|
||||
.XADD = { 2373, 4},
|
||||
.BOUND = { 2377, 2},
|
||||
.ENTER = { 2379, 1},
|
||||
.LEAVE = { 2380, 1},
|
||||
.XLAT = { 2381, 1},
|
||||
.XLATB = { 2382, 1},
|
||||
.MOVBE = { 2383, 6},
|
||||
.RDRAND = { 2389, 3},
|
||||
.RDSEED = { 2392, 3},
|
||||
.SWAPGS = { 2395, 1},
|
||||
.MONITOR = { 2396, 1},
|
||||
.MWAIT = { 2397, 1},
|
||||
.CLAC = { 2398, 1},
|
||||
.STAC = { 2399, 1},
|
||||
.RDFSBASE = { 2400, 2},
|
||||
.RDGSBASE = { 2402, 2},
|
||||
.WRFSBASE = { 2404, 2},
|
||||
.WRGSBASE = { 2406, 2},
|
||||
.PTWRITE = { 2408, 2},
|
||||
.RDPID = { 2410, 1},
|
||||
.WBNOINVD = { 2411, 1},
|
||||
.SERIALIZE = { 2412, 1},
|
||||
.PREFETCH = { 2413, 1},
|
||||
.TPAUSE = { 2414, 1},
|
||||
.UMONITOR = { 2415, 1},
|
||||
.UMWAIT = { 2416, 1},
|
||||
.MOVDIRI = { 2417, 2},
|
||||
.MOVDIR64B = { 2419, 1},
|
||||
.ENQCMD = { 2420, 1},
|
||||
.ENQCMDS = { 2421, 1},
|
||||
.AADD = { 2422, 2},
|
||||
.AAND = { 2424, 2},
|
||||
.AOR = { 2426, 2},
|
||||
.AXOR = { 2428, 2},
|
||||
.XEND = { 2430, 1},
|
||||
.XTEST = { 2431, 1},
|
||||
.VMRUN = { 2432, 1},
|
||||
.VMMCALL = { 2433, 1},
|
||||
.VMLOAD = { 2434, 1},
|
||||
.VMSAVE = { 2435, 1},
|
||||
.STGI = { 2436, 1},
|
||||
.CLGI = { 2437, 1},
|
||||
.SKINIT = { 2438, 1},
|
||||
.INVLPGA = { 2439, 1},
|
||||
.INVLPGB = { 2440, 1},
|
||||
.TLBSYNC = { 2441, 1},
|
||||
.PVALIDATE = { 2442, 1},
|
||||
.RMPADJUST = { 2443, 1},
|
||||
.RMPUPDATE = { 2444, 1},
|
||||
.PSMASH = { 2445, 1},
|
||||
.CLZERO = { 2446, 1},
|
||||
.MONITORX = { 2447, 1},
|
||||
.MWAITX = { 2448, 1},
|
||||
.RDPRU = { 2449, 1},
|
||||
.MCOMMIT = { 2450, 1},
|
||||
.VPDPWSSD = { 2053, 3},
|
||||
.VPMULTISHIFTQB = { 2056, 3},
|
||||
.KADDW = { 2059, 1},
|
||||
.KADDB = { 2060, 1},
|
||||
.KADDQ = { 2061, 1},
|
||||
.KADDD = { 2062, 1},
|
||||
.KANDW = { 2063, 1},
|
||||
.KANDB = { 2064, 1},
|
||||
.KANDQ = { 2065, 1},
|
||||
.KANDD = { 2066, 1},
|
||||
.KANDNW = { 2067, 1},
|
||||
.KANDNB = { 2068, 1},
|
||||
.KANDNQ = { 2069, 1},
|
||||
.KANDND = { 2070, 1},
|
||||
.KMOVW = { 2071, 4},
|
||||
.KMOVB = { 2075, 4},
|
||||
.KMOVQ = { 2079, 4},
|
||||
.KMOVD = { 2083, 4},
|
||||
.KNOTW = { 2087, 1},
|
||||
.KNOTB = { 2088, 1},
|
||||
.KNOTQ = { 2089, 1},
|
||||
.KNOTD = { 2090, 1},
|
||||
.KORW = { 2091, 1},
|
||||
.KORB = { 2092, 1},
|
||||
.KORQ = { 2093, 1},
|
||||
.KORD = { 2094, 1},
|
||||
.KORTESTW = { 2095, 1},
|
||||
.KORTESTB = { 2096, 1},
|
||||
.KORTESTQ = { 2097, 1},
|
||||
.KORTESTD = { 2098, 1},
|
||||
.KSHIFTLW = { 2099, 1},
|
||||
.KSHIFTLB = { 2100, 1},
|
||||
.KSHIFTLQ = { 2101, 1},
|
||||
.KSHIFTLD = { 2102, 1},
|
||||
.KSHIFTRW = { 2103, 1},
|
||||
.KSHIFTRB = { 2104, 1},
|
||||
.KSHIFTRQ = { 2105, 1},
|
||||
.KSHIFTRD = { 2106, 1},
|
||||
.KTESTW = { 2107, 1},
|
||||
.KTESTB = { 2108, 1},
|
||||
.KTESTQ = { 2109, 1},
|
||||
.KTESTD = { 2110, 1},
|
||||
.KUNPCKBW = { 2111, 1},
|
||||
.KUNPCKWD = { 2112, 1},
|
||||
.KUNPCKDQ = { 2113, 1},
|
||||
.KXNORW = { 2114, 1},
|
||||
.KXNORB = { 2115, 1},
|
||||
.KXNORQ = { 2116, 1},
|
||||
.KXNORD = { 2117, 1},
|
||||
.KXORW = { 2118, 1},
|
||||
.KXORB = { 2119, 1},
|
||||
.KXORQ = { 2120, 1},
|
||||
.KXORD = { 2121, 1},
|
||||
.FADD = { 2122, 4},
|
||||
.FADDP = { 2126, 2},
|
||||
.FIADD = { 2128, 2},
|
||||
.FSUB = { 2130, 4},
|
||||
.FSUBP = { 2134, 2},
|
||||
.FISUB = { 2136, 2},
|
||||
.FSUBR = { 2138, 4},
|
||||
.FSUBRP = { 2142, 2},
|
||||
.FISUBR = { 2144, 2},
|
||||
.FMUL = { 2146, 4},
|
||||
.FMULP = { 2150, 2},
|
||||
.FIMUL = { 2152, 2},
|
||||
.FDIV = { 2154, 4},
|
||||
.FDIVP = { 2158, 2},
|
||||
.FIDIV = { 2160, 2},
|
||||
.FDIVR = { 2162, 4},
|
||||
.FDIVRP = { 2166, 2},
|
||||
.FIDIVR = { 2168, 2},
|
||||
.FSQRT = { 2170, 1},
|
||||
.FABS = { 2171, 1},
|
||||
.FCHS = { 2172, 1},
|
||||
.FPREM = { 2173, 1},
|
||||
.FPREM1 = { 2174, 1},
|
||||
.FRNDINT = { 2175, 1},
|
||||
.FSCALE = { 2176, 1},
|
||||
.FXTRACT = { 2177, 1},
|
||||
.FXAM = { 2178, 1},
|
||||
.FLD = { 2179, 4},
|
||||
.FILD = { 2183, 3},
|
||||
.FBLD = { 2186, 1},
|
||||
.FST = { 2187, 3},
|
||||
.FSTP = { 2190, 4},
|
||||
.FIST = { 2194, 2},
|
||||
.FISTP = { 2196, 3},
|
||||
.FISTTP = { 2199, 3},
|
||||
.FBSTP = { 2202, 1},
|
||||
.FXCH = { 2203, 2},
|
||||
.FCMOVB = { 2205, 1},
|
||||
.FCMOVE = { 2206, 1},
|
||||
.FCMOVBE = { 2207, 1},
|
||||
.FCMOVU = { 2208, 1},
|
||||
.FCMOVNB = { 2209, 1},
|
||||
.FCMOVNE = { 2210, 1},
|
||||
.FCMOVNBE = { 2211, 1},
|
||||
.FCMOVNU = { 2212, 1},
|
||||
.FCOM = { 2213, 4},
|
||||
.FCOMP = { 2217, 4},
|
||||
.FCOMPP = { 2221, 1},
|
||||
.FICOM = { 2222, 2},
|
||||
.FICOMP = { 2224, 2},
|
||||
.FCOMI = { 2226, 1},
|
||||
.FCOMIP = { 2227, 1},
|
||||
.FUCOMI = { 2228, 1},
|
||||
.FUCOMIP = { 2229, 1},
|
||||
.FUCOM = { 2230, 2},
|
||||
.FUCOMP = { 2232, 2},
|
||||
.FUCOMPP = { 2234, 1},
|
||||
.FTST = { 2235, 1},
|
||||
.FLDZ = { 2236, 1},
|
||||
.FLD1 = { 2237, 1},
|
||||
.FLDPI = { 2238, 1},
|
||||
.FLDL2T = { 2239, 1},
|
||||
.FLDL2E = { 2240, 1},
|
||||
.FLDLG2 = { 2241, 1},
|
||||
.FLDLN2 = { 2242, 1},
|
||||
.FSIN = { 2243, 1},
|
||||
.FCOS = { 2244, 1},
|
||||
.FSINCOS = { 2245, 1},
|
||||
.FPTAN = { 2246, 1},
|
||||
.FPATAN = { 2247, 1},
|
||||
.F2XM1 = { 2248, 1},
|
||||
.FYL2X = { 2249, 1},
|
||||
.FYL2XP1 = { 2250, 1},
|
||||
.FINIT = { 2251, 1},
|
||||
.FNINIT = { 2252, 1},
|
||||
.FINCSTP = { 2253, 1},
|
||||
.FDECSTP = { 2254, 1},
|
||||
.FFREE = { 2255, 1},
|
||||
.FFREEP = { 2256, 1},
|
||||
.FNOP = { 2257, 1},
|
||||
.FWAIT = { 2258, 1},
|
||||
.FCLEX = { 2259, 1},
|
||||
.FNCLEX = { 2260, 1},
|
||||
.FSTCW = { 2261, 1},
|
||||
.FNSTCW = { 2262, 1},
|
||||
.FLDCW = { 2263, 1},
|
||||
.FSTENV = { 2264, 1},
|
||||
.FNSTENV = { 2265, 1},
|
||||
.FLDENV = { 2266, 1},
|
||||
.FSAVE = { 2267, 1},
|
||||
.FNSAVE = { 2268, 1},
|
||||
.FRSTOR = { 2269, 1},
|
||||
.FSTSW = { 2270, 2},
|
||||
.FNSTSW = { 2272, 2},
|
||||
.FXSAVE = { 2274, 1},
|
||||
.FXSAVE64 = { 2275, 1},
|
||||
.FXRSTOR = { 2276, 1},
|
||||
.FXRSTOR64 = { 2277, 1},
|
||||
.LGDT = { 2278, 2},
|
||||
.SGDT = { 2280, 2},
|
||||
.LIDT = { 2282, 2},
|
||||
.SIDT = { 2284, 2},
|
||||
.LLDT = { 2286, 1},
|
||||
.SLDT = { 2287, 3},
|
||||
.LTR = { 2290, 1},
|
||||
.STR = { 2291, 3},
|
||||
.LMSW = { 2294, 1},
|
||||
.SMSW = { 2295, 3},
|
||||
.CLTS = { 2298, 1},
|
||||
.ARPL = { 2299, 1},
|
||||
.LAR = { 2300, 3},
|
||||
.LSL = { 2303, 3},
|
||||
.VERR = { 2306, 1},
|
||||
.VERW = { 2307, 1},
|
||||
.INVD = { 2308, 1},
|
||||
.WBINVD = { 2309, 1},
|
||||
.INVLPG = { 2310, 1},
|
||||
.INVPCID = { 2311, 2},
|
||||
.RSM = { 2313, 1},
|
||||
.RDMSR = { 2314, 1},
|
||||
.WRMSR = { 2315, 1},
|
||||
.VMCALL = { 2316, 1},
|
||||
.VMLAUNCH = { 2317, 1},
|
||||
.VMRESUME = { 2318, 1},
|
||||
.VMXOFF = { 2319, 1},
|
||||
.VMXON = { 2320, 1},
|
||||
.VMCLEAR = { 2321, 1},
|
||||
.VMPTRLD = { 2322, 1},
|
||||
.VMPTRST = { 2323, 1},
|
||||
.VMREAD = { 2324, 1},
|
||||
.VMWRITE = { 2325, 1},
|
||||
.VMFUNC = { 2326, 1},
|
||||
.INVEPT = { 2327, 1},
|
||||
.INVVPID = { 2328, 1},
|
||||
.ENCLS = { 2329, 1},
|
||||
.ENCLU = { 2330, 1},
|
||||
.ENCLV = { 2331, 1},
|
||||
.RDPKRU = { 2332, 1},
|
||||
.WRPKRU = { 2333, 1},
|
||||
.INCSSPD = { 2334, 1},
|
||||
.INCSSPQ = { 2335, 1},
|
||||
.RDSSPD = { 2336, 1},
|
||||
.RDSSPQ = { 2337, 1},
|
||||
.SAVEPREVSSP = { 2338, 1},
|
||||
.RSTORSSP = { 2339, 1},
|
||||
.WRSSD = { 2340, 1},
|
||||
.WRSSQ = { 2341, 1},
|
||||
.WRUSSD = { 2342, 1},
|
||||
.WRUSSQ = { 2343, 1},
|
||||
.SETSSBSY = { 2344, 1},
|
||||
.CLRSSBSY = { 2345, 1},
|
||||
.ENDBR64 = { 2346, 1},
|
||||
.ENDBR32 = { 2347, 1},
|
||||
.XSAVE = { 2348, 1},
|
||||
.XSAVE64 = { 2349, 1},
|
||||
.XRSTOR = { 2350, 1},
|
||||
.XRSTOR64 = { 2351, 1},
|
||||
.XSAVEOPT = { 2352, 1},
|
||||
.XSAVEOPT64 = { 2353, 1},
|
||||
.XSAVEC = { 2354, 1},
|
||||
.XSAVEC64 = { 2355, 1},
|
||||
.XSAVES = { 2356, 1},
|
||||
.XSAVES64 = { 2357, 1},
|
||||
.XRSTORS = { 2358, 1},
|
||||
.XRSTORS64 = { 2359, 1},
|
||||
.PREFETCHT0 = { 2360, 1},
|
||||
.PREFETCHT1 = { 2361, 1},
|
||||
.PREFETCHT2 = { 2362, 1},
|
||||
.PREFETCHNTA = { 2363, 1},
|
||||
.PREFETCHW = { 2364, 1},
|
||||
.CLFLUSHOPT = { 2365, 1},
|
||||
.CLWB = { 2366, 1},
|
||||
.CLDEMOTE = { 2367, 1},
|
||||
.BSWAP = { 2368, 2},
|
||||
.CMPXCHG = { 2370, 4},
|
||||
.CMPXCHG8B = { 2374, 1},
|
||||
.CMPXCHG16B = { 2375, 1},
|
||||
.XADD = { 2376, 4},
|
||||
.BOUND = { 2380, 2},
|
||||
.ENTER = { 2382, 1},
|
||||
.LEAVE = { 2383, 1},
|
||||
.XLAT = { 2384, 1},
|
||||
.XLATB = { 2385, 1},
|
||||
.MOVBE = { 2386, 6},
|
||||
.RDRAND = { 2392, 3},
|
||||
.RDSEED = { 2395, 3},
|
||||
.SWAPGS = { 2398, 1},
|
||||
.MONITOR = { 2399, 1},
|
||||
.MWAIT = { 2400, 1},
|
||||
.CLAC = { 2401, 1},
|
||||
.STAC = { 2402, 1},
|
||||
.RDFSBASE = { 2403, 2},
|
||||
.RDGSBASE = { 2405, 2},
|
||||
.WRFSBASE = { 2407, 2},
|
||||
.WRGSBASE = { 2409, 2},
|
||||
.PTWRITE = { 2411, 2},
|
||||
.RDPID = { 2413, 1},
|
||||
.WBNOINVD = { 2414, 1},
|
||||
.SERIALIZE = { 2415, 1},
|
||||
.PREFETCH = { 2416, 1},
|
||||
.TPAUSE = { 2417, 1},
|
||||
.UMONITOR = { 2418, 1},
|
||||
.UMWAIT = { 2419, 1},
|
||||
.MOVDIRI = { 2420, 2},
|
||||
.MOVDIR64B = { 2422, 1},
|
||||
.ENQCMD = { 2423, 1},
|
||||
.ENQCMDS = { 2424, 1},
|
||||
.AADD = { 2425, 2},
|
||||
.AAND = { 2427, 2},
|
||||
.AOR = { 2429, 2},
|
||||
.AXOR = { 2431, 2},
|
||||
.XEND = { 2433, 1},
|
||||
.XTEST = { 2434, 1},
|
||||
.VMRUN = { 2435, 1},
|
||||
.VMMCALL = { 2436, 1},
|
||||
.VMLOAD = { 2437, 1},
|
||||
.VMSAVE = { 2438, 1},
|
||||
.STGI = { 2439, 1},
|
||||
.CLGI = { 2440, 1},
|
||||
.SKINIT = { 2441, 1},
|
||||
.INVLPGA = { 2442, 1},
|
||||
.INVLPGB = { 2443, 1},
|
||||
.TLBSYNC = { 2444, 1},
|
||||
.PVALIDATE = { 2445, 1},
|
||||
.RMPADJUST = { 2446, 1},
|
||||
.RMPUPDATE = { 2447, 1},
|
||||
.PSMASH = { 2448, 1},
|
||||
.CLZERO = { 2449, 1},
|
||||
.MONITORX = { 2450, 1},
|
||||
.MWAITX = { 2451, 1},
|
||||
.RDPRU = { 2452, 1},
|
||||
.MCOMMIT = { 2453, 1},
|
||||
}
|
||||
|
||||
// Emit descriptor per form (derived from ENCODE_FORMS via lib.form_to_recipe).
|
||||
ENCODE_RECIPES: [2451]lib.Form_Recipe
|
||||
ENCODE_RECIPES: [2454]lib.Form_Recipe
|
||||
@(init) _fill_recipes :: proc "contextless" () {
|
||||
for i in 0 ..< len(ENCODE_FORMS) {
|
||||
ENCODE_RECIPES[i] = lib.form_to_recipe(&ENCODE_FORMS[i])
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Reference in New Issue
Block a user