diff --git a/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin b/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin index 149daecc0..e90813937 100644 --- a/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin +++ b/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin @@ -239,6 +239,14 @@ main :: proc() { bool is_nondeterministic() const { return false; } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + bool is_atomic = false; // TODO(bill): Add ATOMIC flag to SideEffectFlags in the original INSTRUCTION_TABLE + return (implicit & (ClobberReg_SP)) != 0 || is_atomic; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { diff --git a/core/rexcode/isa/x86/tablegen/cpp-compiler/cpp-gen.odin b/core/rexcode/isa/x86/tablegen/cpp-compiler/cpp-gen.odin index 346db1b18..27b35a060 100644 --- a/core/rexcode/isa/x86/tablegen/cpp-compiler/cpp-gen.odin +++ b/core/rexcode/isa/x86/tablegen/cpp-compiler/cpp-gen.odin @@ -328,6 +328,13 @@ main :: proc() { bool is_nondeterministic() const { return (cast(u16)side_effects & SideEffectFlag_NONDETERMINISTIC) != 0; } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + return (implicit & (ClobberReg_RSP|ClobberReg_RSI|ClobberReg_RDI|ClobberReg_RBX)) != 0; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { diff --git a/src/asm_tables_amd64.cpp b/src/asm_tables_amd64.cpp index e518d8524..2a26d4dcd 100644 --- a/src/asm_tables_amd64.cpp +++ b/src/asm_tables_amd64.cpp @@ -331,6 +331,13 @@ struct Asm_amd64 { bool is_nondeterministic() const { return (cast(u16)side_effects & SideEffectFlag_NONDETERMINISTIC) != 0; } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + return (implicit & (ClobberReg_RSP|ClobberReg_RSI|ClobberReg_RDI|ClobberReg_RBX)) != 0; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { diff --git a/src/asm_tables_riscv.cpp b/src/asm_tables_riscv.cpp index f5d4156f2..2ffdadd58 100644 --- a/src/asm_tables_riscv.cpp +++ b/src/asm_tables_riscv.cpp @@ -187,6 +187,14 @@ struct Asm_riscv { bool is_nondeterministic() const { return false; } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + bool is_atomic = false; // TODO(bill): Add ATOMIC flag to SideEffectFlags in the original INSTRUCTION_TABLE + return (implicit & (ClobberReg_SP)) != 0 || is_atomic; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) {