diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 3968b4651..dd5b15b73 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -264,19 +264,18 @@ jobs: - name: Wycheproof tests shell: cmd run: | - rem call "C:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Auxiliary\Build\vcvars64.bat" - rem odin test tests/core/crypto/wycheproof -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed -microarch:native - echo Skipping Wycheproof on Windows because of CI flakiness that can't be replicated on real hardware + call "C:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Auxiliary\Build\vcvars64.bat" + odin test tests/core/crypto/wycheproof -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed - name: Noise Protocol Framework tests shell: cmd run: | call "C:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Auxiliary\Build\vcvars64.bat" - odin test tests/core/crypto/noise -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed -microarch:native + odin test tests/core/crypto/noise -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed - name: X.509 limbo tests shell: cmd run: | call "C:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Auxiliary\Build\vcvars64.bat" - odin test tests/core/crypto/x509_limbo -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed -microarch:native + odin test tests/core/crypto/x509_limbo -vet -vet-tabs -strict-style -vet-style -vet-cast -warnings-as-errors -disallow-do -o:speed - name: Vendor library tests shell: cmd run: | diff --git a/.gitignore b/.gitignore index b867398c4..3c1b8cb78 100644 --- a/.gitignore +++ b/.gitignore @@ -277,6 +277,8 @@ odin *.bin demo.bin libLLVM*.so* +*.a +*.o # core:rexcode commits its generated encode/decode tables: each arch's tablegen # emits human-readable Odin, serialized to tables/*.bin, which the library @@ -321,5 +323,3 @@ build/ cmake-build*/ CMakeLists.txt sandbox/ - -vendor/box3d/lib/box3d_wasm.o diff --git a/core/math/rand/rand.odin b/core/math/rand/rand.odin index bb3dc7556..141cbe9fa 100644 --- a/core/math/rand/rand.odin +++ b/core/math/rand/rand.odin @@ -561,7 +561,7 @@ uint_max :: proc(n: uint, gen := context.random_generator) -> (val: uint) { Generates a random unsigned 32 bit value in the range `[lo, hi)` using the provided random number generator. If no generator is provided the global random number generator will be used. Inputs: -- lo: The lower bound of the generated number, this value is inclusice +- lo: The lower bound of the generated number, this value is inclusive - hi: The upper bound of the generated number, this value is exclusive Returns: diff --git a/core/nbio/impl_windows.odin b/core/nbio/impl_windows.odin index 162092a80..4d202620e 100644 --- a/core/nbio/impl_windows.odin +++ b/core/nbio/impl_windows.odin @@ -19,6 +19,38 @@ import win "core:sys/windows" @(private="package") _FULLY_SUPPORTED :: true +// Poll is driven by AFD, the socket driver underneath winsock. +// `WSAEventSelect` is edge triggered (`FD_WRITE` is only recorded again after a +// send fails with WOULDBLOCK) and neither `select` nor `WSAPoll` reports send +// buffer space, so neither can give the level triggered readiness `poll` promises. +// AFD also completes on the IOCP, which makes a poll an ordinary overlapped operation. +IOCTL_AFD_POLL :: 0x00012024 +SIO_BASE_HANDLE :: win.DWORD(0x48000022) + +AFD_POLL_RECEIVE :: 0x0001 +AFD_POLL_RECEIVE_EXPEDITED :: 0x0002 +AFD_POLL_SEND :: 0x0004 +AFD_POLL_DISCONNECT :: 0x0008 +AFD_POLL_ABORT :: 0x0010 +AFD_POLL_LOCAL_CLOSE :: 0x0020 +AFD_POLL_ACCEPT :: 0x0080 +AFD_POLL_CONNECT_FAIL :: 0x0100 + +AFD_Poll_Handle_Info :: struct { + handle: win.HANDLE, + events: win.ULONG, + status: win.NTSTATUS, +} + +AFD_Poll_Info :: struct { + timeout: i64, + number_of_handles: win.ULONG, + exclusive: win.ULONG, + handles: [1]AFD_Poll_Handle_Info, +} + +afd_device_name := [?]u16{'\\','D','e','v','i','c','e','\\','A','f','d','\\','E','n','d','p','o','i','n','t'} + @(private="package") _Event_Loop :: struct { timeouts: avl.Tree(^Operation), @@ -88,7 +120,7 @@ _Timeout :: struct { @(private="package") _Poll :: struct { - wait_handle: win.HANDLE, + info: AFD_Poll_Info, } @(private="package") @@ -165,15 +197,7 @@ __tick :: proc(l: ^Event_Loop, timeout: time.Duration) -> (err: General_Error) { if pool.num_outstanding(&l.operation_pool) == 0 { return nil } - actual_timeout := win.INFINITE - if queue.len(l.completed) > 0 || mpsc_count(&l.completed_oob) > 0 { - actual_timeout = 0 - } else if timeout >= 0 { - actual_timeout = win.DWORD(timeout / time.Millisecond) - } - if nt, ok := next_timeout.?; ok { - actual_timeout = min(actual_timeout, win.DWORD(nt / time.Millisecond)) - } + actual_timeout := compute_timeout(l, timeout, next_timeout) if actual_timeout > 0 { sync.atomic_store_explicit(&l.state, .Sleeping, .Release) @@ -181,7 +205,6 @@ __tick :: proc(l: ^Event_Loop, timeout: time.Duration) -> (err: General_Error) { // There could be a race condition where we go sleeping at the same time as things get queued // and a wakeup isn't done because the state is not .Sleeping yet. // So after sleeping we first check our queues. - for { op := (^Operation)(mpsc_dequeue(&l.queue)) if op == nil { break } @@ -193,6 +216,10 @@ __tick :: proc(l: ^Event_Loop, timeout: time.Duration) -> (err: General_Error) { if op == nil { break } handle_completed(op) } + + // The drains can add timeouts, and `timeout_exec` only puts those in + // `l.timeouts` without posting anything + actual_timeout = compute_timeout(l, timeout, check_timeouts(l)) } for { @@ -228,7 +255,7 @@ __tick :: proc(l: ^Event_Loop, timeout: time.Duration) -> (err: General_Error) { handle_completed(op) } else { op_l := op.l - for !mpsc_enqueue(&op.l.completed_oob, op) { + for !mpsc_enqueue(&op_l.completed_oob, op) { warn("oob queue filled up, QUEUE_SIZE may need increasing") _wake_up(op_l) win.SwitchToThread() @@ -246,8 +273,35 @@ __tick :: proc(l: ^Event_Loop, timeout: time.Duration) -> (err: General_Error) { actual_timeout = 0 } + // A wake, or another loop routing a completion to us, can leave work queued. + // Handle it here instead of waiting for the caller to tick again. + for { + op := (^Operation)(mpsc_dequeue(&l.queue)) + if op == nil { break } + _exec(op) + } + + for { + op := (^Operation)(mpsc_dequeue(&l.completed_oob)) + if op == nil { break } + handle_completed(op) + } + return nil + compute_timeout :: proc(l: ^Event_Loop, timeout: time.Duration, next_timeout: Maybe(time.Duration)) -> win.DWORD { + actual: win.DWORD = win.INFINITE + if queue.len(l.completed) > 0 || mpsc_count(&l.completed_oob) > 0 { + actual = 0 + } else if timeout >= 0 { + actual = win.DWORD(timeout / time.Millisecond) + } + if nt, ok := next_timeout.?; ok { + actual = min(actual, win.DWORD(nt / time.Millisecond)) + } + return actual + } + check_timeouts :: proc(l: ^Event_Loop) -> (expires: Maybe(time.Duration)) { curr := l.now @@ -677,19 +731,6 @@ _remove :: proc(target: ^Operation) { target._impl.timeout = (^Operation)(REMOVED) switch target.type { - case .Poll: - win.UnregisterWaitEx(target.poll._impl.wait_handle, nil) - target.poll._impl.wait_handle = nil - - ok := win.PostQueuedCompletionStatus( - g.iocp, - 0, - 0, - &target._impl.over, - ) - ensure(ok == true, "unexpected PostQueuedCompletionStatus error") - return - case .Timeout: if avl.remove_value(&target.l.timeouts, target) { debug("removed timeout directly") @@ -705,6 +746,17 @@ _remove :: proc(target: ^Operation) { // Synchronous ops, picked up in handler. return + case .Poll: + // The poll may have completed already, with its completion queued but not yet + // handled, `NOT_FOUND` is expected rather than exceptional. + if !win.CancelIoEx(g.afd, &target._impl.over) { + #partial switch win.System_Error(win.GetLastError()) { + case .NOT_FOUND: + // nop + case: assert(false, "unexpected CancelIoEx error") + } + } + case .Accept, .Dial, .Read, .Recv, .Send, .Write, .Send_File: if is_pending(target._impl.over) { handle := operation_handle(target) @@ -802,6 +854,7 @@ g: struct{ mu: sync.Mutex, refs: int, iocp: win.HANDLE, + afd: win.HANDLE, err: General_Error, } @@ -817,6 +870,36 @@ g_ref :: proc() -> General_Error { if g.iocp == nil { g.err = General_Error(win.GetLastError()) } + + if g.err != nil { return g.err } + + // A handle on the socket driver, used to poll sockets for readiness. + iosb: win.IO_STATUS_BLOCK + status := win.NtCreateFile( + &g.afd, + win.SYNCHRONIZE, + &{ + Length = size_of(win.OBJECT_ATTRIBUTES), + ObjectName = &{ + Length = u16(len(afd_device_name)*2), + MaximumLength = u16(len(afd_device_name)*2), + Buffer = raw_data(afd_device_name[:]), + }, + }, + &iosb, + nil, + 0, + win.FILE_SHARE_READ|win.FILE_SHARE_WRITE, + win.FILE_OPEN, + 0, + nil, + 0, + ) + if syserr := win.System_Error(win.RtlNtStatusToDosError(status)); syserr != .SUCCESS { + g.err = General_Error(syserr) + } else if win.CreateIoCompletionPort(g.afd, g.iocp, 0, 0) != g.iocp { + g.err = General_Error(win.GetLastError()) + } } sync.atomic_add(&g.refs, 1) @@ -828,6 +911,7 @@ g_unref :: proc() { sync.guard(&g.mu) if sync.atomic_sub(&g.refs, 1) == 1 { + if g.afd != nil { win.CloseHandle(g.afd) } win.CloseHandle(g.iocp) g.err = nil } @@ -850,7 +934,7 @@ operation_handle :: proc(op: ^Operation) -> win.HANDLE { case .Recv: return win.HANDLE(uintptr(net.any_socket_to_socket(op.recv.socket))) case .Send: return win.HANDLE(uintptr(net.any_socket_to_socket(op.send.socket))) case .Send_File: return win.HANDLE(uintptr(net.any_socket_to_socket(op.sendfile.socket))) - case .Poll: return win.HANDLE(uintptr(net.any_socket_to_socket(op.poll.socket))) + case .Poll: return g.afd case .Stat: return win.HANDLE(uintptr(op.stat.handle)) case .Timeout, .Open, ._Splice, ._Link_Timeout, ._Remove, .None: @@ -925,6 +1009,9 @@ accept_exec :: proc(op: ^Operation) -> Op_Result { return .Pending } else if op._impl.over.Internal == nil { op.accept.err = net._accept_error() + } else { + link_timeout(op, op.accept.expires) + return .Pending } } @@ -1026,6 +1113,9 @@ dial_exec :: proc(op: ^Operation) -> (result: Op_Result) { return .Pending } else if op._impl.over.Internal == nil { op.dial.err = net._dial_error() + } else { + link_timeout(op, op.dial.expires) + return .Pending } } @@ -1085,6 +1175,13 @@ read_exec :: proc(op: ^Operation) -> Op_Result { return .Pending } op.read.err = FS_Error(err) + } else { + // The read completed synchronously with a failure status. `FILE_SKIP_COMPLETION_PORT_ON_SUCCESS` + // only suppresses the completion packet on success, so one is still queued for + // this. Returning `.Done` here would complete the operation a second time, on an + // Operation that has already been recycled into the pool. + link_timeout(op, op.read.expires) + return .Pending } } @@ -1159,6 +1256,9 @@ write_exec :: proc(op: ^Operation) -> Op_Result { return .Pending } op.write.err = FS_Error(err) + } else { + link_timeout(op, op.write.expires) + return .Pending } } @@ -1252,6 +1352,9 @@ recv_exec :: proc(op: ^Operation) -> Op_Result { case TCP_Socket: op.recv.err = net._tcp_recv_error() case UDP_Socket: op.recv.err = net._udp_recv_error() } + } else { + link_timeout(op, op.recv.expires) + return .Pending } } @@ -1370,6 +1473,9 @@ send_exec :: proc(op: ^Operation) -> Op_Result { case TCP_Socket: op.send.err = net._tcp_send_error() case UDP_Socket: op.send.err = net._udp_send_error() } + } else { + link_timeout(op, op.send.expires) + return .Pending } } @@ -1459,6 +1565,9 @@ sendfile_exec :: proc(op: ^Operation) -> Op_Result { return .Pending } else if op._impl.over.Internal == nil { op.sendfile.err = net._tcp_send_error() + } else { + link_timeout(op, op.sendfile.expires) + return .Pending } } @@ -1505,84 +1614,91 @@ sendfile_callback :: proc(op: ^Operation) -> Op_Result { @(require_results) poll_exec :: proc(op: ^Operation) -> Op_Result { assert(op.type == .Poll) + op._impl.over = {} // Operations are recycled, clear stale state from a previous use. - events: i32 = win.FD_CLOSE + events: win.ULONG = AFD_POLL_ABORT|AFD_POLL_DISCONNECT|AFD_POLL_LOCAL_CLOSE|AFD_POLL_CONNECT_FAIL switch op.poll.event { - case .Send: events |= win.FD_WRITE|win.FD_CONNECT - case .Receive: events |= win.FD_READ|win.FD_ACCEPT + case .Receive: events |= AFD_POLL_RECEIVE|AFD_POLL_RECEIVE_EXPEDITED|AFD_POLL_ACCEPT + case .Send: events |= AFD_POLL_SEND case: op.poll.result = .Invalid_Argument return .Done } - op._impl.over.hEvent = win.WSACreateEvent() - if win.WSAEventSelect( + // AFD needs the socket underneath any layered service providers. + base: win.SOCKET + bytes: win.DWORD + if win.WSAIoctl( win.SOCKET(net.any_socket_to_socket(op.poll.socket)), - op._impl.over.hEvent, - events, + SIO_BASE_HANDLE, + nil, 0, + &base, size_of(base), + &bytes, nil, nil, ) != 0 { - #partial switch win.System_Error(win.GetLastError()) { + #partial switch win.System_Error(win.WSAGetLastError()) { case .WSAEINVAL, .WSAENOTSOCK: op.poll.result = .Invalid_Argument case: op.poll.result = .Error } return .Done } - timeout := win.INFINITE + // A negative timeout is relative, in 100ns units. + timeout := max(i64) if op.poll.expires != {} { diff := max(0, time.diff(op.l.now, op.poll.expires)) - timeout = win.DWORD(diff / time.Millisecond) + timeout = -i64(diff / 100) } - ok := win.RegisterWaitForSingleObject( - &op.poll._impl.wait_handle, - op._impl.over.hEvent, - wait_callback, - op, - timeout, - win.WT_EXECUTEINWAITTHREAD|win.WT_EXECUTEONLYONCE, + op.poll._impl.info = { + timeout = timeout, + number_of_handles = 1, + handles = {{handle = win.HANDLE(uintptr(base)), events = events}}, + } + + // The OVERLAPPED doubles as the IO_STATUS_BLOCK, their first two fields line up. + status := win.NtDeviceIoControlFile( + g.afd, + nil, + nil, + &op._impl.over, + win.PIO_STATUS_BLOCK(rawptr(&op._impl.over)), + IOCTL_AFD_POLL, + &op.poll._impl.info, + size_of(AFD_Poll_Info), + &op.poll._impl.info, + size_of(AFD_Poll_Info), ) - ensure(ok == true, "unexpected RegisterWaitForSingleObject error") - return .Pending - - wait_callback :: proc "system" (lpParameter: win.PVOID, TimerOrWaitFired: win.BOOLEAN) { - op := (^Operation)(lpParameter) - assert_contextless(op.type == .Poll) - - if TimerOrWaitFired { - op.poll.result = .Timeout - } - - ok := win.PostQueuedCompletionStatus( - g.iocp, - 0, - 0, - &op._impl.over, - ) - ensure_contextless(ok == true, "unexpected PostQueuedCompletionStatus error") + // The AFD handle is not set to skip completion on success, so a completion is + // queued even when this finishes synchronously. + #partial switch win.System_Error(win.RtlNtStatusToDosError(status)) { + case .SUCCESS, .IO_PENDING: + return .Pending + case: + op.poll.result = .Error + return .Done } } poll_callback :: proc(op: ^Operation) { assert(op.type == .Poll) - if op._impl.over.hEvent != nil { - win.WSACloseEvent(op._impl.over.hEvent) - } - - if op.poll._impl.wait_handle != nil { - win.UnregisterWaitEx(op.poll._impl.wait_handle, nil) - } - if op.poll.result != nil { return } - _, err := get_result(op._impl.over) - #partial switch err { - case .SUCCESS: - case: + // AFD reports a timeout by coming back with no handles. + if op.poll._impl.info.number_of_handles == 0 { + op.poll.result = .Timeout + return + } + + if _, err := get_result(op._impl.over); err != .SUCCESS { + op.poll.result = .Error + return + } + + if op.poll._impl.info.handles[0].events & (AFD_POLL_ABORT|AFD_POLL_CONNECT_FAIL) != 0 { op.poll.result = .Error } } diff --git a/core/nbio/ops.odin b/core/nbio/ops.odin index 382dca747..6af266e72 100644 --- a/core/nbio/ops.odin +++ b/core/nbio/ops.odin @@ -1626,6 +1626,9 @@ Poll a socket for readiness. NOTE: this is provided to help with "legacy" APIs that require polling behavior. If you can avoid it and use the other procs in this package, do so. +NOTE: on Windows only one poll per socket is delivered, a second poll on the same +socket does not complete. + Any user data can be set on the returned operation's `user_data` field. Polymorphic variants for type safe user data are available under `poll_poly`, `poll_poly2`, and `poll_poly3`. @@ -1656,6 +1659,9 @@ Poll a socket for readiness. NOTE: this is provided to help with "legacy" APIs that require polling behavior. If you can avoid it and use the other procs in this package, do so. +NOTE: on Windows only one poll per socket is delivered, a second poll on the same +socket does not complete. + This procedure uses polymorphism for type safe user data up to a certain size. Inputs: @@ -1690,6 +1696,9 @@ Poll a socket for readiness. NOTE: this is provided to help with "legacy" APIs that require polling behavior. If you can avoid it and use the other procs in this package, do so. +NOTE: on Windows only one poll per socket is delivered, a second poll on the same +socket does not complete. + This procedure uses polymorphism for type safe user data up to a certain size. Inputs: @@ -1725,6 +1734,9 @@ Poll a socket for readiness. NOTE: this is provided to help with "legacy" APIs that require polling behavior. If you can avoid it and use the other procs in this package, do so. +NOTE: on Windows only one poll per socket is delivered, a second poll on the same +socket does not complete. + This procedure uses polymorphism for type safe user data up to a certain size. Inputs: diff --git a/core/os/process.odin b/core/os/process.odin index ef3b09fdd..c5ce79c17 100644 --- a/core/os/process.odin +++ b/core/os/process.odin @@ -344,7 +344,7 @@ Process_Desc :: struct { // stderr output. stderr: ^File, // The `stdout` handle to give to the child process. It can be either a file - // or a writeabe end of a pipe. Passing a `nil` will shut down the process' + // or a writeable end of a pipe. Passing a `nil` will shut down the process' // stdout output. stdout: ^File, // The `stdin` handle to give to the child process. It can either be a file diff --git a/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin b/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin index 8ab2a4a00..1eec54f16 100644 --- a/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin +++ b/core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin @@ -120,14 +120,25 @@ main :: proc() { strings.write_string(&sb, "\n") strings.write_string(&sb, """ - enum ClobberFFlags : u8 { - ClobberFFlag_NV = 1<<0, // invalid operation - ClobberFFlag_DZ = 1<<1, // divide by zero - ClobberFFlag_OF = 1<<2, // overflow - ClobberFFlag_UF = 1<<3, // underflow - ClobberFFlag_NX = 1<<4, // inexact + enum ClobberFlags : u8 { + ClobberFlag_NV = 1<<0, // invalid operation + ClobberFlag_DZ = 1<<1, // divide by zero + ClobberFlag_OF = 1<<2, // overflow + ClobberFlag_UF = 1<<3, // underflow + ClobberFlag_NX = 1<<4, // inexact }; + char const *clobber_flag_bit_name(u16 bit) { + switch (bit) { + case ClobberFlag_NV: return "nv"; + case ClobberFlag_DZ: return "dz"; + case ClobberFlag_OF: return "of"; + case ClobberFlag_UF: return "uf"; + case ClobberFlag_NX: return "nx"; + } + return "?"; + } + enum ClobberRegs : u8 { ClobberReg_RA = 1<<0, // x1, implicit link on C.JAL / C.JALR ClobberReg_SP = 1<<1, // x2, implicit base on the *SP compressed forms @@ -174,9 +185,46 @@ main :: proc() { return \"\"; } + + u16 flag_from_name(String const &name) { + static const struct {String name; ClobberFlags flag; } table[] = { + {str_lit("nv"), ClobberFlag_NV}, + {str_lit("dz"), ClobberFlag_DZ}, + {str_lit("of"), ClobberFlag_OF}, + {str_lit("uf"), ClobberFlag_UF}, + {str_lit("nx"), ClobberFlag_NX}, + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + + u16 flags_from_name(String const &name) { + static const struct { String name; ClobberFlags flag; } table[] = { + // flags: accrued FP exception flags (fcsr[4:0]) + {str_lit(\"nx\"), ClobberFlag_NX}, // Inexact + {str_lit(\"uf\"), ClobberFlag_UF}, // Underflow + {str_lit(\"of\"), ClobberFlag_OF}, // Overflow + {str_lit(\"dz\"), ClobberFlag_DZ}, // Divide by Zero + {str_lit(\"nv\"), ClobberFlag_NV}, // Invalid Operation + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + + i32 flag_bit_from_name(String const &name, i32 *width_) { static const struct { String name; i32 bit; } table[] = { - // fflags: accrued FP exception flags (fcsr[4:0]) + // flags: accrued FP exception flags (fcsr[4:0]) {str_lit(\"nx\"), 0}, // Inexact {str_lit(\"uf\"), 1}, // Underflow {str_lit(\"of\"), 2}, // Overflow @@ -207,14 +255,18 @@ main :: proc() { OperandSet read; // operand slots whose register/CSR/mem-base is read ClobberRegs implicit_wr; // implicit reg writes (ra on C.JAL/C.JALR) ClobberRegs implicit_rd; // implicit reg reads (sp on the *SP forms) - ClobberFFlags fflags_wr; // accrued exception flags this op may raise + ClobberFlags flags_wr; // accrued exception flags this op may raise bool reads_frm; // consumes the dynamic rounding mode from fcsr bool writes_mem; bool reads_mem; SideEffectFlags side_effects; + ClobberFlags flags_rd_call() const { + return {}; + } + bool implies_clobber_flags() const { - return (fflags_wr != 0); + return (flags_wr != 0); } bool implies_clobber_memory() const { return writes_mem || reads_mem || @@ -236,6 +288,17 @@ main :: proc() { bool is_conditional() const { return has_control(); } + bool is_nondeterministic() const { + return false; + } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + bool is_atomic = false; // TODO(bill): Add ATOMIC flag to SideEffectFlags in the original INSTRUCTION_TABLE + return (implicit & (ClobberReg_SP)) != 0 || is_atomic; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { @@ -273,6 +336,17 @@ main :: proc() { u16 csr; // CSR address when a src slot is AliasSrc_CSR_LIT u8 nargs; // operands the user supplies (ARG0..\"; } + u16 flag_from_name(String const &name) { + static const struct {String name; ClobberFlags flag; } table[] = { + {str_lit(\"c\"), ClobberFlag_CF}, // Carry + {str_lit(\"p\"), ClobberFlag_PF}, // Parity + {str_lit(\"a\"), ClobberFlag_AF}, // Auxiliary Carry + {str_lit(\"z\"), ClobberFlag_ZF}, // Zero + {str_lit(\"s\"), ClobberFlag_SF}, // Sign + {str_lit(\"t\"), ClobberFlag_TF}, // Trap + {str_lit(\"i\"), ClobberFlag_IF}, // Interrupt Enable + {str_lit(\"d\"), ClobberFlag_DF}, // Direction + {str_lit(\"o\"), ClobberFlag_OF}, // Overflow + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + i32 flag_bit_from_name(String const &name, i32 *width_) { static const struct {String name; i32 bit; } table[] = { {str_lit(\"c\"), 0}, // Carry @@ -284,6 +306,10 @@ main :: proc() { bool reads_mem; SideEffectFlags side_effects; + ClobberFlags flags_rd_call() const { + return flags_rd; + } + bool implies_clobber_flags() const { u16 const FLAGS_MASK = ClobberFlag_CF|ClobberFlag_PF|ClobberFlag_AF| ClobberFlag_ZF|ClobberFlag_SF|ClobberFlag_OF; @@ -305,7 +331,8 @@ main :: proc() { SideEffectFlag_HALT | SideEffectFlag_PRIVILEGED | SideEffectFlag_CONTROL | - SideEffectFlag_CET; + SideEffectFlag_CET | + SideEffectFlag_NONDETERMINISTIC; // NOTE: SideEffectFlag_HINT deliberately excluded — inert, may be DCE'd. return ((side_effects & VOLATILE_SE) != 0); } @@ -323,6 +350,16 @@ main :: proc() { bool is_conditional() const { return has_control() && (cast(u16)flags_rd != 0); } + bool is_nondeterministic() const { + return (cast(u16)side_effects & SideEffectFlag_NONDETERMINISTIC) != 0; + } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + return (implicit & (ClobberReg_RSP|ClobberReg_RSI|ClobberReg_RDI|ClobberReg_RBX)) != 0; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { @@ -350,12 +387,17 @@ main :: proc() { AliasSrc_LIT, }; + // NOTE(bill): These are completely dummy things as it is only needed by RISC-V and not x86 struct PseudoAlias { - Mnemonic target; // real instruction emitted - AliasSrc src[4]; // how to fill target's four operand slots - i16 lit; // immediate when a src slot is AliasSrc_LIT - u16 csr; // CSR address when a src slot is AliasSrc_CSR_LIT - u8 nargs; // operands the user supplies (ARG0.. NTSTATUS --- + NtDeviceIoControlFile :: proc( + FileHandle: HANDLE, + Event: HANDLE, + ApcRoutine: PIO_APC_ROUTINE, + ApcContext: rawptr, + IoStatusBlock: PIO_STATUS_BLOCK, + IoControlCode: ULONG, + InputBuffer: rawptr, + InputBufferLength: ULONG, + OutputBuffer: rawptr, + OutputBufferLength: ULONG, + ) -> NTSTATUS --- + NtQueryInformationProcess :: proc( ProcessHandle: HANDLE, diff --git a/core/testing/signal_handler_windows.odin b/core/testing/signal_handler_windows.odin index f9d0f85a7..3f07c348e 100644 --- a/core/testing/signal_handler_windows.odin +++ b/core/testing/signal_handler_windows.odin @@ -48,7 +48,7 @@ when ODIN_ARCH == .i386 { @(private="file") stop_runner_callback :: proc "system" (ctrl_type: win32.DWORD) -> win32.BOOL { - if ctrl_type == win32.CTRL_C_EVENT { + if ctrl_type == win32.CTRL_C_EVENT || ctrl_type == win32.CTRL_BREAK_EVENT || ctrl_type == win32.CTRL_CLOSE_EVENT { prev := intrinsics.atomic_add(&stop_runner_flag, 1) // If the flag was already set (if this is the second signal sent for example), @@ -77,6 +77,12 @@ stop_test_callback :: proc "system" (info: ^win32.EXCEPTION_POINTERS) -> win32.L context = runtime.default_context() code := info.ExceptionRecord.ExceptionCode + if code < 0x8000_0000 { + // https://learn.microsoft.com/en-us/openspecs/windows_protocols/ms-erref/87fba13e-bf06-450e-83b1-9241dc81e781 + // Ignore informational status codes + return win32.EXCEPTION_CONTINUE_SEARCH + } + if local_test_index == -1 { // We're the test runner, and we ourselves have caught a signal from @@ -210,4 +216,3 @@ _should_stop_test :: proc() -> (test_index: int, reason: Stop_Reason, ok: bool) return } - diff --git a/src/asm_tables.cpp b/src/asm_tables.cpp index e7412e60e..597dcde7b 100644 --- a/src/asm_tables.cpp +++ b/src/asm_tables.cpp @@ -53,6 +53,20 @@ gb_global String const asm_operand_kind_expected_strings[AsmOperand_COUNT] = { str_lit("a label"), }; +enum AsmOperandConstraintKind : u32 { + AsmOperandConstraint_None = 0, + AsmOperandConstraint_ShiftCount, // integer const must satisfy 0 <= v < width + AsmOperandConstraint_NonZeroDivisor, // integer const must be != 0 + + AsmOperandConstraint_COUNT +}; + + +struct AsmOperandConstraint { + AsmOperandConstraintKind kind; + i32 width_operand; // ShiftCount +}; + #include "asm_tables_amd64.cpp" #include "asm_tables_riscv.cpp" diff --git a/src/asm_tables_amd64.cpp b/src/asm_tables_amd64.cpp index 6bc2d5806..fe7fa0a0f 100644 --- a/src/asm_tables_amd64.cpp +++ b/src/asm_tables_amd64.cpp @@ -12,83 +12,83 @@ struct Asm_amd64 { enum Mnemonic : u16 { M_INVALID, M_MOV, M_MOVABS, M_MOVZX, M_MOVSX, M_MOVSXD, M_XCHG, M_PUSH, M_POP, M_LEA, M_ADD, M_ADC, M_SUB, M_SBB, M_MUL, M_IMUL, - M_DIV, M_IDIV, M_INC, M_DEC, M_NEG, M_CMP, M_AND, M_OR, M_XOR, M_NOT, M_TEST, M_SHL, M_SHR, M_SAR, M_ROL, M_ROR, - M_RCL, M_RCR, M_SHLD, M_SHRD, M_BT, M_BTS, M_BTR, M_BTC, M_BSF, M_BSR, M_POPCNT, M_LZCNT, M_TZCNT, M_JMP, M_JA, M_JAE, - M_JB, M_JBE, M_JC, M_JE, M_JZ, M_JG, M_JGE, M_JL, M_JLE, M_JNA, M_JNAE, M_JNB, M_JNBE, M_JNC, M_JNE, M_JNZ, - M_JNG, M_JNGE, M_JNL, M_JNLE, M_JNO, M_JNP, M_JNS, M_JO, M_JP, M_JPE, M_JPO, M_JS, M_JCXZ, M_JECXZ, M_JRCXZ, M_LOOP, - M_LOOPE, M_LOOPNE, M_CALL, M_RET, M_IRET, M_IRETD, M_IRETQ, M_INT, M_INT3, M_INTO, M_SYSCALL, M_SYSRET, M_SYSENTER, M_SYSEXIT, M_SETA, M_SETAE, - M_SETB, M_SETBE, M_SETC, M_SETE, M_SETG, M_SETGE, M_SETL, M_SETLE, M_SETNA, M_SETNAE, M_SETNB, M_SETNBE, M_SETNC, M_SETNE, M_SETNG, M_SETNGE, - M_SETNL, M_SETNLE, M_SETNO, M_SETNP, M_SETNS, M_SETNZ, M_SETO, M_SETP, M_SETPE, M_SETPO, M_SETS, M_SETZ, M_CMOVA, M_CMOVAE, M_CMOVB, M_CMOVBE, - M_CMOVC, M_CMOVE, M_CMOVG, M_CMOVGE, M_CMOVL, M_CMOVLE, M_CMOVNA, M_CMOVNAE, M_CMOVNB, M_CMOVNBE, M_CMOVNC, M_CMOVNE, M_CMOVNG, M_CMOVNGE, M_CMOVNL, M_CMOVNLE, - M_CMOVNO, M_CMOVNP, M_CMOVNS, M_CMOVNZ, M_CMOVO, M_CMOVP, M_CMOVPE, M_CMOVPO, M_CMOVS, M_CMOVZ, M_MOVS, M_MOVSB, M_MOVSW, M_MOVSD, M_MOVSQ, M_CMPS, - M_CMPSB, M_CMPSW, M_CMPSD, M_CMPSQ, M_SCAS, M_SCASB, M_SCASW, M_SCASD, M_SCASQ, M_LODS, M_LODSB, M_LODSW, M_LODSD, M_LODSQ, M_STOS, M_STOSB, - M_STOSW, M_STOSD, M_STOSQ, M_CLC, M_STC, M_CMC, M_CLD, M_STD, M_CLI, M_STI, M_LAHF, M_SAHF, M_PUSHF, M_PUSHFD, M_PUSHFQ, M_POPF, - M_POPFD, M_POPFQ, M_NOP, M_HLT, M_WAIT, M_LOCK, M_UD0, M_UD1, M_UD2, M_CPUID, M_RDTSC, M_RDTSCP, M_RDPMC, M_XGETBV, M_XSETBV, M_CBW, - M_CWDE, M_CDQE, M_CWD, M_CDQ, M_CQO, M_ANDN, M_BEXTR, M_BLSI, M_BLSMSK, M_BLSR, M_BZHI, M_PDEP, M_PEXT, M_RORX, M_SARX, M_SHLX, - M_SHRX, M_MULX, M_ADCX, M_ADOX, M_MOVAPS, M_MOVUPS, M_MOVAPD, M_MOVUPD, M_MOVSS, M_MOVDQA, M_MOVDQU, M_MOVQ, M_MOVD, M_MOVLPS, M_MOVHPS, M_MOVLPD, - M_MOVHPD, M_MOVLHPS, M_MOVHLPS, M_MOVMSKPS, M_MOVMSKPD, M_MOVNTPS, M_MOVNTPD, M_MOVNTDQ, M_MOVNTDQA, M_ADDPS, M_ADDPD, M_ADDSS, M_ADDSD, M_SUBPS, M_SUBPD, M_SUBSS, - M_SUBSD, M_MULPS, M_MULPD, M_MULSS, M_MULSD, M_DIVPS, M_DIVPD, M_DIVSS, M_DIVSD, M_SQRTPS, M_SQRTPD, M_SQRTSS, M_SQRTSD, M_RCPPS, M_RCPSS, M_RSQRTPS, - M_RSQRTSS, M_MAXPS, M_MAXPD, M_MAXSS, M_MAXSD, M_MINPS, M_MINPD, M_MINSS, M_MINSD, M_ANDPS, M_ANDPD, M_ANDNPS, M_ANDNPD, M_ORPS, M_ORPD, M_XORPS, - M_XORPD, M_CMPPS, M_CMPPD, M_CMPSS, M_COMISS, M_COMISD, M_UCOMISS, M_UCOMISD, M_SHUFPS, M_SHUFPD, M_UNPCKLPS, M_UNPCKHPS, M_UNPCKLPD, M_UNPCKHPD, M_CVTPS2PD, M_CVTPD2PS, - M_CVTSS2SD, M_CVTSD2SS, M_CVTPS2DQ, M_CVTPD2DQ, M_CVTDQ2PS, M_CVTDQ2PD, M_CVTSS2SI, M_CVTSD2SI, M_CVTSI2SS, M_CVTSI2SD, M_CVTTPS2DQ, M_CVTTPD2DQ, M_CVTTSS2SI, M_CVTTSD2SI, M_PADDB, M_PADDW, - M_PADDD, M_PADDQ, M_PSUBB, M_PSUBW, M_PSUBD, M_PSUBQ, M_PADDSB, M_PADDSW, M_PADDUSB, M_PADDUSW, M_PSUBSB, M_PSUBSW, M_PSUBUSB, M_PSUBUSW, M_PMULLW, M_PMULHW, - M_PMULHUW, M_PMULUDQ, M_PMADDWD, M_PAND, M_PANDN, M_POR, M_PXOR, M_PSLLW, M_PSLLD, M_PSLLQ, M_PSRLW, M_PSRLD, M_PSRLQ, M_PSRAW, M_PSRAD, M_PCMPEQB, - M_PCMPEQW, M_PCMPEQD, M_PCMPGTB, M_PCMPGTW, M_PCMPGTD, M_PACKSSWB, M_PACKSSDW, M_PACKUSWB, M_PUNPCKLBW, M_PUNPCKLWD, M_PUNPCKLDQ, M_PUNPCKLQDQ, M_PUNPCKHBW, M_PUNPCKHWD, M_PUNPCKHDQ, M_PUNPCKHQDQ, - M_PSHUFD, M_PSHUFHW, M_PSHUFLW, M_PSHUFW, M_PEXTRW, M_PINSRW, M_PMOVMSKB, M_PAVGB, M_PAVGW, M_PMAXUB, M_PMAXSW, M_PMINUB, M_PMINSW, M_PSADBW, M_MASKMOVDQU, M_LFENCE, - M_SFENCE, M_MFENCE, M_PAUSE, M_CLFLUSH, M_ADDSUBPS, M_ADDSUBPD, M_HADDPS, M_HADDPD, M_HSUBPS, M_HSUBPD, M_MOVDDUP, M_MOVSLDUP, M_MOVSHDUP, M_LDDQU, M_PSHUFB, M_PHADDW, - M_PHADDD, M_PHADDSW, M_PHSUBW, M_PHSUBD, M_PHSUBSW, M_PMADDUBSW, M_PMULHRSW, M_PSIGNB, M_PSIGNW, M_PSIGND, M_PABSB, M_PABSW, M_PABSD, M_PALIGNR, M_BLENDPS, M_BLENDPD, - M_BLENDVPS, M_BLENDVPD, M_PBLENDW, M_PBLENDVB, M_DPPS, M_DPPD, M_EXTRACTPS, M_INSERTPS, M_MPSADBW, M_PACKUSDW, M_PEXTRB, M_PEXTRD, M_PEXTRQ, M_PHMINPOSUW, M_PINSRB, M_PINSRD, - M_PINSRQ, M_PMAXSB, M_PMAXSD, M_PMAXUW, M_PMAXUD, M_PMINSB, M_PMINSD, M_PMINUW, M_PMINUD, M_PMOVSXBW, M_PMOVSXBD, M_PMOVSXBQ, M_PMOVSXWD, M_PMOVSXWQ, M_PMOVSXDQ, M_PMOVZXBW, - M_PMOVZXBD, M_PMOVZXBQ, M_PMOVZXWD, M_PMOVZXWQ, M_PMOVZXDQ, M_PMULDQ, M_PMULLD, M_PTEST, M_ROUNDPS, M_ROUNDPD, M_ROUNDSS, M_ROUNDSD, M_PCMPEQQ, M_CRC32, M_PCMPESTRI, M_PCMPESTRM, - M_PCMPISTRI, M_PCMPISTRM, M_PCMPGTQ, M_PCLMULQDQ, M_AESDEC, M_AESDECLAST, M_AESENC, M_AESENCLAST, M_AESIMC, M_AESKEYGENASSIST, M_SHA1MSG1, M_SHA1MSG2, M_SHA1NEXTE, M_SHA1RNDS4, M_SHA256MSG1, M_SHA256MSG2, - M_SHA256RNDS2, M_VADDPS, M_VADDPD, M_VADDSS, M_VADDSD, M_VSUBPS, M_VSUBPD, M_VSUBSS, M_VSUBSD, M_VMULPS, M_VMULPD, M_VMULSS, M_VMULSD, M_VDIVPS, M_VDIVPD, M_VDIVSS, - M_VDIVSD, M_VSQRTPS, M_VSQRTPD, M_VSQRTSS, M_VSQRTSD, M_VRCPPS, M_VRCPSS, M_VRSQRTPS, M_VRSQRTSS, M_VMAXPS, M_VMAXPD, M_VMAXSS, M_VMAXSD, M_VMINPS, M_VMINPD, M_VMINSS, - M_VMINSD, M_VANDPS, M_VANDPD, M_VANDNPS, M_VANDNPD, M_VORPS, M_VORPD, M_VXORPS, M_VXORPD, M_VCMPPS, M_VCMPPD, M_VCMPSS, M_VCMPSD, M_VCOMISS, M_VCOMISD, M_VUCOMISS, - M_VUCOMISD, M_VSHUFPS, M_VSHUFPD, M_VUNPCKLPS, M_VUNPCKHPS, M_VUNPCKLPD, M_VUNPCKHPD, M_VBLENDPS, M_VBLENDPD, M_VBLENDVPS, M_VBLENDVPD, M_VDPPS, M_VDPPD, M_VROUNDPS, M_VROUNDPD, M_VROUNDSS, - M_VROUNDSD, M_VEXTRACTPS, M_VINSERTPS, M_VMOVAPS, M_VMOVUPS, M_VMOVAPD, M_VMOVUPD, M_VMOVSS, M_VMOVSD, M_VMOVDQA, M_VMOVDQU, M_VMOVQ, M_VMOVD, M_VMOVLPS, M_VMOVHPS, M_VMOVLPD, - M_VMOVHPD, M_VMOVLHPS, M_VMOVHLPS, M_VMOVMSKPS, M_VMOVMSKPD, M_VMOVNTPS, M_VMOVNTPD, M_VMOVNTDQ, M_VMOVNTDQA, M_VADDSUBPS, M_VADDSUBPD, M_VHADDPS, M_VHADDPD, M_VHSUBPS, M_VHSUBPD, M_VLDDQU, - M_VMOVDDUP, M_VMOVSLDUP, M_VMOVSHDUP, M_VPCMPESTRI, M_VPCMPESTRM, M_VPCMPISTRI, M_VPCMPISTRM, M_VPBROADCASTB, M_VPBROADCASTW, M_VPBROADCASTD, M_VPBROADCASTQ, M_VCVTPS2PD, M_VCVTPD2PS, M_VCVTSS2SD, M_VCVTSD2SS, M_VCVTPS2DQ, - M_VCVTPD2DQ, M_VCVTDQ2PS, M_VCVTDQ2PD, M_VCVTSS2SI, M_VCVTSD2SI, M_VCVTSI2SS, M_VCVTSI2SD, M_VCVTTPS2DQ, M_VCVTTPD2DQ, M_VCVTTSS2SI, M_VCVTTSD2SI, M_VPADDB, M_VPADDW, M_VPADDD, M_VPADDQ, M_VPSUBB, - M_VPSUBW, M_VPSUBD, M_VPSUBQ, M_VPMULLW, M_VPMULHW, M_VPMULHUW, M_VPMULUDQ, M_VPMADDWD, M_VPAND, M_VPANDN, M_VPOR, M_VPXOR, M_VPSLLW, M_VPSLLD, M_VPSLLQ, M_VPSRLW, - M_VPSRLD, M_VPSRLQ, M_VPSRAW, M_VPSRAD, M_VPCMPEQB, M_VPCMPEQW, M_VPCMPEQD, M_VPCMPEQQ, M_VPCMPGTB, M_VPCMPGTW, M_VPCMPGTD, M_VPCMPGTQ, M_VPACKSSWB, M_VPACKSSDW, M_VPACKUSWB, M_VPACKUSDW, - M_VPUNPCKLBW, M_VPUNPCKLWD, M_VPUNPCKLDQ, M_VPUNPCKLQDQ, M_VPUNPCKHBW, M_VPUNPCKHWD, M_VPUNPCKHDQ, M_VPUNPCKHQDQ, M_VPSHUFD, M_VPSHUFHW, M_VPSHUFLW, M_VPEXTRB, M_VPEXTRW, M_VPEXTRD, M_VPEXTRQ, M_VPINSRB, - M_VPINSRW, M_VPINSRD, M_VPINSRQ, M_VPMOVMSKB, M_VPTEST, M_VPSHUFB, M_VPHADDW, M_VPHADDD, M_VPHADDSW, M_VPHSUBW, M_VPHSUBD, M_VPHSUBSW, M_VPMADDUBSW, M_VPMULHRSW, M_VPSIGNB, M_VPSIGNW, - M_VPSIGND, M_VPABSB, M_VPABSW, M_VPABSD, M_VPALIGNR, M_VPBLENDW, M_VPBLENDVB, M_VMPSADBW, M_VPHMINPOSUW, M_VPMAXSB, M_VPMAXSD, M_VPMAXUW, M_VPMAXUD, M_VPMINSB, M_VPMINSD, M_VPMINUW, - M_VPMINUD, M_VPMOVSXBW, M_VPMOVSXBD, M_VPMOVSXBQ, M_VPMOVSXWD, M_VPMOVSXWQ, M_VPMOVSXDQ, M_VPMOVZXBW, M_VPMOVZXBD, M_VPMOVZXBQ, M_VPMOVZXWD, M_VPMOVZXWQ, M_VPMOVZXDQ, M_VPMULDQ, M_VPMULLD, M_VMASKMOVDQU, - M_VPCLMULQDQ, M_VAESDEC, M_VAESDECLAST, M_VAESENC, M_VAESENCLAST, M_VAESIMC, M_VAESKEYGENASSIST, M_VBROADCASTSS, M_VBROADCASTSD, M_VBROADCASTF128, M_VEXTRACTF128, M_VINSERTF128, M_VPERM2F128, M_VMASKMOVPS, M_VMASKMOVPD, M_VTESTPS, - M_VTESTPD, M_VZEROALL, M_VZEROUPPER, M_VBROADCASTI128, M_VEXTRACTI128, M_VINSERTI128, M_VPERM2I128, M_VPERMD, M_VPERMPS, M_VPERMQ, M_VPERMPD, M_VPBLENDD, M_VPSLLVD, M_VPSLLVQ, M_VPSRLVD, M_VPSRLVQ, - M_VPSRAVD, M_VPMASKMOVD, M_VPMASKMOVQ, M_VGATHERDPS, M_VGATHERDPD, M_VGATHERQPS, M_VGATHERQPD, M_VPGATHERDD, M_VPGATHERDQ, M_VPGATHERQD, M_VPGATHERQQ, M_VFMADD132PS, M_VFMADD213PS, M_VFMADD231PS, M_VFMADD132PD, M_VFMADD213PD, - M_VFMADD231PD, M_VFMADD132SS, M_VFMADD213SS, M_VFMADD231SS, M_VFMADD132SD, M_VFMADD213SD, M_VFMADD231SD, M_VFMSUB132PS, M_VFMSUB213PS, M_VFMSUB231PS, M_VFMSUB132PD, M_VFMSUB213PD, M_VFMSUB231PD, M_VFMSUB132SS, M_VFMSUB213SS, M_VFMSUB231SS, - M_VFMSUB132SD, M_VFMSUB213SD, M_VFMSUB231SD, M_VFNMADD132PS, M_VFNMADD213PS, M_VFNMADD231PS, M_VFNMADD132PD, M_VFNMADD213PD, M_VFNMADD231PD, M_VFNMADD132SS, M_VFNMADD213SS, M_VFNMADD231SS, M_VFNMADD132SD, M_VFNMADD213SD, M_VFNMADD231SD, M_VFNMSUB132PS, - M_VFNMSUB213PS, M_VFNMSUB231PS, M_VFNMSUB132PD, M_VFNMSUB213PD, M_VFNMSUB231PD, M_VFNMSUB132SS, M_VFNMSUB213SS, M_VFNMSUB231SS, M_VFNMSUB132SD, M_VFNMSUB213SD, M_VFNMSUB231SD, M_VFMADDSUB132PS, M_VFMADDSUB213PS, M_VFMADDSUB231PS, M_VFMADDSUB132PD, M_VFMADDSUB213PD, - M_VFMADDSUB231PD, M_VFMSUBADD132PS, M_VFMSUBADD213PS, M_VFMSUBADD231PS, M_VFMSUBADD132PD, M_VFMSUBADD213PD, M_VFMSUBADD231PD, M_VCVTPH2PS, M_VCVTPS2PH, M_VMOVDQA32, M_VMOVDQA64, M_VMOVDQU8, M_VMOVDQU16, M_VMOVDQU32, M_VMOVDQU64, M_VPBLENDMB, - M_VPBLENDMW, M_VPBLENDMD, M_VPBLENDMQ, M_VBLENDMPS, M_VBLENDMPD, M_VPCMPB, M_VPCMPUB, M_VPCMPW, M_VPCMPUW, M_VPCMPD, M_VPCMPUD, M_VPCMPQ, M_VPCMPUQ, M_VPTESTMB, M_VPTESTMW, M_VPTESTMD, - M_VPTESTMQ, M_VPTESTNMB, M_VPTESTNMW, M_VPTESTNMD, M_VPTESTNMQ, M_VPCOMPRESSD, M_VPCOMPRESSQ, M_VCOMPRESSPS, M_VCOMPRESSPD, M_VPEXPANDD, M_VPEXPANDQ, M_VEXPANDPS, M_VEXPANDPD, M_VPCONFLICTD, M_VPCONFLICTQ, M_VPLZCNTD, - M_VPLZCNTQ, M_VPERMI2B, M_VPERMI2W, M_VPERMI2D, M_VPERMI2Q, M_VPERMI2PS, M_VPERMI2PD, M_VPERMT2B, M_VPERMT2W, M_VPERMT2D, M_VPERMT2Q, M_VPERMT2PS, M_VPERMT2PD, M_VPERMB, M_VPERMW, M_VPMOVB2M, - M_VPMOVW2M, M_VPMOVD2M, M_VPMOVQ2M, M_VPMOVM2B, M_VPMOVM2W, M_VPMOVM2D, M_VPMOVM2Q, M_VPMOVQB, M_VPMOVSQB, M_VPMOVUSQB, M_VPMOVQW, M_VPMOVSQW, M_VPMOVUSQW, M_VPMOVQD, M_VPMOVSQD, M_VPMOVUSQD, - M_VPMOVDB, M_VPMOVSDB, M_VPMOVUSDB, M_VPMOVDW, M_VPMOVSDW, M_VPMOVUSDW, M_VPMOVWB, M_VPMOVSWB, M_VPMOVUSWB, M_VPROLD, M_VPROLQ, M_VPROLVD, M_VPROLVQ, M_VPRORD, M_VPRORQ, M_VPRORVD, - M_VPRORVQ, M_VPSCATTERDD, M_VPSCATTERDQ, M_VPSCATTERQD, M_VPSCATTERQQ, M_VSCATTERDPS, M_VSCATTERDPD, M_VSCATTERQPS, M_VSCATTERQPD, M_VPSRAVQ, M_VPSRAVW, M_VPSLLVW, M_VPSRLVW, M_VRANGEPS, M_VRANGEPD, M_VRANGESS, - M_VRANGESD, M_VREDUCEPS, M_VREDUCEPD, M_VREDUCESS, M_VREDUCESD, M_VRNDSCALEPS, M_VRNDSCALEPD, M_VRNDSCALESS, M_VRNDSCALESD, M_VRSQRT14PS, M_VRSQRT14PD, M_VRSQRT14SS, M_VRSQRT14SD, M_VRCP14PS, M_VRCP14PD, M_VRCP14SS, - M_VRCP14SD, M_VSCALEFPS, M_VSCALEFPD, M_VSCALEFSS, M_VSCALEFSD, M_VGETEXPPS, M_VGETEXPPD, M_VGETEXPSS, M_VGETEXPSD, M_VGETMANTPS, M_VGETMANTPD, M_VGETMANTSS, M_VGETMANTSD, M_VFIXUPIMMPS, M_VFIXUPIMMPD, M_VFIXUPIMMSS, - M_VFIXUPIMMSD, M_VFPCLASSPS, M_VFPCLASSPD, M_VFPCLASSSS, M_VFPCLASSSD, M_VALIGNQ, M_VALIGND, M_VDBPSADBW, M_VPTERNLOGD, M_VPTERNLOGQ, M_VPDPWSSD, M_VPMULTISHIFTQB, M_KADDW, M_KADDB, M_KADDQ, M_KADDD, - M_KANDW, M_KANDB, M_KANDQ, M_KANDD, M_KANDNW, M_KANDNB, M_KANDNQ, M_KANDND, M_KMOVW, M_KMOVB, M_KMOVQ, M_KMOVD, M_KNOTW, M_KNOTB, M_KNOTQ, M_KNOTD, - M_KORW, M_KORB, M_KORQ, M_KORD, M_KORTESTW, M_KORTESTB, M_KORTESTQ, M_KORTESTD, M_KSHIFTLW, M_KSHIFTLB, M_KSHIFTLQ, M_KSHIFTLD, M_KSHIFTRW, M_KSHIFTRB, M_KSHIFTRQ, M_KSHIFTRD, - M_KTESTW, M_KTESTB, M_KTESTQ, M_KTESTD, M_KUNPCKBW, M_KUNPCKWD, M_KUNPCKDQ, M_KXNORW, M_KXNORB, M_KXNORQ, M_KXNORD, M_KXORW, M_KXORB, M_KXORQ, M_KXORD, M_FADD, - M_FADDP, M_FIADD, M_FSUB, M_FSUBP, M_FISUB, M_FSUBR, M_FSUBRP, M_FISUBR, M_FMUL, M_FMULP, M_FIMUL, M_FDIV, M_FDIVP, M_FIDIV, M_FDIVR, M_FDIVRP, - M_FIDIVR, M_FSQRT, M_FABS, M_FCHS, M_FPREM, M_FPREM1, M_FRNDINT, M_FSCALE, M_FXTRACT, M_FXAM, M_FLD, M_FILD, M_FBLD, M_FST, M_FSTP, M_FIST, - M_FISTP, M_FISTTP, M_FBSTP, M_FXCH, M_FCMOVB, M_FCMOVE, M_FCMOVBE, M_FCMOVU, M_FCMOVNB, M_FCMOVNE, M_FCMOVNBE, M_FCMOVNU, M_FCOM, M_FCOMP, M_FCOMPP, M_FICOM, - M_FICOMP, M_FCOMI, M_FCOMIP, M_FUCOMI, M_FUCOMIP, M_FUCOM, M_FUCOMP, M_FUCOMPP, M_FTST, M_FLDZ, M_FLD1, M_FLDPI, M_FLDL2T, M_FLDL2E, M_FLDLG2, M_FLDLN2, - M_FSIN, M_FCOS, M_FSINCOS, M_FPTAN, M_FPATAN, M_F2XM1, M_FYL2X, M_FYL2XP1, M_FINIT, M_FNINIT, M_FINCSTP, M_FDECSTP, M_FFREE, M_FFREEP, M_FNOP, M_FWAIT, - M_FCLEX, M_FNCLEX, M_FSTCW, M_FNSTCW, M_FLDCW, M_FSTENV, M_FNSTENV, M_FLDENV, M_FSAVE, M_FNSAVE, M_FRSTOR, M_FSTSW, M_FNSTSW, M_FXSAVE, M_FXSAVE64, M_FXRSTOR, - M_FXRSTOR64, M_LGDT, M_SGDT, M_LIDT, M_SIDT, M_LLDT, M_SLDT, M_LTR, M_STR, M_LMSW, M_SMSW, M_CLTS, M_ARPL, M_LAR, M_LSL, M_VERR, - M_VERW, M_INVD, M_WBINVD, M_INVLPG, M_INVPCID, M_RSM, M_RDMSR, M_WRMSR, M_VMCALL, M_VMLAUNCH, M_VMRESUME, M_VMXOFF, M_VMXON, M_VMCLEAR, M_VMPTRLD, M_VMPTRST, - M_VMREAD, M_VMWRITE, M_VMFUNC, M_INVEPT, M_INVVPID, M_ENCLS, M_ENCLU, M_ENCLV, M_RDPKRU, M_WRPKRU, M_INCSSPD, M_INCSSPQ, M_RDSSPD, M_RDSSPQ, M_SAVEPREVSSP, M_RSTORSSP, - M_WRSSD, M_WRSSQ, M_WRUSSD, M_WRUSSQ, M_SETSSBSY, M_CLRSSBSY, M_ENDBR64, M_ENDBR32, M_XSAVE, M_XSAVE64, M_XRSTOR, M_XRSTOR64, M_XSAVEOPT, M_XSAVEOPT64, M_XSAVEC, M_XSAVEC64, - M_XSAVES, M_XSAVES64, M_XRSTORS, M_XRSTORS64, M_PREFETCHT0, M_PREFETCHT1, M_PREFETCHT2, M_PREFETCHNTA, M_PREFETCHW, M_CLFLUSHOPT, M_CLWB, M_CLDEMOTE, M_BSWAP, M_CMPXCHG, M_CMPXCHG8B, M_CMPXCHG16B, - M_XADD, M_BOUND, M_ENTER, M_LEAVE, M_XLAT, M_XLATB, M_MOVBE, M_RDRAND, M_RDSEED, M_SWAPGS, M_MONITOR, M_MWAIT, M_CLAC, M_STAC, M_RDFSBASE, M_RDGSBASE, - M_WRFSBASE, M_WRGSBASE, M_PTWRITE, M_RDPID, M_WBNOINVD, M_SERIALIZE, M_PREFETCH, M_IN, M_OUT, M_TPAUSE, M_UMONITOR, M_UMWAIT, M_MOVDIRI, M_MOVDIR64B, M_ENQCMD, M_ENQCMDS, - M_AADD, M_AAND, M_AOR, M_AXOR, M_XEND, M_XTEST, M_VMRUN, M_VMMCALL, M_VMLOAD, M_VMSAVE, M_STGI, M_CLGI, M_SKINIT, M_INVLPGA, M_INVLPGB, M_TLBSYNC, - M_PVALIDATE, M_RMPADJUST, M_RMPUPDATE, M_PSMASH, M_CLZERO, M_MONITORX, M_MWAITX, M_RDPRU, M_MCOMMIT, + M_DIV, M_IDIV, M_INC, M_DEC, M_NEG, M_CMP, M_AND, M_OR, M_XOR, M_NOT, M_TEST, M_SHL, M_SHR, M_SAR, M_SAL, M_ROL, + M_ROR, M_RCL, M_RCR, M_SHLD, M_SHRD, M_BT, M_BTS, M_BTR, M_BTC, M_BSF, M_BSR, M_POPCNT, M_LZCNT, M_TZCNT, M_JMP, M_JA, + M_JAE, M_JB, M_JBE, M_JC, M_JE, M_JZ, M_JG, M_JGE, M_JL, M_JLE, M_JNA, M_JNAE, M_JNB, M_JNBE, M_JNC, M_JNE, + M_JNZ, M_JNG, M_JNGE, M_JNL, M_JNLE, M_JNO, M_JNP, M_JNS, M_JO, M_JP, M_JPE, M_JPO, M_JS, M_JCXZ, M_JECXZ, M_JRCXZ, + M_LOOP, M_LOOPE, M_LOOPNE, M_CALL, M_RET, M_IRET, M_IRETD, M_IRETQ, M_INT, M_INT3, M_INTO, M_SYSCALL, M_SYSRET, M_SYSENTER, M_SYSEXIT, M_SETA, + M_SETAE, M_SETB, M_SETBE, M_SETC, M_SETE, M_SETG, M_SETGE, M_SETL, M_SETLE, M_SETNA, M_SETNAE, M_SETNB, M_SETNBE, M_SETNC, M_SETNE, M_SETNG, + M_SETNGE, M_SETNL, M_SETNLE, M_SETNO, M_SETNP, M_SETNS, M_SETNZ, M_SETO, M_SETP, M_SETPE, M_SETPO, M_SETS, M_SETZ, M_CMOVA, M_CMOVAE, M_CMOVB, + M_CMOVBE, M_CMOVC, M_CMOVE, M_CMOVG, M_CMOVGE, M_CMOVL, M_CMOVLE, M_CMOVNA, M_CMOVNAE, M_CMOVNB, M_CMOVNBE, M_CMOVNC, M_CMOVNE, M_CMOVNG, M_CMOVNGE, M_CMOVNL, + M_CMOVNLE, M_CMOVNO, M_CMOVNP, M_CMOVNS, M_CMOVNZ, M_CMOVO, M_CMOVP, M_CMOVPE, M_CMOVPO, M_CMOVS, M_CMOVZ, M_MOVS, M_MOVSB, M_MOVSW, M_MOVSD, M_MOVSQ, + M_CMPS, M_CMPSB, M_CMPSW, M_CMPSD, M_CMPSQ, M_SCAS, M_SCASB, M_SCASW, M_SCASD, M_SCASQ, M_LODS, M_LODSB, M_LODSW, M_LODSD, M_LODSQ, M_STOS, + M_STOSB, M_STOSW, M_STOSD, M_STOSQ, M_CLC, M_STC, M_CMC, M_CLD, M_STD, M_CLI, M_STI, M_LAHF, M_SAHF, M_PUSHF, M_PUSHFD, M_PUSHFQ, + M_POPF, M_POPFD, M_POPFQ, M_NOP, M_HLT, M_WAIT, M_LOCK, M_UD0, M_UD1, M_UD2, M_CPUID, M_RDTSC, M_RDTSCP, M_RDPMC, M_XGETBV, M_XSETBV, + M_CBW, M_CWDE, M_CDQE, M_CWD, M_CDQ, M_CQO, M_ANDN, M_BEXTR, M_BLSI, M_BLSMSK, M_BLSR, M_BZHI, M_PDEP, M_PEXT, M_RORX, M_SARX, + M_SHLX, M_SHRX, M_MULX, M_ADCX, M_ADOX, M_MOVAPS, M_MOVUPS, M_MOVAPD, M_MOVUPD, M_MOVSS, M_MOVDQA, M_MOVDQU, M_MOVQ, M_MOVD, M_MOVLPS, M_MOVHPS, + M_MOVLPD, M_MOVHPD, M_MOVLHPS, M_MOVHLPS, M_MOVMSKPS, M_MOVMSKPD, M_MOVNTPS, M_MOVNTPD, M_MOVNTDQ, M_MOVNTDQA, M_ADDPS, M_ADDPD, M_ADDSS, M_ADDSD, M_SUBPS, M_SUBPD, + M_SUBSS, M_SUBSD, M_MULPS, M_MULPD, M_MULSS, M_MULSD, M_DIVPS, M_DIVPD, M_DIVSS, M_DIVSD, M_SQRTPS, M_SQRTPD, M_SQRTSS, M_SQRTSD, M_RCPPS, M_RCPSS, + M_RSQRTPS, M_RSQRTSS, M_MAXPS, M_MAXPD, M_MAXSS, M_MAXSD, M_MINPS, M_MINPD, M_MINSS, M_MINSD, M_ANDPS, M_ANDPD, M_ANDNPS, M_ANDNPD, M_ORPS, M_ORPD, + M_XORPS, M_XORPD, M_CMPPS, M_CMPPD, M_CMPSS, M_COMISS, M_COMISD, M_UCOMISS, M_UCOMISD, M_SHUFPS, M_SHUFPD, M_UNPCKLPS, M_UNPCKHPS, M_UNPCKLPD, M_UNPCKHPD, M_CVTPS2PD, + M_CVTPD2PS, M_CVTSS2SD, M_CVTSD2SS, M_CVTPS2DQ, M_CVTPD2DQ, M_CVTDQ2PS, M_CVTDQ2PD, M_CVTSS2SI, M_CVTSD2SI, M_CVTSI2SS, M_CVTSI2SD, M_CVTTPS2DQ, M_CVTTPD2DQ, M_CVTTSS2SI, M_CVTTSD2SI, M_PADDB, + M_PADDW, M_PADDD, M_PADDQ, M_PSUBB, M_PSUBW, M_PSUBD, M_PSUBQ, M_PADDSB, M_PADDSW, M_PADDUSB, M_PADDUSW, M_PSUBSB, M_PSUBSW, M_PSUBUSB, M_PSUBUSW, M_PMULLW, + M_PMULHW, M_PMULHUW, M_PMULUDQ, M_PMADDWD, M_PAND, M_PANDN, M_POR, M_PXOR, M_PSLLW, M_PSLLD, M_PSLLQ, M_PSRLW, M_PSRLD, M_PSRLQ, M_PSRAW, M_PSRAD, + M_PCMPEQB, M_PCMPEQW, M_PCMPEQD, M_PCMPGTB, M_PCMPGTW, M_PCMPGTD, M_PACKSSWB, M_PACKSSDW, M_PACKUSWB, M_PUNPCKLBW, M_PUNPCKLWD, M_PUNPCKLDQ, M_PUNPCKLQDQ, M_PUNPCKHBW, M_PUNPCKHWD, M_PUNPCKHDQ, + M_PUNPCKHQDQ, M_PSHUFD, M_PSHUFHW, M_PSHUFLW, M_PSHUFW, M_PEXTRW, M_PINSRW, M_PMOVMSKB, M_PAVGB, M_PAVGW, M_PMAXUB, M_PMAXSW, M_PMINUB, M_PMINSW, M_PSADBW, M_MASKMOVDQU, + M_LFENCE, M_SFENCE, M_MFENCE, M_PAUSE, M_CLFLUSH, M_ADDSUBPS, M_ADDSUBPD, M_HADDPS, M_HADDPD, M_HSUBPS, M_HSUBPD, M_MOVDDUP, M_MOVSLDUP, M_MOVSHDUP, M_LDDQU, M_PSHUFB, + M_PHADDW, M_PHADDD, M_PHADDSW, M_PHSUBW, M_PHSUBD, M_PHSUBSW, M_PMADDUBSW, M_PMULHRSW, M_PSIGNB, M_PSIGNW, M_PSIGND, M_PABSB, M_PABSW, M_PABSD, M_PALIGNR, M_BLENDPS, + M_BLENDPD, M_BLENDVPS, M_BLENDVPD, M_PBLENDW, M_PBLENDVB, M_DPPS, M_DPPD, M_EXTRACTPS, M_INSERTPS, M_MPSADBW, M_PACKUSDW, M_PEXTRB, M_PEXTRD, M_PEXTRQ, M_PHMINPOSUW, M_PINSRB, + M_PINSRD, M_PINSRQ, M_PMAXSB, M_PMAXSD, M_PMAXUW, M_PMAXUD, M_PMINSB, M_PMINSD, M_PMINUW, M_PMINUD, M_PMOVSXBW, M_PMOVSXBD, M_PMOVSXBQ, M_PMOVSXWD, M_PMOVSXWQ, M_PMOVSXDQ, + M_PMOVZXBW, M_PMOVZXBD, M_PMOVZXBQ, M_PMOVZXWD, M_PMOVZXWQ, M_PMOVZXDQ, M_PMULDQ, M_PMULLD, M_PTEST, M_ROUNDPS, M_ROUNDPD, M_ROUNDSS, M_ROUNDSD, M_PCMPEQQ, M_CRC32, M_PCMPESTRI, + M_PCMPESTRM, M_PCMPISTRI, M_PCMPISTRM, M_PCMPGTQ, M_PCLMULQDQ, M_AESDEC, M_AESDECLAST, M_AESENC, M_AESENCLAST, M_AESIMC, M_AESKEYGENASSIST, M_SHA1MSG1, M_SHA1MSG2, M_SHA1NEXTE, M_SHA1RNDS4, M_SHA256MSG1, + M_SHA256MSG2, M_SHA256RNDS2, M_VADDPS, M_VADDPD, M_VADDSS, M_VADDSD, M_VSUBPS, M_VSUBPD, M_VSUBSS, M_VSUBSD, M_VMULPS, M_VMULPD, M_VMULSS, M_VMULSD, M_VDIVPS, M_VDIVPD, + M_VDIVSS, M_VDIVSD, M_VSQRTPS, M_VSQRTPD, M_VSQRTSS, M_VSQRTSD, M_VRCPPS, M_VRCPSS, M_VRSQRTPS, M_VRSQRTSS, M_VMAXPS, M_VMAXPD, M_VMAXSS, M_VMAXSD, M_VMINPS, M_VMINPD, + M_VMINSS, M_VMINSD, M_VANDPS, M_VANDPD, M_VANDNPS, M_VANDNPD, M_VORPS, M_VORPD, M_VXORPS, M_VXORPD, M_VCMPPS, M_VCMPPD, M_VCMPSS, M_VCMPSD, M_VCOMISS, M_VCOMISD, + M_VUCOMISS, M_VUCOMISD, M_VSHUFPS, M_VSHUFPD, M_VUNPCKLPS, M_VUNPCKHPS, M_VUNPCKLPD, M_VUNPCKHPD, M_VBLENDPS, M_VBLENDPD, M_VBLENDVPS, M_VBLENDVPD, M_VDPPS, M_VDPPD, M_VROUNDPS, M_VROUNDPD, + M_VROUNDSS, M_VROUNDSD, M_VEXTRACTPS, M_VINSERTPS, M_VMOVAPS, M_VMOVUPS, M_VMOVAPD, M_VMOVUPD, M_VMOVSS, M_VMOVSD, M_VMOVDQA, M_VMOVDQU, M_VMOVQ, M_VMOVD, M_VMOVLPS, M_VMOVHPS, + M_VMOVLPD, M_VMOVHPD, M_VMOVLHPS, M_VMOVHLPS, M_VMOVMSKPS, M_VMOVMSKPD, M_VMOVNTPS, M_VMOVNTPD, M_VMOVNTDQ, M_VMOVNTDQA, M_VADDSUBPS, M_VADDSUBPD, M_VHADDPS, M_VHADDPD, M_VHSUBPS, M_VHSUBPD, + M_VLDDQU, M_VMOVDDUP, M_VMOVSLDUP, M_VMOVSHDUP, M_VPCMPESTRI, M_VPCMPESTRM, M_VPCMPISTRI, M_VPCMPISTRM, M_VPBROADCASTB, M_VPBROADCASTW, M_VPBROADCASTD, M_VPBROADCASTQ, M_VCVTPS2PD, M_VCVTPD2PS, M_VCVTSS2SD, M_VCVTSD2SS, + M_VCVTPS2DQ, M_VCVTPD2DQ, M_VCVTDQ2PS, M_VCVTDQ2PD, M_VCVTSS2SI, M_VCVTSD2SI, M_VCVTSI2SS, M_VCVTSI2SD, M_VCVTTPS2DQ, M_VCVTTPD2DQ, M_VCVTTSS2SI, M_VCVTTSD2SI, M_VPADDB, M_VPADDW, M_VPADDD, M_VPADDQ, + M_VPSUBB, M_VPSUBW, M_VPSUBD, M_VPSUBQ, M_VPMULLW, M_VPMULHW, M_VPMULHUW, M_VPMULUDQ, M_VPMADDWD, M_VPAND, M_VPANDN, M_VPOR, M_VPXOR, M_VPSLLW, M_VPSLLD, M_VPSLLQ, + M_VPSRLW, M_VPSRLD, M_VPSRLQ, M_VPSRAW, M_VPSRAD, M_VPCMPEQB, M_VPCMPEQW, M_VPCMPEQD, M_VPCMPEQQ, M_VPCMPGTB, M_VPCMPGTW, M_VPCMPGTD, M_VPCMPGTQ, M_VPACKSSWB, M_VPACKSSDW, M_VPACKUSWB, + M_VPACKUSDW, M_VPUNPCKLBW, M_VPUNPCKLWD, M_VPUNPCKLDQ, M_VPUNPCKLQDQ, M_VPUNPCKHBW, M_VPUNPCKHWD, M_VPUNPCKHDQ, M_VPUNPCKHQDQ, M_VPSHUFD, M_VPSHUFHW, M_VPSHUFLW, M_VPEXTRB, M_VPEXTRW, M_VPEXTRD, M_VPEXTRQ, + M_VPINSRB, M_VPINSRW, M_VPINSRD, M_VPINSRQ, M_VPMOVMSKB, M_VPTEST, M_VPSHUFB, M_VPHADDW, M_VPHADDD, M_VPHADDSW, M_VPHSUBW, M_VPHSUBD, M_VPHSUBSW, M_VPMADDUBSW, M_VPMULHRSW, M_VPSIGNB, + M_VPSIGNW, M_VPSIGND, M_VPABSB, M_VPABSW, M_VPABSD, M_VPALIGNR, M_VPBLENDW, M_VPBLENDVB, M_VMPSADBW, M_VPHMINPOSUW, M_VPMAXSB, M_VPMAXSD, M_VPMAXUW, M_VPMAXUD, M_VPMINSB, M_VPMINSD, + M_VPMINUW, M_VPMINUD, M_VPMOVSXBW, M_VPMOVSXBD, M_VPMOVSXBQ, M_VPMOVSXWD, M_VPMOVSXWQ, M_VPMOVSXDQ, M_VPMOVZXBW, M_VPMOVZXBD, M_VPMOVZXBQ, M_VPMOVZXWD, M_VPMOVZXWQ, M_VPMOVZXDQ, M_VPMULDQ, M_VPMULLD, + M_VMASKMOVDQU, M_VPCLMULQDQ, M_VAESDEC, M_VAESDECLAST, M_VAESENC, M_VAESENCLAST, M_VAESIMC, M_VAESKEYGENASSIST, M_VBROADCASTSS, M_VBROADCASTSD, M_VBROADCASTF128, M_VEXTRACTF128, M_VINSERTF128, M_VPERM2F128, M_VMASKMOVPS, M_VMASKMOVPD, + M_VTESTPS, M_VTESTPD, M_VZEROALL, M_VZEROUPPER, M_VBROADCASTI128, M_VEXTRACTI128, M_VINSERTI128, M_VPERM2I128, M_VPERMD, M_VPERMPS, M_VPERMQ, M_VPERMPD, M_VPBLENDD, M_VPSLLVD, M_VPSLLVQ, M_VPSRLVD, + M_VPSRLVQ, M_VPSRAVD, M_VPMASKMOVD, M_VPMASKMOVQ, M_VGATHERDPS, M_VGATHERDPD, M_VGATHERQPS, M_VGATHERQPD, M_VPGATHERDD, M_VPGATHERDQ, M_VPGATHERQD, M_VPGATHERQQ, M_VFMADD132PS, M_VFMADD213PS, M_VFMADD231PS, M_VFMADD132PD, + M_VFMADD213PD, M_VFMADD231PD, M_VFMADD132SS, M_VFMADD213SS, M_VFMADD231SS, M_VFMADD132SD, M_VFMADD213SD, M_VFMADD231SD, M_VFMSUB132PS, M_VFMSUB213PS, M_VFMSUB231PS, M_VFMSUB132PD, M_VFMSUB213PD, M_VFMSUB231PD, M_VFMSUB132SS, M_VFMSUB213SS, + M_VFMSUB231SS, M_VFMSUB132SD, M_VFMSUB213SD, M_VFMSUB231SD, M_VFNMADD132PS, M_VFNMADD213PS, M_VFNMADD231PS, M_VFNMADD132PD, M_VFNMADD213PD, M_VFNMADD231PD, M_VFNMADD132SS, M_VFNMADD213SS, M_VFNMADD231SS, M_VFNMADD132SD, M_VFNMADD213SD, M_VFNMADD231SD, + M_VFNMSUB132PS, M_VFNMSUB213PS, M_VFNMSUB231PS, M_VFNMSUB132PD, M_VFNMSUB213PD, M_VFNMSUB231PD, M_VFNMSUB132SS, M_VFNMSUB213SS, M_VFNMSUB231SS, M_VFNMSUB132SD, M_VFNMSUB213SD, M_VFNMSUB231SD, M_VFMADDSUB132PS, M_VFMADDSUB213PS, M_VFMADDSUB231PS, M_VFMADDSUB132PD, + M_VFMADDSUB213PD, M_VFMADDSUB231PD, M_VFMSUBADD132PS, M_VFMSUBADD213PS, M_VFMSUBADD231PS, M_VFMSUBADD132PD, M_VFMSUBADD213PD, M_VFMSUBADD231PD, M_VCVTPH2PS, M_VCVTPS2PH, M_VMOVDQA32, M_VMOVDQA64, M_VMOVDQU8, M_VMOVDQU16, M_VMOVDQU32, M_VMOVDQU64, + M_VPBLENDMB, M_VPBLENDMW, M_VPBLENDMD, M_VPBLENDMQ, M_VBLENDMPS, M_VBLENDMPD, M_VPCMPB, M_VPCMPUB, M_VPCMPW, M_VPCMPUW, M_VPCMPD, M_VPCMPUD, M_VPCMPQ, M_VPCMPUQ, M_VPTESTMB, M_VPTESTMW, + M_VPTESTMD, M_VPTESTMQ, M_VPTESTNMB, M_VPTESTNMW, M_VPTESTNMD, M_VPTESTNMQ, M_VPCOMPRESSD, M_VPCOMPRESSQ, M_VCOMPRESSPS, M_VCOMPRESSPD, M_VPEXPANDD, M_VPEXPANDQ, M_VEXPANDPS, M_VEXPANDPD, M_VPCONFLICTD, M_VPCONFLICTQ, + M_VPLZCNTD, M_VPLZCNTQ, M_VPERMI2B, M_VPERMI2W, M_VPERMI2D, M_VPERMI2Q, M_VPERMI2PS, M_VPERMI2PD, M_VPERMT2B, M_VPERMT2W, M_VPERMT2D, M_VPERMT2Q, M_VPERMT2PS, M_VPERMT2PD, M_VPERMB, M_VPERMW, + M_VPMOVB2M, M_VPMOVW2M, M_VPMOVD2M, M_VPMOVQ2M, M_VPMOVM2B, M_VPMOVM2W, M_VPMOVM2D, M_VPMOVM2Q, M_VPMOVQB, M_VPMOVSQB, M_VPMOVUSQB, M_VPMOVQW, M_VPMOVSQW, M_VPMOVUSQW, M_VPMOVQD, M_VPMOVSQD, + M_VPMOVUSQD, M_VPMOVDB, M_VPMOVSDB, M_VPMOVUSDB, M_VPMOVDW, M_VPMOVSDW, M_VPMOVUSDW, M_VPMOVWB, M_VPMOVSWB, M_VPMOVUSWB, M_VPROLD, M_VPROLQ, M_VPROLVD, M_VPROLVQ, M_VPRORD, M_VPRORQ, + M_VPRORVD, M_VPRORVQ, M_VPSCATTERDD, M_VPSCATTERDQ, M_VPSCATTERQD, M_VPSCATTERQQ, M_VSCATTERDPS, M_VSCATTERDPD, M_VSCATTERQPS, M_VSCATTERQPD, M_VPSRAVQ, M_VPSRAVW, M_VPSLLVW, M_VPSRLVW, M_VRANGEPS, M_VRANGEPD, + M_VRANGESS, M_VRANGESD, M_VREDUCEPS, M_VREDUCEPD, M_VREDUCESS, M_VREDUCESD, M_VRNDSCALEPS, M_VRNDSCALEPD, M_VRNDSCALESS, M_VRNDSCALESD, M_VRSQRT14PS, M_VRSQRT14PD, M_VRSQRT14SS, M_VRSQRT14SD, M_VRCP14PS, M_VRCP14PD, + M_VRCP14SS, M_VRCP14SD, M_VSCALEFPS, M_VSCALEFPD, M_VSCALEFSS, M_VSCALEFSD, M_VGETEXPPS, M_VGETEXPPD, M_VGETEXPSS, M_VGETEXPSD, M_VGETMANTPS, M_VGETMANTPD, M_VGETMANTSS, M_VGETMANTSD, M_VFIXUPIMMPS, M_VFIXUPIMMPD, + M_VFIXUPIMMSS, M_VFIXUPIMMSD, M_VFPCLASSPS, M_VFPCLASSPD, M_VFPCLASSSS, M_VFPCLASSSD, M_VALIGNQ, M_VALIGND, M_VDBPSADBW, M_VPTERNLOGD, M_VPTERNLOGQ, M_VPDPWSSD, M_VPMULTISHIFTQB, M_KADDW, M_KADDB, M_KADDQ, + M_KADDD, M_KANDW, M_KANDB, M_KANDQ, M_KANDD, M_KANDNW, M_KANDNB, M_KANDNQ, M_KANDND, M_KMOVW, M_KMOVB, M_KMOVQ, M_KMOVD, M_KNOTW, M_KNOTB, M_KNOTQ, + M_KNOTD, M_KORW, M_KORB, M_KORQ, M_KORD, M_KORTESTW, M_KORTESTB, M_KORTESTQ, M_KORTESTD, M_KSHIFTLW, M_KSHIFTLB, M_KSHIFTLQ, M_KSHIFTLD, M_KSHIFTRW, M_KSHIFTRB, M_KSHIFTRQ, + M_KSHIFTRD, M_KTESTW, M_KTESTB, M_KTESTQ, M_KTESTD, M_KUNPCKBW, M_KUNPCKWD, M_KUNPCKDQ, M_KXNORW, M_KXNORB, M_KXNORQ, M_KXNORD, M_KXORW, M_KXORB, M_KXORQ, M_KXORD, + M_FADD, M_FADDP, M_FIADD, M_FSUB, M_FSUBP, M_FISUB, M_FSUBR, M_FSUBRP, M_FISUBR, M_FMUL, M_FMULP, M_FIMUL, M_FDIV, M_FDIVP, M_FIDIV, M_FDIVR, + M_FDIVRP, M_FIDIVR, M_FSQRT, M_FABS, M_FCHS, M_FPREM, M_FPREM1, M_FRNDINT, M_FSCALE, M_FXTRACT, M_FXAM, M_FLD, M_FILD, M_FBLD, M_FST, M_FSTP, + M_FIST, M_FISTP, M_FISTTP, M_FBSTP, M_FXCH, M_FCMOVB, M_FCMOVE, M_FCMOVBE, M_FCMOVU, M_FCMOVNB, M_FCMOVNE, M_FCMOVNBE, M_FCMOVNU, M_FCOM, M_FCOMP, M_FCOMPP, + M_FICOM, M_FICOMP, M_FCOMI, M_FCOMIP, M_FUCOMI, M_FUCOMIP, M_FUCOM, M_FUCOMP, M_FUCOMPP, M_FTST, M_FLDZ, M_FLD1, M_FLDPI, M_FLDL2T, M_FLDL2E, M_FLDLG2, + M_FLDLN2, M_FSIN, M_FCOS, M_FSINCOS, M_FPTAN, M_FPATAN, M_F2XM1, M_FYL2X, M_FYL2XP1, M_FINIT, M_FNINIT, M_FINCSTP, M_FDECSTP, M_FFREE, M_FFREEP, M_FNOP, + M_FWAIT, M_FCLEX, M_FNCLEX, M_FSTCW, M_FNSTCW, M_FLDCW, M_FSTENV, M_FNSTENV, M_FLDENV, M_FSAVE, M_FNSAVE, M_FRSTOR, M_FSTSW, M_FNSTSW, M_FXSAVE, M_FXSAVE64, + M_FXRSTOR, M_FXRSTOR64, M_LGDT, M_SGDT, M_LIDT, M_SIDT, M_LLDT, M_SLDT, M_LTR, M_STR, M_LMSW, M_SMSW, M_CLTS, M_ARPL, M_LAR, M_LSL, + M_VERR, M_VERW, M_INVD, M_WBINVD, M_INVLPG, M_INVPCID, M_RSM, M_RDMSR, M_WRMSR, M_VMCALL, M_VMLAUNCH, M_VMRESUME, M_VMXOFF, M_VMXON, M_VMCLEAR, M_VMPTRLD, + M_VMPTRST, M_VMREAD, M_VMWRITE, M_VMFUNC, M_INVEPT, M_INVVPID, M_ENCLS, M_ENCLU, M_ENCLV, M_RDPKRU, M_WRPKRU, M_INCSSPD, M_INCSSPQ, M_RDSSPD, M_RDSSPQ, M_SAVEPREVSSP, + M_RSTORSSP, M_WRSSD, M_WRSSQ, M_WRUSSD, M_WRUSSQ, M_SETSSBSY, M_CLRSSBSY, M_ENDBR64, M_ENDBR32, M_XSAVE, M_XSAVE64, M_XRSTOR, M_XRSTOR64, M_XSAVEOPT, M_XSAVEOPT64, M_XSAVEC, + M_XSAVEC64, M_XSAVES, M_XSAVES64, M_XRSTORS, M_XRSTORS64, M_PREFETCHT0, M_PREFETCHT1, M_PREFETCHT2, M_PREFETCHNTA, M_PREFETCHW, M_CLFLUSHOPT, M_CLWB, M_CLDEMOTE, M_BSWAP, M_CMPXCHG, M_CMPXCHG8B, + M_CMPXCHG16B, M_XADD, M_BOUND, M_ENTER, M_LEAVE, M_XLAT, M_XLATB, M_MOVBE, M_RDRAND, M_RDSEED, M_SWAPGS, M_MONITOR, M_MWAIT, M_CLAC, M_STAC, M_RDFSBASE, + M_RDGSBASE, M_WRFSBASE, M_WRGSBASE, M_PTWRITE, M_RDPID, M_WBNOINVD, M_SERIALIZE, M_PREFETCH, M_IN, M_OUT, M_TPAUSE, M_UMONITOR, M_UMWAIT, M_MOVDIRI, M_MOVDIR64B, M_ENQCMD, + M_ENQCMDS, M_AADD, M_AAND, M_AOR, M_AXOR, M_XEND, M_XTEST, M_VMRUN, M_VMMCALL, M_VMLOAD, M_VMSAVE, M_STGI, M_CLGI, M_SKINIT, M_INVLPGA, M_INVLPGB, + M_TLBSYNC, M_PVALIDATE, M_RMPADJUST, M_RMPUPDATE, M_PSMASH, M_CLZERO, M_MONITORX, M_MWAITX, M_RDPRU, M_MCOMMIT, MNEMONIC_COUNT }; @@ -171,6 +171,7 @@ struct Asm_amd64 { SideEffectFlag_PRIVILEGED = 1<<7, // requires CPL0 / reads-writes supervisor machine state SideEffectFlag_CONTROL = 1<<8, // alters control flow (writes RIP): branches, calls, returns SideEffectFlag_CET = 1<<9, // control-flow-enforcement: landing pads, shadow-stack ops + SideEffectFlag_NONDETERMINISTIC = 1<<10, }; enum ClobberRegs : u16 { ClobberReg_RAX = 1<<0, @@ -239,6 +240,27 @@ struct Asm_amd64 { return ""; } + u16 flag_from_name(String const &name) { + static const struct {String name; ClobberFlags flag; } table[] = { + {str_lit("c"), ClobberFlag_CF}, // Carry + {str_lit("p"), ClobberFlag_PF}, // Parity + {str_lit("a"), ClobberFlag_AF}, // Auxiliary Carry + {str_lit("z"), ClobberFlag_ZF}, // Zero + {str_lit("s"), ClobberFlag_SF}, // Sign + {str_lit("t"), ClobberFlag_TF}, // Trap + {str_lit("i"), ClobberFlag_IF}, // Interrupt Enable + {str_lit("d"), ClobberFlag_DF}, // Direction + {str_lit("o"), ClobberFlag_OF}, // Overflow + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + i32 flag_bit_from_name(String const &name, i32 *width_) { static const struct {String name; i32 bit; } table[] = { {str_lit("c"), 0}, // Carry @@ -287,6 +309,10 @@ struct Asm_amd64 { bool reads_mem; SideEffectFlags side_effects; + ClobberFlags flags_rd_call() const { + return flags_rd; + } + bool implies_clobber_flags() const { u16 const FLAGS_MASK = ClobberFlag_CF|ClobberFlag_PF|ClobberFlag_AF| ClobberFlag_ZF|ClobberFlag_SF|ClobberFlag_OF; @@ -308,7 +334,8 @@ struct Asm_amd64 { SideEffectFlag_HALT | SideEffectFlag_PRIVILEGED | SideEffectFlag_CONTROL | - SideEffectFlag_CET; + SideEffectFlag_CET | + SideEffectFlag_NONDETERMINISTIC; // NOTE: SideEffectFlag_HINT deliberately excluded — inert, may be DCE'd. return ((side_effects & VOLATILE_SE) != 0); } @@ -326,6 +353,16 @@ struct Asm_amd64 { bool is_conditional() const { return has_control() && (cast(u16)flags_rd != 0); } + bool is_nondeterministic() const { + return (cast(u16)side_effects & SideEffectFlag_NONDETERMINISTIC) != 0; + } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + return (implicit & (ClobberReg_RSP|ClobberReg_RSI|ClobberReg_RDI|ClobberReg_RBX)) != 0; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { @@ -350,12 +387,17 @@ struct Asm_amd64 { AliasSrc_LIT, }; + // NOTE(bill): These are completely dummy things as it is only needed by RISC-V and not x86 struct PseudoAlias { - Mnemonic target; // real instruction emitted - AliasSrc src[4]; // how to fill target's four operand slots - i16 lit; // immediate when a src slot is AliasSrc_LIT - u16 csr; // CSR address when a src slot is AliasSrc_CSR_LIT - u8 nargs; // operands the user supplies (ARG0.. mnemonic_map; StringMap prefix_map; @@ -785,6 +827,53 @@ struct Asm_amd64 { } return true; } + AsmOperandConstraint operand_value_constraint(u16 m, int op) const { + switch (m) { + case M_SHL: case M_SHR: case M_SAR: case M_SAL: + case M_ROL: case M_ROR: case M_RCL: case M_RCR: + if (op == 1) return {AsmOperandConstraint_ShiftCount, /*width_operand*/0}; + break; + case M_DIV: case M_IDIV: + if (op == 0) return {AsmOperandConstraint_NonZeroDivisor, -1}; + break; + } + return {AsmOperandConstraint_None, -1}; + } bool is_self_zeroing_idiom(u16 m) const { + switch (m) { + // integer xor / sub: x ^ x == 0, x - x == 0 + case M_XOR: + case M_SUB: + + // SSE/AVX bitwise xor of a register with itself + case M_PXOR: + case M_XORPS: + case M_XORPD: + case M_VPXOR: + case M_VXORPS: + case M_VXORPD: + + // packed integer subtract: psub x, x == 0 + case M_PSUBB: + case M_PSUBW: + case M_PSUBD: + case M_PSUBQ: + case M_VPSUBB: + case M_VPSUBW: + case M_VPSUBD: + case M_VPSUBQ: + + // andnot of a value with itself: (~x) & x == 0 + case M_ANDN: // BMI1 GPR: andn dst, a, a + case M_ANDNPS: + case M_ANDNPD: + case M_PANDN: + case M_VANDNPS: + case M_VANDNPD: + case M_VPANDN: + return true; + } + return false; + } }; @@ -795,83 +884,83 @@ gb_global Asm_amd64 g_asm_amd64; String const Asm_amd64::mnemonic_strings[Asm_amd64::MNEMONIC_COUNT] { str_lit(""), str_lit("mov"), str_lit("movabs"), str_lit("movzx"), str_lit("movsx"), str_lit("movsxd"), str_lit("xchg"), str_lit("push"), str_lit("pop"), str_lit("lea"), str_lit("add"), str_lit("adc"), str_lit("sub"), str_lit("sbb"), str_lit("mul"), str_lit("imul"), - str_lit("div"), str_lit("idiv"), str_lit("inc"), str_lit("dec"), str_lit("neg"), str_lit("cmp"), str_lit("and"), str_lit("or"), str_lit("xor"), str_lit("not"), str_lit("test"), str_lit("shl"), str_lit("shr"), str_lit("sar"), str_lit("rol"), str_lit("ror"), - str_lit("rcl"), str_lit("rcr"), str_lit("shld"), str_lit("shrd"), str_lit("bt"), str_lit("bts"), str_lit("btr"), str_lit("btc"), str_lit("bsf"), str_lit("bsr"), str_lit("popcnt"), str_lit("lzcnt"), str_lit("tzcnt"), str_lit("jmp"), str_lit("ja"), str_lit("jae"), - str_lit("jb"), str_lit("jbe"), str_lit("jc"), str_lit("je"), str_lit("jz"), str_lit("jg"), str_lit("jge"), str_lit("jl"), str_lit("jle"), str_lit("jna"), str_lit("jnae"), str_lit("jnb"), str_lit("jnbe"), str_lit("jnc"), str_lit("jne"), str_lit("jnz"), - str_lit("jng"), str_lit("jnge"), str_lit("jnl"), str_lit("jnle"), str_lit("jno"), str_lit("jnp"), str_lit("jns"), str_lit("jo"), str_lit("jp"), str_lit("jpe"), str_lit("jpo"), str_lit("js"), str_lit("jcxz"), str_lit("jecxz"), str_lit("jrcxz"), str_lit("loop"), - str_lit("loope"), str_lit("loopne"), str_lit("call"), str_lit("ret"), str_lit("iret"), str_lit("iretd"), str_lit("iretq"), str_lit("int"), str_lit("int3"), str_lit("into"), str_lit("syscall"), str_lit("sysret"), str_lit("sysenter"), str_lit("sysexit"), str_lit("seta"), str_lit("setae"), - str_lit("setb"), str_lit("setbe"), str_lit("setc"), str_lit("sete"), str_lit("setg"), str_lit("setge"), str_lit("setl"), str_lit("setle"), str_lit("setna"), str_lit("setnae"), str_lit("setnb"), str_lit("setnbe"), str_lit("setnc"), str_lit("setne"), str_lit("setng"), str_lit("setnge"), - str_lit("setnl"), str_lit("setnle"), str_lit("setno"), str_lit("setnp"), str_lit("setns"), str_lit("setnz"), str_lit("seto"), str_lit("setp"), str_lit("setpe"), str_lit("setpo"), str_lit("sets"), str_lit("setz"), str_lit("cmova"), str_lit("cmovae"), str_lit("cmovb"), str_lit("cmovbe"), - str_lit("cmovc"), str_lit("cmove"), str_lit("cmovg"), str_lit("cmovge"), str_lit("cmovl"), str_lit("cmovle"), str_lit("cmovna"), str_lit("cmovnae"), str_lit("cmovnb"), str_lit("cmovnbe"), str_lit("cmovnc"), str_lit("cmovne"), str_lit("cmovng"), str_lit("cmovnge"), str_lit("cmovnl"), str_lit("cmovnle"), - str_lit("cmovno"), str_lit("cmovnp"), str_lit("cmovns"), str_lit("cmovnz"), str_lit("cmovo"), str_lit("cmovp"), str_lit("cmovpe"), str_lit("cmovpo"), str_lit("cmovs"), str_lit("cmovz"), str_lit("movs"), str_lit("movsb"), str_lit("movsw"), str_lit("movsd"), str_lit("movsq"), str_lit("cmps"), - str_lit("cmpsb"), str_lit("cmpsw"), str_lit("cmpsd"), str_lit("cmpsq"), str_lit("scas"), str_lit("scasb"), str_lit("scasw"), str_lit("scasd"), str_lit("scasq"), str_lit("lods"), str_lit("lodsb"), str_lit("lodsw"), str_lit("lodsd"), str_lit("lodsq"), str_lit("stos"), str_lit("stosb"), - str_lit("stosw"), str_lit("stosd"), str_lit("stosq"), str_lit("clc"), str_lit("stc"), str_lit("cmc"), str_lit("cld"), str_lit("std"), str_lit("cli"), str_lit("sti"), str_lit("lahf"), str_lit("sahf"), str_lit("pushf"), str_lit("pushfd"), str_lit("pushfq"), str_lit("popf"), - str_lit("popfd"), str_lit("popfq"), str_lit("nop"), str_lit("hlt"), str_lit("wait"), str_lit("lock"), str_lit("ud0"), str_lit("ud1"), str_lit("ud2"), str_lit("cpuid"), str_lit("rdtsc"), str_lit("rdtscp"), str_lit("rdpmc"), str_lit("xgetbv"), str_lit("xsetbv"), str_lit("cbw"), - str_lit("cwde"), str_lit("cdqe"), str_lit("cwd"), str_lit("cdq"), str_lit("cqo"), str_lit("andn"), str_lit("bextr"), str_lit("blsi"), str_lit("blsmsk"), str_lit("blsr"), str_lit("bzhi"), str_lit("pdep"), str_lit("pext"), str_lit("rorx"), str_lit("sarx"), str_lit("shlx"), - str_lit("shrx"), str_lit("mulx"), str_lit("adcx"), str_lit("adox"), str_lit("movaps"), str_lit("movups"), str_lit("movapd"), str_lit("movupd"), str_lit("movss"), str_lit("movdqa"), str_lit("movdqu"), str_lit("movq"), str_lit("movd"), str_lit("movlps"), str_lit("movhps"), str_lit("movlpd"), - str_lit("movhpd"), str_lit("movlhps"), str_lit("movhlps"), str_lit("movmskps"), str_lit("movmskpd"), str_lit("movntps"), str_lit("movntpd"), str_lit("movntdq"), str_lit("movntdqa"), str_lit("addps"), str_lit("addpd"), str_lit("addss"), str_lit("addsd"), str_lit("subps"), str_lit("subpd"), str_lit("subss"), - str_lit("subsd"), str_lit("mulps"), str_lit("mulpd"), str_lit("mulss"), str_lit("mulsd"), str_lit("divps"), str_lit("divpd"), str_lit("divss"), str_lit("divsd"), str_lit("sqrtps"), str_lit("sqrtpd"), str_lit("sqrtss"), str_lit("sqrtsd"), str_lit("rcpps"), str_lit("rcpss"), str_lit("rsqrtps"), - str_lit("rsqrtss"), str_lit("maxps"), str_lit("maxpd"), str_lit("maxss"), str_lit("maxsd"), str_lit("minps"), str_lit("minpd"), str_lit("minss"), str_lit("minsd"), str_lit("andps"), str_lit("andpd"), str_lit("andnps"), str_lit("andnpd"), str_lit("orps"), str_lit("orpd"), str_lit("xorps"), - str_lit("xorpd"), str_lit("cmpps"), str_lit("cmppd"), str_lit("cmpss"), str_lit("comiss"), str_lit("comisd"), str_lit("ucomiss"), str_lit("ucomisd"), str_lit("shufps"), str_lit("shufpd"), str_lit("unpcklps"), str_lit("unpckhps"), str_lit("unpcklpd"), str_lit("unpckhpd"), str_lit("cvtps2pd"), str_lit("cvtpd2ps"), - str_lit("cvtss2sd"), str_lit("cvtsd2ss"), str_lit("cvtps2dq"), str_lit("cvtpd2dq"), str_lit("cvtdq2ps"), str_lit("cvtdq2pd"), str_lit("cvtss2si"), str_lit("cvtsd2si"), str_lit("cvtsi2ss"), str_lit("cvtsi2sd"), str_lit("cvttps2dq"), str_lit("cvttpd2dq"), str_lit("cvttss2si"), str_lit("cvttsd2si"), str_lit("paddb"), str_lit("paddw"), - str_lit("paddd"), str_lit("paddq"), str_lit("psubb"), str_lit("psubw"), str_lit("psubd"), str_lit("psubq"), str_lit("paddsb"), str_lit("paddsw"), str_lit("paddusb"), str_lit("paddusw"), str_lit("psubsb"), str_lit("psubsw"), str_lit("psubusb"), str_lit("psubusw"), str_lit("pmullw"), str_lit("pmulhw"), - str_lit("pmulhuw"), str_lit("pmuludq"), str_lit("pmaddwd"), str_lit("pand"), str_lit("pandn"), str_lit("por"), str_lit("pxor"), str_lit("psllw"), str_lit("pslld"), str_lit("psllq"), str_lit("psrlw"), str_lit("psrld"), str_lit("psrlq"), str_lit("psraw"), str_lit("psrad"), str_lit("pcmpeqb"), - str_lit("pcmpeqw"), str_lit("pcmpeqd"), str_lit("pcmpgtb"), str_lit("pcmpgtw"), str_lit("pcmpgtd"), str_lit("packsswb"), str_lit("packssdw"), str_lit("packuswb"), str_lit("punpcklbw"), str_lit("punpcklwd"), str_lit("punpckldq"), str_lit("punpcklqdq"), str_lit("punpckhbw"), str_lit("punpckhwd"), str_lit("punpckhdq"), str_lit("punpckhqdq"), - str_lit("pshufd"), str_lit("pshufhw"), str_lit("pshuflw"), str_lit("pshufw"), str_lit("pextrw"), str_lit("pinsrw"), str_lit("pmovmskb"), str_lit("pavgb"), str_lit("pavgw"), str_lit("pmaxub"), str_lit("pmaxsw"), str_lit("pminub"), str_lit("pminsw"), str_lit("psadbw"), str_lit("maskmovdqu"), str_lit("lfence"), - str_lit("sfence"), str_lit("mfence"), str_lit("pause"), str_lit("clflush"), str_lit("addsubps"), str_lit("addsubpd"), str_lit("haddps"), str_lit("haddpd"), str_lit("hsubps"), str_lit("hsubpd"), str_lit("movddup"), str_lit("movsldup"), str_lit("movshdup"), str_lit("lddqu"), str_lit("pshufb"), str_lit("phaddw"), - str_lit("phaddd"), str_lit("phaddsw"), str_lit("phsubw"), str_lit("phsubd"), str_lit("phsubsw"), str_lit("pmaddubsw"), str_lit("pmulhrsw"), str_lit("psignb"), str_lit("psignw"), str_lit("psignd"), str_lit("pabsb"), str_lit("pabsw"), str_lit("pabsd"), str_lit("palignr"), str_lit("blendps"), str_lit("blendpd"), - str_lit("blendvps"), str_lit("blendvpd"), str_lit("pblendw"), str_lit("pblendvb"), str_lit("dpps"), str_lit("dppd"), str_lit("extractps"), str_lit("insertps"), str_lit("mpsadbw"), str_lit("packusdw"), str_lit("pextrb"), str_lit("pextrd"), str_lit("pextrq"), str_lit("phminposuw"), str_lit("pinsrb"), str_lit("pinsrd"), - str_lit("pinsrq"), str_lit("pmaxsb"), str_lit("pmaxsd"), str_lit("pmaxuw"), str_lit("pmaxud"), str_lit("pminsb"), str_lit("pminsd"), str_lit("pminuw"), str_lit("pminud"), str_lit("pmovsxbw"), str_lit("pmovsxbd"), str_lit("pmovsxbq"), str_lit("pmovsxwd"), str_lit("pmovsxwq"), str_lit("pmovsxdq"), str_lit("pmovzxbw"), - str_lit("pmovzxbd"), str_lit("pmovzxbq"), str_lit("pmovzxwd"), str_lit("pmovzxwq"), str_lit("pmovzxdq"), str_lit("pmuldq"), str_lit("pmulld"), str_lit("ptest"), str_lit("roundps"), str_lit("roundpd"), str_lit("roundss"), str_lit("roundsd"), str_lit("pcmpeqq"), str_lit("crc32"), str_lit("pcmpestri"), str_lit("pcmpestrm"), - str_lit("pcmpistri"), str_lit("pcmpistrm"), str_lit("pcmpgtq"), str_lit("pclmulqdq"), str_lit("aesdec"), str_lit("aesdeclast"), str_lit("aesenc"), str_lit("aesenclast"), str_lit("aesimc"), str_lit("aeskeygenassist"), str_lit("sha1msg1"), str_lit("sha1msg2"), str_lit("sha1nexte"), str_lit("sha1rnds4"), str_lit("sha256msg1"), str_lit("sha256msg2"), - str_lit("sha256rnds2"), str_lit("vaddps"), str_lit("vaddpd"), str_lit("vaddss"), str_lit("vaddsd"), str_lit("vsubps"), str_lit("vsubpd"), str_lit("vsubss"), str_lit("vsubsd"), str_lit("vmulps"), str_lit("vmulpd"), str_lit("vmulss"), str_lit("vmulsd"), str_lit("vdivps"), str_lit("vdivpd"), str_lit("vdivss"), - str_lit("vdivsd"), str_lit("vsqrtps"), str_lit("vsqrtpd"), str_lit("vsqrtss"), str_lit("vsqrtsd"), str_lit("vrcpps"), str_lit("vrcpss"), str_lit("vrsqrtps"), str_lit("vrsqrtss"), str_lit("vmaxps"), str_lit("vmaxpd"), str_lit("vmaxss"), str_lit("vmaxsd"), str_lit("vminps"), str_lit("vminpd"), str_lit("vminss"), - str_lit("vminsd"), str_lit("vandps"), str_lit("vandpd"), str_lit("vandnps"), str_lit("vandnpd"), str_lit("vorps"), str_lit("vorpd"), str_lit("vxorps"), str_lit("vxorpd"), str_lit("vcmpps"), str_lit("vcmppd"), str_lit("vcmpss"), str_lit("vcmpsd"), str_lit("vcomiss"), str_lit("vcomisd"), str_lit("vucomiss"), - str_lit("vucomisd"), str_lit("vshufps"), str_lit("vshufpd"), str_lit("vunpcklps"), str_lit("vunpckhps"), str_lit("vunpcklpd"), str_lit("vunpckhpd"), str_lit("vblendps"), str_lit("vblendpd"), str_lit("vblendvps"), str_lit("vblendvpd"), str_lit("vdpps"), str_lit("vdppd"), str_lit("vroundps"), str_lit("vroundpd"), str_lit("vroundss"), - str_lit("vroundsd"), str_lit("vextractps"), str_lit("vinsertps"), str_lit("vmovaps"), str_lit("vmovups"), str_lit("vmovapd"), str_lit("vmovupd"), str_lit("vmovss"), str_lit("vmovsd"), str_lit("vmovdqa"), str_lit("vmovdqu"), str_lit("vmovq"), str_lit("vmovd"), str_lit("vmovlps"), str_lit("vmovhps"), str_lit("vmovlpd"), - str_lit("vmovhpd"), str_lit("vmovlhps"), str_lit("vmovhlps"), str_lit("vmovmskps"), str_lit("vmovmskpd"), str_lit("vmovntps"), str_lit("vmovntpd"), str_lit("vmovntdq"), str_lit("vmovntdqa"), str_lit("vaddsubps"), str_lit("vaddsubpd"), str_lit("vhaddps"), str_lit("vhaddpd"), str_lit("vhsubps"), str_lit("vhsubpd"), str_lit("vlddqu"), - str_lit("vmovddup"), str_lit("vmovsldup"), str_lit("vmovshdup"), str_lit("vpcmpestri"), str_lit("vpcmpestrm"), str_lit("vpcmpistri"), str_lit("vpcmpistrm"), str_lit("vpbroadcastb"), str_lit("vpbroadcastw"), str_lit("vpbroadcastd"), str_lit("vpbroadcastq"), str_lit("vcvtps2pd"), str_lit("vcvtpd2ps"), str_lit("vcvtss2sd"), str_lit("vcvtsd2ss"), str_lit("vcvtps2dq"), - str_lit("vcvtpd2dq"), str_lit("vcvtdq2ps"), str_lit("vcvtdq2pd"), str_lit("vcvtss2si"), str_lit("vcvtsd2si"), str_lit("vcvtsi2ss"), str_lit("vcvtsi2sd"), str_lit("vcvttps2dq"), str_lit("vcvttpd2dq"), str_lit("vcvttss2si"), str_lit("vcvttsd2si"), str_lit("vpaddb"), str_lit("vpaddw"), str_lit("vpaddd"), str_lit("vpaddq"), str_lit("vpsubb"), - str_lit("vpsubw"), str_lit("vpsubd"), str_lit("vpsubq"), str_lit("vpmullw"), str_lit("vpmulhw"), str_lit("vpmulhuw"), str_lit("vpmuludq"), str_lit("vpmaddwd"), str_lit("vpand"), str_lit("vpandn"), str_lit("vpor"), str_lit("vpxor"), str_lit("vpsllw"), str_lit("vpslld"), str_lit("vpsllq"), str_lit("vpsrlw"), - str_lit("vpsrld"), str_lit("vpsrlq"), str_lit("vpsraw"), str_lit("vpsrad"), str_lit("vpcmpeqb"), str_lit("vpcmpeqw"), str_lit("vpcmpeqd"), str_lit("vpcmpeqq"), str_lit("vpcmpgtb"), str_lit("vpcmpgtw"), str_lit("vpcmpgtd"), str_lit("vpcmpgtq"), str_lit("vpacksswb"), str_lit("vpackssdw"), str_lit("vpackuswb"), str_lit("vpackusdw"), - str_lit("vpunpcklbw"), str_lit("vpunpcklwd"), str_lit("vpunpckldq"), str_lit("vpunpcklqdq"), str_lit("vpunpckhbw"), str_lit("vpunpckhwd"), str_lit("vpunpckhdq"), str_lit("vpunpckhqdq"), str_lit("vpshufd"), str_lit("vpshufhw"), str_lit("vpshuflw"), str_lit("vpextrb"), str_lit("vpextrw"), str_lit("vpextrd"), str_lit("vpextrq"), str_lit("vpinsrb"), - str_lit("vpinsrw"), str_lit("vpinsrd"), str_lit("vpinsrq"), str_lit("vpmovmskb"), str_lit("vptest"), str_lit("vpshufb"), str_lit("vphaddw"), str_lit("vphaddd"), str_lit("vphaddsw"), str_lit("vphsubw"), str_lit("vphsubd"), str_lit("vphsubsw"), str_lit("vpmaddubsw"), str_lit("vpmulhrsw"), str_lit("vpsignb"), str_lit("vpsignw"), - str_lit("vpsignd"), str_lit("vpabsb"), str_lit("vpabsw"), str_lit("vpabsd"), str_lit("vpalignr"), str_lit("vpblendw"), str_lit("vpblendvb"), str_lit("vmpsadbw"), str_lit("vphminposuw"), str_lit("vpmaxsb"), str_lit("vpmaxsd"), str_lit("vpmaxuw"), str_lit("vpmaxud"), str_lit("vpminsb"), str_lit("vpminsd"), str_lit("vpminuw"), - str_lit("vpminud"), str_lit("vpmovsxbw"), str_lit("vpmovsxbd"), str_lit("vpmovsxbq"), str_lit("vpmovsxwd"), str_lit("vpmovsxwq"), str_lit("vpmovsxdq"), str_lit("vpmovzxbw"), str_lit("vpmovzxbd"), str_lit("vpmovzxbq"), str_lit("vpmovzxwd"), str_lit("vpmovzxwq"), str_lit("vpmovzxdq"), str_lit("vpmuldq"), str_lit("vpmulld"), str_lit("vmaskmovdqu"), - str_lit("vpclmulqdq"), str_lit("vaesdec"), str_lit("vaesdeclast"), str_lit("vaesenc"), str_lit("vaesenclast"), str_lit("vaesimc"), str_lit("vaeskeygenassist"), str_lit("vbroadcastss"), str_lit("vbroadcastsd"), str_lit("vbroadcastf128"), str_lit("vextractf128"), str_lit("vinsertf128"), str_lit("vperm2f128"), str_lit("vmaskmovps"), str_lit("vmaskmovpd"), str_lit("vtestps"), - str_lit("vtestpd"), str_lit("vzeroall"), str_lit("vzeroupper"), str_lit("vbroadcasti128"), str_lit("vextracti128"), str_lit("vinserti128"), str_lit("vperm2i128"), str_lit("vpermd"), str_lit("vpermps"), str_lit("vpermq"), str_lit("vpermpd"), str_lit("vpblendd"), str_lit("vpsllvd"), str_lit("vpsllvq"), str_lit("vpsrlvd"), str_lit("vpsrlvq"), - str_lit("vpsravd"), str_lit("vpmaskmovd"), str_lit("vpmaskmovq"), str_lit("vgatherdps"), str_lit("vgatherdpd"), str_lit("vgatherqps"), str_lit("vgatherqpd"), str_lit("vpgatherdd"), str_lit("vpgatherdq"), str_lit("vpgatherqd"), str_lit("vpgatherqq"), str_lit("vfmadd132ps"), str_lit("vfmadd213ps"), str_lit("vfmadd231ps"), str_lit("vfmadd132pd"), str_lit("vfmadd213pd"), - str_lit("vfmadd231pd"), str_lit("vfmadd132ss"), str_lit("vfmadd213ss"), str_lit("vfmadd231ss"), str_lit("vfmadd132sd"), str_lit("vfmadd213sd"), str_lit("vfmadd231sd"), str_lit("vfmsub132ps"), str_lit("vfmsub213ps"), str_lit("vfmsub231ps"), str_lit("vfmsub132pd"), str_lit("vfmsub213pd"), str_lit("vfmsub231pd"), str_lit("vfmsub132ss"), str_lit("vfmsub213ss"), str_lit("vfmsub231ss"), - str_lit("vfmsub132sd"), str_lit("vfmsub213sd"), str_lit("vfmsub231sd"), str_lit("vfnmadd132ps"), str_lit("vfnmadd213ps"), str_lit("vfnmadd231ps"), str_lit("vfnmadd132pd"), str_lit("vfnmadd213pd"), str_lit("vfnmadd231pd"), str_lit("vfnmadd132ss"), str_lit("vfnmadd213ss"), str_lit("vfnmadd231ss"), str_lit("vfnmadd132sd"), str_lit("vfnmadd213sd"), str_lit("vfnmadd231sd"), str_lit("vfnmsub132ps"), - str_lit("vfnmsub213ps"), str_lit("vfnmsub231ps"), str_lit("vfnmsub132pd"), str_lit("vfnmsub213pd"), str_lit("vfnmsub231pd"), str_lit("vfnmsub132ss"), str_lit("vfnmsub213ss"), str_lit("vfnmsub231ss"), str_lit("vfnmsub132sd"), str_lit("vfnmsub213sd"), str_lit("vfnmsub231sd"), str_lit("vfmaddsub132ps"), str_lit("vfmaddsub213ps"), str_lit("vfmaddsub231ps"), str_lit("vfmaddsub132pd"), str_lit("vfmaddsub213pd"), - str_lit("vfmaddsub231pd"), str_lit("vfmsubadd132ps"), str_lit("vfmsubadd213ps"), str_lit("vfmsubadd231ps"), str_lit("vfmsubadd132pd"), str_lit("vfmsubadd213pd"), str_lit("vfmsubadd231pd"), str_lit("vcvtph2ps"), str_lit("vcvtps2ph"), str_lit("vmovdqa32"), str_lit("vmovdqa64"), str_lit("vmovdqu8"), str_lit("vmovdqu16"), str_lit("vmovdqu32"), str_lit("vmovdqu64"), str_lit("vpblendmb"), - str_lit("vpblendmw"), str_lit("vpblendmd"), str_lit("vpblendmq"), str_lit("vblendmps"), str_lit("vblendmpd"), str_lit("vpcmpb"), str_lit("vpcmpub"), str_lit("vpcmpw"), str_lit("vpcmpuw"), str_lit("vpcmpd"), str_lit("vpcmpud"), str_lit("vpcmpq"), str_lit("vpcmpuq"), str_lit("vptestmb"), str_lit("vptestmw"), str_lit("vptestmd"), - str_lit("vptestmq"), str_lit("vptestnmb"), str_lit("vptestnmw"), str_lit("vptestnmd"), str_lit("vptestnmq"), str_lit("vpcompressd"), str_lit("vpcompressq"), str_lit("vcompressps"), str_lit("vcompresspd"), str_lit("vpexpandd"), str_lit("vpexpandq"), str_lit("vexpandps"), str_lit("vexpandpd"), str_lit("vpconflictd"), str_lit("vpconflictq"), str_lit("vplzcntd"), - str_lit("vplzcntq"), str_lit("vpermi2b"), str_lit("vpermi2w"), str_lit("vpermi2d"), str_lit("vpermi2q"), str_lit("vpermi2ps"), str_lit("vpermi2pd"), str_lit("vpermt2b"), str_lit("vpermt2w"), str_lit("vpermt2d"), str_lit("vpermt2q"), str_lit("vpermt2ps"), str_lit("vpermt2pd"), str_lit("vpermb"), str_lit("vpermw"), str_lit("vpmovb2m"), - str_lit("vpmovw2m"), str_lit("vpmovd2m"), str_lit("vpmovq2m"), str_lit("vpmovm2b"), str_lit("vpmovm2w"), str_lit("vpmovm2d"), str_lit("vpmovm2q"), str_lit("vpmovqb"), str_lit("vpmovsqb"), str_lit("vpmovusqb"), str_lit("vpmovqw"), str_lit("vpmovsqw"), str_lit("vpmovusqw"), str_lit("vpmovqd"), str_lit("vpmovsqd"), str_lit("vpmovusqd"), - str_lit("vpmovdb"), str_lit("vpmovsdb"), str_lit("vpmovusdb"), str_lit("vpmovdw"), str_lit("vpmovsdw"), str_lit("vpmovusdw"), str_lit("vpmovwb"), str_lit("vpmovswb"), str_lit("vpmovuswb"), str_lit("vprold"), str_lit("vprolq"), str_lit("vprolvd"), str_lit("vprolvq"), str_lit("vprord"), str_lit("vprorq"), str_lit("vprorvd"), - str_lit("vprorvq"), str_lit("vpscatterdd"), str_lit("vpscatterdq"), str_lit("vpscatterqd"), str_lit("vpscatterqq"), str_lit("vscatterdps"), str_lit("vscatterdpd"), str_lit("vscatterqps"), str_lit("vscatterqpd"), str_lit("vpsravq"), str_lit("vpsravw"), str_lit("vpsllvw"), str_lit("vpsrlvw"), str_lit("vrangeps"), str_lit("vrangepd"), str_lit("vrangess"), - str_lit("vrangesd"), str_lit("vreduceps"), str_lit("vreducepd"), str_lit("vreducess"), str_lit("vreducesd"), str_lit("vrndscaleps"), str_lit("vrndscalepd"), str_lit("vrndscaless"), str_lit("vrndscalesd"), str_lit("vrsqrt14ps"), str_lit("vrsqrt14pd"), str_lit("vrsqrt14ss"), str_lit("vrsqrt14sd"), str_lit("vrcp14ps"), str_lit("vrcp14pd"), str_lit("vrcp14ss"), - str_lit("vrcp14sd"), str_lit("vscalefps"), str_lit("vscalefpd"), str_lit("vscalefss"), str_lit("vscalefsd"), str_lit("vgetexpps"), str_lit("vgetexppd"), str_lit("vgetexpss"), str_lit("vgetexpsd"), str_lit("vgetmantps"), str_lit("vgetmantpd"), str_lit("vgetmantss"), str_lit("vgetmantsd"), str_lit("vfixupimmps"), str_lit("vfixupimmpd"), str_lit("vfixupimmss"), - str_lit("vfixupimmsd"), str_lit("vfpclassps"), str_lit("vfpclasspd"), str_lit("vfpclassss"), str_lit("vfpclasssd"), str_lit("valignq"), str_lit("valignd"), str_lit("vdbpsadbw"), str_lit("vpternlogd"), str_lit("vpternlogq"), str_lit("vpdpwssd"), str_lit("vpmultishiftqb"), str_lit("kaddw"), str_lit("kaddb"), str_lit("kaddq"), str_lit("kaddd"), - str_lit("kandw"), str_lit("kandb"), str_lit("kandq"), str_lit("kandd"), str_lit("kandnw"), str_lit("kandnb"), str_lit("kandnq"), str_lit("kandnd"), str_lit("kmovw"), str_lit("kmovb"), str_lit("kmovq"), str_lit("kmovd"), str_lit("knotw"), str_lit("knotb"), str_lit("knotq"), str_lit("knotd"), - str_lit("korw"), str_lit("korb"), str_lit("korq"), str_lit("kord"), str_lit("kortestw"), str_lit("kortestb"), str_lit("kortestq"), str_lit("kortestd"), str_lit("kshiftlw"), str_lit("kshiftlb"), str_lit("kshiftlq"), str_lit("kshiftld"), str_lit("kshiftrw"), str_lit("kshiftrb"), str_lit("kshiftrq"), str_lit("kshiftrd"), - str_lit("ktestw"), str_lit("ktestb"), str_lit("ktestq"), str_lit("ktestd"), str_lit("kunpckbw"), str_lit("kunpckwd"), str_lit("kunpckdq"), str_lit("kxnorw"), str_lit("kxnorb"), str_lit("kxnorq"), str_lit("kxnord"), str_lit("kxorw"), str_lit("kxorb"), str_lit("kxorq"), str_lit("kxord"), str_lit("fadd"), - str_lit("faddp"), str_lit("fiadd"), str_lit("fsub"), str_lit("fsubp"), str_lit("fisub"), str_lit("fsubr"), str_lit("fsubrp"), str_lit("fisubr"), str_lit("fmul"), str_lit("fmulp"), str_lit("fimul"), str_lit("fdiv"), str_lit("fdivp"), str_lit("fidiv"), str_lit("fdivr"), str_lit("fdivrp"), - str_lit("fidivr"), str_lit("fsqrt"), str_lit("fabs"), str_lit("fchs"), str_lit("fprem"), str_lit("fprem1"), str_lit("frndint"), str_lit("fscale"), str_lit("fxtract"), str_lit("fxam"), str_lit("fld"), str_lit("fild"), str_lit("fbld"), str_lit("fst"), str_lit("fstp"), str_lit("fist"), - str_lit("fistp"), str_lit("fisttp"), str_lit("fbstp"), str_lit("fxch"), str_lit("fcmovb"), str_lit("fcmove"), str_lit("fcmovbe"), str_lit("fcmovu"), str_lit("fcmovnb"), str_lit("fcmovne"), str_lit("fcmovnbe"), str_lit("fcmovnu"), str_lit("fcom"), str_lit("fcomp"), str_lit("fcompp"), str_lit("ficom"), - str_lit("ficomp"), str_lit("fcomi"), str_lit("fcomip"), str_lit("fucomi"), str_lit("fucomip"), str_lit("fucom"), str_lit("fucomp"), str_lit("fucompp"), str_lit("ftst"), str_lit("fldz"), str_lit("fld1"), str_lit("fldpi"), str_lit("fldl2t"), str_lit("fldl2e"), str_lit("fldlg2"), str_lit("fldln2"), - str_lit("fsin"), str_lit("fcos"), str_lit("fsincos"), str_lit("fptan"), str_lit("fpatan"), str_lit("f2xm1"), str_lit("fyl2x"), str_lit("fyl2xp1"), str_lit("finit"), str_lit("fninit"), str_lit("fincstp"), str_lit("fdecstp"), str_lit("ffree"), str_lit("ffreep"), str_lit("fnop"), str_lit("fwait"), - str_lit("fclex"), str_lit("fnclex"), str_lit("fstcw"), str_lit("fnstcw"), str_lit("fldcw"), str_lit("fstenv"), str_lit("fnstenv"), str_lit("fldenv"), str_lit("fsave"), str_lit("fnsave"), str_lit("frstor"), str_lit("fstsw"), str_lit("fnstsw"), str_lit("fxsave"), str_lit("fxsave64"), str_lit("fxrstor"), - str_lit("fxrstor64"), str_lit("lgdt"), str_lit("sgdt"), str_lit("lidt"), str_lit("sidt"), str_lit("lldt"), str_lit("sldt"), str_lit("ltr"), str_lit("str"), str_lit("lmsw"), str_lit("smsw"), str_lit("clts"), str_lit("arpl"), str_lit("lar"), str_lit("lsl"), str_lit("verr"), - str_lit("verw"), str_lit("invd"), str_lit("wbinvd"), str_lit("invlpg"), str_lit("invpcid"), str_lit("rsm"), str_lit("rdmsr"), str_lit("wrmsr"), str_lit("vmcall"), str_lit("vmlaunch"), str_lit("vmresume"), str_lit("vmxoff"), str_lit("vmxon"), str_lit("vmclear"), str_lit("vmptrld"), str_lit("vmptrst"), - str_lit("vmread"), str_lit("vmwrite"), str_lit("vmfunc"), str_lit("invept"), str_lit("invvpid"), str_lit("encls"), str_lit("enclu"), str_lit("enclv"), str_lit("rdpkru"), str_lit("wrpkru"), str_lit("incsspd"), str_lit("incsspq"), str_lit("rdsspd"), str_lit("rdsspq"), str_lit("saveprevssp"), str_lit("rstorssp"), - str_lit("wrssd"), str_lit("wrssq"), str_lit("wrussd"), str_lit("wrussq"), str_lit("setssbsy"), str_lit("clrssbsy"), str_lit("endbr64"), str_lit("endbr32"), str_lit("xsave"), str_lit("xsave64"), str_lit("xrstor"), str_lit("xrstor64"), str_lit("xsaveopt"), str_lit("xsaveopt64"), str_lit("xsavec"), str_lit("xsavec64"), - str_lit("xsaves"), str_lit("xsaves64"), str_lit("xrstors"), str_lit("xrstors64"), str_lit("prefetcht0"), str_lit("prefetcht1"), str_lit("prefetcht2"), str_lit("prefetchnta"), str_lit("prefetchw"), str_lit("clflushopt"), str_lit("clwb"), str_lit("cldemote"), str_lit("bswap"), str_lit("cmpxchg"), str_lit("cmpxchg8b"), str_lit("cmpxchg16b"), - str_lit("xadd"), str_lit("bound"), str_lit("enter"), str_lit("leave"), str_lit("xlat"), str_lit("xlatb"), str_lit("movbe"), str_lit("rdrand"), str_lit("rdseed"), str_lit("swapgs"), str_lit("monitor"), str_lit("mwait"), str_lit("clac"), str_lit("stac"), str_lit("rdfsbase"), str_lit("rdgsbase"), - str_lit("wrfsbase"), str_lit("wrgsbase"), str_lit("ptwrite"), str_lit("rdpid"), str_lit("wbnoinvd"), str_lit("serialize"), str_lit("prefetch"), str_lit("in"), str_lit("out"), str_lit("tpause"), str_lit("umonitor"), str_lit("umwait"), str_lit("movdiri"), str_lit("movdir64b"), str_lit("enqcmd"), str_lit("enqcmds"), - str_lit("aadd"), str_lit("aand"), str_lit("aor"), str_lit("axor"), str_lit("xend"), str_lit("xtest"), str_lit("vmrun"), str_lit("vmmcall"), str_lit("vmload"), str_lit("vmsave"), str_lit("stgi"), str_lit("clgi"), str_lit("skinit"), str_lit("invlpga"), str_lit("invlpgb"), str_lit("tlbsync"), - str_lit("pvalidate"), str_lit("rmpadjust"), str_lit("rmpupdate"), str_lit("psmash"), str_lit("clzero"), str_lit("monitorx"), str_lit("mwaitx"), str_lit("rdpru"), str_lit("mcommit"), + str_lit("div"), str_lit("idiv"), str_lit("inc"), str_lit("dec"), str_lit("neg"), str_lit("cmp"), str_lit("and"), str_lit("or"), str_lit("xor"), str_lit("not"), str_lit("test"), str_lit("shl"), str_lit("shr"), str_lit("sar"), str_lit("sal"), str_lit("rol"), + str_lit("ror"), str_lit("rcl"), str_lit("rcr"), str_lit("shld"), str_lit("shrd"), str_lit("bt"), str_lit("bts"), str_lit("btr"), str_lit("btc"), str_lit("bsf"), str_lit("bsr"), str_lit("popcnt"), str_lit("lzcnt"), str_lit("tzcnt"), str_lit("jmp"), str_lit("ja"), + str_lit("jae"), str_lit("jb"), str_lit("jbe"), str_lit("jc"), str_lit("je"), str_lit("jz"), str_lit("jg"), str_lit("jge"), str_lit("jl"), str_lit("jle"), str_lit("jna"), str_lit("jnae"), str_lit("jnb"), str_lit("jnbe"), str_lit("jnc"), str_lit("jne"), + str_lit("jnz"), str_lit("jng"), str_lit("jnge"), str_lit("jnl"), str_lit("jnle"), str_lit("jno"), str_lit("jnp"), str_lit("jns"), str_lit("jo"), str_lit("jp"), str_lit("jpe"), str_lit("jpo"), str_lit("js"), str_lit("jcxz"), str_lit("jecxz"), str_lit("jrcxz"), + str_lit("loop"), str_lit("loope"), str_lit("loopne"), str_lit("call"), str_lit("ret"), str_lit("iret"), str_lit("iretd"), str_lit("iretq"), str_lit("int"), str_lit("int3"), str_lit("into"), str_lit("syscall"), str_lit("sysret"), str_lit("sysenter"), str_lit("sysexit"), str_lit("seta"), + str_lit("setae"), str_lit("setb"), str_lit("setbe"), str_lit("setc"), str_lit("sete"), str_lit("setg"), str_lit("setge"), str_lit("setl"), str_lit("setle"), str_lit("setna"), str_lit("setnae"), str_lit("setnb"), str_lit("setnbe"), str_lit("setnc"), str_lit("setne"), str_lit("setng"), + str_lit("setnge"), str_lit("setnl"), str_lit("setnle"), str_lit("setno"), str_lit("setnp"), str_lit("setns"), str_lit("setnz"), str_lit("seto"), str_lit("setp"), str_lit("setpe"), str_lit("setpo"), str_lit("sets"), str_lit("setz"), str_lit("cmova"), str_lit("cmovae"), str_lit("cmovb"), + str_lit("cmovbe"), str_lit("cmovc"), str_lit("cmove"), str_lit("cmovg"), str_lit("cmovge"), str_lit("cmovl"), str_lit("cmovle"), str_lit("cmovna"), str_lit("cmovnae"), str_lit("cmovnb"), str_lit("cmovnbe"), str_lit("cmovnc"), str_lit("cmovne"), str_lit("cmovng"), str_lit("cmovnge"), str_lit("cmovnl"), + str_lit("cmovnle"), str_lit("cmovno"), str_lit("cmovnp"), str_lit("cmovns"), str_lit("cmovnz"), str_lit("cmovo"), str_lit("cmovp"), str_lit("cmovpe"), str_lit("cmovpo"), str_lit("cmovs"), str_lit("cmovz"), str_lit("movs"), str_lit("movsb"), str_lit("movsw"), str_lit("movsd"), str_lit("movsq"), + str_lit("cmps"), str_lit("cmpsb"), str_lit("cmpsw"), str_lit("cmpsd"), str_lit("cmpsq"), str_lit("scas"), str_lit("scasb"), str_lit("scasw"), str_lit("scasd"), str_lit("scasq"), str_lit("lods"), str_lit("lodsb"), str_lit("lodsw"), str_lit("lodsd"), str_lit("lodsq"), str_lit("stos"), + str_lit("stosb"), str_lit("stosw"), str_lit("stosd"), str_lit("stosq"), str_lit("clc"), str_lit("stc"), str_lit("cmc"), str_lit("cld"), str_lit("std"), str_lit("cli"), str_lit("sti"), str_lit("lahf"), str_lit("sahf"), str_lit("pushf"), str_lit("pushfd"), str_lit("pushfq"), + str_lit("popf"), str_lit("popfd"), str_lit("popfq"), str_lit("nop"), str_lit("hlt"), str_lit("wait"), str_lit("lock"), str_lit("ud0"), str_lit("ud1"), str_lit("ud2"), str_lit("cpuid"), str_lit("rdtsc"), str_lit("rdtscp"), str_lit("rdpmc"), str_lit("xgetbv"), str_lit("xsetbv"), + str_lit("cbw"), str_lit("cwde"), str_lit("cdqe"), str_lit("cwd"), str_lit("cdq"), str_lit("cqo"), str_lit("andn"), str_lit("bextr"), str_lit("blsi"), str_lit("blsmsk"), str_lit("blsr"), str_lit("bzhi"), str_lit("pdep"), str_lit("pext"), str_lit("rorx"), str_lit("sarx"), + str_lit("shlx"), str_lit("shrx"), str_lit("mulx"), str_lit("adcx"), str_lit("adox"), str_lit("movaps"), str_lit("movups"), str_lit("movapd"), str_lit("movupd"), str_lit("movss"), str_lit("movdqa"), str_lit("movdqu"), str_lit("movq"), str_lit("movd"), str_lit("movlps"), str_lit("movhps"), + str_lit("movlpd"), str_lit("movhpd"), str_lit("movlhps"), str_lit("movhlps"), str_lit("movmskps"), str_lit("movmskpd"), str_lit("movntps"), str_lit("movntpd"), str_lit("movntdq"), str_lit("movntdqa"), str_lit("addps"), str_lit("addpd"), str_lit("addss"), str_lit("addsd"), str_lit("subps"), str_lit("subpd"), + str_lit("subss"), str_lit("subsd"), str_lit("mulps"), str_lit("mulpd"), str_lit("mulss"), str_lit("mulsd"), str_lit("divps"), str_lit("divpd"), str_lit("divss"), str_lit("divsd"), str_lit("sqrtps"), str_lit("sqrtpd"), str_lit("sqrtss"), str_lit("sqrtsd"), str_lit("rcpps"), str_lit("rcpss"), + str_lit("rsqrtps"), str_lit("rsqrtss"), str_lit("maxps"), str_lit("maxpd"), str_lit("maxss"), str_lit("maxsd"), str_lit("minps"), str_lit("minpd"), str_lit("minss"), str_lit("minsd"), str_lit("andps"), str_lit("andpd"), str_lit("andnps"), str_lit("andnpd"), str_lit("orps"), str_lit("orpd"), + str_lit("xorps"), str_lit("xorpd"), str_lit("cmpps"), str_lit("cmppd"), str_lit("cmpss"), str_lit("comiss"), str_lit("comisd"), str_lit("ucomiss"), str_lit("ucomisd"), str_lit("shufps"), str_lit("shufpd"), str_lit("unpcklps"), str_lit("unpckhps"), str_lit("unpcklpd"), str_lit("unpckhpd"), str_lit("cvtps2pd"), + str_lit("cvtpd2ps"), str_lit("cvtss2sd"), str_lit("cvtsd2ss"), str_lit("cvtps2dq"), str_lit("cvtpd2dq"), str_lit("cvtdq2ps"), str_lit("cvtdq2pd"), str_lit("cvtss2si"), str_lit("cvtsd2si"), str_lit("cvtsi2ss"), str_lit("cvtsi2sd"), str_lit("cvttps2dq"), str_lit("cvttpd2dq"), str_lit("cvttss2si"), str_lit("cvttsd2si"), str_lit("paddb"), + str_lit("paddw"), str_lit("paddd"), str_lit("paddq"), str_lit("psubb"), str_lit("psubw"), str_lit("psubd"), str_lit("psubq"), str_lit("paddsb"), str_lit("paddsw"), str_lit("paddusb"), str_lit("paddusw"), str_lit("psubsb"), str_lit("psubsw"), str_lit("psubusb"), str_lit("psubusw"), str_lit("pmullw"), + str_lit("pmulhw"), str_lit("pmulhuw"), str_lit("pmuludq"), str_lit("pmaddwd"), str_lit("pand"), str_lit("pandn"), str_lit("por"), str_lit("pxor"), str_lit("psllw"), str_lit("pslld"), str_lit("psllq"), str_lit("psrlw"), str_lit("psrld"), str_lit("psrlq"), str_lit("psraw"), str_lit("psrad"), + str_lit("pcmpeqb"), str_lit("pcmpeqw"), str_lit("pcmpeqd"), str_lit("pcmpgtb"), str_lit("pcmpgtw"), str_lit("pcmpgtd"), str_lit("packsswb"), str_lit("packssdw"), str_lit("packuswb"), str_lit("punpcklbw"), str_lit("punpcklwd"), str_lit("punpckldq"), str_lit("punpcklqdq"), str_lit("punpckhbw"), str_lit("punpckhwd"), str_lit("punpckhdq"), + str_lit("punpckhqdq"), str_lit("pshufd"), str_lit("pshufhw"), str_lit("pshuflw"), str_lit("pshufw"), str_lit("pextrw"), str_lit("pinsrw"), str_lit("pmovmskb"), str_lit("pavgb"), str_lit("pavgw"), str_lit("pmaxub"), str_lit("pmaxsw"), str_lit("pminub"), str_lit("pminsw"), str_lit("psadbw"), str_lit("maskmovdqu"), + str_lit("lfence"), str_lit("sfence"), str_lit("mfence"), str_lit("pause"), str_lit("clflush"), str_lit("addsubps"), str_lit("addsubpd"), str_lit("haddps"), str_lit("haddpd"), str_lit("hsubps"), str_lit("hsubpd"), str_lit("movddup"), str_lit("movsldup"), str_lit("movshdup"), str_lit("lddqu"), str_lit("pshufb"), + str_lit("phaddw"), str_lit("phaddd"), str_lit("phaddsw"), str_lit("phsubw"), str_lit("phsubd"), str_lit("phsubsw"), str_lit("pmaddubsw"), str_lit("pmulhrsw"), str_lit("psignb"), str_lit("psignw"), str_lit("psignd"), str_lit("pabsb"), str_lit("pabsw"), str_lit("pabsd"), str_lit("palignr"), str_lit("blendps"), + str_lit("blendpd"), str_lit("blendvps"), str_lit("blendvpd"), str_lit("pblendw"), str_lit("pblendvb"), str_lit("dpps"), str_lit("dppd"), str_lit("extractps"), str_lit("insertps"), str_lit("mpsadbw"), str_lit("packusdw"), str_lit("pextrb"), str_lit("pextrd"), str_lit("pextrq"), str_lit("phminposuw"), str_lit("pinsrb"), + str_lit("pinsrd"), str_lit("pinsrq"), str_lit("pmaxsb"), str_lit("pmaxsd"), str_lit("pmaxuw"), str_lit("pmaxud"), str_lit("pminsb"), str_lit("pminsd"), str_lit("pminuw"), str_lit("pminud"), str_lit("pmovsxbw"), str_lit("pmovsxbd"), str_lit("pmovsxbq"), str_lit("pmovsxwd"), str_lit("pmovsxwq"), str_lit("pmovsxdq"), + str_lit("pmovzxbw"), str_lit("pmovzxbd"), str_lit("pmovzxbq"), str_lit("pmovzxwd"), str_lit("pmovzxwq"), str_lit("pmovzxdq"), str_lit("pmuldq"), str_lit("pmulld"), str_lit("ptest"), str_lit("roundps"), str_lit("roundpd"), str_lit("roundss"), str_lit("roundsd"), str_lit("pcmpeqq"), str_lit("crc32"), str_lit("pcmpestri"), + str_lit("pcmpestrm"), str_lit("pcmpistri"), str_lit("pcmpistrm"), str_lit("pcmpgtq"), str_lit("pclmulqdq"), str_lit("aesdec"), str_lit("aesdeclast"), str_lit("aesenc"), str_lit("aesenclast"), str_lit("aesimc"), str_lit("aeskeygenassist"), str_lit("sha1msg1"), str_lit("sha1msg2"), str_lit("sha1nexte"), str_lit("sha1rnds4"), str_lit("sha256msg1"), + str_lit("sha256msg2"), str_lit("sha256rnds2"), str_lit("vaddps"), str_lit("vaddpd"), str_lit("vaddss"), str_lit("vaddsd"), str_lit("vsubps"), str_lit("vsubpd"), str_lit("vsubss"), str_lit("vsubsd"), str_lit("vmulps"), str_lit("vmulpd"), str_lit("vmulss"), str_lit("vmulsd"), str_lit("vdivps"), str_lit("vdivpd"), + str_lit("vdivss"), str_lit("vdivsd"), str_lit("vsqrtps"), str_lit("vsqrtpd"), str_lit("vsqrtss"), str_lit("vsqrtsd"), str_lit("vrcpps"), str_lit("vrcpss"), str_lit("vrsqrtps"), str_lit("vrsqrtss"), str_lit("vmaxps"), str_lit("vmaxpd"), str_lit("vmaxss"), str_lit("vmaxsd"), str_lit("vminps"), str_lit("vminpd"), + str_lit("vminss"), str_lit("vminsd"), str_lit("vandps"), str_lit("vandpd"), str_lit("vandnps"), str_lit("vandnpd"), str_lit("vorps"), str_lit("vorpd"), str_lit("vxorps"), str_lit("vxorpd"), str_lit("vcmpps"), str_lit("vcmppd"), str_lit("vcmpss"), str_lit("vcmpsd"), str_lit("vcomiss"), str_lit("vcomisd"), + str_lit("vucomiss"), str_lit("vucomisd"), str_lit("vshufps"), str_lit("vshufpd"), str_lit("vunpcklps"), str_lit("vunpckhps"), str_lit("vunpcklpd"), str_lit("vunpckhpd"), str_lit("vblendps"), str_lit("vblendpd"), str_lit("vblendvps"), str_lit("vblendvpd"), str_lit("vdpps"), str_lit("vdppd"), str_lit("vroundps"), str_lit("vroundpd"), + str_lit("vroundss"), str_lit("vroundsd"), str_lit("vextractps"), str_lit("vinsertps"), str_lit("vmovaps"), str_lit("vmovups"), str_lit("vmovapd"), str_lit("vmovupd"), str_lit("vmovss"), str_lit("vmovsd"), str_lit("vmovdqa"), str_lit("vmovdqu"), str_lit("vmovq"), str_lit("vmovd"), str_lit("vmovlps"), str_lit("vmovhps"), + str_lit("vmovlpd"), str_lit("vmovhpd"), str_lit("vmovlhps"), str_lit("vmovhlps"), str_lit("vmovmskps"), str_lit("vmovmskpd"), str_lit("vmovntps"), str_lit("vmovntpd"), str_lit("vmovntdq"), str_lit("vmovntdqa"), str_lit("vaddsubps"), str_lit("vaddsubpd"), str_lit("vhaddps"), str_lit("vhaddpd"), str_lit("vhsubps"), str_lit("vhsubpd"), + str_lit("vlddqu"), str_lit("vmovddup"), str_lit("vmovsldup"), str_lit("vmovshdup"), str_lit("vpcmpestri"), str_lit("vpcmpestrm"), str_lit("vpcmpistri"), str_lit("vpcmpistrm"), str_lit("vpbroadcastb"), str_lit("vpbroadcastw"), str_lit("vpbroadcastd"), str_lit("vpbroadcastq"), str_lit("vcvtps2pd"), str_lit("vcvtpd2ps"), str_lit("vcvtss2sd"), str_lit("vcvtsd2ss"), + str_lit("vcvtps2dq"), str_lit("vcvtpd2dq"), str_lit("vcvtdq2ps"), str_lit("vcvtdq2pd"), str_lit("vcvtss2si"), str_lit("vcvtsd2si"), str_lit("vcvtsi2ss"), str_lit("vcvtsi2sd"), str_lit("vcvttps2dq"), str_lit("vcvttpd2dq"), str_lit("vcvttss2si"), str_lit("vcvttsd2si"), str_lit("vpaddb"), str_lit("vpaddw"), str_lit("vpaddd"), str_lit("vpaddq"), + str_lit("vpsubb"), str_lit("vpsubw"), str_lit("vpsubd"), str_lit("vpsubq"), str_lit("vpmullw"), str_lit("vpmulhw"), str_lit("vpmulhuw"), str_lit("vpmuludq"), str_lit("vpmaddwd"), str_lit("vpand"), str_lit("vpandn"), str_lit("vpor"), str_lit("vpxor"), str_lit("vpsllw"), str_lit("vpslld"), str_lit("vpsllq"), + str_lit("vpsrlw"), str_lit("vpsrld"), str_lit("vpsrlq"), str_lit("vpsraw"), str_lit("vpsrad"), str_lit("vpcmpeqb"), str_lit("vpcmpeqw"), str_lit("vpcmpeqd"), str_lit("vpcmpeqq"), str_lit("vpcmpgtb"), str_lit("vpcmpgtw"), str_lit("vpcmpgtd"), str_lit("vpcmpgtq"), str_lit("vpacksswb"), str_lit("vpackssdw"), str_lit("vpackuswb"), + str_lit("vpackusdw"), str_lit("vpunpcklbw"), str_lit("vpunpcklwd"), str_lit("vpunpckldq"), str_lit("vpunpcklqdq"), str_lit("vpunpckhbw"), str_lit("vpunpckhwd"), str_lit("vpunpckhdq"), str_lit("vpunpckhqdq"), str_lit("vpshufd"), str_lit("vpshufhw"), str_lit("vpshuflw"), str_lit("vpextrb"), str_lit("vpextrw"), str_lit("vpextrd"), str_lit("vpextrq"), + str_lit("vpinsrb"), str_lit("vpinsrw"), str_lit("vpinsrd"), str_lit("vpinsrq"), str_lit("vpmovmskb"), str_lit("vptest"), str_lit("vpshufb"), str_lit("vphaddw"), str_lit("vphaddd"), str_lit("vphaddsw"), str_lit("vphsubw"), str_lit("vphsubd"), str_lit("vphsubsw"), str_lit("vpmaddubsw"), str_lit("vpmulhrsw"), str_lit("vpsignb"), + str_lit("vpsignw"), str_lit("vpsignd"), str_lit("vpabsb"), str_lit("vpabsw"), str_lit("vpabsd"), str_lit("vpalignr"), str_lit("vpblendw"), str_lit("vpblendvb"), str_lit("vmpsadbw"), str_lit("vphminposuw"), str_lit("vpmaxsb"), str_lit("vpmaxsd"), str_lit("vpmaxuw"), str_lit("vpmaxud"), str_lit("vpminsb"), str_lit("vpminsd"), + str_lit("vpminuw"), str_lit("vpminud"), str_lit("vpmovsxbw"), str_lit("vpmovsxbd"), str_lit("vpmovsxbq"), str_lit("vpmovsxwd"), str_lit("vpmovsxwq"), str_lit("vpmovsxdq"), str_lit("vpmovzxbw"), str_lit("vpmovzxbd"), str_lit("vpmovzxbq"), str_lit("vpmovzxwd"), str_lit("vpmovzxwq"), str_lit("vpmovzxdq"), str_lit("vpmuldq"), str_lit("vpmulld"), + str_lit("vmaskmovdqu"), str_lit("vpclmulqdq"), str_lit("vaesdec"), str_lit("vaesdeclast"), str_lit("vaesenc"), str_lit("vaesenclast"), str_lit("vaesimc"), str_lit("vaeskeygenassist"), str_lit("vbroadcastss"), str_lit("vbroadcastsd"), str_lit("vbroadcastf128"), str_lit("vextractf128"), str_lit("vinsertf128"), str_lit("vperm2f128"), str_lit("vmaskmovps"), str_lit("vmaskmovpd"), + str_lit("vtestps"), str_lit("vtestpd"), str_lit("vzeroall"), str_lit("vzeroupper"), str_lit("vbroadcasti128"), str_lit("vextracti128"), str_lit("vinserti128"), str_lit("vperm2i128"), str_lit("vpermd"), str_lit("vpermps"), str_lit("vpermq"), str_lit("vpermpd"), str_lit("vpblendd"), str_lit("vpsllvd"), str_lit("vpsllvq"), str_lit("vpsrlvd"), + str_lit("vpsrlvq"), str_lit("vpsravd"), str_lit("vpmaskmovd"), str_lit("vpmaskmovq"), str_lit("vgatherdps"), str_lit("vgatherdpd"), str_lit("vgatherqps"), str_lit("vgatherqpd"), str_lit("vpgatherdd"), str_lit("vpgatherdq"), str_lit("vpgatherqd"), str_lit("vpgatherqq"), str_lit("vfmadd132ps"), str_lit("vfmadd213ps"), str_lit("vfmadd231ps"), str_lit("vfmadd132pd"), + str_lit("vfmadd213pd"), str_lit("vfmadd231pd"), str_lit("vfmadd132ss"), str_lit("vfmadd213ss"), str_lit("vfmadd231ss"), str_lit("vfmadd132sd"), str_lit("vfmadd213sd"), str_lit("vfmadd231sd"), str_lit("vfmsub132ps"), str_lit("vfmsub213ps"), str_lit("vfmsub231ps"), str_lit("vfmsub132pd"), str_lit("vfmsub213pd"), str_lit("vfmsub231pd"), str_lit("vfmsub132ss"), str_lit("vfmsub213ss"), + str_lit("vfmsub231ss"), str_lit("vfmsub132sd"), str_lit("vfmsub213sd"), str_lit("vfmsub231sd"), str_lit("vfnmadd132ps"), str_lit("vfnmadd213ps"), str_lit("vfnmadd231ps"), str_lit("vfnmadd132pd"), str_lit("vfnmadd213pd"), str_lit("vfnmadd231pd"), str_lit("vfnmadd132ss"), str_lit("vfnmadd213ss"), str_lit("vfnmadd231ss"), str_lit("vfnmadd132sd"), str_lit("vfnmadd213sd"), str_lit("vfnmadd231sd"), + str_lit("vfnmsub132ps"), str_lit("vfnmsub213ps"), str_lit("vfnmsub231ps"), str_lit("vfnmsub132pd"), str_lit("vfnmsub213pd"), str_lit("vfnmsub231pd"), str_lit("vfnmsub132ss"), str_lit("vfnmsub213ss"), str_lit("vfnmsub231ss"), str_lit("vfnmsub132sd"), str_lit("vfnmsub213sd"), str_lit("vfnmsub231sd"), str_lit("vfmaddsub132ps"), str_lit("vfmaddsub213ps"), str_lit("vfmaddsub231ps"), str_lit("vfmaddsub132pd"), + str_lit("vfmaddsub213pd"), str_lit("vfmaddsub231pd"), str_lit("vfmsubadd132ps"), str_lit("vfmsubadd213ps"), str_lit("vfmsubadd231ps"), str_lit("vfmsubadd132pd"), str_lit("vfmsubadd213pd"), str_lit("vfmsubadd231pd"), str_lit("vcvtph2ps"), str_lit("vcvtps2ph"), str_lit("vmovdqa32"), str_lit("vmovdqa64"), str_lit("vmovdqu8"), str_lit("vmovdqu16"), str_lit("vmovdqu32"), str_lit("vmovdqu64"), + str_lit("vpblendmb"), str_lit("vpblendmw"), str_lit("vpblendmd"), str_lit("vpblendmq"), str_lit("vblendmps"), str_lit("vblendmpd"), str_lit("vpcmpb"), str_lit("vpcmpub"), str_lit("vpcmpw"), str_lit("vpcmpuw"), str_lit("vpcmpd"), str_lit("vpcmpud"), str_lit("vpcmpq"), str_lit("vpcmpuq"), str_lit("vptestmb"), str_lit("vptestmw"), + str_lit("vptestmd"), str_lit("vptestmq"), str_lit("vptestnmb"), str_lit("vptestnmw"), str_lit("vptestnmd"), str_lit("vptestnmq"), str_lit("vpcompressd"), str_lit("vpcompressq"), str_lit("vcompressps"), str_lit("vcompresspd"), str_lit("vpexpandd"), str_lit("vpexpandq"), str_lit("vexpandps"), str_lit("vexpandpd"), str_lit("vpconflictd"), str_lit("vpconflictq"), + str_lit("vplzcntd"), str_lit("vplzcntq"), str_lit("vpermi2b"), str_lit("vpermi2w"), str_lit("vpermi2d"), str_lit("vpermi2q"), str_lit("vpermi2ps"), str_lit("vpermi2pd"), str_lit("vpermt2b"), str_lit("vpermt2w"), str_lit("vpermt2d"), str_lit("vpermt2q"), str_lit("vpermt2ps"), str_lit("vpermt2pd"), str_lit("vpermb"), str_lit("vpermw"), + str_lit("vpmovb2m"), str_lit("vpmovw2m"), str_lit("vpmovd2m"), str_lit("vpmovq2m"), str_lit("vpmovm2b"), str_lit("vpmovm2w"), str_lit("vpmovm2d"), str_lit("vpmovm2q"), str_lit("vpmovqb"), str_lit("vpmovsqb"), str_lit("vpmovusqb"), str_lit("vpmovqw"), str_lit("vpmovsqw"), str_lit("vpmovusqw"), str_lit("vpmovqd"), str_lit("vpmovsqd"), + str_lit("vpmovusqd"), str_lit("vpmovdb"), str_lit("vpmovsdb"), str_lit("vpmovusdb"), str_lit("vpmovdw"), str_lit("vpmovsdw"), str_lit("vpmovusdw"), str_lit("vpmovwb"), str_lit("vpmovswb"), str_lit("vpmovuswb"), str_lit("vprold"), str_lit("vprolq"), str_lit("vprolvd"), str_lit("vprolvq"), str_lit("vprord"), str_lit("vprorq"), + str_lit("vprorvd"), str_lit("vprorvq"), str_lit("vpscatterdd"), str_lit("vpscatterdq"), str_lit("vpscatterqd"), str_lit("vpscatterqq"), str_lit("vscatterdps"), str_lit("vscatterdpd"), str_lit("vscatterqps"), str_lit("vscatterqpd"), str_lit("vpsravq"), str_lit("vpsravw"), str_lit("vpsllvw"), str_lit("vpsrlvw"), str_lit("vrangeps"), str_lit("vrangepd"), + str_lit("vrangess"), str_lit("vrangesd"), str_lit("vreduceps"), str_lit("vreducepd"), str_lit("vreducess"), str_lit("vreducesd"), str_lit("vrndscaleps"), str_lit("vrndscalepd"), str_lit("vrndscaless"), str_lit("vrndscalesd"), str_lit("vrsqrt14ps"), str_lit("vrsqrt14pd"), str_lit("vrsqrt14ss"), str_lit("vrsqrt14sd"), str_lit("vrcp14ps"), str_lit("vrcp14pd"), + str_lit("vrcp14ss"), str_lit("vrcp14sd"), str_lit("vscalefps"), str_lit("vscalefpd"), str_lit("vscalefss"), str_lit("vscalefsd"), str_lit("vgetexpps"), str_lit("vgetexppd"), str_lit("vgetexpss"), str_lit("vgetexpsd"), str_lit("vgetmantps"), str_lit("vgetmantpd"), str_lit("vgetmantss"), str_lit("vgetmantsd"), str_lit("vfixupimmps"), str_lit("vfixupimmpd"), + str_lit("vfixupimmss"), str_lit("vfixupimmsd"), str_lit("vfpclassps"), str_lit("vfpclasspd"), str_lit("vfpclassss"), str_lit("vfpclasssd"), str_lit("valignq"), str_lit("valignd"), str_lit("vdbpsadbw"), str_lit("vpternlogd"), str_lit("vpternlogq"), str_lit("vpdpwssd"), str_lit("vpmultishiftqb"), str_lit("kaddw"), str_lit("kaddb"), str_lit("kaddq"), + str_lit("kaddd"), str_lit("kandw"), str_lit("kandb"), str_lit("kandq"), str_lit("kandd"), str_lit("kandnw"), str_lit("kandnb"), str_lit("kandnq"), str_lit("kandnd"), str_lit("kmovw"), str_lit("kmovb"), str_lit("kmovq"), str_lit("kmovd"), str_lit("knotw"), str_lit("knotb"), str_lit("knotq"), + str_lit("knotd"), str_lit("korw"), str_lit("korb"), str_lit("korq"), str_lit("kord"), str_lit("kortestw"), str_lit("kortestb"), str_lit("kortestq"), str_lit("kortestd"), str_lit("kshiftlw"), str_lit("kshiftlb"), str_lit("kshiftlq"), str_lit("kshiftld"), str_lit("kshiftrw"), str_lit("kshiftrb"), str_lit("kshiftrq"), + str_lit("kshiftrd"), str_lit("ktestw"), str_lit("ktestb"), str_lit("ktestq"), str_lit("ktestd"), str_lit("kunpckbw"), str_lit("kunpckwd"), str_lit("kunpckdq"), str_lit("kxnorw"), str_lit("kxnorb"), str_lit("kxnorq"), str_lit("kxnord"), str_lit("kxorw"), str_lit("kxorb"), str_lit("kxorq"), str_lit("kxord"), + str_lit("fadd"), str_lit("faddp"), str_lit("fiadd"), str_lit("fsub"), str_lit("fsubp"), str_lit("fisub"), str_lit("fsubr"), str_lit("fsubrp"), str_lit("fisubr"), str_lit("fmul"), str_lit("fmulp"), str_lit("fimul"), str_lit("fdiv"), str_lit("fdivp"), str_lit("fidiv"), str_lit("fdivr"), + str_lit("fdivrp"), str_lit("fidivr"), str_lit("fsqrt"), str_lit("fabs"), str_lit("fchs"), str_lit("fprem"), str_lit("fprem1"), str_lit("frndint"), str_lit("fscale"), str_lit("fxtract"), str_lit("fxam"), str_lit("fld"), str_lit("fild"), str_lit("fbld"), str_lit("fst"), str_lit("fstp"), + str_lit("fist"), str_lit("fistp"), str_lit("fisttp"), str_lit("fbstp"), str_lit("fxch"), str_lit("fcmovb"), str_lit("fcmove"), str_lit("fcmovbe"), str_lit("fcmovu"), str_lit("fcmovnb"), str_lit("fcmovne"), str_lit("fcmovnbe"), str_lit("fcmovnu"), str_lit("fcom"), str_lit("fcomp"), str_lit("fcompp"), + str_lit("ficom"), str_lit("ficomp"), str_lit("fcomi"), str_lit("fcomip"), str_lit("fucomi"), str_lit("fucomip"), str_lit("fucom"), str_lit("fucomp"), str_lit("fucompp"), str_lit("ftst"), str_lit("fldz"), str_lit("fld1"), str_lit("fldpi"), str_lit("fldl2t"), str_lit("fldl2e"), str_lit("fldlg2"), + str_lit("fldln2"), str_lit("fsin"), str_lit("fcos"), str_lit("fsincos"), str_lit("fptan"), str_lit("fpatan"), str_lit("f2xm1"), str_lit("fyl2x"), str_lit("fyl2xp1"), str_lit("finit"), str_lit("fninit"), str_lit("fincstp"), str_lit("fdecstp"), str_lit("ffree"), str_lit("ffreep"), str_lit("fnop"), + str_lit("fwait"), str_lit("fclex"), str_lit("fnclex"), str_lit("fstcw"), str_lit("fnstcw"), str_lit("fldcw"), str_lit("fstenv"), str_lit("fnstenv"), str_lit("fldenv"), str_lit("fsave"), str_lit("fnsave"), str_lit("frstor"), str_lit("fstsw"), str_lit("fnstsw"), str_lit("fxsave"), str_lit("fxsave64"), + str_lit("fxrstor"), str_lit("fxrstor64"), str_lit("lgdt"), str_lit("sgdt"), str_lit("lidt"), str_lit("sidt"), str_lit("lldt"), str_lit("sldt"), str_lit("ltr"), str_lit("str"), str_lit("lmsw"), str_lit("smsw"), str_lit("clts"), str_lit("arpl"), str_lit("lar"), str_lit("lsl"), + str_lit("verr"), str_lit("verw"), str_lit("invd"), str_lit("wbinvd"), str_lit("invlpg"), str_lit("invpcid"), str_lit("rsm"), str_lit("rdmsr"), str_lit("wrmsr"), str_lit("vmcall"), str_lit("vmlaunch"), str_lit("vmresume"), str_lit("vmxoff"), str_lit("vmxon"), str_lit("vmclear"), str_lit("vmptrld"), + str_lit("vmptrst"), str_lit("vmread"), str_lit("vmwrite"), str_lit("vmfunc"), str_lit("invept"), str_lit("invvpid"), str_lit("encls"), str_lit("enclu"), str_lit("enclv"), str_lit("rdpkru"), str_lit("wrpkru"), str_lit("incsspd"), str_lit("incsspq"), str_lit("rdsspd"), str_lit("rdsspq"), str_lit("saveprevssp"), + str_lit("rstorssp"), str_lit("wrssd"), str_lit("wrssq"), str_lit("wrussd"), str_lit("wrussq"), str_lit("setssbsy"), str_lit("clrssbsy"), str_lit("endbr64"), str_lit("endbr32"), str_lit("xsave"), str_lit("xsave64"), str_lit("xrstor"), str_lit("xrstor64"), str_lit("xsaveopt"), str_lit("xsaveopt64"), str_lit("xsavec"), + str_lit("xsavec64"), str_lit("xsaves"), str_lit("xsaves64"), str_lit("xrstors"), str_lit("xrstors64"), str_lit("prefetcht0"), str_lit("prefetcht1"), str_lit("prefetcht2"), str_lit("prefetchnta"), str_lit("prefetchw"), str_lit("clflushopt"), str_lit("clwb"), str_lit("cldemote"), str_lit("bswap"), str_lit("cmpxchg"), str_lit("cmpxchg8b"), + str_lit("cmpxchg16b"), str_lit("xadd"), str_lit("bound"), str_lit("enter"), str_lit("leave"), str_lit("xlat"), str_lit("xlatb"), str_lit("movbe"), str_lit("rdrand"), str_lit("rdseed"), str_lit("swapgs"), str_lit("monitor"), str_lit("mwait"), str_lit("clac"), str_lit("stac"), str_lit("rdfsbase"), + str_lit("rdgsbase"), str_lit("wrfsbase"), str_lit("wrgsbase"), str_lit("ptwrite"), str_lit("rdpid"), str_lit("wbnoinvd"), str_lit("serialize"), str_lit("prefetch"), str_lit("in"), str_lit("out"), str_lit("tpause"), str_lit("umonitor"), str_lit("umwait"), str_lit("movdiri"), str_lit("movdir64b"), str_lit("enqcmd"), + str_lit("enqcmds"), str_lit("aadd"), str_lit("aand"), str_lit("aor"), str_lit("axor"), str_lit("xend"), str_lit("xtest"), str_lit("vmrun"), str_lit("vmmcall"), str_lit("vmload"), str_lit("vmsave"), str_lit("stgi"), str_lit("clgi"), str_lit("skinit"), str_lit("invlpga"), str_lit("invlpgb"), + str_lit("tlbsync"), str_lit("pvalidate"), str_lit("rmpadjust"), str_lit("rmpupdate"), str_lit("psmash"), str_lit("clzero"), str_lit("monitorx"), str_lit("mwaitx"), str_lit("rdpru"), str_lit("mcommit"), }; String const Asm_amd64::prefix_strings[Asm_amd64::PREFIX_COUNT] { str_lit(""), str_lit("es"), str_lit("cs"), str_lit("ss"), str_lit("ds"), str_lit("rex"), str_lit("evex"), str_lit("fs"), str_lit("gs"), str_lit("vex"), str_lit("lock"), str_lit("repne"), str_lit("rep"), @@ -909,87 +998,87 @@ String const Asm_amd64::register_strings[Asm_amd64::REG_COUNT] { str_lit("bnd2"), str_lit("bnd3"), str_lit("mm0"), str_lit("mm1"), str_lit("mm2"), str_lit("mm3"), str_lit("mm4"), str_lit("mm5"), str_lit("mm6"), str_lit("mm7"), str_lit("st0"), str_lit("st1"), str_lit("st2"), str_lit("st3"), str_lit("st4"), str_lit("st5"), str_lit("st6"), str_lit("st7"), str_lit("rip"), }; -Asm_amd64::EncodeRun const Asm_amd64::raw_encode_runs[1241] = { +Asm_amd64::EncodeRun const Asm_amd64::raw_encode_runs[1242] = { { 0, 0}, { 0, 32}, { 32, 9}, { 41, 5}, { 46, 5}, { 51, 1}, { 52, 7}, { 59, 9}, { 68, 6}, { 74, 3}, { 77, 19}, { 96, 19}, { 115, 19}, { 134, 19}, { 153, 4}, { 157, 13}, { 170, 4}, { 174, 4}, { 178, 6}, { 184, 6}, { 190, 4}, { 194, 19}, { 213, 19}, { 232, 19}, { 251, 19}, { 270, 4}, { 274, 12}, { 286, 12}, { 298, 12}, { 310, 12}, { 322, 12}, { 334, 12}, - { 346, 12}, { 358, 12}, { 370, 6}, { 376, 6}, { 382, 6}, { 388, 6}, { 394, 6}, { 400, 6}, { 406, 3}, { 409, 3}, { 412, 3}, { 415, 3}, { 418, 3}, { 421, 6}, { 427, 2}, { 429, 2}, - { 431, 2}, { 433, 2}, { 435, 2}, { 437, 2}, { 439, 2}, { 441, 2}, { 443, 2}, { 445, 2}, { 447, 2}, { 449, 2}, { 451, 2}, { 453, 2}, { 455, 2}, { 457, 2}, { 459, 2}, { 461, 2}, - { 463, 2}, { 465, 2}, { 467, 2}, { 469, 2}, { 471, 2}, { 473, 2}, { 475, 2}, { 477, 2}, { 479, 2}, { 481, 2}, { 483, 2}, { 485, 2}, { 487, 1}, { 488, 1}, { 489, 1}, { 490, 1}, - { 491, 1}, { 492, 1}, { 493, 5}, { 498, 2}, { 500, 1}, { 501, 1}, { 502, 1}, { 503, 1}, { 504, 1}, { 505, 1}, { 506, 1}, { 507, 1}, { 508, 1}, { 509, 1}, { 510, 1}, { 511, 1}, - { 512, 1}, { 513, 1}, { 514, 1}, { 515, 1}, { 516, 1}, { 517, 1}, { 518, 1}, { 519, 1}, { 520, 1}, { 521, 1}, { 522, 1}, { 523, 1}, { 524, 1}, { 525, 1}, { 526, 1}, { 527, 1}, - { 528, 1}, { 529, 1}, { 530, 1}, { 531, 1}, { 532, 1}, { 533, 1}, { 534, 1}, { 535, 1}, { 536, 1}, { 537, 1}, { 538, 1}, { 539, 1}, { 540, 3}, { 543, 3}, { 546, 3}, { 549, 3}, - { 552, 3}, { 555, 3}, { 558, 3}, { 561, 3}, { 564, 3}, { 567, 3}, { 570, 3}, { 573, 3}, { 576, 3}, { 579, 3}, { 582, 3}, { 585, 3}, { 588, 3}, { 591, 3}, { 594, 3}, { 597, 3}, - { 600, 3}, { 603, 3}, { 606, 3}, { 609, 3}, { 612, 3}, { 615, 3}, { 618, 3}, { 621, 3}, { 624, 3}, { 627, 3}, { 630, 1}, { 631, 1}, { 632, 1}, { 633, 3}, { 636, 1}, { 637, 1}, - { 638, 1}, { 639, 1}, { 640, 2}, { 642, 1}, { 643, 1}, { 644, 1}, { 645, 1}, { 646, 1}, { 647, 1}, { 648, 1}, { 649, 1}, { 650, 1}, { 651, 1}, { 652, 1}, { 653, 1}, { 654, 1}, - { 655, 1}, { 656, 1}, { 657, 1}, { 658, 1}, { 659, 1}, { 660, 1}, { 661, 1}, { 662, 1}, { 663, 1}, { 664, 1}, { 665, 1}, { 666, 1}, { 667, 1}, { 668, 1}, { 669, 1}, { 670, 1}, - { 671, 1}, { 672, 1}, { 673, 4}, { 677, 1}, { 678, 1}, { 679, 1}, { 680, 1}, { 681, 1}, { 682, 1}, { 683, 1}, { 684, 1}, { 685, 1}, { 686, 1}, { 687, 1}, { 688, 1}, { 689, 1}, - { 690, 1}, { 691, 1}, { 692, 1}, { 693, 1}, { 694, 1}, { 695, 2}, { 697, 2}, { 699, 2}, { 701, 2}, { 703, 2}, { 705, 2}, { 707, 2}, { 709, 2}, { 711, 2}, { 713, 2}, { 715, 2}, - { 717, 2}, { 719, 2}, { 721, 2}, { 723, 2}, { 725, 2}, { 727, 2}, { 729, 2}, { 731, 2}, { 733, 2}, { 735, 2}, { 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1}, + { 682, 1}, { 683, 1}, { 684, 1}, { 685, 4}, { 689, 1}, { 690, 1}, { 691, 1}, { 692, 1}, { 693, 1}, { 694, 1}, { 695, 1}, { 696, 1}, { 697, 1}, { 698, 1}, { 699, 1}, { 700, 1}, + { 701, 1}, { 702, 1}, { 703, 1}, { 704, 1}, { 705, 1}, { 706, 1}, { 707, 2}, { 709, 2}, { 711, 2}, { 713, 2}, { 715, 2}, { 717, 2}, { 719, 2}, { 721, 2}, { 723, 2}, { 725, 2}, + { 727, 2}, { 729, 2}, { 731, 2}, { 733, 2}, { 735, 2}, { 737, 2}, { 739, 2}, { 741, 2}, { 743, 2}, { 745, 2}, { 747, 2}, { 749, 2}, { 751, 6}, { 757, 4}, { 761, 2}, { 763, 2}, + { 765, 2}, { 767, 2}, { 769, 1}, { 770, 1}, { 771, 2}, { 773, 2}, { 775, 1}, { 776, 1}, { 777, 1}, { 778, 1}, { 779, 1}, { 780, 1}, { 781, 1}, { 782, 1}, { 783, 1}, { 784, 1}, + { 785, 1}, { 786, 1}, { 787, 1}, { 788, 1}, { 789, 1}, { 790, 1}, { 791, 1}, { 792, 1}, { 793, 1}, { 794, 1}, { 795, 1}, { 796, 1}, { 797, 1}, { 798, 1}, { 799, 1}, { 800, 1}, + { 801, 1}, { 802, 1}, { 803, 1}, { 804, 1}, { 805, 1}, { 806, 1}, { 807, 1}, { 808, 1}, { 809, 1}, { 810, 1}, { 811, 1}, { 812, 1}, { 813, 1}, { 814, 1}, { 815, 1}, { 816, 1}, + { 817, 1}, { 818, 1}, { 819, 1}, { 820, 1}, { 821, 1}, { 822, 1}, { 823, 1}, { 824, 1}, { 825, 1}, { 826, 1}, { 827, 1}, { 828, 1}, { 829, 1}, { 830, 1}, { 831, 1}, { 832, 1}, + { 833, 1}, { 834, 1}, { 835, 1}, { 836, 1}, { 837, 1}, { 838, 1}, { 839, 1}, { 840, 2}, { 842, 2}, { 844, 2}, { 846, 2}, { 848, 1}, { 849, 1}, { 850, 2}, { 852, 2}, { 854, 1}, + { 855, 1}, { 856, 1}, { 857, 1}, { 858, 1}, { 859, 1}, { 860, 1}, { 861, 1}, { 862, 1}, { 863, 1}, { 864, 1}, { 865, 1}, { 866, 1}, { 867, 1}, { 868, 1}, { 869, 1}, { 870, 1}, + { 871, 1}, { 872, 1}, { 873, 1}, { 874, 1}, { 875, 1}, { 876, 1}, { 877, 1}, { 878, 1}, { 879, 2}, { 881, 2}, { 883, 2}, { 885, 2}, { 887, 2}, { 889, 2}, { 891, 2}, { 893, 2}, + { 895, 1}, { 896, 1}, { 897, 1}, { 898, 1}, { 899, 1}, { 900, 1}, { 901, 1}, { 902, 1}, { 903, 1}, { 904, 1}, { 905, 1}, { 906, 1}, { 907, 1}, { 908, 1}, { 909, 1}, { 910, 1}, + { 911, 1}, { 912, 1}, { 913, 1}, { 914, 1}, { 915, 1}, { 916, 2}, { 918, 2}, { 920, 2}, { 922, 1}, { 923, 1}, { 924, 1}, { 925, 1}, { 926, 1}, { 927, 1}, { 928, 1}, { 929, 1}, + { 930, 1}, { 931, 1}, { 932, 1}, { 933, 1}, { 934, 1}, { 935, 1}, { 936, 1}, { 937, 1}, { 938, 1}, { 939, 1}, { 940, 1}, { 941, 1}, { 942, 1}, { 943, 1}, { 944, 1}, { 945, 1}, + { 946, 1}, { 947, 1}, { 948, 1}, { 949, 1}, { 950, 1}, { 951, 1}, { 952, 1}, { 953, 1}, { 954, 1}, { 955, 1}, { 956, 1}, { 957, 1}, { 958, 1}, { 959, 1}, { 960, 1}, { 961, 1}, + { 962, 1}, { 963, 1}, { 964, 1}, { 965, 1}, { 966, 1}, { 967, 1}, { 968, 1}, { 969, 1}, { 970, 1}, { 971, 1}, { 972, 1}, { 973, 1}, { 974, 1}, { 975, 1}, { 976, 1}, { 977, 1}, + { 978, 1}, { 979, 1}, { 980, 1}, { 981, 1}, { 982, 1}, { 983, 1}, { 984, 1}, { 985, 1}, { 986, 1}, { 987, 1}, { 988, 1}, { 989, 1}, { 990, 1}, { 991, 1}, { 992, 1}, { 993, 1}, + { 994, 1}, { 995, 1}, { 996, 1}, { 997, 1}, { 998, 1}, { 999, 1}, {1000, 1}, {1001, 1}, {1002, 1}, {1003, 1}, {1004, 1}, {1005, 1}, {1006, 1}, {1007, 1}, {1008, 5}, {1013, 1}, + {1014, 1}, {1015, 1}, {1016, 1}, {1017, 1}, {1018, 1}, {1019, 1}, {1020, 1}, {1021, 1}, {1022, 1}, {1023, 1}, {1024, 1}, {1025, 1}, {1026, 1}, {1027, 1}, {1028, 1}, {1029, 1}, + {1030, 1}, {1031, 1}, {1032, 2}, {1034, 2}, {1036, 1}, {1037, 1}, {1038, 2}, {1040, 2}, {1042, 1}, {1043, 1}, {1044, 2}, {1046, 2}, {1048, 1}, {1049, 1}, {1050, 2}, {1052, 2}, + {1054, 1}, {1055, 1}, {1056, 2}, {1058, 2}, {1060, 1}, {1061, 1}, {1062, 2}, {1064, 1}, {1065, 2}, {1067, 1}, {1068, 2}, {1070, 2}, {1072, 1}, {1073, 1}, {1074, 2}, {1076, 2}, + {1078, 1}, {1079, 1}, {1080, 2}, {1082, 2}, {1084, 2}, {1086, 2}, {1088, 2}, {1090, 2}, {1092, 2}, {1094, 2}, {1096, 2}, {1098, 2}, {1100, 1}, {1101, 1}, {1102, 1}, {1103, 1}, + {1104, 1}, {1105, 1}, {1106, 2}, {1108, 2}, {1110, 2}, {1112, 2}, {1114, 2}, {1116, 2}, {1118, 2}, {1120, 2}, {1122, 2}, {1124, 2}, {1126, 2}, {1128, 1}, {1129, 2}, {1131, 2}, + {1133, 1}, {1134, 1}, {1135, 1}, {1136, 1}, {1137, 4}, {1141, 4}, {1145, 4}, {1149, 4}, {1153, 3}, {1156, 3}, {1159, 4}, {1163, 4}, {1167, 4}, {1171, 2}, {1173, 2}, {1175, 2}, + {1177, 2}, {1179, 2}, {1181, 1}, {1182, 1}, {1183, 2}, {1185, 2}, {1187, 2}, {1189, 2}, {1191, 2}, {1193, 2}, {1195, 2}, {1197, 2}, {1199, 2}, {1201, 2}, {1203, 2}, {1205, 2}, + {1207, 2}, {1209, 2}, {1211, 2}, {1213, 2}, {1215, 1}, {1216, 1}, {1217, 1}, {1218, 1}, {1219, 4}, {1223, 4}, {1227, 4}, {1231, 4}, {1235, 2}, {1237, 2}, {1239, 1}, {1240, 1}, + {1241, 2}, {1243, 2}, {1245, 2}, {1247, 2}, {1249, 2}, {1251, 2}, {1253, 2}, {1255, 2}, {1257, 2}, {1259, 2}, {1261, 2}, {1263, 2}, {1265, 2}, {1267, 2}, {1269, 2}, {1271, 2}, + {1273, 2}, {1275, 2}, {1277, 2}, {1279, 2}, {1281, 2}, {1283, 2}, {1285, 2}, {1287, 2}, {1289, 2}, {1291, 2}, {1293, 2}, {1295, 2}, {1297, 2}, {1299, 4}, {1303, 4}, {1307, 4}, + {1311, 4}, {1315, 4}, {1319, 4}, {1323, 4}, {1327, 4}, {1331, 2}, {1333, 2}, {1335, 2}, {1337, 2}, {1339, 2}, {1341, 2}, {1343, 2}, {1345, 2}, {1347, 2}, {1349, 2}, {1351, 2}, + {1353, 2}, {1355, 2}, {1357, 2}, {1359, 2}, {1361, 2}, {1363, 2}, {1365, 2}, {1367, 2}, {1369, 2}, {1371, 2}, {1373, 2}, {1375, 2}, {1377, 1}, {1378, 2}, {1380, 1}, {1381, 1}, + {1382, 1}, {1383, 1}, {1384, 1}, {1385, 1}, {1386, 2}, {1388, 2}, {1390, 2}, {1392, 2}, {1394, 2}, {1396, 2}, {1398, 2}, {1400, 2}, {1402, 2}, {1404, 2}, {1406, 2}, {1408, 2}, + {1410, 2}, {1412, 2}, {1414, 2}, {1416, 2}, {1418, 2}, {1420, 2}, {1422, 2}, {1424, 2}, {1426, 2}, {1428, 1}, {1429, 2}, {1431, 2}, {1433, 2}, {1435, 2}, {1437, 2}, {1439, 2}, + {1441, 2}, {1443, 2}, {1445, 2}, {1447, 2}, {1449, 2}, {1451, 2}, {1453, 2}, {1455, 2}, {1457, 2}, {1459, 2}, {1461, 2}, {1463, 2}, {1465, 2}, {1467, 2}, {1469, 2}, {1471, 2}, + {1473, 1}, {1474, 2}, {1476, 1}, {1477, 1}, {1478, 1}, {1479, 1}, {1480, 1}, {1481, 1}, {1482, 4}, {1486, 2}, {1488, 1}, {1489, 1}, {1490, 1}, {1491, 1}, {1492, 4}, {1496, 4}, + {1500, 2}, {1502, 2}, {1504, 1}, {1505, 1}, {1506, 1}, {1507, 1}, {1508, 1}, {1509, 1}, {1510, 1}, {1511, 1}, {1512, 1}, {1513, 1}, {1514, 2}, {1516, 2}, {1518, 2}, {1520, 2}, + {1522, 2}, {1524, 2}, {1526, 4}, {1530, 4}, {1534, 2}, {1536, 2}, {1538, 2}, {1540, 2}, {1542, 2}, {1544, 2}, {1546, 2}, {1548, 2}, {1550, 2}, {1552, 2}, {1554, 2}, {1556, 2}, + {1558, 2}, {1560, 2}, {1562, 1}, {1563, 1}, {1564, 1}, {1565, 1}, {1566, 1}, {1567, 1}, {1568, 2}, {1570, 2}, {1572, 2}, {1574, 2}, {1576, 2}, {1578, 2}, {1580, 1}, {1581, 1}, + {1582, 1}, {1583, 1}, {1584, 1}, {1585, 1}, {1586, 2}, {1588, 2}, {1590, 2}, {1592, 2}, {1594, 2}, {1596, 2}, {1598, 1}, {1599, 1}, {1600, 1}, {1601, 1}, {1602, 1}, {1603, 1}, + {1604, 2}, {1606, 2}, {1608, 2}, {1610, 2}, {1612, 2}, {1614, 2}, {1616, 1}, {1617, 1}, {1618, 1}, {1619, 1}, {1620, 1}, {1621, 1}, {1622, 2}, {1624, 2}, {1626, 2}, {1628, 2}, + {1630, 2}, {1632, 2}, {1634, 2}, {1636, 2}, {1638, 2}, {1640, 2}, {1642, 2}, {1644, 2}, {1646, 3}, {1649, 3}, {1652, 6}, {1658, 6}, {1664, 6}, {1670, 6}, {1676, 6}, {1682, 6}, + {1688, 3}, {1691, 3}, {1694, 3}, {1697, 3}, {1700, 3}, {1703, 3}, {1706, 3}, {1709, 3}, {1712, 3}, {1715, 3}, {1718, 3}, {1721, 3}, {1724, 3}, {1727, 3}, {1730, 3}, {1733, 3}, + {1736, 3}, {1739, 3}, {1742, 3}, {1745, 3}, {1748, 3}, {1751, 3}, {1754, 3}, {1757, 3}, {1760, 3}, {1763, 3}, {1766, 3}, {1769, 3}, {1772, 3}, {1775, 3}, {1778, 3}, {1781, 3}, + {1784, 3}, {1787, 3}, {1790, 3}, {1793, 3}, {1796, 3}, {1799, 3}, {1802, 3}, {1805, 3}, {1808, 3}, {1811, 3}, {1814, 3}, {1817, 3}, {1820, 3}, {1823, 3}, {1826, 3}, {1829, 3}, + {1832, 3}, {1835, 3}, {1838, 3}, {1841, 3}, {1844, 3}, {1847, 3}, {1850, 3}, {1853, 3}, {1856, 3}, {1859, 3}, {1862, 3}, {1865, 3}, {1868, 3}, {1871, 3}, {1874, 3}, {1877, 3}, + {1880, 3}, {1883, 3}, {1886, 3}, {1889, 3}, {1892, 3}, {1895, 3}, {1898, 3}, {1901, 3}, {1904, 3}, {1907, 3}, {1910, 3}, {1913, 3}, {1916, 3}, {1919, 3}, {1922, 3}, {1925, 3}, + {1928, 3}, {1931, 3}, {1934, 3}, {1937, 3}, {1940, 3}, {1943, 3}, {1946, 3}, {1949, 3}, {1952, 3}, {1955, 3}, {1958, 3}, {1961, 3}, {1964, 3}, {1967, 3}, {1970, 3}, {1973, 3}, + {1976, 1}, {1977, 1}, {1978, 3}, {1981, 3}, {1984, 1}, {1985, 1}, {1986, 3}, {1989, 3}, {1992, 1}, {1993, 1}, {1994, 3}, {1997, 3}, {2000, 1}, {2001, 1}, {2002, 3}, {2005, 3}, + {2008, 1}, {2009, 1}, {2010, 3}, {2013, 3}, {2016, 1}, {2017, 1}, {2018, 3}, {2021, 3}, {2024, 1}, {2025, 1}, {2026, 3}, {2029, 3}, {2032, 1}, {2033, 1}, {2034, 3}, {2037, 3}, + {2040, 1}, {2041, 1}, {2042, 3}, {2045, 3}, {2048, 1}, {2049, 1}, {2050, 3}, {2053, 3}, {2056, 3}, {2059, 3}, {2062, 3}, {2065, 3}, {2068, 3}, {2071, 1}, {2072, 1}, {2073, 1}, + {2074, 1}, {2075, 1}, {2076, 1}, {2077, 1}, {2078, 1}, {2079, 1}, {2080, 1}, {2081, 1}, {2082, 1}, {2083, 4}, {2087, 4}, {2091, 4}, {2095, 4}, {2099, 1}, {2100, 1}, {2101, 1}, + {2102, 1}, {2103, 1}, {2104, 1}, {2105, 1}, {2106, 1}, {2107, 1}, {2108, 1}, {2109, 1}, {2110, 1}, {2111, 1}, {2112, 1}, {2113, 1}, {2114, 1}, {2115, 1}, {2116, 1}, {2117, 1}, + {2118, 1}, {2119, 1}, {2120, 1}, {2121, 1}, {2122, 1}, {2123, 1}, {2124, 1}, {2125, 1}, {2126, 1}, {2127, 1}, {2128, 1}, {2129, 1}, {2130, 1}, {2131, 1}, {2132, 1}, {2133, 1}, + {2134, 4}, {2138, 2}, {2140, 2}, {2142, 4}, {2146, 2}, {2148, 2}, {2150, 4}, {2154, 2}, {2156, 2}, {2158, 4}, {2162, 2}, {2164, 2}, {2166, 4}, {2170, 2}, {2172, 2}, {2174, 4}, + {2178, 2}, {2180, 2}, {2182, 1}, {2183, 1}, {2184, 1}, {2185, 1}, {2186, 1}, {2187, 1}, {2188, 1}, {2189, 1}, {2190, 1}, {2191, 4}, {2195, 3}, {2198, 1}, {2199, 3}, {2202, 4}, + {2206, 2}, {2208, 3}, {2211, 3}, {2214, 1}, {2215, 2}, {2217, 1}, {2218, 1}, {2219, 1}, {2220, 1}, {2221, 1}, {2222, 1}, {2223, 1}, {2224, 1}, {2225, 4}, {2229, 4}, {2233, 1}, + {2234, 2}, {2236, 2}, {2238, 1}, {2239, 1}, {2240, 1}, {2241, 1}, {2242, 2}, {2244, 2}, {2246, 1}, {2247, 1}, {2248, 1}, {2249, 1}, {2250, 1}, {2251, 1}, {2252, 1}, {2253, 1}, + {2254, 1}, {2255, 1}, {2256, 1}, {2257, 1}, {2258, 1}, {2259, 1}, {2260, 1}, {2261, 1}, {2262, 1}, {2263, 1}, {2264, 1}, {2265, 1}, {2266, 1}, {2267, 1}, {2268, 1}, {2269, 1}, + {2270, 1}, {2271, 1}, {2272, 1}, {2273, 1}, {2274, 1}, {2275, 1}, {2276, 1}, {2277, 1}, {2278, 1}, {2279, 1}, {2280, 1}, {2281, 1}, {2282, 2}, {2284, 2}, {2286, 1}, {2287, 1}, + {2288, 1}, {2289, 1}, {2290, 2}, {2292, 2}, {2294, 2}, {2296, 2}, {2298, 1}, {2299, 3}, {2302, 1}, {2303, 3}, {2306, 1}, {2307, 3}, {2310, 1}, {2311, 1}, {2312, 3}, {2315, 3}, + {2318, 1}, {2319, 1}, {2320, 1}, {2321, 1}, {2322, 1}, {2323, 2}, {2325, 1}, {2326, 1}, {2327, 1}, {2328, 1}, {2329, 1}, {2330, 1}, {2331, 1}, {2332, 1}, {2333, 1}, {2334, 1}, + {2335, 1}, {2336, 1}, {2337, 1}, {2338, 1}, {2339, 1}, {2340, 1}, {2341, 1}, {2342, 1}, {2343, 1}, {2344, 1}, {2345, 1}, {2346, 1}, {2347, 1}, {2348, 1}, {2349, 1}, {2350, 1}, + {2351, 1}, {2352, 1}, {2353, 1}, {2354, 1}, {2355, 1}, {2356, 1}, {2357, 1}, {2358, 1}, {2359, 1}, {2360, 1}, {2361, 1}, {2362, 1}, {2363, 1}, {2364, 1}, {2365, 1}, {2366, 1}, + {2367, 1}, {2368, 1}, {2369, 1}, {2370, 1}, {2371, 1}, {2372, 1}, {2373, 1}, {2374, 1}, {2375, 1}, {2376, 1}, {2377, 1}, {2378, 1}, {2379, 1}, {2380, 2}, {2382, 4}, {2386, 1}, + {2387, 1}, {2388, 4}, {2392, 2}, {2394, 1}, {2395, 1}, {2396, 1}, {2397, 1}, {2398, 6}, {2404, 3}, {2407, 3}, {2410, 1}, {2411, 1}, {2412, 1}, {2413, 1}, {2414, 1}, {2415, 2}, + {2417, 2}, {2419, 2}, {2421, 2}, {2423, 2}, {2425, 1}, {2426, 1}, {2427, 1}, {2428, 1}, {2429, 6}, {2435, 6}, {2441, 1}, {2442, 1}, {2443, 1}, {2444, 2}, {2446, 1}, {2447, 1}, + {2448, 1}, {2449, 2}, {2451, 2}, {2453, 2}, {2455, 2}, {2457, 1}, {2458, 1}, {2459, 1}, {2460, 1}, {2461, 1}, {2462, 1}, {2463, 1}, {2464, 1}, {2465, 1}, {2466, 1}, {2467, 1}, + {2468, 1}, {2469, 1}, {2470, 1}, {2471, 1}, {2472, 1}, {2473, 1}, {2474, 1}, {2475, 1}, {2476, 1}, {2477, 1}, }; -u8 const Asm_amd64::raw_encode_forms[39456] = { +u8 const Asm_amd64::raw_encode_forms[39648] = { 0x01, 0x00, 0x05, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x06, 0x02, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x89, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x07, 0x03, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x89, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x08, 0x04, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x89, 0x00, 0x00, 0x08, 0x08, 0x00, 0x01, 0x00, 0x01, 0x05, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x02, 0x06, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x03, 0x07, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x04, 0x08, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x8b, 0x00, 0x00, 0x08, 0x08, 0x00, 0x01, 0x00, 0x01, 0x12, 0x00, 0x00, 0x04, 0x05, 0x00, 0x00, 0xb0, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x02, 0x13, 0x00, 0x00, 0x04, 0x06, 0x00, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x03, 0x14, 0x00, 0x00, 0x04, 0x07, 0x00, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x04, 0x15, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0xb8, 0x00, 0x00, 0x08, 0x08, 0x00, @@ -1070,552 +1159,555 @@ u8 const Asm_amd64::raw_encode_forms[39456] = { 0x1c, 0x00, 0x08, 0x1d, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd3, 0x05, 0x00, 0x08, 0x25, 0x00, 0x1c, 0x00, 0x08, 0x12, 0x00, 0x00, 0x01, 0x05, 0x00, 0x00, 0xc1, 0x05, 0x00, 0x08, 0x09, 0x00, 0x1d, 0x00, 0x05, 0x1f, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd0, 0x07, 0x00, 0x00, 0x25, 0x00, 0x1d, 0x00, 0x05, 0x1d, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd2, 0x07, 0x00, 0x00, 0x25, 0x00, 0x1d, 0x00, 0x05, 0x12, 0x00, 0x00, 0x01, 0x05, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x09, 0x00, 0x1d, 0x00, 0x06, 0x1f, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd1, 0x07, 0x00, 0x00, 0x25, 0x00, 0x1d, 0x00, 0x06, 0x1d, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd3, 0x07, 0x00, 0x00, 0x25, 0x00, 0x1d, 0x00, 0x06, 0x12, 0x00, 0x00, 0x01, 0x05, 0x00, 0x00, 0xc1, 0x07, 0x00, 0x00, 0x09, 0x00, 0x1d, 0x00, 0x07, 0x1f, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd1, 0x07, 0x00, 0x00, 0x25, 0x00, 0x1d, 0x00, 0x07, 0x1d, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xd3, 0x07, 0x00, 0x00, 0x25, 0x00, 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0x09, 0x00, 0x00, 0x00, 0xd5, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfc, 0x01, 0x00, 0x00, 0x00, 0xd6, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfa, 0x01, 0x00, 0x00, 0x00, 0xd7, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfb, 0x01, 0x00, 0x00, 0x00, + 0xd8, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfd, 0x01, 0x00, 0x00, 0x00, 0xd9, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xfa, 0x09, 0x00, 0x00, 0x00, }; -u8 const Asm_amd64::raw_clobber_forms[39456] = { - 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, +u8 const Asm_amd64::raw_clobber_forms[39648] = { 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, + 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, @@ -1689,6 +1781,9 @@ u8 const Asm_amd64::raw_clobber_forms[39456] = { 0x01, 0x01, 0x00, 0x00, 0x04, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x04, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x04, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 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0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x04, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x04, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, @@ -1779,8 +1874,8 @@ u8 const Asm_amd64::raw_clobber_forms[39456] = { 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, 0xff, 0x00, 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0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -1898,7 +1993,7 @@ u8 const Asm_amd64::raw_clobber_forms[39456] = { 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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+68,25 @@ struct Asm_riscv { }; - enum ClobberFFlags : u8 { - ClobberFFlag_NV = 1<<0, // invalid operation - ClobberFFlag_DZ = 1<<1, // divide by zero - ClobberFFlag_OF = 1<<2, // overflow - ClobberFFlag_UF = 1<<3, // underflow - ClobberFFlag_NX = 1<<4, // inexact + enum ClobberFlags : u8 { + ClobberFlag_NV = 1<<0, // invalid operation + ClobberFlag_DZ = 1<<1, // divide by zero + ClobberFlag_OF = 1<<2, // overflow + ClobberFlag_UF = 1<<3, // underflow + ClobberFlag_NX = 1<<4, // inexact }; + char const *clobber_flag_bit_name(u16 bit) { + switch (bit) { + case ClobberFlag_NV: return "nv"; + case ClobberFlag_DZ: return "dz"; + case ClobberFlag_OF: return "of"; + case ClobberFlag_UF: return "uf"; + case ClobberFlag_NX: return "nx"; + } + return "?"; + } + enum ClobberRegs : u8 { ClobberReg_RA = 1<<0, // x1, implicit link on C.JAL / C.JALR ClobberReg_SP = 1<<1, // x2, implicit base on the *SP compressed forms @@ -122,9 +133,46 @@ struct Asm_riscv { return ""; } + + u16 flag_from_name(String const &name) { + static const struct {String name; ClobberFlags flag; } table[] = { + {str_lit("nv"), ClobberFlag_NV}, + {str_lit("dz"), ClobberFlag_DZ}, + {str_lit("of"), ClobberFlag_OF}, + {str_lit("uf"), ClobberFlag_UF}, + {str_lit("nx"), ClobberFlag_NX}, + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + + u16 flags_from_name(String const &name) { + static const struct { String name; ClobberFlags flag; } table[] = { + // flags: accrued FP exception flags (fcsr[4:0]) + {str_lit("nx"), ClobberFlag_NX}, // Inexact + {str_lit("uf"), ClobberFlag_UF}, // Underflow + {str_lit("of"), ClobberFlag_OF}, // Overflow + {str_lit("dz"), ClobberFlag_DZ}, // Divide by Zero + {str_lit("nv"), ClobberFlag_NV}, // Invalid Operation + }; + + for (auto const &t : table) { + if (name == t.name) { + return cast(u16)t.flag; + } + } + return 0; + } + + i32 flag_bit_from_name(String const &name, i32 *width_) { static const struct { String name; i32 bit; } table[] = { - // fflags: accrued FP exception flags (fcsr[4:0]) + // flags: accrued FP exception flags (fcsr[4:0]) {str_lit("nx"), 0}, // Inexact {str_lit("uf"), 1}, // Underflow {str_lit("of"), 2}, // Overflow @@ -155,14 +203,18 @@ struct Asm_riscv { OperandSet read; // operand slots whose register/CSR/mem-base is read ClobberRegs implicit_wr; // implicit reg writes (ra on C.JAL/C.JALR) ClobberRegs implicit_rd; // implicit reg reads (sp on the *SP forms) - ClobberFFlags fflags_wr; // accrued exception flags this op may raise + ClobberFlags flags_wr; // accrued exception flags this op may raise bool reads_frm; // consumes the dynamic rounding mode from fcsr bool writes_mem; bool reads_mem; SideEffectFlags side_effects; + ClobberFlags flags_rd_call() const { + return {}; + } + bool implies_clobber_flags() const { - return (fflags_wr != 0); + return (flags_wr != 0); } bool implies_clobber_memory() const { return writes_mem || reads_mem || @@ -184,6 +236,17 @@ struct Asm_riscv { bool is_conditional() const { return has_control(); } + bool is_nondeterministic() const { + return false; + } + bool has_implicit_mem() const { + if (!writes_mem && !reads_mem) { + return false; + } + u16 implicit = cast(u16)implicit_rd | cast(u16)implicit_wr; + bool is_atomic = false; // TODO(bill): Add ATOMIC flag to SideEffectFlags in the original INSTRUCTION_TABLE + return (implicit & (ClobberReg_SP)) != 0 || is_atomic; + } }; void clobber_implicit_regs(StringSet *clobber_registers_set, u16 implicit_regs) { @@ -216,6 +279,17 @@ struct Asm_riscv { u16 csr; // CSR address when a src slot is AliasSrc_CSR_LIT u8 nargs; // operands the user supplies (ARG0.. their size; #simd -> total vector width. 0 if unknown. gb_internal i32 check_asm_operand_bit_width(Type *type) { @@ -7,9 +9,6 @@ gb_internal i32 check_asm_operand_bit_width(Type *type) { if (is_type_untyped(type)) { return -1; } - if (is_type_boolean(type)) { - return 1; - } i64 sz = type_size_of(base_type(type)); if (sz <= 0) { return 0; @@ -19,7 +18,8 @@ gb_internal i32 check_asm_operand_bit_width(Type *type) { gb_internal bool is_valid_asm_parameter_type(Type *type) { if (is_type_integer(type)) { - return true; + // NOTE(bill): do not allow 128-bit integers + return type_size_of(type) <= 8; } if (is_type_float(type)) { return true; @@ -85,6 +85,20 @@ gb_internal AsmOperandKind determine_asm_operand_kind(Operand const *operand) { return AsmOperand_Invalid; } +gb_internal bool asm_reg_class_compatible(AsmRegClass want, AsmRegClass got) { + switch (want) { + case AsmRegClass_Integer: + return got == AsmRegClass_Integer; + case AsmRegClass_Vector: + // A scalar float uses only the low lane, so it is valid in any vector + // register slot; a #simd vector matches the vector class exactly. + return got == AsmRegClass_Vector || got == AsmRegClass_Float; + case AsmRegClass_Mask: + return got == AsmRegClass_Mask; + } + return true; +} + gb_internal void check_asm_pin_type_compat(AsmRegClass reg_class, i32 reg_w, Type *decl_type, Ast *at, String pin_name, String param_name) { if (reg_class == AsmRegClass_Unknown || @@ -95,14 +109,7 @@ gb_internal void check_asm_pin_type_compat(AsmRegClass reg_class, i32 reg_w, Typ AsmRegClass got_class = check_asm_reg_class_from_type(decl_type); i32 got_w = check_asm_operand_bit_width(decl_type); - bool class_ok; - switch (reg_class) { - case AsmRegClass_Integer: class_ok = (got_class == AsmRegClass_Integer); break; - case AsmRegClass_Vector: class_ok = (got_class == AsmRegClass_Vector || got_class == AsmRegClass_Float); break; - case AsmRegClass_Mask: class_ok = (got_class == AsmRegClass_Mask); break; - default: class_ok = true; break; - } - if (!class_ok) { + if (!asm_reg_class_compatible(reg_class, got_class)) { error(at, "Parameter '%.*s' is pinned to %%%.*s, but its type is in the wrong register class for that register", LIT(param_name), LIT(pin_name)); return; @@ -304,24 +311,7 @@ gb_internal bool check_asm_operand_size_class(AsmCtx *asm_ctx, typename AsmCtx:: // must not be held against the slot's register class. Only width matters for the // memory interpretation. Register operands still get the full class check. if (want_class != AsmRegClass_Unknown && !is_memory) { - bool class_ok; - switch (want_class) { - case AsmRegClass_Integer: - class_ok = (got_class == AsmRegClass_Integer); - break; - case AsmRegClass_Vector: - // A scalar float uses only the low lane, so it is valid in any vector - // register slot; a #simd vector matches the vector class exactly. - class_ok = (got_class == AsmRegClass_Vector || got_class == AsmRegClass_Float); - break; - case AsmRegClass_Mask: - class_ok = (got_class == AsmRegClass_Mask); - break; - default: - class_ok = true; - break; - } - if (!class_ok) { + if (!asm_reg_class_compatible(want_class, got_class)) { if (mismatch_) *mismatch_ = AsmMismatch_Class; return false; } @@ -396,10 +386,13 @@ gb_internal bool check_asm_addr_register(Operand const *operand, AsmAddrRole rol return false; } if (role == AsmAddr_Index && reg_name.len != 0) { - // rsp/esp cannot be encoded as an index register. - if (reg_name == "rsp" || reg_name == "esp") { - error(operand->expr, "%%%.*s cannot be used as an index register", LIT(reg_name)); - return false; + if (build_context.metrics.arch == TargetArch_amd64) { + // TODO(bill): This is a complete bodge for AMD64, and I need to see if regnalize this further + // rsp/esp cannot be encoded as an index register. + if (reg_name == "rsp" || reg_name == "esp") { + error(operand->expr, "%%%.*s cannot be used as an index register", LIT(reg_name)); + return false; + } } } return true; @@ -459,7 +452,6 @@ gb_internal Type *check_asm_template_signature_params(CheckerContext *ctx, Scope Token name_token = name->Ident.token; Entity *entity = alloc_entity_param(scope, name_token, type, false, /*is_value*/true); - entity->flags |= EntityFlag_Used; if (is_poly_name) { entity->flags |= EntityFlag_PolyConst; if (is_type_internally_pointer_like(type)) { @@ -468,33 +460,33 @@ gb_internal Type *check_asm_template_signature_params(CheckerContext *ctx, Scope } Entity *found = scope_insert(scope, entity); - if (found == nullptr) { - array_add(&variables, entity); - - AsmTemplateEntityDecl ed = asm_template_entity_decl_default(entity); - if (is_poly_name) { - ed.kind = AsmTemplateEntityDecl_Immediate; - } - if (input_parameters) { - ed.param_group = AsmTemplateEntityDeclParamGroup_Input; - ed.param_index = param_index++; - ed.result_index = -1; - } else { - ed.param_group = AsmTemplateEntityDeclParamGroup_Output; - ed.param_index = -1; - ed.result_index = param_index++; - } - - ed.total_index = cast(i32)asm_template_entity_decls->count; - array_add(asm_template_entity_decls, ed); - } else { + if (found != nullptr) { TokenPos pos = found->token.pos; error(name_token, "Redeclaration of '%.*s' in this scope\n" "\tat %s", LIT(name_token.string), token_pos_to_string(pos)); entity = found; + continue; } + array_add(&variables, entity); + + AsmTemplateEntityDecl ed = asm_template_entity_decl_default(entity); + if (is_poly_name) { + ed.kind = AsmTemplateEntityDecl_Immediate; + } + if (input_parameters) { + ed.param_group = AsmTemplateEntityDeclParamGroup_Input; + ed.param_index = param_index++; + ed.result_index = -1; + } else { + ed.param_group = AsmTemplateEntityDeclParamGroup_Output; + ed.param_index = -1; + ed.result_index = param_index++; + } + + ed.total_index = cast(i32)asm_template_entity_decls->count; + array_add(asm_template_entity_decls, ed); } } @@ -552,6 +544,8 @@ gb_internal void check_asm_specs(AsmCtx *asm_ctx, CheckerContext *ctx, Scope *sc GB_ASSERT(spec->name->kind == Ast_Ident); Entity *input = scope_lookup_current(scope, spec->name->Ident.interned, spec->name->Ident.hash); + add_entity_use(ctx, spec->name, input); + Entity *other_scratch = nullptr; String pin = {}; @@ -562,6 +556,7 @@ gb_internal void check_asm_specs(AsmCtx *asm_ctx, CheckerContext *ctx, Scope *sc if (spec->value->kind == Ast_Ident) { other_scratch = scope_lookup_current(scope, spec->value->Ident.interned, spec->value->Ident.hash); if (other_scratch) { + add_entity_use(ctx, spec->value, other_scratch); auto group = check_asm_find_group(other_scratch, *asm_template_entity_decls, nullptr); if (!group) { error(spec->value, "This must be another parameter, got %.*s", LIT(other_scratch->token.string)); @@ -582,7 +577,7 @@ gb_internal void check_asm_specs(AsmCtx *asm_ctx, CheckerContext *ctx, Scope *sc if (pin.len != 0) { Operand op = {}; if (check_register(asm_ctx, &op, reg)) { - if (reg->flag.string.len) { + if (reg->flag.string.len != 0) { GB_ASSERT(pin == "flags"); pin_flag = reg->flag.string; if (string_set_update(&pin_flag_set, pin_flag)) { @@ -710,7 +705,6 @@ gb_internal void check_asm_specs(AsmCtx *asm_ctx, CheckerContext *ctx, Scope *sc } else { i32 index = -1; auto group = check_asm_find_group(input, *asm_template_entity_decls, &index); - gb_unused(group); GB_ASSERT(index >= 0); auto *i = &(*asm_template_entity_decls)[index]; if (i->pin.len == 0) { @@ -801,6 +795,26 @@ gb_internal void check_asm_specs(AsmCtx *asm_ctx, CheckerContext *ctx, Scope *sc error(spec->value, "Input parameters, and thus tied parameters, cannot be pinned to a flag style register"); } } + + + for (Ast *dir_ : spec->directives) { + ast_node(dir, BasicDirective, dir_); + String name = dir->name.string; + if (name == "no_init") { + i32 input_index = -1; + check_asm_find_group(input, *asm_template_entity_decls, &input_index); + if (input_index >= 0) { + auto *i = &(*asm_template_entity_decls)[input_index]; + i->no_init = true; + if (i->tie >= 0) { + auto *o = &(*asm_template_entity_decls)[i->tie]; + o->no_init = true; + } + } + } else { + error(dir_, "Invalid directive for an asm specification, got '#%.*s'", LIT(name)); + } + } } } @@ -873,8 +887,8 @@ gb_internal bool check_register(AsmCtx *asm_ctx, Operand *operand, AstAsmRegiste operand->type = alloc_type_simd_vector(16, t_f32); break; default: - GB_PANIC("Unhandled register width size: %d", width_in_bits); - break; + error(asm_reg->name, "%d-bit width asm registers are not supported", width_in_bits); + return false; } return true; @@ -1030,48 +1044,107 @@ gb_internal CheckMnemomicResult check_mnemonic_name(AsmCtx *asm_ctx, AstAsmInstr return CheckMnemomic_Invalid; } -struct AsmMnemonicAccumulator { - u16 defined_regs; - - // Union of registers implicitly clobbered by matched forms (for redundant-#clobber hints). - u16 implicit_clobbered_regs; - - bool straight_line; - - // Whether the most-recently-checked instruction terminates straight-line flow. - // Reset to false at every label (a label starts a fresh straight-line region whose - // tail we haven't seen yet). Consulted after the loop for #diverging templates. - bool last_is_terminal; - - // Did the template contain any instructions at all? An empty diverging body can't diverge. - bool saw_any_instructions; - - u16 explicitly_produced_regs; - u16 stale_outputs; - - // Related to #align_stack - // any call/branch (CONTROL) or memory effect that could require the stack - // to be realigned. If none occurred, #align_stack is redundant. - bool saw_call_or_mem; -}; +gb_internal bool check_asm_instr_targets_internal_label(AstAsmInstruction *instr) { + bool saw_label = false; + for (Ast *op : instr->operands) { + if (op->kind == Ast_AsmLabelDecl) { + saw_label = true; // resolved against label_scope during operand checking + } + } + return saw_label; +} template -gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tmpl_entity, AstAsmInstruction *instr, +gb_internal void check_operand_constraints(AsmCtx *asm_ctx, Slice const &operands, u16 mnemonic, String const &name) { + i32 word_bits = cast(i32)(build_context.metrics.ptr_size * 8); + + // Value-range constraints (shift-count in range, non-zero divisor). Every mnemonic + // decision lives in asm_ctx->operand_value_constraint; the logic below names none. + for_array(i, operands) { + Operand const *op = &operands[i]; + if (op->mode != Addressing_Constant) { + continue; // register count (cl/rs2) or $-immediate: not knowable here + } + ExactValue ev = exact_value_to_integer(op->value); + if (ev.kind != ExactValue_Integer) { + continue; + } + + AsmOperandConstraint c = asm_ctx->operand_value_constraint(mnemonic, cast(int)i); + switch (c.kind) { + case AsmOperandConstraint_ShiftCount: { + i32 width = 0; + if (c.width_operand < 0) { + width = word_bits; + } else if (c.width_operand < operands.count) { + width = check_asm_operand_bit_width(operands[c.width_operand].type); + } + if (width <= 0) { + break; // unknown target width; nothing to compare against + } + mp_int const *v = &ev.value_integer; + bool too_big = mp_count_bits(v) > 63; + i64 count = too_big ? 0 : exact_value_to_i64(ev); + if (mp_isneg(v) || too_big || count >= width) { + gbString vs = exact_value_to_string(ev); + error(op->expr, "'%.*s' shift count %s is out of range for the %d-bit operand (must be 0..<%d)", + LIT(name), vs, cast(int)width, cast(int)width); + gb_string_free(vs); + } + } break; + + case AsmOperandConstraint_NonZeroDivisor: + if (mp_iszero(&ev.value_integer)) { + error(op->expr, "'%.*s' divides by a constant zero", LIT(name)); + } + break; + + case AsmOperandConstraint_None: + break; + } + } +} + +template +gb_internal bool check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tmpl_entity, AstAsmInstruction *instr, u16 mnemonic, u16 pseudo_mnemonic, Slice const &operands, u8 previous_prefix, Ast *previous_prefix_instr, - AsmMnemonicAccumulator *asm_acc) { + AsmCfg *cfg) { GB_ASSERT(mnemonic > 0); - auto forms = asm_ctx->encoding_forms(mnemonic); - auto clobber_forms = asm_ctx->clobber_forms(mnemonic); - String name = asm_ctx->mnemonic_strings[mnemonic]; + auto forms = asm_ctx->encoding_forms(mnemonic); + auto clobber_forms = asm_ctx->clobber_forms(mnemonic); + String name = asm_ctx->mnemonic_strings[mnemonic]; auto alias = asm_ctx->pseudo_alias(cast(u16)pseudo_mnemonic); if (pseudo_mnemonic) { name = asm_ctx->pseudo_mnemonic_strings[pseudo_mnemonic]; } - bool is_pseudo = pseudo_mnemonic != 0; + AsmInstructionFacts *facts = gb_alloc_item(permanent_allocator(), AsmInstructionFacts); + facts->node = instr; + facts->name = name; + facts->gen_params.allocator = heap_allocator(); + facts->read_params.allocator = heap_allocator(); + + defer ({ + for (auto const &op : operands) { + if (op.expr->kind != Ast_AsmLabelDecl) { + continue; + } + Entity *e = op.expr->AsmLabelDecl.name->Ident.entity; + if (e == nullptr || e->kind != Entity_Label) { + continue; + } + facts->branch_target = e; + break; + } + + instr->facts = facts; + }); + + + bool is_pseudo = pseudo_mnemonic != 0; int target_explicit_count = is_pseudo ? alias.nargs : -1; auto form_user_operand_count = [&](typename AsmCtx::Encoding const &form) -> int { @@ -1169,7 +1242,7 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm s = gb_string_appendc(s, " "); } break; - case AsmOperand_Register: // 1+ chacracters + case AsmOperand_Register: // 1+ characters case AsmOperand_Memory: if (w == 0) { s = gb_string_appendc(s, " "); @@ -1289,8 +1362,8 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm } error_line("\tPossible forms for '%.*s':\n", LIT(name)); - error_line("\t(r: int, v: vector, f: float, k: mask, m: memory,\n"); - error_line("\t r/m: reg-or-mem, imm: immediate; number: bit=width)\n"); + error_line("\t\t(r: int, v: vector, f: float, k: mask, m: memory,\n"); + error_line("\t\t r/m: reg-or-mem, imm: immediate; number: bit=width)\n"); isize const MAX_SHOWN = 32; isize shown = gb_min(lines.count, MAX_SHOWN); @@ -1361,14 +1434,10 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm for_array(form_index, forms) { auto &form = forms[form_index]; - if (is_pseudo) { - if (cast(int)form.explicit_count() < target_explicit_count) { - continue; - } - } else { - if (operands.count != cast(int)form.explicit_count()) { - continue; - } + if (is_pseudo && cast(int)form.explicit_count() < target_explicit_count) { + continue; + } else if (operands.count != cast(int)form.explicit_count()) { + continue; } int score = 0; @@ -1384,8 +1453,7 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm bool kind_ok = (dst == src) || (dst == AsmOperand_Register_Or_Memory && (src == AsmOperand_Register || src == AsmOperand_Memory)); - // Tertiary key: bias toward wider register slots so an r64 form outranks - // an otherwise-equal r32 form. + // Bias toward wider register slots so an r64 form outranks an otherwise-equal r32 form. width_pref += cast(int)asm_ctx->operand_type_bit_width(type); bool spot_ok = false; @@ -1422,7 +1490,7 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm } // Lexicographic rank: score desc, then width_dist asc, then width_pref desc. - bool better; + bool better = false; if (score != best_score) { better = score > best_score; } else if (width_dist != best_dist) { @@ -1446,7 +1514,7 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm error(instr->name, "The asm instruction '%.*s' expects %d..=%d operands, got %td", LIT(name), min_count, max_count, operands.count); } print_possible_forms(); - return; + return false; } if (matched) { @@ -1468,73 +1536,84 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm instr->mnemonic = mnemonic; instr->valid_form_index = cast(i32)valid_form_index; + check_operand_constraints(asm_ctx, operands, mnemonic, name); + // Handle clobbering from mnemonic auto clobber = clobber_forms[valid_form_index]; - tmpl_entity->AsmTemplate.clobber_flags |= clobber.implies_clobber_flags(); - tmpl_entity->AsmTemplate.clobber_memory |= clobber.implies_clobber_memory(); - tmpl_entity->AsmTemplate.is_volatile |= clobber.implies_side_effects(); + facts->read_regs = cast(u16)clobber.implicit_rd & asm_ctx->CLOBBER_REGS_NAMED; - tmpl_entity->AsmTemplate.has_observable_side_effect |= clobber.implies_side_effects() != 0; - tmpl_entity->AsmTemplate.has_observable_side_effect |= clobber.writes_mem; + // NOTE(bill): reads_mem/writes_mem are per-FORM capability bits. + // A form with an r/m slot (e.g. add r/m32, imm32) carries them even + // when the operand resolved to a register, e.g. `add x, 123`. + // Count a real access only when an operand actually resolved to memory, + // or the access is implicit (no r/m slot exists to carry the bit: movs/stos/...). + bool has_mem_operand = false; + bool has_rm_slot = false; + auto const &valid_form = forms[valid_form_index]; + for_array(i, operands) { + if (determine_asm_operand_kind(&operands[i]) == AsmOperand_Memory) { + has_mem_operand = true; + } + AsmOperandKind op_kind = asm_ctx->kind_from_operand_type(operand_slot_type(valid_form, cast(int)i)); + if (op_kind == AsmOperand_Memory || op_kind == AsmOperand_Register_Or_Memory) { + has_rm_slot = true; + } + } + bool mem_is_real = has_mem_operand || (!has_rm_slot && operands.count > 0) || clobber.has_implicit_mem(); + + bool internal_branch = clobber.has_control() && check_asm_instr_targets_internal_label(instr); + + bool effective_side_effects = clobber.implies_side_effects() && !internal_branch; + + tmpl_entity->AsmTemplate.clobber_flags |= clobber.implies_clobber_flags(); + tmpl_entity->AsmTemplate.clobber_memory |= clobber.implies_clobber_memory() && mem_is_real; + tmpl_entity->AsmTemplate.is_volatile |= effective_side_effects; + + tmpl_entity->AsmTemplate.has_observable_side_effect |= effective_side_effects; + tmpl_entity->AsmTemplate.has_observable_side_effect |= clobber.writes_mem && mem_is_real; // #align_stack only matters if the body makes a call (which requires the stack // aligned at the call boundary) or manipulates RSP directly. Plain memory access // through a parameter pointer does NOT require stack realignment, so // implies_clobber_memory() is intentionally NOT used here. if (clobber.is_call_or_mem()) { - asm_acc->saw_call_or_mem = true; + cfg->saw_call_or_mem = true; } u16 pinned_mask = 0; - u16 output_only_pin_mask = 0; - for (auto const &ed : tmpl_entity->AsmTemplate.decls) { - if (ed.pin.len != 0) { - u16 b = asm_ctx->clobber_bit_for_reg_name(ed.pin); - pinned_mask |= b; - if (ed.param_group == AsmTemplateEntityDeclParamGroup_Output && ed.tie < 0) { - output_only_pin_mask |= b; - } - } - } - - if (asm_acc->straight_line) { - u16 wants = cast(u16)clobber.implicit_rd & asm_ctx->CLOBBER_REGS_NAMED; - u16 undefined = wants & ~asm_acc->defined_regs & ~pinned_mask; - for (u16 bit = 1; bit != 0; bit <<= 1) { - if ((undefined & bit) == 0) { - continue; - } - char const *rname = asm_ctx->clobber_reg_bit_name(bit); - error(instr->name, - "'%.*s' implicitly reads %%%s, but nothing in this template produces " - "a value for it; pin an input parameter to %%%s, or write %%%s before " - "this instruction", - LIT(name), rname, rname, rname); - } + for_array(i, tmpl_entity->AsmTemplate.decls) { + pinned_mask |= asm_decl_resolve_pin_bit(asm_ctx, tmpl_entity->AsmTemplate.decls, cast(i32)i); } u16 produced = cast(u16)clobber.implicit_wr & asm_ctx->CLOBBER_REGS_NAMED; u16 explicit_writes = 0; - // Explicit destination operands that name a concrete register also produce it - // (e.g. `mov eax, $leaf` before CPUID). Only literal %reg operands pin a known - // physical register; parameter operands are register-allocated elsewhere, so they - // don't tell us which physical register was written. u16 written_ops = cast(u16)clobber.written; + u16 pinned_param_writes = 0; + auto const &decls = tmpl_entity->AsmTemplate.decls; for_array(i, operands) { int tslot = user_operand_target_index(cast(int)i); if (tslot < 0 || tslot >= 4 || (written_ops & (1u << tslot)) == 0) { continue; } Ast *e = operands[i].expr; - if (e && e->kind == Ast_AsmRegister) { + if (e != nullptr && e->kind == Ast_AsmRegister) { u16 b = asm_ctx->clobber_bit_for_reg_name(e->AsmRegister.name.string); produced |= b; explicit_writes |= b; + continue; + } + Entity *pe = entity_of_node(operands[i].expr); + if (pe != nullptr && pe->kind == Entity_Variable) { + i32 di = -1; + check_asm_find_group(pe, decls, &di); // reuse existing index finder + pinned_param_writes |= asm_decl_resolve_pin_bit(asm_ctx, decls, di); } } - if (is_pseudo) { + + if (is_pseudo && + build_context.metrics.arch == TargetArch_riscv64) { // Synthesized register sources (e.g. ra in `jal off` -> `jal ra, off`) also // write a physical register; record them so ra is treated as produced/clobbered. u16 synth = 0; @@ -1550,66 +1629,216 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm produced |= synth; explicit_writes |= synth; } - asm_acc->defined_regs |= produced; - // Registers this form clobbers implicitly (RDTSC->RAX:RDX, etc.), for the - // redundant-#clobber hint. Union across the template; pinned regs excluded - // so a legitimate output pin is never called "redundant". + facts->gen_regs = produced | pinned_param_writes; + facts->gen_flags = cast(u16)clobber.flags_wr; + facts->read_flags = cast(u16)clobber.flags_rd_call(); + + // NOTE(bill): mnemonics such as `xor r, r` / `sub r, r` act as zeroing the destination + // independent of its prior value: the read is architecturally dead, so it must not count as a use. + bool self_zeroing = false; + if (asm_ctx->is_self_zeroing_idiom(cast(u16)mnemonic) && operands.count >= 2) { + Entity *e0 = entity_of_node(operands[0].expr); + bool all_same = (e0 != nullptr); + for (isize k = 1; all_same && k < operands.count; k++) { + all_same = entity_of_node(operands[k].expr) == e0; + } + // also treat literal %reg == %reg as self-zeroing (no entity, compare reg bits) + if (!all_same && operands[0].expr->kind == Ast_AsmRegister) { + u16 b0 = asm_ctx->clobber_bit_for_reg_name(operands[0].expr->AsmRegister.name.string); + all_same = b0 != 0; + for (isize k = 1; all_same && k < operands.count; k++) { + all_same = operands[k].expr->kind == Ast_AsmRegister && + asm_ctx->clobber_bit_for_reg_name(operands[k].expr->AsmRegister.name.string) == b0; + } + } + self_zeroing = all_same; + } + + + for_array(i, operands) { // Sub-register widths for explicit named-register operands + auto const &op = operands[i]; + Ast *e = op.expr; + if (e == nullptr || e->kind != Ast_AsmRegister) { + continue; + } + u16 bit = asm_ctx->clobber_bit_for_reg_name(e->AsmRegister.name.string); + i32 idx = asm_reg_index_from_bit(bit); + if (idx < 0) { + continue; + } + i32 w = check_asm_operand_bit_width(op.type); + if (w <= 0) { + w = 0; + // Fallback to the register's intrinsic width for a bare %reg. + auto r = asm_ctx->register_lookup(e->AsmRegister.name.string); + if (r) { + w = asm_ctx->reg_size(r); + } + } + if (w == 0) { + continue; + } + int tslot = user_operand_target_index(cast(int)i); + if (0 <= tslot && tslot < 4) { + if (!self_zeroing && cast(u16)clobber.read & (1u << tslot)) { + facts->read_reg_w.e[idx] = cast(u8)w; + facts->read_regs |= bit; // NOTE(bill): let liveness + coarse rbw see the explicit read + } + if (cast(u16)clobber.written & (1u << tslot)) { + facts->gen_reg_w.e [idx] = cast(u8)w; + } + } + } + + + for_array(i, operands) { + int slot = user_operand_target_index(cast(int)i); + if (slot < 0) { + continue; + } + Entity *pe = entity_of_node(operands[i].expr); + if (pe == nullptr || pe->kind != Entity_Variable) { + continue; + } + + if (!self_zeroing && (cast(u16)clobber.read & (1u << slot))) { + array_add(&facts->read_params, pe); + } + if (cast(u16)clobber.written & (1u << slot)) { + array_add(&facts->gen_params, pe); + } + + + { // View aliasing: a view decl shares its source's physical register. + auto const &decls = tmpl_entity->AsmTemplate.decls; + i32 di = -1; + check_asm_find_group(pe, decls, &di); + if (di >= 0 && decls[di].view_of >= 0) { + i32 src_i = decls[di].view_of; + Entity *src_e = decls[src_i].entity; + if (src_e != nullptr) { + GB_ASSERT_MSG(asm_decl_resolve_pin_bit(asm_ctx, decls, cast(i32)di) == 0 && + asm_decl_resolve_pin_bit(asm_ctx, decls, src_i) == 0, + "view/source share a reg bit; fix the width gate on the reg-bit path, not gen_params"); + + // A read of the view is a read of the source + if (cast(u16)clobber.read & (1u << slot)) { + i32 di = -1; + for_array(k, decls) { + if (decls[k].entity == pe) { + di = cast(i32)k; + break; + } + } + if (di >= 0 && decls[di].view_of >= 0 && decls[decls[di].view_of].entity != nullptr) { + array_add(&facts->read_params, decls[decls[di].view_of].entity); + } else { + array_add(&facts->read_params, pe); + } + } + + // A write of the view defines the source only if it covers the parent + if (cast(u16)clobber.written & (1u << slot)) { + i32 parent_w = check_asm_operand_bit_width(src_e->type); + if (decls[di].view_bits == 32 || decls[di].view_bits == parent_w) { + array_add(&facts->gen_params, src_e); + } + } + } + } + } + } + { + // Registers this form clobbers implicitly (RDTSC->RAX:RDX, etc.), for the + // redundant-#clobber hint. Union across the template; pinned regs excluded + // so a legitimate output pin is never called "redundant". u16 implicit_wr = cast(u16)clobber.implicit_wr & asm_ctx->CLOBBER_REGS_NAMED; - asm_acc->implicit_clobbered_regs |= implicit_wr & ~pinned_mask; + cfg->implicit_clobbered_regs |= implicit_wr & ~pinned_mask; + + // Approximate staleness. An output that was explicitly produced (literal %reg write) + // and is later implicitly clobbered — without this same instruction re-producing it — + // is marked stale. Explicit re-production clears it. Implicitly-produced outputs + // (RDTSC->RDX) are never tracked, so they never false-fire. + cfg->explicitly_produced_regs |= explicit_writes; + cfg->stale_outputs &= ~explicit_writes; + cfg->stale_outputs |= implicit_wr & cfg->explicitly_produced_regs & ~explicit_writes; } - // Approximate staleness. An output that was explicitly produced (literal %reg write) - // and is later implicitly clobbered — without this same instruction re-producing it — - // is marked stale. Explicit re-production clears it. Implicitly-produced outputs - // (RDTSC->RDX) are never tracked, so they never false-fire. { - u16 implicit_clobber = cast(u16)clobber.implicit_wr & asm_ctx->CLOBBER_REGS_NAMED; - asm_acc->explicitly_produced_regs |= explicit_writes; - asm_acc->stale_outputs &= ~explicit_writes; - asm_acc->stale_outputs |= implicit_clobber & asm_acc->explicitly_produced_regs & ~explicit_writes; - } + // Terminality for a #diverging template: this instruction ends straight-line + // flow off the end (jmp/ret/etc. -> CONTROL, hlt/ud2 -> HALT). A conditional + // branch does NOT terminate (it can fall through), so require that the form + // is not merely CONTROL-with-fallthrough. We approximate "unconditional" as + // CONTROL|HALT with no explicit label/operand fallthrough below. - // Terminality for a #diverging template: this instruction ends straight-line - // flow off the end (jmp/ret/etc. -> CONTROL, hlt/ud2 -> HALT). A conditional - // branch does NOT terminate (it can fall through), so require that the form - // is not merely CONTROL-with-fallthrough. We approximate "unconditional" as - // CONTROL|HALT with no explicit label/operand fallthrough below. - { bool control = clobber.has_control(); bool halt = clobber.has_halt(); // A conditional branch reads a flag and can fall through -> not terminal. bool conditional = clobber.is_conditional(); - asm_acc->last_is_terminal = halt || (control && !conditional); - } - // A branch/call inside the template means subsequent instructions may be reached - // out of textual order; stop trusting the linear def model past this point. - if (clobber.has_control()) { - asm_acc->straight_line = false; + facts->is_control = control; + facts->is_conditional = conditional; + facts->is_terminal = halt || (control && !conditional); } asm_ctx->clobber_implicit_regs(&tmpl_entity->AsmTemplate.clobber_registers_set, produced); - return; + // Purity inference + if (cfg->can_be_pure) { + // NOTE(bill): Only the first violating instruction is recorded + // The later ones don't overwrite the reason. + char const *why = nullptr; + + if (clobber.writes_mem && mem_is_real) { + why = "it writes to memory"; + } else if (clobber.reads_mem && mem_is_real) { + // A load's result depends on memory, which is not a value input. + why = "it reads from memory"; + } else if (clobber.is_nondeterministic() || + (is_pseudo && alias.is_nondeterministic())) { + // rdtsc/rdrand/cpuid on x86 + // counter/entropy CSR reads on RISC-V. + why = "it is nondeterministic"; + } else if (clobber.implies_clobber_memory() && mem_is_real) { + why = "it accesses memory the compiler cannot see"; + } else if (effective_side_effects) { + why = "it has an observable side effect"; + } else if (!internal_branch && clobber.has_control()) { + // Internal jmp/jcc/ret over the template's own labels stays pure; a call + // or an indirect/external transfer does not. + why = "it possibly transfers control outside the inline 'asm' template"; + } + + if (why != nullptr) { + cfg->can_be_pure = false; + cfg->impure_reason = why; + cfg->impure_reason_node = instr->name; + } + + // NOTE(bill): return true even on a purity test because the instruction is still good + } + return true; } - // failure path - enum { MAX_VARIANT_COUNT = 32 }; - AsmMismatch mismatch[MAX_VARIANT_COUNT] = {}; + // NOTE(bill): Failure path + enum { MAX_VARIANT_COUNT = 8 }; + AsmMismatch mismatch [MAX_VARIANT_COUNT] = {}; i32 want_bits[MAX_VARIANT_COUNT] = {}; - i32 got_bits[MAX_VARIANT_COUNT] = {}; + i32 got_bits [MAX_VARIANT_COUNT] = {}; if (best_form >= 0) { auto &form = forms[best_form]; for_array(i, operands) { auto type = operand_slot_type(form, cast(int)i); AsmOperandKind dst = asm_ctx->kind_from_operand_type(type); AsmOperandKind src = determine_asm_operand_kind(&operands[i]); - possible_kinds[i] = dst; + + possible_kinds [i] = dst; possible_class_kinds[i] = asm_ctx->reg_class_from_operand_type(type); bool kind_ok = (dst == src) || - (dst == AsmOperand_Register_Or_Memory && (src == AsmOperand_Register || src == AsmOperand_Memory)); + (dst == AsmOperand_Register_Or_Memory + && (src == AsmOperand_Register || src == AsmOperand_Memory)); if (!kind_ok) { valid_spots[i] = false; } else { @@ -1627,82 +1856,81 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm } } - { + begin_error_block(); + + bool nearly = best_score >= gb_max(operands.count*2 - 2, 0); + if (nearly) { + error(instr->name, "'%.*s' operands nearly matched the expected encoding forms", LIT(name)); + } else { + error(instr->name, "'%.*s' operands matched none of the expected encoding forms", LIT(name)); + } + + for_array(i, valid_spots) { + if (valid_spots[i] || i >= operands.count) { + continue; + } + auto dst = possible_kinds[i]; + AsmOperandKind src = determine_asm_operand_kind(&operands[i]); + + AsmRegClass dst_reg_class = possible_class_kinds[i]; + AsmRegClass src_reg_class = check_asm_reg_class_from_type(operands[i].type); + + AsmMismatch m = (i < MAX_VARIANT_COUNT) ? mismatch[i] : AsmMismatch_None; + + end_error_block(); begin_error_block(); - bool nearly = best_score >= gb_max(operands.count*2 - 2, 0); - if (nearly) { - error(instr->name, "'%.*s' operands nearly matched the expected encoding forms", LIT(name)); - } else { - error(instr->name, "'%.*s' operands matched none of the expected encoding forms", LIT(name)); - } - - for_array(i, valid_spots) { - if (valid_spots[i] || i >= operands.count) { - continue; - } - auto dst = possible_kinds[i]; - AsmOperandKind src = determine_asm_operand_kind(&operands[i]); - - AsmRegClass dst_reg_class = possible_class_kinds[i]; - AsmRegClass src_reg_class = check_asm_reg_class_from_type(operands[i].type); - - AsmMismatch m = (i < MAX_VARIANT_COUNT) ? mismatch[i] : AsmMismatch_None; - - end_error_block(); - begin_error_block(); - - if (m == AsmMismatch_ImmRange) { - - ExactValue ev = operands[i].value; - gbString vs = exact_value_to_string(ev); - i32 bits_required = 0; - check_asm_immediate_value_fits(ev, want_bits[i], &bits_required, nullptr); - if (bits_required > 0) { - error(operands[i].expr, "'%.*s' operand-%td is a %d-bit immediate value, but the value %s does not fit in the %d-bit immediate this form encodes", - LIT(name), i, bits_required, vs, cast(int)want_bits[i]); - } else { - error(operands[i].expr, "'%.*s' operand-%td is an immediate value, but the value %s does not fit in the %d-bit immediate this form encodes", - LIT(name), i, vs, cast(int)want_bits[i]); - } - gb_string_free(vs); - } else if (m == AsmMismatch_ImmType) { - error(operands[i].expr, "'%.*s' operand-%td: a floating-point constant cannot be used as an immediate", - LIT(name), i); - } else if (m == AsmMismatch_Size && want_bits[i] && got_bits[i]) { - error(operands[i].expr, "'%.*s' operand-%td has the wrong size: expected a %u-bit %.*s operand, got %u-bit", - LIT(name), i, - cast(unsigned)want_bits[i], LIT(asm_reg_class_strings[dst_reg_class]), - cast(unsigned)got_bits[i]); - } else if (m == AsmMismatch_Class) { - error(operands[i].expr, "'%.*s' operand-%td is in the wrong register class, expected %d-bit %.*s %.*s, got %d-bit %.*s %.*s", - LIT(name), i, - want_bits[i], LIT(asm_reg_class_strings[dst_reg_class]), LIT(asm_operand_kind_strings[dst]), - got_bits[i], LIT(asm_reg_class_strings[src_reg_class]), LIT(asm_operand_kind_strings[src])); - } else if (m == AsmMismatch_NamedReg) { - auto slot = operand_slot_type(forms[best_form], cast(int)i); - error(operands[i].expr, "'%.*s' operand-%td must be a named %.*s register, got a %.*s", - LIT(name), i, - LIT(asm_ctx->named_reg_class_string(asm_ctx->operand_type_named_reg_class(slot))), - LIT(asm_operand_kind_strings[src])); - } else if (dst == AsmOperand_Immediate) { - error(operands[i].expr, "'%.*s' operand-%td must be an assemble-time constant or a $ immediate parameter, got a %.*s", - LIT(name), i, LIT(asm_operand_kind_strings[src])); - } else if (dst) { - error(operands[i].expr, "'%.*s' operand-%td has an invalid kind, expected %.*s operand", - LIT(name), i, LIT(asm_operand_kind_expected_strings[dst])); + if (m == AsmMismatch_ImmRange) { + ExactValue ev = operands[i].value; + gbString vs = exact_value_to_string(ev); + i32 bits_required = 0; + check_asm_immediate_value_fits(ev, want_bits[i], &bits_required, nullptr); + if (bits_required > 0) { + error(operands[i].expr, "'%.*s' operand-%td is a %d-bit immediate value, but the value %s does not fit in the %d-bit immediate this form encodes", + LIT(name), i, bits_required, vs, cast(int)want_bits[i]); } else { - error(operands[i].expr, "'%.*s' operand-%td has an invalid kind", LIT(name), i); + error(operands[i].expr, "'%.*s' operand-%td is an immediate value, but the value %s does not fit in the %d-bit immediate this form encodes", + LIT(name), i, vs, cast(int)want_bits[i]); } - } - - if (nearly && best_form >= 0) { - print_closest_form(best_form); + gb_string_free(vs); + } else if (m == AsmMismatch_ImmType) { + error(operands[i].expr, "'%.*s' operand-%td: a floating-point constant cannot be used as an immediate", + LIT(name), i); + } else if (m == AsmMismatch_Size && want_bits[i] && got_bits[i]) { + error(operands[i].expr, "'%.*s' operand-%td has the wrong size: expected a %u-bit %.*s operand, got %u-bit", + LIT(name), i, + cast(unsigned)want_bits[i], LIT(asm_reg_class_strings[dst_reg_class]), + cast(unsigned)got_bits[i]); + } else if (m == AsmMismatch_Class) { + error(operands[i].expr, "'%.*s' operand-%td is in the wrong register class, expected %d-bit %.*s %.*s, got %d-bit %.*s %.*s", + LIT(name), i, + want_bits[i], LIT(asm_reg_class_strings[dst_reg_class]), LIT(asm_operand_kind_strings[dst]), + got_bits[i], LIT(asm_reg_class_strings[src_reg_class]), LIT(asm_operand_kind_strings[src])); + } else if (m == AsmMismatch_NamedReg) { + auto slot = operand_slot_type(forms[best_form], cast(int)i); + error(operands[i].expr, "'%.*s' operand-%td must be a named %.*s register, got a %.*s", + LIT(name), i, + LIT(asm_ctx->named_reg_class_string(asm_ctx->operand_type_named_reg_class(slot))), + LIT(asm_operand_kind_strings[src])); + } else if (dst == AsmOperand_Immediate) { + error(operands[i].expr, "'%.*s' operand-%td must be an assemble-time constant or a $ immediate parameter, got a %.*s", + LIT(name), i, LIT(asm_operand_kind_strings[src])); + } else if (dst) { + error(operands[i].expr, "'%.*s' operand-%td has an invalid kind, expected %.*s operand", + LIT(name), i, LIT(asm_operand_kind_expected_strings[dst])); } else { - print_possible_forms(); + error(operands[i].expr, "'%.*s' operand-%td has an invalid kind", LIT(name), i); } - end_error_block(); } + + if (nearly && best_form >= 0) { + print_closest_form(best_form); + } else { + print_possible_forms(); + } + end_error_block(); + + return false; } @@ -1721,8 +1949,6 @@ gb_internal void check_asm_instruction_operand(AsmCtx *asm_ctx, CheckerContext * Scope *param_scope = ate->param_scope; Scope *label_scope = ate->label_scope; - gb_unused(param_scope); - gb_unused(label_scope); switch (expr->kind) { case_ast_node(ue, UnaryExpr, expr); @@ -1751,20 +1977,22 @@ gb_internal void check_asm_instruction_operand(AsmCtx *asm_ctx, CheckerContext * return; } found = scope_lookup(param_scope->parent, i->interned, i->hash); - if (found != nullptr) { - if (found->kind == Entity_Constant) { - i->entity = found; - operand->mode = Addressing_Constant; - operand->value = found->Constant.value; - operand->type = found->type; - - add_type_and_value(ctx, expr, operand->mode, operand->type, operand->value); - } else { - error(expr, "Only asm parameters or constants are allowed to be used within an 'asm' template"); - } - } else { + if (found == nullptr) { error(expr, "Undeclared asm parameter or constant '%.*s'", LIT(i->token.string)); + return; } + + if (found->kind != Entity_Constant) { + error(expr, "Only asm parameters or constants are allowed to be used within an 'asm' template"); + return; + } + + add_entity_use(ctx, expr, entity); + operand->mode = Addressing_Constant; + operand->value = found->Constant.value; + operand->type = found->type; + + add_type_and_value(ctx, expr, operand->mode, operand->type, operand->value); return; case_end; case_ast_node(bl, BasicLit, expr); @@ -2079,12 +2307,10 @@ gb_internal void check_asm_instruction_operand(AsmCtx *asm_ctx, CheckerContext * Entity *found = scope_lookup_current(label_scope, name->interned, name->hash); if (found == nullptr) { error(expr, "Undeclared asm label '.%.*s'", LIT(name->token.string)); + return; } - name->entity = found; - if (found != nullptr) { - found->flags |= EntityFlag_Used; - add_type_and_value(ctx, expr, Addressing_Value, found->type, {}); - } + add_entity_use(ctx, label->name, found); + add_type_and_value(ctx, expr, Addressing_Value, found->type, {}); return; case_end; } @@ -2132,13 +2358,14 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity entity->type = type; - - bool is_volatile = false; - bool is_align_stack = false; - auto *clobber_registers_set = &entity->AsmTemplate.clobber_registers_set; - check_asm_specs(asm_ctx, ctx, ate->param_scope, at->specs, &ate->decls); + + bool is_pure_annotated = false; { // check clobbers + bool is_volatile = false; + bool is_align_stack = false; + auto *clobber_registers_set = &entity->AsmTemplate.clobber_registers_set; + bool clobber_flags = false; bool clobber_memory = false; @@ -2156,6 +2383,11 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity error(clobber->name, "#align_stack has already been defined as an asm specification"); } is_align_stack = true; + } else if (clobber->name.string == "pure") { + if (is_pure_annotated) { + error(clobber->name, "#pure has already been defined as an asm specification"); + } + is_pure_annotated = true; } else { error(clobber->name, "Unknown clobber directive '#%.*s'", LIT(clobber->name.string)); } @@ -2201,17 +2433,18 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity entity->AsmTemplate.clobber_memory = clobber_memory; entity->AsmTemplate.is_volatile = is_volatile; entity->AsmTemplate.is_align_stack = is_align_stack; - } - // add normalizations for the reigsters too - for (String const ® : *clobber_registers_set) { - u16 bit = asm_ctx->clobber_bit_for_reg_name(reg); - String rname = make_string_c(asm_ctx->clobber_reg_bit_name(bit)); - if (rname != reg) { - string_set_update(clobber_registers_set, rname); + // add normalizations for the registers too + for (String const ® : *clobber_registers_set) { + u16 bit = asm_ctx->clobber_bit_for_reg_name(reg); + String rname = make_string_c(asm_ctx->clobber_reg_bit_name(bit)); + if (rname != reg) { + string_set_update(clobber_registers_set, rname); + } } } + // Two distinct operands pinned to the same physical register only makes sense when // they are tied (they intentionally share one register). Compared by bit so %eax // and %rax collide. Flag pins ("flags") yield bit 0 and are skipped. @@ -2240,28 +2473,6 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity } } - AsmMnemonicAccumulator asm_acc = {}; - - // Physical registers known to hold a defined value at the current point in the - // straight-line instruction stream. Seeded with input-pinned registers (they - // carry their argument at entry); grows as instructions write registers. - for (auto const &ed : ate->decls) { - if (ed.pin.len == 0) { - continue; - } - // Only inputs (and the input half of a tie, which is Input-group) hold a - // value at entry. Output/scratch pins start undefined and become defined - // when an instruction writes them. - if (ed.param_group == AsmTemplateEntityDeclParamGroup_Input) { - asm_acc.defined_regs |= asm_ctx->clobber_bit_for_reg_name(ed.pin); - } - } - - // Linear "written earlier in the text" is only a sound proxy for "produced at - // runtime" while control flow is straight-line. The first label is a potential - // jump target / back-edge, after which a read can precede its textual def; from - // there on we stop emitting the implicit-read diagnostic. - asm_acc.straight_line = true; // collect label decls for (Ast *instruction_ : at->instructions) { @@ -2288,6 +2499,24 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity } } + // NOTE(bill, 2026-08-24): Construct a control-flow graph (CFG) from the instructions + // to do further analysis which is not possible with an conservative straight-line approximation + // Using a CFG is a much sounder approach for calculating: + // * read-before-writes + // * sub-register width checks + // * `%flags` checks + // * divergence + // * unreachable code + // * liveness checks (forward and backwards) + + // NOTE(bill): the AsmCfg structure also hold information which is used to in the linear pass + // mainly because it will be used later on by it, so it makes sense to keep them together as + // one unit rather than two separate structures. + + AsmCfg cfg = {}; + asm_cfg_init(&cfg); + defer (asm_cfg_destroy(&cfg)); + Array operands = {}; operands.allocator = heap_allocator(); array_reserve(&operands, 16); @@ -2295,6 +2524,7 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity u8 previous_prefix = 0; Ast *previous_prefix_instr = nullptr; // for a good error location + bool all_instructions_good = true; for (Ast *instruction_ : at->instructions) { switch (instruction_->kind) { @@ -2323,11 +2553,11 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity previous_prefix_instr = instruction_; } else if (res == CheckMnemomic_Mnemonic) { instr->suffix_flags = suffix_flags; - check_mnemonic(asm_ctx, ctx, entity, instr, mnemonic, 0, slice_from_array(operands), - previous_prefix, previous_prefix_instr, - &asm_acc); + all_instructions_good &= check_mnemonic(asm_ctx, ctx, entity, instr, mnemonic, 0, slice_from_array(operands), + previous_prefix, previous_prefix_instr, + &cfg); - asm_acc.saw_any_instructions = true; + cfg.saw_any_instructions = true; previous_prefix = 0; previous_prefix_instr = nullptr; @@ -2337,19 +2567,19 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity u16 pseudo_mnemonic = cast(u16)mnemonic; auto alias = asm_ctx->pseudo_alias(cast(u16)pseudo_mnemonic); u16 target_mnemonic = cast(u16)alias.target; - check_mnemonic(asm_ctx, ctx, entity, instr, target_mnemonic, pseudo_mnemonic, slice_from_array(operands), - previous_prefix, previous_prefix_instr, - &asm_acc); + all_instructions_good &=check_mnemonic(asm_ctx, ctx, entity, instr, target_mnemonic, pseudo_mnemonic, slice_from_array(operands), + previous_prefix, previous_prefix_instr, + &cfg); - asm_acc.saw_any_instructions = true; + cfg.saw_any_instructions = true; previous_prefix = 0; previous_prefix_instr = nullptr; } else if (res == CheckMnemomic_PseudoMacroMnemonic) { instr->suffix_flags = suffix_flags; - check_pseudo_macro_mnemonic(asm_ctx, entity, instr, slice_from_array(operands)); + all_instructions_good &= check_pseudo_macro_mnemonic(asm_ctx, entity, instr, slice_from_array(operands)); - asm_acc.saw_any_instructions = true; + cfg.saw_any_instructions = true; previous_prefix = 0; previous_prefix_instr = nullptr; @@ -2361,10 +2591,6 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity case_end; case_ast_node(label, AsmLabelDecl, instruction_); - asm_acc.straight_line = false; - // A new straight-line region begins here; its tail is unseen, - // so the previous instruction's terminality no longer describes the body's end. - asm_acc.last_is_terminal = false; if (previous_prefix != 0) { error(previous_prefix_instr, "A prefix must be immediately followed by an instruction, but a label declaration was found"); previous_prefix = 0; @@ -2385,21 +2611,12 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity check_asm_instruction_operand(asm_ctx, ctx, entity, &operand, expr, /*allow_memory_operands*/true); array_add(&operands, operand); } - for (auto const &op : operands) { + for (auto &op : operands) { if (op.mode != Addressing_Constant) { error(op.expr, "Expected an integer for the asm directive #%.*s", LIT(name)); continue; } - ExactValue ev = exact_value_to_integer(op.value); - if (ev.kind != ExactValue_Integer) { - error(op.expr, "Expected an integer for the asm directive #%.*s", LIT(name)); - continue; - } - i64 i = exact_value_to_i64(ev); - if (i < 0 || i > 255) { - error(op.expr, "Expected an integer within 0..<256 for the asm directive #%.*s, got %lld", LIT(name), cast(long long)i); - continue; - } + check_assignment(ctx, &op, t_u8, str_lit("asm '#byte' directive")); } } else if (name == "align") { if (dir->operands.count != 1) { @@ -2472,17 +2689,12 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity error(previous_prefix_instr, "A prefix must be immediately followed by an instruction, but the template ended"); } - // for (auto const &ed : ate->decls) { - // if (!(ed.param_group == AsmTemplateEntityDeclParamGroup_Output && ed.pin.len != 0)) { - // continue; - // } - // u16 bit = asm_ctx->clobber_bit_for_reg_name(ed.pin); - // if (bit && (asm_acc.defined_regs & bit) == 0 && asm_acc.straight_line) { - // error(ed.entity->token, - // "Output '%.*s' is pinned to %%%.*s but nothing in this template writes it", - // LIT(ed.entity->token.string), LIT(ed.pin)); - // } - // } + // NOTE(bill): After the linear collection pass of the mnemonics, + // now do the CFG building, analysis, and liveness checks (only if everything was correct) + + check_asm_cfg_build(asm_ctx, &cfg, d->init_expr, entity); + check_asm_cfg_analyse(asm_ctx, &cfg, ctx, entity); + check_asm_cfg_liveness(asm_ctx, &cfg, entity, /*emit_dead_writes*/all_instructions_good); bool vet_unused = false; @@ -2500,7 +2712,7 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity Entity *le = entry.value; GB_ASSERT(le != nullptr); if ((le->flags & EntityFlag_Used) == 0) { - error(le->token, "'asm' label '.%.*s' is declared but never reference by any instruction", LIT(le->token.string)); + error(le->token, "'asm' label '.%.*s' is declared but never referenced by any instruction", LIT(le->token.string)); } } } @@ -2525,8 +2737,9 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity for (auto const &ed : ate->decls) { bool is_scratch = ed.param_group == AsmTemplateEntityDeclParamGroup_Scratch && ed.view_of < 0; - bool is_immediate = ed.kind == AsmTemplateEntityDecl_Immediate; - if ((!is_scratch && !is_immediate) || ed.entity == nullptr) { + bool is_immediate = ed.kind == AsmTemplateEntityDecl_Immediate; + bool is_input = ed.param_group == AsmTemplateEntityDeclParamGroup_Input; + if ((!is_scratch && !is_immediate && !is_input) || ed.entity == nullptr) { continue; } // Used if its identifier is referenced OR (for a pinned scratch) its pinned @@ -2541,9 +2754,15 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity continue; } } - error(ed.entity->token, "'asm' %s '%.*s' is declared but never used", - is_immediate ? "immediate parameter" : "scratch parameter", - LIT(ed.entity->token.string)); + if (ed.tie >= 0) { + // TODO(bill): Handle this edge case? + continue; + } + + char const *what = is_immediate ? "immediate" : + is_input ? "input" : + "scratch"; + error(ed.entity->token, "'asm' %s parameter '%.*s' is declared but never used", what, LIT(ed.entity->token.string)); } } @@ -2557,49 +2776,35 @@ gb_internal void check_asm_template(AsmCtx *asm_ctx, CheckerContext *ctx, Entity "Please add #volatile if the effect is intended."); } - if (entity->AsmTemplate.is_align_stack && !asm_acc.saw_call_or_mem) { + if (entity->AsmTemplate.is_align_stack && !cfg.saw_call_or_mem) { warning(entity->token, "#align_stack is redundant; this template makes no call and touches no memory " "that would require the stack to be realigned"); } - if (false) { - // TODO(bill): is this even a good idea? The programmer might have just added it for the reason so that he can - // tell if an asm template clobbers something specific or if it is #volatile. - // I'll leave this in an `if (false)` block for the time being just in case it might be useful in the future. + { + bool declared_effects = entity->AsmTemplate.is_volatile || + entity->AsmTemplate.clobber_memory || + entity->AsmTemplate.has_observable_side_effect; + bool is_pure = cfg.can_be_pure && !declared_effects && !type->Proc.diverging; + entity->AsmTemplate.is_pure = is_pure; - // Redundant #clobber hint - for (Ast *clobber_ : at->clobbers) { - ast_node(clobber, AsmClobber, clobber_); - if (clobber->value == nullptr || clobber->value->kind != Ast_AsmRegister) { - continue; - } - String reg = clobber->value->AsmRegister.name.string; - u16 bit = asm_ctx->clobber_bit_for_reg_name(reg); - if (bit && (asm_acc.implicit_clobbered_regs & bit) != 0) { - warning(clobber->value, "#clobber %%%.*s is redundant; an instruction in this template already clobbers it implicitly", LIT(reg)); - } - } - - // Redundant #volatile hint - if (entity->AsmTemplate.is_volatile && entity->AsmTemplate.has_observable_side_effect) { - for (Ast *clobber_ : at->clobbers) { - ast_node(clobber, AsmClobber, clobber_); - if (clobber->value == nullptr && clobber->name.string == "volatile") { - warning(clobber->name, "#volatile is redundant; an instruction in this template already has an observable side effect"); - break; + if (is_pure_annotated && !is_pure) { + Ast *node = cfg.impure_reason_node; + char const *why = cfg.impure_reason; + if (why == nullptr) { + if (type->Proc.diverging) { + why = "it is declared diverging (-> !) and computes no outputs"; + } else if (entity->AsmTemplate.clobber_memory) { + why = "it declares '#clobber memory'"; + } else if (entity->AsmTemplate.is_volatile) { + why = "it is declared '#volatile'"; + } else { + why = "it declares an observable effect"; } } - } - } - - if (type->Proc.diverging) { - if (!asm_acc.saw_any_instructions) { - error(entity->token, "This asm template is declared as diverging (-> !) but its body is empty and cannot diverge"); - } else if (!asm_acc.last_is_terminal) { - error(entity->token, - "This asm template is declared diverging (-> !) but its final instruction can fall through; " - "end it with an unconditional jump, return, or halt"); + Token tok = node ? ast_token(node): entity->token; + error(tok, "'asm' template is marked #pure but it is not pure: %s", why); } } } diff --git a/src/check_asm_cfg.cpp b/src/check_asm_cfg.cpp new file mode 100644 index 000000000..e6e134d82 --- /dev/null +++ b/src/check_asm_cfg.cpp @@ -0,0 +1,1011 @@ + +enum { + ASM_WIDTH_REG_COUNT = 16 +}; + +// Sub-register width tracking +// 0 means "this instruction does not read/write that named register" +struct AsmRegW { + u8 e[ASM_WIDTH_REG_COUNT]; +}; + +gb_internal u8 asm_reg_def_width_after(u8 prev, u8 w) { + bool x86 = build_context.metrics.arch == TargetArch_amd64 || + build_context.metrics.arch == TargetArch_i386; // TODO(bill): actually support x86 32-bit :P + if (x86 && w == 32) { + return 64; + } + return gb_max(prev, w); +} + +gb_internal i32 asm_reg_index_from_bit(u16 bit) { + for (i32 i = 0; i < ASM_WIDTH_REG_COUNT; i++) { + if (bit == cast(u16)(1u << i)) { + return i; + } + } + return -1; +} + +struct AsmBlock { + i32 first; // instruction index + i32 last; + + Array succs; + + u16 in_defs; + u16 out_defs; + + u16 in_flags; + u16 out_flags; + + u16 live_in_regs; + u16 live_out_regs; + + PtrSet in_params; + PtrSet out_params; + + bool reachable; +}; + +struct AsmInstructionFacts { + AstAsmInstruction *node; + String name; + + u16 gen_flags; // flag bits this instruction defines + u16 read_flags; + u16 gen_regs; + u16 read_regs; + + // Sub-register widths, indexed by reg bit-index. + AsmRegW read_reg_w; + AsmRegW gen_reg_w; + + Array gen_params; + Array read_params; + + bool is_control; + bool is_conditional; + bool is_terminal; + + Entity *branch_target; + i32 block_id; +}; + +gb_internal u16 asm_full_kill_mask(AsmInstructionFacts *f) { + u16 full = cast(u16)(build_context.metrics.ptr_size*8); + u16 kill = 0; + for (u16 bit = 1; bit != 0; bit <<= 1) { + if ((f->gen_regs & bit) == 0) { + continue; + } + i32 idx = asm_reg_index_from_bit(bit); + u8 w = 0; + if (idx >= 0) { + w = f->gen_reg_w.e[idx]; + } + if (w == 0 || asm_reg_def_width_after(0, w) >= full) { + kill |= bit; + } + } + return kill; +} + +struct AsmCfg { + // Union of registers implicitly clobbered by matched forms (for redundant-#clobber hints). + u16 implicit_clobbered_regs; + u16 explicitly_produced_regs; + u16 stale_outputs; + + bool saw_any_instructions; // NOTE(bill): An empty diverging body cannot diverge. + + // NOTE(bill): Related to #align_stack + // any call/branch (CONTROL) or memory effect that could require the stack + // to be realigned. If none occurred, #align_stack is redundant. + bool saw_call_or_mem; + + // Purity test + bool can_be_pure; + char const *impure_reason; + Ast * impure_reason_node; + + Array insts; // program-order (only for fact-carrying instrs) + Array blocks; + + PtrMap entity_to_index; + Array decl_pin_bit; + u64 universe_pm; +}; + +gb_internal void asm_cfg_init(AsmCfg *cfg) { + map_init(&cfg->entity_to_index); + cfg->decl_pin_bit.allocator = heap_allocator(); + cfg->can_be_pure = true; +}; + + +gb_internal void asm_cfg_destroy(AsmCfg *cfg) { + for (auto &block : cfg->blocks) { + array_free(&block.succs); + ptr_set_destroy(&block.in_params); + ptr_set_destroy(&block.out_params); + } + array_free(&cfg->blocks); + array_free(&cfg->insts); + map_destroy(&cfg->entity_to_index); + array_free(&cfg->decl_pin_bit); +} + +gb_internal i32 asm_cfg_label_block_index(Entity *entity) { + if (entity != nullptr && entity->kind == Entity_Label) { + return entity->Label.asm_block_index; + } + return -1; +} +gb_internal bool asm_cfg_label_block_index_set(Entity *entity, i32 index) { + if (entity != nullptr && entity->kind == Entity_Label) { + GB_ASSERT(entity->Label.asm_block_index < 0); + entity->Label.asm_block_index = index; + } + return false; +} + +// The physical-register bit a decl is pinned to. A width-view carries no pin of +// its own; it inherits its source decl's pin. Returns 0 for unpinned decls. +template +gb_internal u16 asm_decl_resolve_pin_bit(AsmCtx *asm_ctx, Array const &decls, i32 di) { + if (di < 0 || di >= cast(i32)decls.count) { + return 0; + } + auto const &ed = decls[di]; + if (ed.pin.len != 0) { + return asm_ctx->clobber_bit_for_reg_name(ed.pin); + } + if (ed.view_of >= 0 && ed.view_of < cast(i32)decls.count) { + String src_pin = decls[ed.view_of].pin; + if (src_pin.len != 0) { + return asm_ctx->clobber_bit_for_reg_name(src_pin); + } + } + return 0; +} + +template +gb_internal u16 asm_decl_resolve_flag_bit(AsmCtx *asm_ctx, AsmTemplateEntityDecl const &ed) { + if (ed.pin_flag.len == 0) { + return 0; + } + auto flags = asm_ctx->flag_from_name(ed.pin_flag); + return cast(u16)flags; +} + +template +gb_internal void asm_cfg_populate_decls(AsmCtx *asm_ctx, AsmCfg *cfg, Entity *entity) { + auto const &decls = entity->AsmTemplate.decls; + cfg->universe_pm = 0; + if (decls.count > 64) { + // NOTE(bill): check_asm_cfg_analyse will err on this since this is exceed the maximum number of declarations + return; + } + array_resize(&cfg->decl_pin_bit, decls.count); + for_array(i, decls) { + Entity *e = decls[i].entity; + cfg->decl_pin_bit[i] = asm_decl_resolve_pin_bit(asm_ctx, decls, cast(i32)i); + if (e != nullptr) { + if (decls[i].view_of >= 0) { + // NOTE(bill): A view shares its source's lattice bit, as it is not an independent value. + i32 src_i = decls[i].view_of; + Entity *src_e = decls[src_i].entity; + if (src_e != nullptr) { + map_set(&cfg->entity_to_index, e, src_i); + } + // NOTE(bill): No need to set a universe bit for the view as the source already has one + } else { + map_set(&cfg->entity_to_index, e, cast(i32)i); + cfg->universe_pm |= (cast(u64)1 << i); + } + } + } +} + +template +gb_internal void check_asm_cfg_build(AsmCtx *asm_ctx, AsmCfg *cfg, Ast *at_node, Entity *entity) { + ast_node(at, AsmTemplate, at_node); + + asm_cfg_populate_decls(asm_ctx, cfg, entity); + + cfg->insts.allocator = heap_allocator(); + cfg->blocks.allocator = heap_allocator(); + + bool need_leader = true; + + // Build basic blocks over the template body. A leader is: the first instruction, any + // instruction preceded by a label, and any instruction following a control transfer. + for (Ast *node : at->instructions) { + if (node->kind == Ast_AsmLabelDecl) { + // Every label between two instructions names the block the *next* instruction + // opens; consecutive labels share it. A trailing label maps to blocks.count. + Entity *le = node->AsmLabelDecl.name->Ident.entity; + if (le != nullptr) { + asm_cfg_label_block_index_set(le, cast(i32)cfg->blocks.count); + } + need_leader = true; + continue; + } + if (node->kind != Ast_AsmInstruction) { + continue; // directives are straight-line filler; no CFG effect + } + + AstAsmInstruction *instr = &node->AsmInstruction; + AsmInstructionFacts *facts = instr->facts; + // Prefixes and pseudo-macro ops (li/la) carry no facts and never branch. + + if (need_leader || cfg->blocks.count == 0) { + AsmBlock b = {}; + b.first = cast(i32)cfg->insts.count; + b.last = cast(i32)cfg->insts.count; + b.succs.allocator = heap_allocator(); + array_add(&cfg->blocks, b); + need_leader = false; + } + + i32 bi = cast(i32)cfg->blocks.count - 1; + i32 ii = cast(i32)cfg->insts.count; + array_add(&cfg->insts, instr); + cfg->blocks[bi].last = ii; + + if (facts != nullptr) { + facts->block_id = bi; + if (facts->is_control) { + need_leader = true; + } + } + } + + for_array(bi, cfg->blocks) { // Calculate the edges for the blocks + AsmBlock *b = &cfg->blocks[bi]; + + AstAsmInstruction *last = cfg->insts[b->last]; + AsmInstructionFacts *lf = last->facts; + + i32 branch_succ = -1; + bool fallthrough = true; + + if (lf != nullptr && lf->is_control) { + if (lf->branch_target != nullptr) { + i32 t = asm_cfg_label_block_index(lf->branch_target); + if (0 <= t && t < cast(i32)cfg->blocks.count) { + branch_succ = t; + } + // For `t == blocks.count`, this implies a jump to the implicit end, and is handled as "leaves" below + } + // e.g. jmp/ret/hlt (and, conservatively, call) do not fall through in this model. + if (lf->is_terminal) { + fallthrough = false; + } + } + + if (branch_succ >= 0) { + array_add(&b->succs, branch_succ); + } + if (fallthrough) { + i32 next = cast(i32)bi + 1; + if (next < cast(i32)cfg->blocks.count) { + array_add(&b->succs, next); + } + } + } + + if (cfg->blocks.count != 0) { // Reachability determination + Array stack = {}; + stack.allocator = heap_allocator(); + defer (array_free(&stack)); + + cfg->blocks[0].reachable = true; + array_add(&stack, cast(i32)0); + while (stack.count > 0) { + i32 bi = stack[stack.count-1]; + stack.count -= 1; + for (i32 s : cfg->blocks[bi].succs) { + if (s >= 0 && s < cast(i32)cfg->blocks.count && !cfg->blocks[s].reachable) { + cfg->blocks[s].reachable = true; + array_add(&stack, s); + } + } + } + } +} + +gb_internal bool check_asm_cfg_block_leaves(AsmCfg *cfg, i32 bi) { + AsmBlock const *b = &cfg->blocks[bi]; + AstAsmInstruction *last = cfg->insts[b->last]; + AsmInstructionFacts *lf = last->facts; + + if (lf != nullptr && lf->branch_target != nullptr) { + i32 t = asm_cfg_label_block_index(lf->branch_target); + if (t >= 0 && t >= cast(i32)cfg->blocks.count) { + return true; // 'jmp .end' — falls into the implicit return + } + } + bool terminal = (lf != nullptr) && lf->is_terminal; + if (!terminal && (bi+1 >= cast(i32)cfg->blocks.count)) { + return true; // straight-line/conditional-tail with nothing after it + } + return false; +} + +template +gb_internal void check_asm_cfg_report_undef_reg(AsmCtx *asm_ctx, AsmCfg *cfg, Entity *tmpl_entity, + AstAsmInstruction *instr, String name, u16 bit) { + char const *rname = asm_ctx->clobber_reg_bit_name(bit); + String owner = {}; + char const *role = nullptr; + + auto const &decls = tmpl_entity->AsmTemplate.decls; + for_array(i, decls) { + auto const &ed = decls[i]; + if (ed.entity == nullptr || cfg->decl_pin_bit[i] != bit) { + continue; + } + if (ed.param_group == AsmTemplateEntityDeclParamGroup_Output && ed.tie < 0) { + owner = ed.entity->token.string; + role = "output"; + break; + } + if (ed.param_group == AsmTemplateEntityDeclParamGroup_Scratch && ed.view_of < 0) { + owner = ed.entity->token.string; + role = "scratch"; + break; + } + } + if (role != nullptr) { + error(instr->name, + "'%.*s' implicitly reads %%%s, which is bound to the %s parameter '%.*s', " + "but nothing writes %%%s on all paths reaching here; write to it (e.g. into '%.*s') first", + LIT(name), rname, role, LIT(owner), rname, LIT(owner)); + } else { + error(instr->name, + "'%.*s' implicitly reads %%%s, but nothing in this template produces a value for it " + "on all paths reaching here; pin an input to %%%s, or write %%%s first", + LIT(name), rname, rname, rname); + } +} + +template +gb_internal void check_asm_cfg_analyse(AsmCtx *asm_ctx, AsmCfg *cfg, CheckerContext *ctx, Entity *entity) { + GB_ASSERT(entity->kind == Entity_AsmTemplate); + auto const &decls = entity->AsmTemplate.decls; + bool diverging = entity->type->Proc.diverging; + + if (cfg->blocks.count == 0) { + // With an empty body, the CFG cannot really do nothing + if (diverging && !cfg->saw_any_instructions) { + error(entity->token, "This 'asm' template is declared as diverging (-> !) but its body is empty and cannot diverge"); + } + return; + } + + if (decls.count > 64) { + error(entity->token, "'asm' templates cannot have more than 64 total parameter declarations, got %td", decls.count); + return; + } + u16 const REG_TOP = asm_ctx->CLOBBER_REGS_NAMED; + u16 const FLAG_TOP = cast(u16)~cast(u16)0; + + u64 const universe_pm = cfg->universe_pm; + auto bit_of = [&](Entity *e) -> u64 { + i32 *ix = map_get(&cfg->entity_to_index, e); + return ix ? (cast(u64)1 << *ix) : cast(u64)0; + }; + + // NOTE(bill): entry seed intiailization which mirrors the linear seeding of defined_regs + u16 seed_regs = 0; + u64 seed_pm = 0; + for_array(i, decls) { + auto const &ed = decls[i]; + u16 pin_bit = cfg->decl_pin_bit[i]; + if (ed.no_init) { + seed_pm |= bit_of(ed.entity); + seed_regs |= pin_bit; + } + switch (ed.param_group) { + case AsmTemplateEntityDeclParamGroup_Input: + seed_pm |= bit_of(ed.entity); + seed_regs |= pin_bit; + break; + case AsmTemplateEntityDeclParamGroup_Output: + if (ed.tie >= 0) { + seed_pm |= bit_of(ed.entity); + } + break; + } + } + + isize const n = cfg->blocks.count; + + auto in_regs = slice_make(heap_allocator(), n); defer (slice_free(&in_regs, heap_allocator())); + auto out_regs = slice_make(heap_allocator(), n); defer (slice_free(&out_regs, heap_allocator())); + auto gen_regs = slice_make(heap_allocator(), n); defer (slice_free(&gen_regs, heap_allocator())); + auto in_flags = slice_make(heap_allocator(), n); defer (slice_free(&in_flags, heap_allocator())); + auto out_flags = slice_make(heap_allocator(), n); defer (slice_free(&out_flags, heap_allocator())); + auto gen_flags = slice_make(heap_allocator(), n); defer (slice_free(&gen_flags, heap_allocator())); + auto in_pm = slice_make(heap_allocator(), n); defer (slice_free(&in_pm, heap_allocator())); + auto out_pm = slice_make(heap_allocator(), n); defer (slice_free(&out_pm, heap_allocator())); + auto gen_pm = slice_make(heap_allocator(), n); defer (slice_free(&gen_pm, heap_allocator())); + + // Sub-register width lattice + auto in_w = slice_make(heap_allocator(), n); defer (slice_free(&in_w, heap_allocator())); + auto out_w = slice_make(heap_allocator(), n); defer (slice_free(&out_w, heap_allocator())); + auto gen_w = slice_make(heap_allocator(), n); defer (slice_free(&gen_w, heap_allocator())); + + // predecessors, restricted to reachable blocks + auto preds = slice_make>(heap_allocator(), n); + for_array(i, preds) { + preds[i].allocator = heap_allocator(); + } + defer ({ + for_array(i, preds) { + array_free(&preds[i]); + } + slice_free(&preds, heap_allocator()); + }); + for_array(bi, cfg->blocks) { + AsmBlock *block = &cfg->blocks[bi]; + if (!block->reachable) { + continue; + } + for (i32 s : block->succs) { + if (0 <= s && s < cast(i32)n && + cfg->blocks[s].reachable) { + array_add(&preds[s], cast(i32)bi); + } + } + } + + for_array(bi, cfg->blocks) { + u16 gr = 0; + u16 gf = 0; + u64 gp = 0; + AsmRegW gw = {}; + + AsmBlock const &b = cfg->blocks[bi]; + for (i32 ii = b.first; ii <= b.last; ii++) { + AsmInstructionFacts *f = cfg->insts[ii]->facts; + if (f == nullptr) { + continue; + } + gr |= f->gen_regs; + gf |= f->gen_flags; + for (Entity *pe : f->gen_params) { + gp |= bit_of(pe); + } + for (int w_idx = 0; w_idx < ASM_WIDTH_REG_COUNT; w_idx++) { + u8 w = f->gen_reg_w.e[w_idx]; + if (w != 0) { + gw.e[w_idx] = asm_reg_def_width_after(gw.e[w_idx], w); + } + } + } + gen_regs [bi] = gr; + gen_flags[bi] = gf; + gen_pm [bi] = gp; + gen_w [bi] = gw; + } + + // NOTE(bill): initialize the blocks + // entry is from the seeds and every other reachable block from TOP (intersection) + for_array(bi, cfg->blocks) { + if (!cfg->blocks[bi].reachable) { + continue; + } + if (bi == 0) { + in_regs [bi] = seed_regs; + in_pm [bi] = seed_pm; + in_flags[bi] = 0; // no flag is defined at the template entry point + } else { + in_regs [bi] = REG_TOP; + in_pm [bi] = universe_pm; + in_flags[bi] = FLAG_TOP; + } + out_regs [bi] = in_regs [bi] | gen_regs [bi]; + out_pm [bi] = in_pm [bi] | gen_pm [bi]; + out_flags[bi] = in_flags[bi] | gen_flags[bi]; + } + + // forward must-analysis: in = AND(preds.out); out = in | gen. Iterate to fixpoint. + bool changed = true; + while (changed) { + changed = false; + for_array(bi, cfg->blocks) { + if (!cfg->blocks[bi].reachable) { + continue; + } + + u16 nin_r = seed_regs; + u16 nin_f = 0; + u64 nin_p = seed_pm; + if (bi != 0) { + nin_r = REG_TOP; + nin_f = FLAG_TOP; + nin_p = universe_pm; + for (i32 p : preds[bi]) { + nin_r &= out_regs[p]; + nin_f &= out_flags[p]; + nin_p &= out_pm[p]; + } + } + u16 nout_r = nin_r | gen_regs[bi]; + u64 nout_p = nin_p | gen_pm[bi]; + u16 nout_f = nin_f | gen_flags[bi]; + + if (nin_r != in_regs [bi] || + nin_p != in_pm [bi] || + nin_f != in_flags [bi] || + nout_r != out_regs [bi] || + nout_p != out_pm [bi] || + nout_f != out_flags[bi]) { + in_regs [bi] = nin_r; + in_pm [bi] = nin_p; + in_flags [bi] = nin_f; + out_regs [bi] = nout_r; + out_pm [bi] = nout_p; + out_flags[bi] = nout_f; + changed = true; + } + } + } + + for_array(bi, cfg->blocks) { + if (!cfg->blocks[bi].reachable) { + continue; + } + in_w[bi] = {}; + for (i32 idx = 0; idx < ASM_WIDTH_REG_COUNT; idx++) { + out_w[bi].e[idx] = gb_max(in_w[bi].e[idx], gen_w[bi].e[idx]); + } + } + changed = true; + while (changed) { + changed = false; + for_array(bi, cfg->blocks) { + if (!cfg->blocks[bi].reachable) { + continue; + } + AsmRegW nin = {}; + AsmRegW nout = {}; + + auto const &pred = preds[bi]; + + if (bi != 0) { + for (i32 idx = 0; idx < ASM_WIDTH_REG_COUNT; idx++) { + nin.e[idx] = 64; + } + if (pred.count == 0) { + // unreachable-by-preds guard + // just zero it out + nin = {}; + } + for (i32 p : pred) { + for (i32 idx = 0; idx < ASM_WIDTH_REG_COUNT; idx++) { + nin.e[idx] = gb_min(nin.e[idx], out_w[p].e[idx]); + } + } + } + for (i32 idx = 0; idx < ASM_WIDTH_REG_COUNT; idx++) { + nout.e[idx] = gb_max(nin.e[idx], gen_w[bi].e[idx]); + } + if (gb_memcompare(&nin, &in_w [bi], gb_size_of(AsmRegW)) != 0 || + gb_memcompare(&nout, &out_w[bi], gb_size_of(AsmRegW)) != 0) { + in_w [bi] = nin; + out_w[bi] = nout; + changed = true; + } + } + } + + // NOTE(bill): publish the register masks and materialise the parameter sets onto the blocks + for_array(bi, cfg->blocks) { + AsmBlock *b = &cfg->blocks[bi]; + b->in_defs = in_regs [bi]; + b->out_defs = out_regs [bi]; + b->in_flags = in_flags [bi]; + b->out_flags = out_flags[bi]; + if (!b->reachable) { + continue; + } + for_array(i, decls) { + Entity *e = decls[i].entity; + if (e == nullptr) { + continue; + } + if (((in_pm[bi] >> i) & 1) != 0) { + ptr_set_add(&b->in_params, e); + } + if (((out_pm[bi] >> i) & 1) != 0) { + ptr_set_add(&b->out_params, e); + } + } + } + { + auto block_is_targeted = slice_make(heap_allocator(), cfg->blocks.count); + defer (slice_free(&block_is_targeted, heap_allocator())); + + for_array(bi, cfg->blocks) { + AstAsmInstruction *last = cfg->insts[cfg->blocks[bi].last]; + AsmInstructionFacts *lf = last->facts; + if (lf != nullptr && lf->branch_target != nullptr) { + i32 t = asm_cfg_label_block_index(lf->branch_target); + if (0 <= t && t < cast(i32)cfg->blocks.count) { + block_is_targeted[t] = true; + } + } + } + + // NOTE(bill): unreachable code + for_array(bi, cfg->blocks) { + AsmBlock const &block = cfg->blocks[bi]; + if (block.reachable) { + continue; + } + AstAsmInstruction *first = cfg->insts[block.first]; + char const *plural = (block.first == block.last) ? "instruction is" : "instructions are"; + if (block_is_targeted[bi]) { + warning(first->name, "The asm %s unreachable: this block is only reached from code that is itself unreachable", plural); + } else { + warning(first->name, "The asm %s unreachable: no branch targets it and control cannot fall through from above (e.g. it follows an unconditional jump, return, or halt)", plural); + } + } + } + + { // NOTE(bill): read-before-write, definite-assignment across the whole CFG + PtrSet reported_params = {}; + defer (ptr_set_destroy(&reported_params)); + + u16 reported_regs = 0; + u16 reported_flags = 0; + + for_array(bi, cfg->blocks) { + AsmBlock const &b = cfg->blocks[bi]; + if (!b.reachable) { + continue; + } + + u16 run_regs = in_regs [bi]; + u16 run_flags = in_flags[bi]; + u64 run_pm = in_pm [bi]; + AsmRegW run_w = in_w [bi]; + + + for (i32 ii = b.first; ii <= b.last; ii++) { + AstAsmInstruction *instr = cfg->insts[ii]; + AsmInstructionFacts *f = instr->facts; + if (f == nullptr) { + continue; + } + + u16 undef = f->read_regs & REG_TOP & ~run_regs & ~reported_regs; + for (u16 bit = 1; bit != 0; bit <<= 1) { + if ((undef & bit) == 0) { + continue; + } + reported_regs |= bit; + check_asm_cfg_report_undef_reg(asm_ctx, cfg, entity, instr, f->name, bit); + } + + u16 undef_flags = f->read_flags & ~run_flags & ~reported_flags; + if (undef_flags != 0) { + reported_flags |= undef_flags; + + gbString flag_strs = gb_string_make(heap_allocator(), ""); + defer (gb_string_free(flag_strs)); + + isize count = 0; + for (u16 bit = 1; bit != 0; bit <<= 1) { + if (bit & undef_flags) { + if (count++ > 0) { + flag_strs = gb_string_appendc(flag_strs, ", "); + } + char const *f = asm_ctx->clobber_flag_bit_name(bit); + flag_strs = gb_string_appendc(flag_strs, "%flags."); + flag_strs = gb_string_appendc(flag_strs, f); + } + } + + char const *plural = "a status flag"; + if (count > 0) { + plural = "status flags"; + } + + error(instr->name, + "'%.*s' reads %s (%s) that is not set on all paths reaching here; " + "a flag-setting instruction (e.g. 'cmp', 'test') must precede it on every path", + LIT(f->name), plural, flag_strs); + } + + // Sub-register width + for (i32 w_idx = 0; w_idx < ASM_WIDTH_REG_COUNT; w_idx++) { + u8 rw = f->read_reg_w.e[w_idx]; + if (rw == 0) { + continue; + } + u16 bit = cast(u16)(1u << w_idx); + if ((reported_regs & bit) != 0) { + continue; + } + if (run_w.e[w_idx] < rw) { + reported_regs |= bit; + + char const *rname = asm_ctx->clobber_reg_bit_name(bit); + error(instr->name, + "'%.*s' reads %s at %u-bit width but only its low %u bits are defined on all paths here; " + "write the full register first (e.g. zero-extend, or a full-width or 32-bit-zeroing write)", + LIT(f->name), rname, cast(unsigned)rw, cast(unsigned)run_w.e[w_idx]); + } + } + + for (Entity *pe : f->read_params) { + i32 *ix = map_get(&cfg->entity_to_index, pe); + if (ix == nullptr) { + continue; + } + if (((run_pm >> *ix) & 1) == 0 && !ptr_set_exists(&reported_params, pe)) { + Ast *loc = instr->name; + for (Ast *op : instr->operands) { + if (entity_of_node(op) == pe) { + loc = op; + break; + } + } + error(loc, "'%.*s' reads '%.*s' before it is assigned; its initial value is undefined", LIT(f->name), LIT(pe->token.string)); + ptr_set_add(&reported_params, pe); + } + } + + run_regs |= f->gen_regs; + run_flags |= f->gen_flags; + for (i32 w_idx = 0; w_idx < ASM_WIDTH_REG_COUNT; w_idx++) { + u8 gw = f->gen_reg_w.e[w_idx]; + if (gw != 0) { + run_w.e[w_idx] = asm_reg_def_width_after(run_w.e[w_idx], gw); + } + } + for (Entity *pe : f->gen_params) { + run_pm |= bit_of(pe); + } + + } + } + } + + { // NOTE(bill): Collect the template's return points reachable blocks that leave via the end + u16 exit_regs = REG_TOP; + u64 exit_pm = universe_pm; + u16 exit_flags = FLAG_TOP; + bool any_exit = false; + for_array(bi, cfg->blocks) { + if (!cfg->blocks[bi].reachable) { + continue; + } + if (!check_asm_cfg_block_leaves(cfg, cast(i32)bi)) { + continue; + } + any_exit = true; + exit_regs &= out_regs [bi]; + exit_pm &= out_pm [bi]; + exit_flags &= out_flags[bi]; + } + + // NOTE(bill): Outputs must be assigned on every path that returns + if (any_exit && !diverging) { + for_array(i, decls) { + auto const &ed = decls[i]; + if (ed.param_group != AsmTemplateEntityDeclParamGroup_Output) { + continue; + } + if (ed.tie >= 0 || ed.no_init) { + continue; + } + + bool written = false; + u16 flag_bit = asm_decl_resolve_flag_bit(asm_ctx, ed); + u16 reg_bit = cfg->decl_pin_bit[i]; + if (flag_bit != 0) { + // Flag-pinned output: defined iff the pinned flag is set on every returning path. + written = (exit_flags & flag_bit) != 0; + } else if (reg_bit != 0) { + written = (exit_regs & reg_bit) != 0; + } else { + written = (exit_pm & bit_of(ed.entity)) != 0; + } + if (!written) { + error(ed.entity->token, + "'asm' output parameter '%.*s' is not assigned on all paths through this template; " + "its value is undefined", + LIT(ed.entity->token.string)); + } + } + } + } + + if (diverging) { // No reachable path may return / fall off the end + bool any_leak = false; + for_array(bi, cfg->blocks) { + if (cfg->blocks[bi].reachable && check_asm_cfg_block_leaves(cfg, cast(i32)bi)) { + any_leak = true; + break; + } + } + if (any_leak) { + error(entity->token, + "This 'asm' template is declared diverging (-> !) but a reachable path can fall through the end; " + "end every path with an unconditional jump, return, or halt"); + } + } else { + // Not declared diverging: no reachable block leaves => control never returns + bool any_exit = false; + for_array(bi, cfg->blocks) { + auto const &block = cfg->blocks[bi]; + if (block.reachable && check_asm_cfg_block_leaves(cfg, cast(i32)bi)) { + any_exit = true; + break; + } + } + if (!any_exit) { + // Distinguish an unconditional self-loop (jmp to own block, no other exit edge) + // from the general no-returning-path case. + i32 self_loop_bi = -1; + for_array(bi, cfg->blocks) { + AsmBlock const &b = cfg->blocks[bi]; + if (!b.reachable) { + continue; + } + bool loops_to_self = false; + for (i32 s : b.succs) { + if (s == cast(i32)bi) { + loops_to_self = true; + break; + } + } + if (loops_to_self && b.succs.count == 1) { + self_loop_bi = cast(i32)bi; + break; + } + } + + if (self_loop_bi >= 0) { + AstAsmInstruction *first = cfg->insts[cfg->blocks[self_loop_bi].first]; + error(first->name, + "This asm instruction forms an unconditional self-loop and can never exit; " + "if the template is meant never to return, declare it diverging (-> !)"); + } else { + error(entity->token, + "This 'asm' template has no reachable path that returns or falls through the end; " + "if this is intended, declare it diverging (-> !)"); + } + } + } +} + +// Backward liveness: a value is live at a point if some path from there reads it before overwriting it. +// Dual of the forward definite-assignment pass. +// Used to find dead writes (a definition never read before being overwritten or before template exit). +// +// NOTE(bill): only set `emit_dead_writes` to be true when all instructions are "good". +template +gb_internal bool check_asm_cfg_liveness(AsmCtx *asm_ctx, AsmCfg *cfg, Entity *entity, bool emit_dead_writes) { + isize const n = cfg->blocks.count; + if (n == 0) { + return false; + } + + u16 const REG_TOP = asm_ctx->CLOBBER_REGS_NAMED; + + u16 exit_live = 0; + u16 output_regs = 0; + for_array(i, entity->AsmTemplate.decls) { + auto const &ed = entity->AsmTemplate.decls[i]; + if (ed.param_group == AsmTemplateEntityDeclParamGroup_Output) { + exit_live |= cfg->decl_pin_bit[i]; // pinned/view-inherited output reg, if any + output_regs |= cfg->decl_pin_bit[i]; + } + } + for (String const ® : entity->AsmTemplate.clobber_registers_set) { + exit_live |= asm_ctx->clobber_bit_for_reg_name(reg); + } + + auto live_in = slice_make(heap_allocator(), n); defer (slice_free(&live_in, heap_allocator())); + auto live_out = slice_make(heap_allocator(), n); defer (slice_free(&live_out, heap_allocator())); + + bool changed = true; + while (changed) { + changed = false; + // Iterate in reverse for faster convergence + for (isize bi = n - 1; bi >= 0; bi--) { + if (!cfg->blocks[bi].reachable) { + continue; + } + AsmBlock const &b = cfg->blocks[bi]; + + // live_out = union of successors' live_in, plus exit_live if this block leaves. + u16 lo = 0; + for (i32 s : b.succs) { + if (0 <= s && s < cast(i32)n && cfg->blocks[s].reachable) { + lo |= live_in[s]; + } + } + if (check_asm_cfg_block_leaves(cfg, cast(i32)bi)) { + lo |= exit_live; + } + + u16 live = lo; + for (i32 ii = b.last; ii >= b.first; ii--) { + AsmInstructionFacts *f = cfg->insts[ii]->facts; + if (f == nullptr) { + continue; + } + live = (live & ~asm_full_kill_mask(f)) | (f->read_regs & REG_TOP); + } + + if (lo != live_out[bi] || live != live_in[bi]) { + live_out[bi] = lo; + live_in[bi] = live; + changed = true; + } + } + } + + for_array(bi, cfg->blocks) { + cfg->blocks[bi].live_in_regs = live_in[bi]; + cfg->blocks[bi].live_out_regs = live_out[bi]; + } + + if (!emit_dead_writes) { + // Lattice has been computed but no diagnostic until the read facts are validated + return false; + } + + // Dead-write detection: walk each block forward, tracking live-out per instruction. + // A written reg that is not live immediately after the write (and not re-read in + // this same instruction) is dead. + for_array(bi, cfg->blocks) { + AsmBlock const &b = cfg->blocks[bi]; + if (!b.reachable) { + continue; + } + // recompute per-instruction live-out by replaying the transfer from block live_out + // (cheap: block is short). Build an array of live-after-each-instruction. + u16 live = live_out[bi]; + if (check_asm_cfg_block_leaves(cfg, cast(i32)bi)) { + live |= exit_live; // already folded above, but harmless + } + for (i32 ii = b.last; ii >= b.first; ii--) { + AsmInstructionFacts *f = cfg->insts[ii]->facts; + if (f == nullptr) { + continue; + } + u16 live_after = live; + // A register this instruction writes but that is not live afterward, + // and that it does not itself read (self-use like `xor r,r` or `add r,x`) is a dead write. + u16 kill = asm_full_kill_mask(f); + u16 dead = kill & ~live_after & ~f->read_regs; + for (u16 bit = 1; bit != 0; bit <<= 1) { + if ((dead & bit) == 0) { + continue; + } + if ((bit & output_regs) != 0) { + warning(f->node->name, + "'%.*s' writes output register %%%s, but that value is overwritten before the template returns; " + "the output's final value does not come from this instruction", + LIT(f->name), asm_ctx->clobber_reg_bit_name(bit)); + } else { + warning(f->node->name, + "'%.*s' writes %%%s but its value is never read before being overwritten or the template ends", + LIT(f->name), asm_ctx->clobber_reg_bit_name(bit)); + } + } + live = (live & ~kill) | (f->read_regs & REG_TOP); + } + } + + return true; +} \ No newline at end of file diff --git a/src/check_expr.cpp b/src/check_expr.cpp index 091ebdac2..5175ef58c 100644 --- a/src/check_expr.cpp +++ b/src/check_expr.cpp @@ -7008,6 +7008,18 @@ gb_internal CallArgumentError check_call_arguments_internal(CheckerContext *c, A } } + // an `asm` template's `$` parameter is encoded as an immediate, so only a constant can reach it + if (e && e->kind == Entity_Variable && (e->flags & EntityFlag_PolyConst)) { + if (o->mode != Addressing_Constant) { + if (show_error) { + gbString str = expr_to_string(o->expr); + error(o->expr, "Expected a constant value for the '$' immediate '%.*s', got %s", LIT(e->token.string), str); + gb_string_free(str); + } + err = CallArgumentError_NoneConstantParameter; + } + } + if (e && e->kind == Entity_Constant && is_type_proc(e->type)) { bool ok = false; if (o->mode == Addressing_Constant) { @@ -13894,6 +13906,10 @@ gb_internal gbString write_expr_to_string(gbString str, Ast *node, bool shorthan str = gb_string_appendc(str, " = "); str = write_expr_to_string(str, spec->value, shorthand); } + for (Ast *dir : spec->directives) { + str = gb_string_appendc(str, " "); + str = write_expr_to_string(str, dir, shorthand); + } case_end; case_ast_node(clobber, AsmClobber, node); diff --git a/src/entity.cpp b/src/entity.cpp index e21ec4483..95b5bf6b7 100644 --- a/src/entity.cpp +++ b/src/entity.cpp @@ -196,6 +196,8 @@ struct AsmTemplateEntityDecl { i32 view_of; // total_index of the source operand this is a width-view of, else -1 i32 view_bits; // the view width in bits, otherwise 0 + + bool no_init; }; // An Entity is a named "thing" in the language @@ -340,11 +342,14 @@ struct Entity { String name; Ast *node; Ast *parent; + + i32 asm_block_index; } Label; struct { Ast *node; bool is_volatile; bool is_align_stack; + bool is_pure; bool has_observable_side_effect; @@ -574,6 +579,7 @@ gb_internal Entity *alloc_entity_label(Scope *scope, Token token, Type *type, As Entity *entity = alloc_entity(Entity_Label, scope, token, type); entity->Label.node = node; entity->Label.parent = parent; + entity->Label.asm_block_index = -1; entity->state = EntityState_Resolved; return entity; } diff --git a/src/llvm_backend.cpp b/src/llvm_backend.cpp index 07f118f20..6ff3d182a 100644 --- a/src/llvm_backend.cpp +++ b/src/llvm_backend.cpp @@ -2438,6 +2438,7 @@ gb_internal WORKER_TASK_PROC(lb_llvm_function_pass_per_module) { lbFunctionPassManagerKind pass_manager_kind = lbFunctionPassManager_default; if (p->flags & lbProcedureFlag_WithoutMemcpyPass) { pass_manager_kind = lbFunctionPassManager_default_without_memcpy; + lb_remove_attribute_from_proc(p->module, p->value, "optsize"); // incompatible with optnone lb_add_attribute_to_proc(p->module, p->value, "optnone"); lb_add_attribute_to_proc(p->module, p->value, "noinline"); } else { @@ -3163,10 +3164,9 @@ gb_internal bool lb_generate_code(lbGenerator *gen) { gbString llvm_features = gb_string_make(temporary_allocator(), ""); String_Iterator it = {build_context.target_features_string, 0}; + String str = {}; bool first = true; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + while (string_split_iterator_next(&it, ',', &str)) { if (!first) { llvm_features = gb_string_appendc(llvm_features, ","); } diff --git a/src/llvm_backend_expr.cpp b/src/llvm_backend_expr.cpp index 74cb46ceb..dbca83803 100644 --- a/src/llvm_backend_expr.cpp +++ b/src/llvm_backend_expr.cpp @@ -322,6 +322,21 @@ gb_internal IntegerDivisionByZeroKind lb_check_for_integer_division_by_zero_beha } +// LLVM has srem(min(Integer_Type), -1) as UB and it raises an FP exception on a hardware +// divide, yet `x % -1` is 0 for every x; `x srem 1` is 0 too and cannot trap, so a runtime +// -1 divisor can be swapped for 1. Vectorizable. +gb_internal LLVMValueRef lb_srem_safe_divisor(lbProcedure *p, LLVMValueRef rhs) { + LLVMValueRef minus_one = LLVMConstAllOnes(LLVMTypeOf(rhs)); + // build 1 as neg(-1), this folds for both scalars and vectors + LLVMValueRef one = LLVMBuildNeg(p->builder, minus_one, ""); + if (LLVMIsAConstantInt(rhs)) { + return rhs == minus_one ? one : rhs; + } + LLVMValueRef is_minus_one = LLVMBuildICmp(p->builder, LLVMIntEQ, rhs, minus_one, ""); + return LLVMBuildSelect(p->builder, is_minus_one, one, rhs, ""); +} + + // implements %% (the remainder/floored mod operator) on signed integers; // this is branchless and vectorizable, so it also covers vectors gb_internal LLVMValueRef lb_emit_signed_floor_mod(lbProcedure *p, LLVMValueRef lhs, LLVMValueRef rhs) { @@ -329,24 +344,11 @@ gb_internal LLVMValueRef lb_emit_signed_floor_mod(lbProcedure *p, LLVMValueRef l // and works for arbitrary precision integers, but the add can wrap at finite precision // the Odin spec mandates min(Integer_Type) %% -1 must be 0, - // but LLVM has srem(min(Integer_Type), -1) as UB and results in FP exception; - // since x %% -1 == 0 for every x, a constant rhs = -1 can fold, - // and a runtime -1 can be swapped with 1 (x srem 1 is 0 for every x, no exceptions) - LLVMValueRef minus_one = LLVMConstAllOnes(LLVMTypeOf(rhs)); - LLVMValueRef safe_rhs = rhs; - if (LLVMIsAConstantInt(rhs)) { - if (rhs == minus_one) { - return LLVMConstNull(LLVMTypeOf(rhs)); // the entire %% op folds to 0 - } - } else { - // safe_rhs = (rhs == -1) ? 1 : rhs - // vectorizable construction, - // build 1 as neg(-1), this folds for both scalars and vectors - LLVMValueRef one = LLVMBuildNeg(p->builder, minus_one, ""); - LLVMValueRef is_minus_one = LLVMBuildICmp(p->builder, LLVMIntEQ, rhs, minus_one, ""); - safe_rhs = LLVMBuildSelect(p->builder, is_minus_one, one, rhs, ""); + // a constant rhs = -1 can fold the whole operation, a runtime one is handled by the swap + if (LLVMIsAConstantInt(rhs) && rhs == LLVMConstAllOnes(LLVMTypeOf(rhs))) { + return LLVMConstNull(LLVMTypeOf(rhs)); // the entire %% op folds to 0 } - LLVMValueRef r = LLVMBuildSRem(p->builder, lhs, safe_rhs, ""); + LLVMValueRef r = LLVMBuildSRem(p->builder, lhs, lb_srem_safe_divisor(p, rhs), ""); // srem truncs to 0, so r needs a +rhs correction when the operands signs differ (and r != 0) // so we implement // r = lhs % rhs @@ -498,9 +500,10 @@ gb_internal bool lb_try_direct_vector_arith(lbProcedure *p, TokenKind op, lbValu } break; case Token_Mod: - { - auto *call = is_type_unsigned(integral_type) ? LLVMBuildURem : LLVMBuildSRem; - z = call(p->builder, x, y, ""); + if (is_type_unsigned(integral_type)) { + z = LLVMBuildURem(p->builder, x, y, ""); + } else { + z = LLVMBuildSRem(p->builder, x, lb_srem_safe_divisor(p, y), ""); } break; case Token_ModMod: @@ -610,9 +613,10 @@ gb_internal bool lb_try_direct_vector_arith(lbProcedure *p, TokenKind op, lbValu } break; case Token_Mod: - { - auto *call = is_type_unsigned(integral_type) ? LLVMBuildURem : LLVMBuildSRem; - z = call(p->builder, x, y, ""); + if (is_type_unsigned(integral_type)) { + z = LLVMBuildURem(p->builder, x, y, ""); + } else { + z = LLVMBuildSRem(p->builder, x, lb_srem_safe_divisor(p, y), ""); } break; case Token_ModMod: @@ -1684,7 +1688,8 @@ gb_internal LLVMValueRef lb_integer_modulo(lbProcedure *p, LLVMValueRef lhs, LLV if (is_unsigned) { return LLVMBuildURem(p->builder, lhs, rhs, ""); } else { - return LLVMBuildSRem(p->builder, lhs, rhs, ""); + // min(Integer_Type) % -1 is 0, matching the constant folder, and must not trap + return LLVMBuildSRem(p->builder, lhs, lb_srem_safe_divisor(p, rhs), ""); } } }; @@ -2407,6 +2412,13 @@ gb_internal lbValue lb_emit_conv(lbProcedure *p, lbValue value, Type *t) { // boolean -> boolean/integer if (is_type_boolean(src) && (is_type_boolean(dst) || is_type_integer(dst))) { LLVMValueRef b = LLVMBuildICmp(p->builder, LLVMIntNE, value.value, LLVMConstNull(lb_type(m, value.type)), ""); + if (type_size_of(default_type(dst)) > 1 && is_type_different_to_arch_endianness(dst)) { + Type *platform_dst_type = integer_endian_type_to_platform_type(dst); + lbValue res = {}; + res.value = LLVMBuildIntCast2(p->builder, b, lb_type(m, platform_dst_type), false, ""); + res.type = t; + return lb_emit_byte_swap(p, res, t); + } lbValue res = {}; res.value = LLVMBuildIntCast2(p->builder, b, lb_type(m, t), false, ""); res.type = t; @@ -3860,6 +3872,24 @@ gb_internal lbValue lb_emit_comp(lbProcedure *p, TokenKind op_kind, lbValue left rhs = lb_emit_byte_swap(p, {rhs, pt}, pt).value; } + if (is_type_boolean(a) && is_type_boolean(b) && (op_kind == Token_CmpEq || op_kind == Token_NotEq)) { + // anything not 0 is true, which is what control flow already tests for + bool lhs_is_const = LLVMIsAConstantInt(lhs) != nullptr; + bool rhs_is_const = LLVMIsAConstantInt(rhs) != nullptr; + if (lhs_is_const != rhs_is_const) { + // against a literal, the truthiness test is the whole comparison + LLVMValueRef v = rhs_is_const ? lhs : rhs; + LLVMValueRef c = rhs_is_const ? rhs : lhs; + bool is_true = LLVMConstIntGetZExtValue(c) != 0; + pred = ((op_kind == Token_CmpEq) == is_true) ? LLVMIntNE : LLVMIntEQ; + lhs = v; + rhs = LLVMConstNull(LLVMTypeOf(v)); + } else { + lhs = LLVMBuildICmp(p->builder, LLVMIntNE, lhs, LLVMConstNull(LLVMTypeOf(lhs)), ""); + rhs = LLVMBuildICmp(p->builder, LLVMIntNE, rhs, LLVMConstNull(LLVMTypeOf(rhs)), ""); + } + } + res.value = LLVMBuildICmp(p->builder, pred, lhs, rhs, ""); } else if (is_type_float(a)) { LLVMRealPredicate pred = {}; diff --git a/src/llvm_backend_general.cpp b/src/llvm_backend_general.cpp index 5c77e58df..17b41cfad 100644 --- a/src/llvm_backend_general.cpp +++ b/src/llvm_backend_general.cpp @@ -3033,6 +3033,10 @@ gb_internal void lb_add_attribute_to_proc(lbModule *m, LLVMValueRef proc_value, LLVMAddAttributeAtIndex(proc_value, LLVMAttributeIndex_FunctionIndex, lb_create_enum_attribute(m->ctx, name, value)); } +gb_internal void lb_remove_attribute_from_proc(lbModule *m, LLVMValueRef proc_value, char const *name) { + LLVMRemoveEnumAttributeAtIndex(proc_value, LLVMAttributeIndex_FunctionIndex, LLVMGetEnumAttributeKindForName(name, gb_strlen(name))); +} + gb_internal bool lb_proc_has_attribute(lbModule *m, LLVMValueRef proc_value, char const *name) { LLVMAttributeRef ref = LLVMGetEnumAttributeAtIndex(proc_value, LLVMAttributeIndex_FunctionIndex, LLVMGetEnumAttributeKindForName(name, gb_strlen(name))); return ref != nullptr; diff --git a/src/llvm_backend_proc.cpp b/src/llvm_backend_proc.cpp index 4c7a0fb44..f7e4ebe69 100644 --- a/src/llvm_backend_proc.cpp +++ b/src/llvm_backend_proc.cpp @@ -213,16 +213,22 @@ gb_internal lbProcedure *lb_create_procedure(lbModule *m, Entity *entity, bool i case ProcedureOptimizationMode_FavorSize: lb_add_attribute_to_proc(m, p->value, "optsize"); break; + default: + // need optsize per proc for -o:size; + // (inliner, unroller, vectorizer, etc check it) + if (build_context.optimization_level == OptimizationLevel_Size) { + lb_add_attribute_to_proc(m, p->value, "optsize"); + } + break; } if (pt->Proc.enable_target_feature.len != 0) { gbString feature_str = gb_string_make(temporary_allocator(), ""); String_Iterator it = {pt->Proc.enable_target_feature, 0}; + String str = {}; bool first = true; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + while (string_split_iterator_next(&it, ',', &str)) { bool add_prefix = !(string_starts_with(str, '+') || string_starts_with(str, '-')); if (!first) { feature_str = gb_string_appendc(feature_str, ","); diff --git a/src/main.cpp b/src/main.cpp index 84ec22bdf..8785be9c0 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -1455,12 +1455,8 @@ gb_internal bool parse_build_flags(Array args) { GB_ASSERT(value.kind == ExactValue_String); String val = value.value_string; String_Iterator it = {val, 0}; - for (;;) { - String pkg = string_split_iterator(&it, ','); - if (pkg.len == 0) { - break; - } - + String pkg = {}; + while (string_split_iterator_next(&it, ',', &pkg)) { pkg = string_trim_whitespace(pkg); if (!string_is_valid_identifier(pkg)) { gb_printf_err("-%.*s '%.*s' must be a valid identifier\n", LIT(name), LIT(pkg)); @@ -1478,12 +1474,8 @@ gb_internal bool parse_build_flags(Array args) { GB_ASSERT(value.kind == ExactValue_String); String val = value.value_string; String_Iterator it = {val, 0}; - for (;;) { - String attr = string_split_iterator(&it, ','); - if (attr.len == 0) { - break; - } - + String attr = {}; + while (string_split_iterator_next(&it, ',', &attr)) { attr = string_trim_whitespace(attr); if (!string_is_valid_identifier(attr)) { gb_printf_err("-%.*s '%.*s' must be a valid identifier\n", LIT(name), LIT(attr)); @@ -4166,9 +4158,8 @@ int main(int arg_count, char const **arg_ptr) { } else { String march_list = target_microarch_list[build_context.metrics.arch]; String_Iterator it = {march_list, 0}; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + String str = {}; + while (string_split_iterator_next(&it, ',', &str)) { if (str == build_context.microarch) { // Found matching microarch print_microarch_list = false; @@ -4193,9 +4184,8 @@ int main(int arg_count, char const **arg_ptr) { String march_list = target_microarch_list[build_context.metrics.arch]; String_Iterator it = {march_list, 0}; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + String str = {}; + while (string_split_iterator_next(&it, ',', &str)) { if (str == default_march) { gb_printf("\t%.*s (default)\n", LIT(str)); } else { @@ -4209,9 +4199,8 @@ int main(int arg_count, char const **arg_ptr) { String default_features = get_default_features(); { String_Iterator it = {default_features, 0}; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + String str = {}; + while (string_split_iterator_next(&it, ',', &str)) { string_set_add(&build_context.target_features_set, str); } } @@ -4231,10 +4220,8 @@ int main(int arg_count, char const **arg_ptr) { if (build_context.target_features_string.len != 0) { String_Iterator target_it = {build_context.target_features_string, 0}; - for (;;) { - String item = string_split_iterator(&target_it, ','); - if (item == "") break; - + String item = {}; + while (string_split_iterator_next(&target_it, ',', &item)) { String stripped_item = item; if (*stripped_item.text == '+' || *stripped_item.text == '-') { stripped_item.text++; @@ -4251,9 +4238,8 @@ int main(int arg_count, char const **arg_ptr) { String feature_list = target_features_list[build_context.metrics.arch]; String_Iterator it = {feature_list, 0}; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + String str = {}; + while (string_split_iterator_next(&it, ',', &str)) { if (check_single_target_feature_is_valid(default_features, str)) { if (has_ansi_terminal_colours()) { gb_printf("\t%.*s\x1b[38;5;244m (implied by target microarch %.*s)\x1b[0m\n", LIT(str), LIT(march)); diff --git a/src/name_canonicalization.cpp b/src/name_canonicalization.cpp index 97f10e0f8..f6243025a 100644 --- a/src/name_canonicalization.cpp +++ b/src/name_canonicalization.cpp @@ -674,6 +674,17 @@ gb_internal void write_canonical_entity_name(TypeWriter *w, Entity *e) { write_scope_index_suffix = true; } + goto write_base_name; + } else if (s->decl_info != nullptr && s->decl_info->proc_lit != nullptr) { + Ast *proc_lit = s->decl_info->proc_lit; + String file_name = filename_without_directory(proc_lit->file()->fullpath); + type_writer_append(w, e->pkg->name.text, e->pkg->name.len); + type_writer_append_fmt(w, CANONICAL_NAME_SEPARATOR CANONICAL_ANON_PREFIX "_%.*s:%d" CANONICAL_NAME_SEPARATOR, + LIT(file_name), ast_token(proc_lit).pos.offset); + if (e->scope->index > 0) { + write_scope_index_suffix = true; + } + goto write_base_name; } else if ((s->flags & ScopeFlag_File) && s->file != nullptr) { String file_name = filename_without_directory(s->file->fullpath); diff --git a/src/parser.cpp b/src/parser.cpp index d9d07cf57..43fbea7c9 100644 --- a/src/parser.cpp +++ b/src/parser.cpp @@ -533,10 +533,11 @@ gb_internal Ast *clone_ast(Ast *node, AstFile *f) { case Ast_AsmRegister: break; case Ast_AsmSpec: - n->AsmSpec.name = clone_ast(n->AsmSpec.name, f); - n->AsmSpec.tied_name = clone_ast(n->AsmSpec.tied_name, f); - n->AsmSpec.type = clone_ast(n->AsmSpec.type, f); - n->AsmSpec.value = clone_ast(n->AsmSpec.value, f); + n->AsmSpec.name = clone_ast(n->AsmSpec.name, f); + n->AsmSpec.tied_name = clone_ast(n->AsmSpec.tied_name, f); + n->AsmSpec.type = clone_ast(n->AsmSpec.type, f); + n->AsmSpec.value = clone_ast(n->AsmSpec.value, f); + n->AsmSpec.directives = clone_ast_array(n->AsmSpec.directives, f); break; case Ast_AsmClobber: n->AsmClobber.value = clone_ast(n->AsmClobber.value, f); @@ -547,6 +548,7 @@ gb_internal Ast *clone_ast(Ast *node, AstFile *f) { case Ast_AsmInstruction: n->AsmInstruction.name = clone_ast(n->AsmInstruction.name, f); n->AsmInstruction.operands = clone_ast_array(n->AsmInstruction.operands, f); + n->AsmInstruction.facts = nullptr; break; case Ast_AsmMemoryOperand: n->AsmMemoryOperand.segment_override = clone_ast(n->AsmMemoryOperand.segment_override, f); @@ -2694,6 +2696,60 @@ gb_internal Ast *parse_asm_signature(AstFile *f, Token asm_token) { return ast_proc_type(f, asm_token, params, results, tags, cc, is_generic, diverging); } +gb_internal Ast *parse_asm_spec(AstFile *f) { + Ast *name = parse_ident(f); + Ast *tied_name = nullptr; + Ast *type = nullptr; + Ast *value = nullptr; + if (allow_token(f, Token_ArrowRight)) { + tied_name = parse_ident(f); + } + if (allow_token(f, Token_Colon)) { + type = parse_type(f); + } + if (allow_token(f, Token_Eq)) { + if (f->curr_token.kind == Token_Ident) { + value = parse_ident(f); + } else if (f->curr_token.kind == Token_Mod) { + value = parse_asm_register(f); + } else { + error(f->curr_token, "Expected a register or scratch parameter"); + Ast *dummy = parse_expr(f, true); + gb_unused(dummy); + } + } + + if (tied_name != nullptr) { + if (type != nullptr) { + syntax_error(f->curr_token, "An asm specification for tied values cannot declare a type"); + } + } else if (type == nullptr && value == nullptr) { + syntax_error(f->curr_token, "An asm specification must specify at least either a type or a value if the value is not tied"); + } + + Array directives = {}; + directives.allocator = heap_allocator(); + + while (f->curr_token.kind == Token_Hash) { + Token token = expect_token(f, Token_Hash); + Token name = expect_token_after(f, Token_Ident, "hash for directive"); + if (name.kind == Token_Ident) { + Ast *directive = ast_basic_directive(f, token, name); + array_add(&directives, directive); + } + } + + + Ast *spec = alloc_ast_node(f, Ast_AsmSpec); + spec->AsmSpec.name = name; + spec->AsmSpec.tied_name = tied_name; + spec->AsmSpec.type = type; + spec->AsmSpec.value = value; + spec->AsmSpec.directives = directives; + return spec; +} + + gb_internal Ast *parse_asm_template(AstFile *f) { Token token = expect_token(f, Token_asm); @@ -2718,47 +2774,14 @@ gb_internal Ast *parse_asm_template(AstFile *f) { f->curr_token.kind != Token_EOF) { Ast *spec = nullptr; if (f->curr_token.kind == Token_Ident) { - Ast *name = parse_ident(f); - Ast *tied_name = nullptr; - Ast *type = nullptr; - Ast *value = nullptr; - if (allow_token(f, Token_ArrowRight)) { - tied_name = parse_ident(f); - } - if (allow_token(f, Token_Colon)) { - type = parse_type(f); - } - if (allow_token(f, Token_Eq)) { - if (f->curr_token.kind == Token_Ident) { - value = parse_ident(f); - } else if (f->curr_token.kind == Token_Mod) { - value = parse_asm_register(f); - } else { - error(f->curr_token, "Expected a register or scratch parameter"); - Ast *dummy = parse_expr(f, true); - gb_unused(dummy); - } - } - - if (tied_name != nullptr) { - if (type != nullptr) { - syntax_error(f->curr_token, "An asm specification for tied values cannot declare a type"); - } - } else if (type == nullptr && value == nullptr) { - syntax_error(f->curr_token, "An asm specification must specify at least either a type or a value if the value is not tied"); - } - - spec = alloc_ast_node(f, Ast_AsmSpec); - spec->AsmSpec.name = name; - spec->AsmSpec.tied_name = tied_name; - spec->AsmSpec.type = type; - spec->AsmSpec.value = value; + spec = parse_asm_spec(f); } else if (f->curr_token.kind == Token_Hash) { Token hash = expect_token(f, Token_Hash); Token name = expect_token(f, Token_Ident); if (name.string == "volatile" || - name.string == "align_stack") { + name.string == "align_stack" || + name.string == "pure") { Ast *clobber = alloc_ast_node(f, Ast_AsmClobber); clobber->AsmClobber.token = hash; clobber->AsmClobber.name = name; diff --git a/src/parser.hpp b/src/parser.hpp index efc8be219..260cb8a85 100644 --- a/src/parser.hpp +++ b/src/parser.hpp @@ -489,10 +489,11 @@ struct AstSplitArgs { Token flag; \ }) \ AST_KIND(AsmSpec, "asm specification", struct { \ - Ast *name; \ - Ast *tied_name; \ - Ast *type; \ - Ast *value; \ + Ast * name; \ + Ast * tied_name; \ + Ast * type; \ + Ast * value; \ + Array directives; \ }) \ AST_KIND(AsmClobber, "asm clobber", struct { \ Token token; \ @@ -509,6 +510,7 @@ struct AstSplitArgs { u16 mnemonic; \ u8 suffix_flags; \ i32 valid_form_index; \ + struct AsmInstructionFacts *facts; \ }) \ AST_KIND(AsmMemoryOperand, "asm memory operand", struct { \ Token open; \ diff --git a/src/string.cpp b/src/string.cpp index 76d03d55f..97588a5df 100644 --- a/src/string.cpp +++ b/src/string.cpp @@ -293,6 +293,20 @@ gb_internal String string_split_iterator(String_Iterator *it, const char sep) { return substring(it->str, start, end); } +// NOTE: `string_split_iterator` returns a zero-length `String` both for an empty element and at +// exhaustion, so a loop that stops on an empty result stops at the first empty element instead. +// This skips empty elements and stops only once the iterator is exhausted. +gb_internal bool string_split_iterator_next(String_Iterator *it, char const sep, String *str_) { + while (it->pos < it->str.len) { + String str = string_split_iterator(it, sep); + if (str.len != 0) { + *str_ = str; + return true; + } + } + return false; +} + gb_internal gb_inline bool is_separator(u8 const &ch) { return (ch == '/' || ch == '\\'); } diff --git a/src/types.cpp b/src/types.cpp index 54481098b..05b2ba133 100644 --- a/src/types.cpp +++ b/src/types.cpp @@ -3640,9 +3640,8 @@ gb_internal int matched_target_features(TypeProc *t) { int matches = 0; String_Iterator it = {t->require_target_feature, 0}; - for (;;) { - String str = string_split_iterator(&it, ','); - if (str == "") break; + String str = {}; + while (string_split_iterator_next(&it, ',', &str)) { if (check_target_feature_is_valid_for_target_arch(str, nullptr)) { matches += 1; } diff --git a/tests/core/nbio/nbio.odin b/tests/core/nbio/nbio.odin index 6121d1ac7..5d43fd814 100644 --- a/tests/core/nbio/nbio.odin +++ b/tests/core/nbio/nbio.odin @@ -244,8 +244,11 @@ wake_up :: proc(t: ^testing.T) { }, context) defer thread.destroy(thr) - // Should block forever until the thread calling wake_up will make it return. - ev(t, nbio.tick(), nil) + // A tick can return without progress; loop until the wake is observed. + // A lost wake would block here forever and trip the fail timeout. + for !hit { + ev(t, nbio.tick(), nil) + } e(t, hit) nbio.remove(accept) diff --git a/tests/core/nbio/net.odin b/tests/core/nbio/net.odin index 77e44f73b..544fb6f58 100644 --- a/tests/core/nbio/net.odin +++ b/tests/core/nbio/net.odin @@ -245,7 +245,7 @@ And it tests big send/recv buffers being handled properly. @(test) poll :: proc(t: ^testing.T) { if event_loop_guard(t) { -// testing.set_fail_timeout(t, time.Minute) + testing.set_fail_timeout(t, time.Minute) can_recv: bool @@ -302,13 +302,25 @@ poll :: proc(t: ^testing.T) { on_poll1 :: proc(op: ^nbio.Operation, t: ^testing.T, can_recv: ^bool) { ev(t, op.poll.result, nil) - // Send 4 GB of data, which in my experience causes a Would_Block error because we filled up the internal buffer. + // Fill the socket until sending actually blocks. How much that takes depends + // on the machine's socket buffers, so keep sending rather than assuming a + // fixed amount does it. Nothing is reading yet, so this terminates. buf, mem_err := make([]byte, mem.Gigabyte*4, context.temp_allocator) ev(t, mem_err, nil) // Use `core:net` as example external code that doesn't care about the event loop. net.set_blocking(op.poll.socket, false) - n, send_err := net.send(op.poll.socket, buf) + + n: int + send_err: net.Network_Error + for _ in 0..<16 { + sent: int + sent, send_err = net.send(op.poll.socket, buf) + n += sent + if send_err != nil { + break + } + } ev(t, send_err, net.TCP_Send_Error.Would_Block) log.debugf("blocking after %M", n) diff --git a/tests/core/nbio/remove.odin b/tests/core/nbio/remove.odin index 063c2cf58..fe7884c28 100644 --- a/tests/core/nbio/remove.odin +++ b/tests/core/nbio/remove.odin @@ -58,7 +58,12 @@ immediate_remove_of_sendfile :: proc(t: ^testing.T) { } on_recv :: proc(op: ^nbio.Operation, t: ^testing.T) { - ev(t, op.recv.err, nil) + // The server cancelled a sendfile that had already put bytes on the wire and + // then closed, which ends the connection with a reset rather than gracefully + // often enough that both have to be accepted here. + if op.recv.err != nil { + ev(t, op.recv.err, net.TCP_Recv_Error.Connection_Closed) + } nbio.close(op.recv.socket.(net.TCP_Socket)) } @@ -126,7 +131,12 @@ immediate_remove_of_sendfile_without_stat :: proc(t: ^testing.T) { } on_recv :: proc(op: ^nbio.Operation, t: ^testing.T) { - ev(t, op.recv.err, nil) + // The server cancelled a sendfile that had already put bytes on the wire and + // then closed, which ends the connection with a reset rather than gracefully + // often enough that both have to be accepted here. + if op.recv.err != nil { + ev(t, op.recv.err, net.TCP_Recv_Error.Connection_Closed) + } nbio.close(op.recv.socket.(net.TCP_Socket)) } @@ -212,13 +222,18 @@ remove_multiple_poll :: proc(t: ^testing.T) { if event_loop_guard(t) { testing.set_fail_timeout(t, time.Minute) - sock, ep := open_next_available_local_port(t) - defer nbio.close(sock) + // Two sockets rather than two polls on one socket: only one poll per socket is + // delivered on Windows, and what this tests is removal, not that. + removed_sock, removed_ep := open_next_available_local_port(t) + defer nbio.close(removed_sock) + + kept_sock, kept_ep := open_next_available_local_port(t) + defer nbio.close(kept_sock) hit: bool - first := nbio.poll(sock, .Receive, on_poll) - nbio.poll_poly2(sock, .Receive, t, &hit, on_poll2) + first := nbio.poll(removed_sock, .Receive, on_poll) + nbio.poll_poly2(kept_sock, .Receive, t, &hit, on_poll2) on_poll :: proc(op: ^nbio.Operation) { log.error("shouldn't be called") @@ -235,7 +250,9 @@ remove_multiple_poll :: proc(t: ^testing.T) { ev(t, nbio.tick(0), nil) - nbio.dial_poly(ep, t, on_dial) + // Make both readable, the removed poll must still not fire. + nbio.dial_poly(removed_ep, t, on_dial) + nbio.dial_poly(kept_ep, t, on_dial) on_dial :: proc(op: ^nbio.Operation, t: ^testing.T) { ev(t, op.dial.err, nil) diff --git a/tests/internal/test_mod.odin b/tests/internal/test_mod.odin new file mode 100644 index 000000000..55217831b --- /dev/null +++ b/tests/internal/test_mod.odin @@ -0,0 +1,105 @@ +package test_internal + +import "core:testing" + +// % operator (truncated remainder) +// remainder = x - y * trunc(x / y) + +@(private="file") +trunc_mod :: proc(x, y: $T) -> T { + return x - y*(x/y) +} + +// this seems to prevent folding at least at -o:minimal +@(private="file") +not_const :: #force_no_inline proc(v: $T) -> T { return v } + +@(test) +mod_i8_exhaustive :: proc(t: ^testing.T) { + for i in -128..=127 { + for j in -128..=127 { + if j == 0 { continue } + // min(T) % -1 == 0 is tested in mod_exception, + // the trunc_mod reference itself would trap here + if i == -128 && j == -1 { continue } + x, y := i8(i), i8(j) + got := x % y + want := trunc_mod(x, y) + testing.expectf(t, got == want, "%v %% %v == %v, want %v", x, y, got, want) + } + } +} + +@(test) +mod_exception :: proc(t: ^testing.T) { + // min(T) % -1 is 0, which is what the constant folder answers + #assert(min(i8) % i8(-1) == 0) + #assert(min(i16) % i16(-1) == 0) + #assert(min(i32) % i32(-1) == 0) + #assert(min(i64) % i64(-1) == 0) + #assert(min(i128) % i128(-1) == 0) + + check :: proc(t: ^testing.T, $T: typeid, loc := #caller_location) { + x, y := not_const(min(T)), not_const(T(-1)) + testing.expectf(t, x % y == 0, "min(%v) %% -1 (rt divisor) == %v, want 0", typeid_of(T), x % y, loc = loc) + testing.expectf(t, x % -1 == 0, "min(%v) %% -1 (const divisor) == %v, want 0", typeid_of(T), x % -1, loc = loc) + } + check(t, i8) + check(t, i16) + check(t, i32) + check(t, i64) + check(t, i128) +} + +@(test) +mod_exception_vec :: proc(t: ^testing.T) { + { + // [4]i32 emits `srem <4 x i32>` + x := not_const([4]i32{min(i32), 0, -7, 5}) + y := not_const([4]i32{-1, -1, -1, -1}) + testing.expect_value(t, x % y, [4]i32{0, 0, 0, 0}) + } + { + // [16]i32 emits scalar `srem i32`, which is the other call site + x, y: [16]i32 + for i in 0..<16 { + x[i] = i == 0 ? min(i32) : i32(i) - 8 + y[i] = -1 + } + testing.expect_value(t, not_const(x) % not_const(y), [16]i32{}) + } +} + +@(test) +mod_assign :: proc(t: ^testing.T) { + // %= must agree with % + { + x := not_const(min(i32)) + y := not_const(i32(-1)) + x %= y + testing.expect_value(t, x, 0) + } + { + x := not_const(i64(-17)) + y := not_const(i64(5)) + x %= y + testing.expect_value(t, x, -17 % 5) + } +} + +@(test) +mod_unsigned_unchanged :: proc(t: ^testing.T) { + // the guard is signed-only; unsigned max is all-ones and must stay a real divisor + { + x, y := not_const(max(u32)), not_const(max(u32)) + testing.expect_value(t, x % y, 0) + } + { + x, y := not_const(u32(7)), not_const(max(u32)) + testing.expect_value(t, x % y, 7) + } + { + x, y := not_const(u8(200)), not_const(u8(255)) + testing.expect_value(t, x % y, 200) + } +} diff --git a/tests/issues/run.bat b/tests/issues/run.bat index d31751a87..f211e153b 100644 --- a/tests/issues/run.bat +++ b/tests/issues/run.bat @@ -43,12 +43,10 @@ set COMMON=-define:ODIN_TEST_FANCY=false -file -vet -strict-style -ignore-unused ..\..\..\odin test ..\test_issue_7008.odin %COMMON% || exit /b ..\..\..\odin check ..\test_issue_7012.odin -no-entry-point %COMMON% || exit /b ..\..\..\odin check ..\test_issue_7260.odin -no-entry-point %COMMON% || exit /b -..\..\..\odin check ..\test_issue_asm_named_register_slot.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "8" || exit /b +..\..\..\odin test ..\test_issue_bool_comparison_truthiness.odin %COMMON% || exit /b ..\..\..\odin check ..\test_issue_ellipsis_type_call.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b ..\..\..\odin check ..\test_issue_foreign_redeclaration.odin -no-entry-point %COMMON% || exit /b ..\..\..\odin check ..\test_issue_foreign_redeclaration_mismatch.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "1" || exit /b -..\..\..\odin check ..\test_issue_asm_rip_register.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "6" || exit /b -..\..\..\odin check ..\test_issue_asm_template_as_value.odin -no-entry-point %COMMON% 2>&1 | find /c "Error:" | findstr /x "10" || exit /b ..\..\..\odin build ..\test_issue_7037.odin %COMMON% -o:none || exit /b ..\..\..\odin build ..\test_issue_7188.odin %COMMON% || exit /b clang -c ..\test_issue_sysv_abi.c -o test_issue_sysv_abi_c.o || exit /b diff --git a/tests/issues/run.sh b/tests/issues/run.sh index b936a9e30..16133d72d 100755 --- a/tests/issues/run.sh +++ b/tests/issues/run.sh @@ -91,20 +91,13 @@ $ODIN check ../test_issue_6979.odin -no-entry-point $COMMON_CHECK $ODIN test ../test_issue_7008.odin $COMMON $ODIN check ../test_issue_7012.odin -no-entry-point $COMMON_CHECK $ODIN build ../test_issue_7037.odin $COMMON -o:none +$ODIN check ../test_issue_7429.odin $COMMON_CHECK $ODIN test ../test_issue_7356.odin $COMMON $ODIN build ../test_issue_7167.odin $COMMON $ODIN build ../test_issue_7188.odin $COMMON $ODIN check ../test_issue_7260.odin -no-entry-point $COMMON_CHECK +$ODIN test ../test_issue_bool_to_be_conversion.odin $COMMON -# `asm` templates are amd64-only, so this file is empty on every other architecture -if [[ "$(uname -m)" == "x86_64" || "$(uname -m)" == "amd64" ]]; then - if [[ $($ODIN check ../test_issue_asm_named_register_slot.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 8 ]]; then - echo "SUCCESSFUL 1/1" - else - echo "SUCCESSFUL 0/1" - exit 1 - fi -fi $ODIN check ../test_issue_foreign_redeclaration.odin -no-entry-point $COMMON_CHECK if [[ $($ODIN check ../test_issue_foreign_redeclaration_mismatch.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 1 ]]; then echo "SUCCESSFUL 1/1" @@ -120,22 +113,6 @@ else exit 1 fi -# `asm` templates are amd64-only, so this file is empty on every other architecture -if [[ "$(uname -m)" == "x86_64" || "$(uname -m)" == "amd64" ]]; then - if [[ $($ODIN check ../test_issue_asm_rip_register.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 6 ]]; then - echo "SUCCESSFUL 1/1" - else - echo "SUCCESSFUL 0/1" - exit 1 - fi - if [[ $($ODIN check ../test_issue_asm_template_as_value.odin -no-entry-point $COMMON_CHECK 2>&1 >/dev/null | grep -c "Error:") -eq 10 ]]; then - echo "SUCCESSFUL 1/1" - else - echo "SUCCESSFUL 0/1" - exit 1 - fi -fi - if [[ $($ODIN build ../test_issue_7108.odin $COMMON 2>&1 >/dev/null | grep -c "Error:") -eq 2 ]]; then echo "SUCCESSFUL 1/1" else diff --git a/tests/issues/test_issue_7429.odin b/tests/issues/test_issue_7429.odin new file mode 100644 index 000000000..21e407bed --- /dev/null +++ b/tests/issues/test_issue_7429.odin @@ -0,0 +1,15 @@ +// Tests issue #7429: local distinct types in procedure literal values must have +// unique canonical names. +// https://github.com/odin-lang/Odin/issues/7429 +package test_issues + +main :: proc() { + _ = proc() { + Foo :: distinct string + _ = typeid_of(Foo) + } + _ = proc() { + Foo :: distinct string + _ = typeid_of(Foo) + } +} diff --git a/tests/issues/test_issue_asm_named_register_slot.odin b/tests/issues/test_issue_asm_named_register_slot.odin deleted file mode 100644 index 1b6362510..000000000 --- a/tests/issues/test_issue_asm_named_register_slot.odin +++ /dev/null @@ -1,41 +0,0 @@ -#+build amd64 -// A slot that only a named hardware register can fill (segment/control/debug/x87/MMX) -// carries no width and no register class, so it used to absorb any operand at all and -// hand the backend an instruction that does not encode. -package test_issues - -// Rejected: none of these widths pair up, and only `mov`'s segment-register forms ever -// admitted them. -bad_64_32 :: asm(a: i64) -> (r: i32) { mov r, a; } -bad_8_16 :: asm(a: u8) -> (r: u16) { mov r, a; } -bad_16_8 :: asm(a: u16) -> (r: u8) { mov r, a; } -bad_64_8 :: asm(a: u64) -> (r: u8) { mov r, a; } - -// Accepted: equal widths, regardless of signedness or pointer spelling. -ok_32 :: asm(a: i32) -> (r: u32) { mov r, a; } -ok_64 :: asm(a: u64) -> (r: i64) { mov r, a; } -ok_ptr :: asm(a: rawptr) -> (r: ^i32) { mov r, a; } - -// Accepted: the named registers those forms are actually for. -ok_seg :: asm(a: u64) -> (r: u64) { mov %ds, a; mov r, a; } -ok_ctrl :: asm(a: u64) -> (r: u64) { mov %cr0, a; mov r, a; } -ok_dbg :: asm(a: u64) -> (r: u64) { mov %dr0, a; mov r, a; } - -use :: proc() { - a8: u8 - a16: u16 - a32: i32 - a64: i64 - au64: u64 - ap: rawptr - _ = bad_64_32(a64) - _ = bad_8_16(a8) - _ = bad_16_8(a16) - _ = bad_64_8(au64) - _ = ok_32(a32) - _ = ok_64(au64) - _ = ok_ptr(ap) - _ = ok_seg(au64) - _ = ok_ctrl(au64) - _ = ok_dbg(au64) -} diff --git a/tests/issues/test_issue_asm_rip_register.odin b/tests/issues/test_issue_asm_rip_register.odin deleted file mode 100644 index 8b9784790..000000000 --- a/tests/issues/test_issue_asm_rip_register.odin +++ /dev/null @@ -1,15 +0,0 @@ -#+build amd64 -// `%rip` is in the amd64 register table, but its class carries no width, so the checker's width -// switch reached its `GB_PANIC` default arm and aborted with SIGILL instead of diagnosing. Every -// position that can name a register reached it, including `[%rip + disp]`. -package test_issues - -rip_src :: asm() -> (v: u64) { mov v, %rip; } -rip_dst :: asm(x: u64) { mov %rip, x; } -rip_mem :: asm() { mov %rax, [%rip + 8]; } -rip_clob :: asm() [#clobber %rip] { nop; } -rip_in :: asm(x: u64) [x = %rip] { nop; } -rip_out :: asm() -> (r: u64) [r = %rip] { nop; } - -// the nearest special-purpose register that does carry a class has to keep checking cleanly -rsp_ok :: asm() -> (v: u64) { mov v, %rsp; } diff --git a/tests/issues/test_issue_asm_template_as_value.odin b/tests/issues/test_issue_asm_template_as_value.odin deleted file mode 100644 index 2062fa3c7..000000000 --- a/tests/issues/test_issue_asm_template_as_value.odin +++ /dev/null @@ -1,48 +0,0 @@ -#+build amd64 -// A named asm template got a plain `Addressing_Value`, so every value gate let it through: -// a cast, a transmute, an `auto_cast`, a blank assignment, a polymorphic parameter and a -// comparison against `nil` all passed the checker and then aborted the compiler in the -// backend, which has no value to lower for a template. Only a direct call and a listing in -// an `asm` group are legal. -package test_issues - -t :: asm(a: i32) -> (v: i32) { mov v, a; } - -a32 :: asm(a: i32) -> (v: i32) { mov v, a; } -a64 :: asm(a: i64) -> (v: i64) { mov v, a; } -g :: asm { a32, a64 } - -G := cast(rawptr)(t) - -take_rawptr :: proc(p: rawptr) { - _ = p -} - -poly :: proc(x: $T) { - _ = size_of(T) -} - -bad :: proc() { - _ = cast(proc "c" (i32) -> i32)(t) - _ = transmute(proc "c" (i32) -> i32)(t) - _ = cast(rawptr)(t) - _ = transmute(uintptr)(t) - take_rawptr(auto_cast t) - take_rawptr(cast(rawptr)(t)) - _ = t - poly(t) - if t == nil { - take_rawptr(nil) - } -} - -// these forms must remain valid -good :: proc() -> i32 { - x := t(1) - y := (t)(2) - z := g(i32(3)) - w := g(i64(4)) - v := asm(a: i32) -> (v: i32) { mov v, a; }(5) - take_rawptr(G) - return x + y + z + i32(w) + v -} diff --git a/tests/issues/test_issue_bool_comparison_truthiness.odin b/tests/issues/test_issue_bool_comparison_truthiness.odin new file mode 100644 index 000000000..6b218bdc2 --- /dev/null +++ b/tests/issues/test_issue_bool_comparison_truthiness.odin @@ -0,0 +1,57 @@ +package test_issues + +import "core:testing" + +// A boolean is true when its payload is non-zero, which is what `if`, `!` and `&&` test for. +// `==`, `!=` and `switch` compared the payload against 1 instead, so a boolean decoded from +// bytes -- transmuted, read through a pointer, or returned by a foreign procedure -- was true +// under `if` yet matched neither arm of its own switch. + +@(test) +bool_comparison_uses_truthiness :: proc(t: ^testing.T) { + two: u8 = 2 + one: u8 = 1 + nil_: u8 = 0 + + b := transmute(bool)two + c := transmute(bool)one + f := transmute(bool)nil_ + + testing.expect(t, b, "a non-zero payload is true") + + testing.expect_value(t, b == true, true) + testing.expect_value(t, b != true, false) + testing.expect_value(t, b == false, false) + testing.expect_value(t, b != false, true) + + // both operands are normalised, not just the literal one + testing.expect_value(t, b == c, true) + testing.expect_value(t, b != c, false) + testing.expect_value(t, b == f, false) + testing.expect_value(t, b != f, true) + + arm := 2 + switch b { + case true: arm = 1 + case false: arm = 0 + } + testing.expect_value(t, arm, 1) + + // the wider boolean types share the path + two16: u16 = 2 + two32: u32 = 2 + two64: u64 = 2 + testing.expect_value(t, transmute(b8)two == true, true) + testing.expect_value(t, transmute(b16)two16 == true, true) + testing.expect_value(t, transmute(b32)two32 == true, true) + testing.expect_value(t, transmute(b64)two64 == true, true) + + // the normal 0/1 payloads keep behaving + yes := true + no := false + testing.expect_value(t, yes == true, true) + testing.expect_value(t, yes == false, false) + testing.expect_value(t, no == false, true) + testing.expect_value(t, yes == no, false) + testing.expect_value(t, yes != no, true) +} diff --git a/tests/issues/test_issue_bool_to_be_conversion.odin b/tests/issues/test_issue_bool_to_be_conversion.odin new file mode 100644 index 000000000..5801ebe20 --- /dev/null +++ b/tests/issues/test_issue_bool_to_be_conversion.odin @@ -0,0 +1,37 @@ +package test_issues + +import "core:testing" + +// Converting a boolean to a big-endian integer skipped the endian fixup that the integer source +// path performs, so the result carried a native bit pattern labelled big-endian. The checker +// folded the same conversion to the right value, so only the runtime disagreed. + +@(test) +bool_to_big_endian :: proc(t: ^testing.T) { + b: bool = true + f: bool = false + b8v: b8 = true + b16v: b16 = true + b32v: b32 = true + b64v: b64 = true + i: int = 1 + + testing.expect_value(t, int(i16be(b)), 1) + testing.expect_value(t, int(u32be(b)), 1) + testing.expect_value(t, int(u64be(b)), 1) + testing.expect_value(t, int(u128be(b)), 1) + testing.expect_value(t, int(i16be(f)), 0) + + testing.expect_value(t, int(i16be(b8v)), 1) + testing.expect_value(t, int(i16be(b16v)), 1) + testing.expect_value(t, int(i16be(b32v)), 1) + testing.expect_value(t, int(i16be(b64v)), 1) + + // the little-endian target and the integer source were already correct + testing.expect_value(t, int(i16le(b)), 1) + testing.expect_value(t, int(i16be(i)), 1) + + // the bytes have to actually be big-endian, not a native pattern relabelled + testing.expect_value(t, transmute([4]u8)u32be(b), transmute([4]u8)u32be(i)) + testing.expect_value(t, transmute([4]u8)u32be(b), [4]u8{0, 0, 0, 1}) +} diff --git a/vendor/raylib/raylib.odin b/vendor/raylib/raylib.odin index 01235b6ec..64321e020 100644 --- a/vendor/raylib/raylib.odin +++ b/vendor/raylib/raylib.odin @@ -663,7 +663,7 @@ MouseButton :: enum c.int { MIDDLE = 2, // Mouse button middle (pressed wheel) SIDE = 3, // Mouse button side (advanced mouse device) EXTRA = 4, // Mouse button extra (advanced mouse device) - FORWARD = 5, // Mouse button fordward (advanced mouse device) + FORWARD = 5, // Mouse button forward (advanced mouse device) BACK = 6, // Mouse button back (advanced mouse device) }