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Restrict riscv to only allow [base + disp] (i.e. disallow index*scale style things)

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gingerBill
2026-08-21 14:31:58 +01:00
parent 4a4a5045f8
commit 648c418fc4
6 changed files with 505 additions and 2 deletions
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3
core/rexcode/isa/riscv/tablegen/cpp-compiler/cpp-gen.odin
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@@ -554,6 +554,9 @@ main :: proc() {
bool float_reg_width_is_exact() const {
return false;
}
bool supports_memory_index_not_just_disp() const {
return false;
}
""")
strings.write_string(&sb, "\n\n")

3
core/rexcode/isa/x86/tablegen/cpp-compiler/cpp-gen.odin
View File

@@ -556,6 +556,9 @@ main :: proc() {
bool float_reg_width_is_exact() const {
return true;
}
bool supports_memory_index_not_just_disp() const {
return true;
}
""")
strings.write_string(&sb, "\n\n")