mirrors/Odin
1
0
Fork 0
mirror of https://github.com/odin-lang/Odin.git synced 2026-08-14 09:44:26 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master' into poly-proc-fix

Browse Source
This commit is contained in:
Brody
2026-08-05 00:19:06 +10:00
parent 90f6c9d0db b1e2eefafe
commit 7945cf3ac3
72 changed files with 3678 additions and 1523 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/build_settings_microarch.cpp
View File

@@ -21,7 +21,7 @@ gb_global String target_microarch_list[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
str_lit("bleeding-edge,generic,lime1,mvp"),
// TargetArch_riscv64:
str_lit("andes-45-series,andes-a25,andes-a45,andes-ax25,andes-ax45,andes-ax45mpv,andes-n45,andes-nx45,generic,generic-ooo,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-p870,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,sifive-x390,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-kunminghu,xiangshan-nanhu"),
str_lit("andes-45-series,andes-a25,andes-a45,andes-ax25,andes-ax45,andes-ax45mpv,andes-n45,andes-nx45,generic,generic-ooo,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-p870,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,sifive-x390,spacemit-a100,spacemit-x100,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-kunminghu,xiangshan-nanhu"),
};
// Generated with the featuregen script in `misc/featuregen`
@@ -41,7 +41,7 @@ gb_global String target_features_list[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,gc,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call,wide-arithmetic"),
// TargetArch_riscv64:
str_lit("32bit,64bit,a,add-load-fusion,addi-load-fusion,andes45,auipc-addi-fusion,auipc-load-fusion,b,bfext-fusion,c,conditional-cmv-fusion,d,disable-latency-sched-heuristic,disable-misched-load-clustering,disable-misched-store-clustering,disable-postmisched-load-clustering,disable-postmisched-store-clustering,dlen-factor-2,e,enable-vsetvli-sched-heuristic,exact-asm,experimental,experimental-p,experimental-rvm23u32,experimental-smpmpmt,experimental-svukte,experimental-xrivosvisni,experimental-xrivosvizip,experimental-xsfmclic,experimental-xsfsclic,experimental-zibi,experimental-zicfilp,experimental-zicfiss,experimental-zvbc32e,experimental-zvfbfa,experimental-zvfofp8min,experimental-zvkgs,experimental-zvqdotq,f,forced-atomics,h,i,ld-add-fusion,log-vrgather,lui-addi-fusion,lui-load-fusion,m,mips-p8700,no-default-unroll,no-sink-splat-operands,no-trailing-seq-cst-fence,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,optimized-nf5-segment-load-store,optimized-nf6-segment-load-store,optimized-nf7-segment-load-store,optimized-nf8-segment-load-store,optimized-zero-stride-load,permissive-zalrsc,predictable-select-expensive,prefer-vsetvli-over-read-vlenb,prefer-w-inst,q,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,rva20s64,rva20u64,rva22s64,rva22u64,rva23s64,rva23u64,rvb23s64,rvb23u64,rvi20u32,rvi20u64,save-restore,sdext,sdtrig,sha,shcounterenw,shgatpa,shifted-zextw-fusion,shlcofideleg,short-forward-branch-ialu,short-forward-branch-iload,short-forward-branch-iminmax,short-forward-branch-imul,shtvala,shvsatpa,shvstvala,shvstvecd,shxadd-load-fusion,sifive7,single-element-vec-fp64,smaia,smcdeleg,smcntrpmf,smcsrind,smctr,smdbltrp,smepmp,smmpm,smnpm,smrnmi,smstateen,ssaia,ssccfg,ssccptr,sscofpmf,sscounterenw,sscsrind,ssctr,ssdbltrp,ssnpm,sspm,ssqosid,ssstateen,ssstrict,sstc,sstvala,sstvecd,ssu64xl,supm,svade,svadu,svbare,svinval,svnapot,svpbmt,svvptc,tagged-globals,unaligned-scalar-mem,unaligned-vector-mem,use-postra-scheduler,v,ventana-veyron,vl-dependent-latency,vxrm-pipeline-flush,xandesbfhcvt,xandesperf,xandesvbfhcvt,xandesvdot,xandesvpackfph,xandesvsinth,xandesvsintload,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xmipscbop,xmipscmov,xmipsexectl,xmipslsp,xqccmp,xqci,xqcia,xqciac,xqcibi,xqcibm,xqcicli,xqcicm,xqcics,xqcicsr,xqciint,xqciio,xqcilb,xqcili,xqcilia,xqcilo,xqcilsm,xqcisim,xqcisls,xqcisync,xsfcease,xsfmm128t,xsfmm16t,xsfmm32a16f,xsfmm32a32f,xsfmm32a8f,xsfmm32a8i,xsfmm32t,xsfmm64a64f,xsfmm64t,xsfmmbase,xsfvcp,xsfvfbfexp16e,xsfvfexp16e,xsfvfexp32e,xsfvfexpa,xsfvfexpa64e,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xsifivecdiscarddlone,xsifivecflushdlone,xsmtvdot,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,xwchc,za128rs,za64rs,zaamo,zabha,zacas,zalasr,zalrsc,zama16b,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zclsd,zcmop,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfbfmin,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccamoc,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zilsd,zilsd-4byte-align,zimop,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,ztso,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"),
str_lit("32bit,64bit,a,add-mem-fusion,add-or-sub-andi-fusion,addi-mem-fusion,andes45,andi-add-fusion,andi-sub-fusion,auipc-addi-fusion,b,branch-fusion,c,conditional-cmv-fusion,d,disable-latency-sched-heuristic,dlen-factor-2,e,exact-asm,experimental,experimental-p,experimental-rvm23u32,experimental-smctr,experimental-ssctr,experimental-svukte,experimental-xqccmp,experimental-xqcia,experimental-xqciac,experimental-xqcibi,experimental-xqcibm,experimental-xqcicli,experimental-xqcicm,experimental-xqcics,experimental-xqcicsr,experimental-xqciint,experimental-xqciio,experimental-xqcilb,experimental-xqcili,experimental-xqcilia,experimental-xqcilo,experimental-xqcilsm,experimental-xqcisim,experimental-xqcisls,experimental-xqcisync,experimental-xrivosvisni,experimental-xrivosvizip,experimental-xsfmclic,experimental-xsfsclic,experimental-zalasr,experimental-zicfilp,experimental-zicfiss,experimental-zvbc32e,experimental-zvkgs,experimental-zvqdotq,f,fcvt-fmul-or-fmuladd-fusion,forced-atomics,h,i,ld-add-fusion,log-vrgather,logic-imm-imm-fusion,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,lui-mem-fusion,m,mips-p8700,mul-add-fusion,mulw-addw-fusion,no-default-unroll,no-sink-splat-operands,no-trailing-seq-cst-fence,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,optimized-nf5-segment-load-store,optimized-nf6-segment-load-store,optimized-nf7-segment-load-store,optimized-nf8-segment-load-store,optimized-zero-stride-load,predictable-select-expensive,prefer-vsetvli-over-read-vlenb,prefer-w-inst,q,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,rva20s64,rva20u64,rva22s64,rva22u64,rva23s64,rva23u64,rvb23s64,rvb23u64,rvi20u32,rvi20u64,save-restore,sdext,sdtrig,sh1adduw-lh-fusion,sha,shcounterenw,shgatpa,shift-imm-op-fusion,shifted-zextw-fusion,shlcofideleg,short-forward-branch-opt,shtvala,shvsatpa,shvstvala,shvstvecd,sifive7,smaia,smcdeleg,smcntrpmf,smcsrind,smdbltrp,smepmp,smmpm,smnpm,smrnmi,smstateen,ssaia,ssccfg,ssccptr,sscofpmf,sscounterenw,sscsrind,ssdbltrp,ssnpm,sspm,ssqosid,ssstateen,ssstrict,sstc,sstvala,sstvecd,ssu64xl,sub-sltiu-fusion,sub-sltu-fusion,supm,svade,svadu,svbare,svinval,svnapot,svpbmt,svvptc,tagged-globals,unaligned-scalar-mem,unaligned-vector-mem,use-postra-scheduler,v,ventana-veyron,vl-dependent-latency,vxrm-pipeline-flush,xandesbfhcvt,xandesperf,xandesvbfhcvt,xandesvdot,xandesvpackfph,xandesvsintload,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xmipscbop,xmipscmov,xmipslsp,xsfcease,xsfmm128t,xsfmm16t,xsfmm32a16f,xsfmm32a32f,xsfmm32a8f,xsfmm32a8i,xsfmm32t,xsfmm64a64f,xsfmm64t,xsfmmbase,xsfvcp,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xsifivecdiscarddlone,xsifivecflushdlone,xsmtvdot,xsmtvdotii,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,xwchc,za128rs,za64rs,zaamo,zabha,zacas,zalrsc,zama16b,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zclsd,zcmop,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfbfmin,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccamoc,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zilsd,zimop,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,ztso,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"),
};
// Generated with the featuregen script in `misc/featuregen`
@@ -61,7 +61,7 @@ gb_global int target_microarch_counts[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
4,
// TargetArch_riscv64:
51,
53,
};
// Generated with the featuregen script in `misc/featuregen`
@@ -574,6 +574,8 @@ gb_global MicroarchFeatureList microarch_features_list[] = {
{ str_lit("sifive-u74"), str_lit("64bit,a,c,d,f,i,m,no-default-unroll,short-forward-branch-ialu,sifive7,use-postra-scheduler,zaamo,zalrsc,zca,zicsr,zifencei,zmmul") },
{ str_lit("sifive-x280"), str_lit("64bit,a,c,d,dlen-factor-2,f,i,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-zero-stride-load,short-forward-branch-ialu,sifive7,use-postra-scheduler,v,vl-dependent-latency,zaamo,zalrsc,zba,zbb,zca,zfh,zfhmin,zicsr,zifencei,zmmul,zve32f,zve32x,zve64d,zve64f,zve64x,zvfh,zvfhmin,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("sifive-x390"), str_lit("64bit,a,b,c,d,dlen-factor-2,experimental-zicfilp,experimental-zicfiss,f,i,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-zero-stride-load,short-forward-branch-ialu,sifive7,single-element-vec-fp64,use-postra-scheduler,v,vl-dependent-latency,xsifivecdiscarddlone,xsifivecflushdlone,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbs,zca,zcb,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkr,zkt,zmmul,zvbb,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkt,zvl1024b,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("spacemit-a100"), str_lit("64bit,a,add-or-sub-andi-fusion,addi-mem-fusion,andi-add-fusion,andi-sub-fusion,auipc-addi-fusion,b,branch-fusion,c,d,dlen-factor-2,f,fcvt-fmul-or-fmuladd-fusion,h,i,logic-imm-imm-fusion,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,lui-mem-fusion,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,prefer-w-inst,sh1adduw-lh-fusion,sha,shcounterenw,shgatpa,shtvala,shvsatpa,shvstvala,shvstvecd,smepmp,smnpm,smstateen,ssccptr,sscofpmf,sscounterenw,ssnpm,sspm,ssstateen,sstc,sstvala,sstvecd,ssu64xl,sub-sltiu-fusion,sub-sltu-fusion,supm,svade,svbare,svinval,svnapot,svpbmt,use-postra-scheduler,v,vxrm-pipeline-flush,xsmtvdotii,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbc,zbkc,zbs,zca,zcb,zcd,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkt,zmmul,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("spacemit-x100"), str_lit("64bit,a,add-mem-fusion,b,c,d,dlen-factor-2,f,h,i,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,m,mul-add-fusion,mulw-addw-fusion,no-default-unroll,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,sha,shcounterenw,shgatpa,shift-imm-op-fusion,shtvala,shvsatpa,shvstvala,shvstvecd,smepmp,smnpm,smstateen,ssccptr,sscofpmf,sscounterenw,ssnpm,sspm,ssstateen,sstc,sstvala,sstvecd,ssu64xl,supm,svade,svbare,svinval,svnapot,svpbmt,use-postra-scheduler,v,vxrm-pipeline-flush,xsmtvdot,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbc,zbkc,zbs,zca,zcb,zcd,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkt,zmmul,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl128b,zvl256b,zvl32b,zvl64b") },
{ str_lit("spacemit-x60"), str_lit("64bit,a,b,c,d,dlen-factor-2,f,i,m,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,ssccptr,sscofpmf,sscounterenw,sstc,sstvala,sstvecd,svade,svbare,svinval,svnapot,svpbmt,unaligned-scalar-mem,v,vxrm-pipeline-flush,xsmtvdot,za64rs,zaamo,zalrsc,zba,zbb,zbc,zbkc,zbs,zca,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintpause,zihpm,zkt,zmmul,zve32f,zve32x,zve64d,zve64f,zve64x,zvfh,zvfhmin,zvkt,zvl128b,zvl256b,zvl32b,zvl64b") },
{ str_lit("syntacore-scr1-base"), str_lit("32bit,c,i,no-default-unroll,zca,zicsr,zifencei") },
{ str_lit("syntacore-scr1-max"), str_lit("32bit,c,i,m,no-default-unroll,zca,zicsr,zifencei,zmmul") },
@@ -608,7 +610,7 @@ gb_global String target_microarch_list[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
str_lit("bleeding-edge,generic,lime1,mvp"),
// TargetArch_riscv64:
str_lit("andes-45-series,andes-a25,andes-a45,andes-ax25,andes-ax45,andes-ax45mpv,andes-n45,andes-nx45,generic,generic-ooo,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-p870,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,sifive-x390,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-kunminghu,xiangshan-nanhu"),
str_lit("andes-45-series,andes-a25,andes-a45,andes-ax25,andes-ax45,andes-ax45mpv,andes-n45,andes-nx45,generic,generic-ooo,generic-rv32,generic-rv64,mips-p8700,rocket,rocket-rv32,rocket-rv64,rp2350-hazard3,sifive-7-series,sifive-e20,sifive-e21,sifive-e24,sifive-e31,sifive-e34,sifive-e76,sifive-p450,sifive-p470,sifive-p550,sifive-p670,sifive-p870,sifive-s21,sifive-s51,sifive-s54,sifive-s76,sifive-u54,sifive-u74,sifive-x280,sifive-x390,spacemit-a100,spacemit-x100,spacemit-x60,syntacore-scr1-base,syntacore-scr1-max,syntacore-scr3-rv32,syntacore-scr3-rv64,syntacore-scr4-rv32,syntacore-scr4-rv64,syntacore-scr5-rv32,syntacore-scr5-rv64,syntacore-scr7,tt-ascalon-d8,veyron-v1,xiangshan-kunminghu,xiangshan-nanhu"),
};
// Generated with the featuregen script in `misc/featuregen`
@@ -628,7 +630,7 @@ gb_global String target_features_list[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
str_lit("atomics,bulk-memory,bulk-memory-opt,call-indirect-overlong,exception-handling,extended-const,fp16,multimemory,multivalue,mutable-globals,nontrapping-fptoint,reference-types,relaxed-simd,sign-ext,simd128,tail-call,wide-arithmetic"),
// TargetArch_riscv64:
str_lit("32bit,64bit,a,andes45,auipc-addi-fusion,b,c,conditional-cmv-fusion,d,disable-latency-sched-heuristic,dlen-factor-2,e,exact-asm,experimental,experimental-p,experimental-rvm23u32,experimental-smctr,experimental-ssctr,experimental-svukte,experimental-xqccmp,experimental-xqcia,experimental-xqciac,experimental-xqcibi,experimental-xqcibm,experimental-xqcicli,experimental-xqcicm,experimental-xqcics,experimental-xqcicsr,experimental-xqciint,experimental-xqciio,experimental-xqcilb,experimental-xqcili,experimental-xqcilia,experimental-xqcilo,experimental-xqcilsm,experimental-xqcisim,experimental-xqcisls,experimental-xqcisync,experimental-xrivosvisni,experimental-xrivosvizip,experimental-xsfmclic,experimental-xsfsclic,experimental-zalasr,experimental-zicfilp,experimental-zicfiss,experimental-zvbc32e,experimental-zvkgs,experimental-zvqdotq,f,forced-atomics,h,i,ld-add-fusion,log-vrgather,lui-addi-fusion,m,mips-p8700,no-default-unroll,no-sink-splat-operands,no-trailing-seq-cst-fence,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,optimized-nf5-segment-load-store,optimized-nf6-segment-load-store,optimized-nf7-segment-load-store,optimized-nf8-segment-load-store,optimized-zero-stride-load,predictable-select-expensive,prefer-vsetvli-over-read-vlenb,prefer-w-inst,q,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,rva20s64,rva20u64,rva22s64,rva22u64,rva23s64,rva23u64,rvb23s64,rvb23u64,rvi20u32,rvi20u64,save-restore,sdext,sdtrig,sha,shcounterenw,shgatpa,shifted-zextw-fusion,shlcofideleg,short-forward-branch-opt,shtvala,shvsatpa,shvstvala,shvstvecd,sifive7,smaia,smcdeleg,smcntrpmf,smcsrind,smdbltrp,smepmp,smmpm,smnpm,smrnmi,smstateen,ssaia,ssccfg,ssccptr,sscofpmf,sscounterenw,sscsrind,ssdbltrp,ssnpm,sspm,ssqosid,ssstateen,ssstrict,sstc,sstvala,sstvecd,ssu64xl,supm,svade,svadu,svbare,svinval,svnapot,svpbmt,svvptc,tagged-globals,unaligned-scalar-mem,unaligned-vector-mem,use-postra-scheduler,v,ventana-veyron,vl-dependent-latency,vxrm-pipeline-flush,xandesbfhcvt,xandesperf,xandesvbfhcvt,xandesvdot,xandesvpackfph,xandesvsintload,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xmipscbop,xmipscmov,xmipslsp,xsfcease,xsfmm128t,xsfmm16t,xsfmm32a16f,xsfmm32a32f,xsfmm32a8f,xsfmm32a8i,xsfmm32t,xsfmm64a64f,xsfmm64t,xsfmmbase,xsfvcp,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xsifivecdiscarddlone,xsifivecflushdlone,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,xwchc,za128rs,za64rs,zaamo,zabha,zacas,zalrsc,zama16b,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zclsd,zcmop,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfbfmin,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccamoc,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zilsd,zimop,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,ztso,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"),
str_lit("32bit,64bit,a,add-mem-fusion,add-or-sub-andi-fusion,addi-mem-fusion,andes45,andi-add-fusion,andi-sub-fusion,auipc-addi-fusion,b,branch-fusion,c,conditional-cmv-fusion,d,disable-latency-sched-heuristic,dlen-factor-2,e,exact-asm,experimental,experimental-p,experimental-rvm23u32,experimental-smctr,experimental-ssctr,experimental-svukte,experimental-xqccmp,experimental-xqcia,experimental-xqciac,experimental-xqcibi,experimental-xqcibm,experimental-xqcicli,experimental-xqcicm,experimental-xqcics,experimental-xqcicsr,experimental-xqciint,experimental-xqciio,experimental-xqcilb,experimental-xqcili,experimental-xqcilia,experimental-xqcilo,experimental-xqcilsm,experimental-xqcisim,experimental-xqcisls,experimental-xqcisync,experimental-xrivosvisni,experimental-xrivosvizip,experimental-xsfmclic,experimental-xsfsclic,experimental-zalasr,experimental-zicfilp,experimental-zicfiss,experimental-zvbc32e,experimental-zvkgs,experimental-zvqdotq,f,fcvt-fmul-or-fmuladd-fusion,forced-atomics,h,i,ld-add-fusion,log-vrgather,logic-imm-imm-fusion,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,lui-mem-fusion,m,mips-p8700,mul-add-fusion,mulw-addw-fusion,no-default-unroll,no-sink-splat-operands,no-trailing-seq-cst-fence,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,optimized-nf5-segment-load-store,optimized-nf6-segment-load-store,optimized-nf7-segment-load-store,optimized-nf8-segment-load-store,optimized-zero-stride-load,predictable-select-expensive,prefer-vsetvli-over-read-vlenb,prefer-w-inst,q,relax,reserve-x1,reserve-x10,reserve-x11,reserve-x12,reserve-x13,reserve-x14,reserve-x15,reserve-x16,reserve-x17,reserve-x18,reserve-x19,reserve-x2,reserve-x20,reserve-x21,reserve-x22,reserve-x23,reserve-x24,reserve-x25,reserve-x26,reserve-x27,reserve-x28,reserve-x29,reserve-x3,reserve-x30,reserve-x31,reserve-x4,reserve-x5,reserve-x6,reserve-x7,reserve-x8,reserve-x9,rva20s64,rva20u64,rva22s64,rva22u64,rva23s64,rva23u64,rvb23s64,rvb23u64,rvi20u32,rvi20u64,save-restore,sdext,sdtrig,sh1adduw-lh-fusion,sha,shcounterenw,shgatpa,shift-imm-op-fusion,shifted-zextw-fusion,shlcofideleg,short-forward-branch-opt,shtvala,shvsatpa,shvstvala,shvstvecd,sifive7,smaia,smcdeleg,smcntrpmf,smcsrind,smdbltrp,smepmp,smmpm,smnpm,smrnmi,smstateen,ssaia,ssccfg,ssccptr,sscofpmf,sscounterenw,sscsrind,ssdbltrp,ssnpm,sspm,ssqosid,ssstateen,ssstrict,sstc,sstvala,sstvecd,ssu64xl,sub-sltiu-fusion,sub-sltu-fusion,supm,svade,svadu,svbare,svinval,svnapot,svpbmt,svvptc,tagged-globals,unaligned-scalar-mem,unaligned-vector-mem,use-postra-scheduler,v,ventana-veyron,vl-dependent-latency,vxrm-pipeline-flush,xandesbfhcvt,xandesperf,xandesvbfhcvt,xandesvdot,xandesvpackfph,xandesvsintload,xcvalu,xcvbi,xcvbitmanip,xcvelw,xcvmac,xcvmem,xcvsimd,xmipscbop,xmipscmov,xmipslsp,xsfcease,xsfmm128t,xsfmm16t,xsfmm32a16f,xsfmm32a32f,xsfmm32a8f,xsfmm32a8i,xsfmm32t,xsfmm64a64f,xsfmm64t,xsfmmbase,xsfvcp,xsfvfnrclipxfqf,xsfvfwmaccqqq,xsfvqmaccdod,xsfvqmaccqoq,xsifivecdiscarddlone,xsifivecflushdlone,xsmtvdot,xsmtvdotii,xtheadba,xtheadbb,xtheadbs,xtheadcmo,xtheadcondmov,xtheadfmemidx,xtheadmac,xtheadmemidx,xtheadmempair,xtheadsync,xtheadvdot,xventanacondops,xwchc,za128rs,za64rs,zaamo,zabha,zacas,zalrsc,zama16b,zawrs,zba,zbb,zbc,zbkb,zbkc,zbkx,zbs,zca,zcb,zcd,zce,zcf,zclsd,zcmop,zcmp,zcmt,zdinx,zexth-fusion,zextw-fusion,zfa,zfbfmin,zfh,zfhmin,zfinx,zhinx,zhinxmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccamoc,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zilsd,zimop,zk,zkn,zknd,zkne,zknh,zkr,zks,zksed,zksh,zkt,zmmul,ztso,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvknc,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl16384b,zvl2048b,zvl256b,zvl32768b,zvl32b,zvl4096b,zvl512b,zvl64b,zvl65536b,zvl8192b"),
};
// Generated with the featuregen script in `misc/featuregen`
@@ -648,7 +650,7 @@ gb_global int target_microarch_counts[TargetArch_COUNT] = {
// TargetArch_wasm64p32:
4,
// TargetArch_riscv64:
51,
53,
};
// Generated with the featuregen script in `misc/featuregen`
@@ -1149,6 +1151,8 @@ gb_global MicroarchFeatureList microarch_features_list[] = {
{ str_lit("sifive-u74"), str_lit("64bit,a,c,d,f,i,m,no-default-unroll,short-forward-branch-opt,sifive7,use-postra-scheduler,zaamo,zalrsc,zca,zicsr,zifencei,zmmul") },
{ str_lit("sifive-x280"), str_lit("64bit,a,c,d,dlen-factor-2,f,i,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-zero-stride-load,short-forward-branch-opt,sifive7,use-postra-scheduler,v,vl-dependent-latency,zaamo,zalrsc,zba,zbb,zca,zfh,zfhmin,zicsr,zifencei,zmmul,zve32f,zve32x,zve64d,zve64f,zve64x,zvfh,zvfhmin,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("sifive-x390"), str_lit("64bit,a,b,c,d,dlen-factor-2,experimental-zicfilp,experimental-zicfiss,f,i,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-zero-stride-load,short-forward-branch-opt,sifive7,use-postra-scheduler,v,vl-dependent-latency,xsifivecdiscarddlone,xsifivecflushdlone,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbs,zca,zcb,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkr,zkt,zmmul,zvbb,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkt,zvl1024b,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("spacemit-a100"), str_lit("64bit,a,add-or-sub-andi-fusion,addi-mem-fusion,andi-add-fusion,andi-sub-fusion,auipc-addi-fusion,b,branch-fusion,c,d,dlen-factor-2,f,fcvt-fmul-or-fmuladd-fusion,h,i,logic-imm-imm-fusion,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,lui-mem-fusion,m,no-default-unroll,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,prefer-w-inst,sh1adduw-lh-fusion,sha,shcounterenw,shgatpa,shtvala,shvsatpa,shvstvala,shvstvecd,smepmp,smnpm,smstateen,ssccptr,sscofpmf,sscounterenw,ssnpm,sspm,ssstateen,sstc,sstvala,sstvecd,ssu64xl,sub-sltiu-fusion,sub-sltu-fusion,supm,svade,svbare,svinval,svnapot,svpbmt,use-postra-scheduler,v,vxrm-pipeline-flush,xsmtvdotii,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbc,zbkc,zbs,zca,zcb,zcd,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkt,zmmul,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl1024b,zvl128b,zvl256b,zvl32b,zvl512b,zvl64b") },
{ str_lit("spacemit-x100"), str_lit("64bit,a,add-mem-fusion,b,c,d,dlen-factor-2,f,h,i,logic-imm-reg-fusion,logic-reg-imm-fusion,logic-reg-reg-fusion,lui-addi-fusion,m,mul-add-fusion,mulw-addw-fusion,no-default-unroll,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,sha,shcounterenw,shgatpa,shift-imm-op-fusion,shtvala,shvsatpa,shvstvala,shvstvecd,smepmp,smnpm,smstateen,ssccptr,sscofpmf,sscounterenw,ssnpm,sspm,ssstateen,sstc,sstvala,sstvecd,ssu64xl,supm,svade,svbare,svinval,svnapot,svpbmt,use-postra-scheduler,v,vxrm-pipeline-flush,xsmtvdot,za64rs,zaamo,zalrsc,zawrs,zba,zbb,zbc,zbkc,zbs,zca,zcb,zcd,zcmop,zfa,zfbfmin,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintntl,zihintpause,zihpm,zimop,zkt,zmmul,zvbb,zvbc,zve32f,zve32x,zve64d,zve64f,zve64x,zvfbfmin,zvfbfwma,zvfh,zvfhmin,zvkb,zvkg,zvkn,zvkned,zvkng,zvknha,zvknhb,zvks,zvksc,zvksed,zvksg,zvksh,zvkt,zvl128b,zvl256b,zvl32b,zvl64b") },
{ str_lit("spacemit-x60"), str_lit("64bit,a,b,c,d,dlen-factor-2,f,i,m,optimized-nf2-segment-load-store,optimized-nf3-segment-load-store,optimized-nf4-segment-load-store,ssccptr,sscofpmf,sscounterenw,sstc,sstvala,sstvecd,svade,svbare,svinval,svnapot,svpbmt,unaligned-scalar-mem,v,vxrm-pipeline-flush,za64rs,zaamo,zalrsc,zba,zbb,zbc,zbkc,zbs,zca,zfh,zfhmin,zic64b,zicbom,zicbop,zicboz,ziccamoa,ziccif,zicclsm,ziccrse,zicntr,zicond,zicsr,zifencei,zihintpause,zihpm,zkt,zmmul,zve32f,zve32x,zve64d,zve64f,zve64x,zvfh,zvfhmin,zvkt,zvl128b,zvl256b,zvl32b,zvl64b") },
{ str_lit("syntacore-scr1-base"), str_lit("32bit,c,i,no-default-unroll,zca,zicsr,zifencei") },
{ str_lit("syntacore-scr1-max"), str_lit("32bit,c,i,m,no-default-unroll,zca,zicsr,zifencei,zmmul") },

58
src/check_builtin.cpp
View File

@@ -2447,7 +2447,7 @@ gb_internal bool check_builtin_procedure_directive(CheckerContext *c, Operand *o
} else {
Operand o = {};
Entity *e = check_ident(c, &o, arg, nullptr, nullptr, true);
if (e == nullptr || (e->flags & EntityFlag_Param) == 0) {
if (e == nullptr || (e->kind != Entity_Procedure && (e->flags & EntityFlag_Param) == 0)) {
error(arg, "'#caller_expression' expected a valid earlier parameter name");
}
arg->Ident.entity = e;
@@ -5282,6 +5282,62 @@ gb_internal bool check_builtin_procedure(CheckerContext *c, Operand *operand, As
break;
}
case BuiltinProc_soa_copy_from_slice: {
Operand array_ptr = {};
Operand offset = {};
Operand args = {};
check_expr(c, &array_ptr, ce->args[0]);
if (array_ptr.mode == Addressing_Invalid) {
return false;
}
if (!is_type_pointer(array_ptr.type)) {
gbString s = type_to_string(array_ptr.type);
error(array_ptr.expr, "Expected a pointer to a #soa dynamic array, got %s", s);
gb_string_free(s);
return false;
}
Type *array_type = type_deref(array_ptr.type);
if (!is_type_soa_dynamic_array(array_type)) {
gbString s = type_to_string(array_ptr.type);
error(array_ptr.expr, "Expected a pointer to a #soa dynamic array, got %s", s);
gb_string_free(s);
return false;
}
Type *at = base_type(array_type);
GB_ASSERT(at->kind == Type_Struct);
Type *elem = at->Struct.soa_elem;
check_expr_with_type_hint(c, &offset, ce->args[1], t_int);
if (offset.mode == Addressing_Invalid) {
return false;
}
if (!is_type_integer(offset.type)) {
gbString s = type_to_string(array_ptr.type);
error(array_ptr.expr, "Expected an integer as the offset for '%.*s', got %s", s, LIT(builtin_name));
gb_string_free(s);
return false;
}
Type *slice_hint = alloc_type_slice(elem);
check_expr_with_type_hint(c, &args, ce->args[2], slice_hint);
if (args.mode == Addressing_Invalid) {
return false;
}
if (!are_types_identical(base_type(args.type), slice_hint)) {
gbString s = type_to_string(slice_hint);
gbString t = type_to_string(args.type);
error(array_ptr.expr, "Expected a %s to use as the slice '%.*s', got %s", s, LIT(builtin_name), t);
gb_string_free(t);
gb_string_free(s);
return false;
}
operand->mode = Addressing_NoValue;
operand->type = nullptr;
break;
}
case BuiltinProc_concatenate: {
Operand lhs = {};

13
src/check_expr.cpp
View File

@@ -1307,9 +1307,13 @@ gb_internal void check_assignment(CheckerContext *c, Operand *operand, Type *typ
if (context_name == "procedure argument") {
if (is_type_slice(src) && are_types_identical(src->Slice.elem, dst)) {
gbString a = expr_to_string(operand->expr);
error_line("\tSuggestion: Did you mean to pass the slice into the variadic parameter with ..%s?\n\n", a);
error_line("\tSuggestion: Did you mean to pass the slice into the variadic parameter with ..%s?\n", a);
gb_string_free(a);
}
} else if (context_name == "bit_set 'in'") {
if (is_type_bit_set(operand->type)) {
error_line("\tSuggestion: Prefer <= if you want a superset\n");
}
}
if (src->kind == dst->kind && src->kind == Type_Proc) {
Type *x = src;
@@ -4421,7 +4425,12 @@ gb_internal void check_binary_expr(CheckerContext *c, Operand *x, Ast *node, Typ
if (is_type_bit_set(rhs_type)) {
Type *elem = base_type(rhs_type)->BitSet.elem;
check_expr_with_type_hint(c, x, be->left, elem);
Type *type_hint = elem;
Ast *left = unparen_expr(be->left);
if (left != nullptr && left->kind == Ast_CompoundLit) {
type_hint = rhs_type;
}
check_expr_with_type_hint(c, x, left, type_hint);
} else if (is_type_map(rhs_type)) {
Type *key = base_type(rhs_type)->Map.key;
check_expr_with_type_hint(c, x, be->left, key);

12
src/checker_builtin_procs.hpp
View File

@@ -60,6 +60,7 @@ enum BuiltinProcId {
BuiltinProc_matrix_flatten,
BuiltinProc_soa_struct,
BuiltinProc_soa_copy_from_slice,
BuiltinProc_concatenate,
@@ -99,12 +100,12 @@ enum BuiltinProcId {
BuiltinProc_volatile_store,
BuiltinProc_volatile_load,
BuiltinProc_unaligned_store,
BuiltinProc_unaligned_load,
BuiltinProc_non_temporal_store,
BuiltinProc_non_temporal_load,
BuiltinProc_prefetch_read_instruction,
BuiltinProc_prefetch_read_data,
BuiltinProc_prefetch_write_instruction,
@@ -242,7 +243,7 @@ BuiltinProc__simd_begin,
// Platform specific SIMD intrinsics
BuiltinProc_simd_x86__MM_SHUFFLE,
BuiltinProc__simd_end,
// Platform specific intrinsics
BuiltinProc_syscall,
BuiltinProc_syscall_bsd,
@@ -328,7 +329,7 @@ BuiltinProc__type_simple_boolean_end,
BuiltinProc_type_has_field,
BuiltinProc_type_field_type,
BuiltinProc_type_field_bit_offset,
BuiltinProc_type_field_bit_size,
@@ -467,8 +468,9 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
{STR_LIT("outer_product"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("hadamard_product"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("matrix_flatten"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("soa_struct"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, // Type
{STR_LIT("soa_copy_from_slice"), 3, false, Expr_Stmt, BuiltinProcPkg_intrinsics},
{STR_LIT("concatenate"), 2, true, Expr_Expr, BuiltinProcPkg_intrinsics},

23
src/llvm_backend_general.cpp
View File

@@ -330,6 +330,29 @@ gb_internal lbLoopData lb_loop_start(lbProcedure *p, isize count, Type *index_ty
return data;
}
gb_internal lbLoopData lb_loop_start_runtime(lbProcedure *p, lbValue count) {
lbLoopData data = {};
lbValue max = count;
data.idx_addr = lb_add_local_generated(p, count.type, true);
data.body = lb_create_block(p, "loop.body");
data.done = lb_create_block(p, "loop.done");
data.loop = lb_create_block(p, "loop.loop");
lb_emit_jump(p, data.loop);
lb_start_block(p, data.loop);
data.idx = lb_addr_load(p, data.idx_addr);
lbValue cond = lb_emit_comp(p, Token_Lt, data.idx, max);
lb_emit_if(p, cond, data.body, data.done);
lb_start_block(p, data.body);
return data;
}
gb_internal void lb_loop_end(lbProcedure *p, lbLoopData const &data) {
if (data.idx_addr.addr.value != nullptr) {
lb_emit_increment(p, data.idx_addr.addr);

101
src/llvm_backend_proc.cpp
View File

@@ -3355,6 +3355,95 @@ gb_internal lbValue lb_build_builtin_proc(lbProcedure *p, Ast *expr, TypeAndValu
// "Intrinsics"
case BuiltinProc_soa_copy_from_slice:
{
lbValue ptr = lb_build_expr(p, ce->args[0]);
lbValue offset = lb_build_expr(p, ce->args[1]);
lbValue args = lb_build_expr(p, ce->args[2]);
Type *ptr_type = base_type(ptr.type);
Type *array_type = base_type(type_deref(ptr_type));
GB_ASSERT(is_type_soa_dynamic_array(array_type));
Type *elem = array_type->Struct.soa_elem;
i32 field_count = 0;
if (is_type_array(elem)) {
field_count = cast(i32)get_array_type_count(elem);
} else {
Type *bt = base_type(elem);
GB_ASSERT(bt->kind == Type_Struct);
field_count = cast(i32)bt->Struct.fields.count;
}
if (field_count == 0) {
return {};
}
GB_ASSERT(field_count >= 1);
Type *slice_type = base_type(args.type);
GB_ASSERT(slice_type->kind == Type_Slice);
GB_ASSERT(are_types_identical(slice_type->Slice.elem, elem));
lbValue arg_ptr = lb_slice_elem(p, args);
lbValue arg_len = lb_slice_len(p, args);
lbValue soa_array_len = lb_soa_struct_len(p, ptr);
offset = lb_emit_conv(p, offset, t_int);
lbValue max_soa_len = lb_emit_arith(p, Token_Sub, soa_array_len, offset, t_int);
lbValue max_len = lb_emit_min(p, t_int, arg_len, max_soa_len);
if (field_count <= 16) {
lbValue *ps = gb_alloc_array(temporary_allocator(), lbValue, field_count);
for (i32 field_index = 0; field_index < field_count; field_index++) {
ps[field_index] = lb_emit_load(p, lb_emit_struct_ep(p, ptr, field_index));
}
for (i32 field_index = 0; field_index < field_count; field_index++) {
auto loop_data = lb_loop_start_runtime(p, max_len);
lbValue j = loop_data.idx;
lbValue index = lb_emit_arith(p, Token_Add, j, offset, t_int);
lbValue dst = lb_emit_ptr_offset(p, ps[field_index], index);
// make sure it's ^T and not [^]T
dst.type = alloc_type_multi_pointer_to_pointer(dst.type);
lbValue src_ptr = lb_emit_ptr_offset(p, arg_ptr, j);
src_ptr = lb_emit_struct_ep(p, src_ptr, field_index);
lbValue src = lb_emit_load(p, src_ptr);
lb_emit_store(p, dst, src);
lb_loop_end(p, loop_data);
}
} else {
for (i32 field_index = 0; field_index < field_count; field_index++) {
Type *type = array_type->Struct.fields[field_index]->type;
GB_ASSERT(type->kind == Type_MultiPointer);
type = type->MultiPointer.elem;
lbValue dst = lb_emit_load(p, lb_emit_struct_ep(p, ptr, field_index));
dst = lb_emit_ptr_offset(p, dst, offset);
dst.type = alloc_type_multi_pointer_to_pointer(dst.type);
auto loop_data = lb_loop_start_runtime(p, max_len);
lbValue src = lb_emit_ptr_offset(p, arg_ptr, loop_data.idx);
lbValue d = lb_emit_ptr_offset(p, dst, loop_data.idx);
lbValue s = lb_emit_struct_ep(p, src, field_index);
GB_ASSERT(are_types_identical(d.type, s.type));
lb_mem_copy_non_overlapping(p, d, s, lb_const_int(p->module, t_int, type_size_of(type)), false);
lb_loop_end(p, loop_data);
}
}
return {};
}
case BuiltinProc_alloca:
{
lbValue sz = lb_build_expr(p, ce->args[0]);
@@ -3418,6 +3507,18 @@ gb_internal lbValue lb_build_builtin_proc(lbProcedure *p, Ast *expr, TypeAndValu
LLVMValueRef the_asm = llvm_get_inline_asm(func_type, str_lit("mrs $0, cntvct_el0"), str_lit("=r"), has_side_effects);
GB_ASSERT(the_asm != nullptr);
res.value = LLVMBuildCall2(p->builder, func_type, the_asm, nullptr, 0, "");
#if LLVM_VERSION_MAJOR > 19 || (LLVM_VERSION_MAJOR == 19 && LLVM_VERSION_MINOR >= 1)
} else if (build_context.metrics.arch == TargetArch_riscv64 && build_context.metrics.os == TargetOs_linux) {
// Linux in it's infinite wisdom decided that `rdcycle` should not be
// available to userland past Linux 6.6. Some inline assembly with
// `rdtime` would also work, but LLVM issue #117701 suggests just
// using this intrinsic.
//
// Support for this was introduced in commit `b8ed69e`, and is present
// in LLVM tags 19.1.0-rc1.
char const *name = "llvm.readsteadycounter";
res.value = lb_call_intrinsic(p, name, nullptr, 0, nullptr, 0);
#endif
} else {
char const *name = "llvm.readcyclecounter";
res.value = lb_call_intrinsic(p, name, nullptr, 0, nullptr, 0);

4
src/llvm_backend_stmt.cpp
View File

@@ -2201,7 +2201,9 @@ gb_internal void lb_build_type_switch_stmt(lbProcedure *p, AstTypeSwitchStmt *ss
LLVMValueRef switch_instr = nullptr;
if (type_size_of(parent_base_type) == 0) {
GB_ASSERT(tag.value == nullptr);
switch_instr = LLVMBuildSwitch(p->builder, lb_const_bool(p->module, t_llvm_bool, false).value, else_block->block, cast(unsigned)num_cases);
GB_ASSERT(switch_kind == TypeSwitch_Union); // zero size only possible for union{}
Type *ut = type_deref(parent.type);
switch_instr = LLVMBuildSwitch(p->builder, lb_const_int(m, union_tag_type(ut), 0).value, else_block->block, cast(unsigned)num_cases);
} else {
GB_ASSERT(tag.value != nullptr);
switch_instr = LLVMBuildSwitch(p->builder, tag.value, else_block->block, cast(unsigned)num_cases);

5
src/types.cpp
View File

@@ -2001,6 +2001,11 @@ gb_internal bool is_type_soa_struct(Type *t) {
if (t == nullptr) { return false; }
return t->kind == Type_Struct && t->Struct.soa_kind != StructSoa_None;
}
gb_internal bool is_type_soa_dynamic_array(Type *t) {
t = base_type(t);
if (t == nullptr) { return false; }
return t->kind == Type_Struct && t->Struct.soa_kind == StructSoa_Dynamic;
}
gb_internal bool is_type_raw_union(Type *t) {
t = base_type(t);