From 7b588d08182b731c899bfbf13e4d5e5fdda9239d Mon Sep 17 00:00:00 2001 From: Brendan Punsky Date: Mon, 15 Jun 2026 12:24:17 -0400 Subject: [PATCH] rexcode/arm64: implement CCMP/CCMN register-form encode forms First entries of the encode-coverage effort. Adds CCMP_REG/CCMN_REG (W/X) to ENCODING_TABLE with llvm-mc-verified bit patterns; the table metaprogram regenerates the encode/decode blobs and the typed builders auto-generate (inst_ccmp_reg/inst_ccmn_reg). Verified: encode matches llvm-mc (CCMP X1,X2,#3,EQ=0xFA420023; CCMN W5,W6,#7,NE=0x3A4610A7), decode round-trips, arm64 check+tests pass. Needs no encoder change (reuses RN/RM/NZCV_FIELD/COND_HI). The imm5 forms (immediate at bits 20:16) need a new Operand_Encoding and follow separately. Workflow proven: llvm-mc as the encoding oracle -> SoT entry -> regen -> builder auto-generates -> verify. --- core/rexcode/arm64/mnemonic_builders.odin | 8 + .../arm64/tablegen/encoding_table.odin | 19 + .../tablegen/generated/decode_tables.odin | 420 ++-- .../tablegen/generated/encode_tables.odin | 2148 +++++++++-------- .../arm64/tables/arm64.encode_forms.bin | Bin 23920 -> 24000 bytes .../arm64/tables/arm64.encode_runs.bin | Bin 8960 -> 8960 bytes core/rexcode/arm64/tables/arm64.entries.bin | Bin 23960 -> 24040 bytes core/rexcode/arm64/tables/arm64.idx_op0.bin | Bin 64 -> 64 bytes 8 files changed, 1316 insertions(+), 1279 deletions(-) diff --git a/core/rexcode/arm64/mnemonic_builders.odin b/core/rexcode/arm64/mnemonic_builders.odin index eab687b8e..6ecf23491 100644 --- a/core/rexcode/arm64/mnemonic_builders.odin +++ b/core/rexcode/arm64/mnemonic_builders.odin @@ -119,6 +119,10 @@ inst_csinv_r_r_r_c :: #force_inline proc "contextless" (dst: Regist emit_csinv_r_r_r_c :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csinv_r_r_r_c(dst, src, src2, cond)) } inst_csneg_r_r_r_c :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction { return Instruction{mnemonic = .CSNEG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_cond(cond)}} } emit_csneg_r_r_r_c :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) { append(instructions, inst_csneg_r_r_r_c(dst, src, src2, cond)) } +inst_ccmp_reg_r_r_i_c :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMP_REG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_cond(cond)}} } +emit_ccmp_reg_r_r_i_c :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append(instructions, inst_ccmp_reg_r_r_i_c(dst, src, imm, cond)) } +inst_ccmn_reg_r_r_i_c :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction { return Instruction{mnemonic = .CCMN_REG, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), op_cond(cond)}} } +emit_ccmn_reg_r_r_i_c :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) { append(instructions, inst_ccmn_reg_r_r_i_c(dst, src, imm, cond)) } inst_extr_r_r_r_i :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .EXTR, operand_count = 4, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), op_imm(imm, 1)}} } emit_extr_r_r_r_i :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) { append(instructions, inst_extr_r_r_r_i(dst, src, src2, imm)) } inst_b_l :: #force_inline proc "contextless" (label: u32) -> Instruction { return inst_branch(.B, label) } @@ -1680,6 +1684,10 @@ inst_csinv :: inst_csinv_r_r_r_c emit_csinv :: emit_csinv_r_r_r_c inst_csneg :: inst_csneg_r_r_r_c emit_csneg :: emit_csneg_r_r_r_c +inst_ccmp_reg :: inst_ccmp_reg_r_r_i_c +emit_ccmp_reg :: emit_ccmp_reg_r_r_i_c +inst_ccmn_reg :: inst_ccmn_reg_r_r_i_c +emit_ccmn_reg :: emit_ccmn_reg_r_r_i_c inst_extr :: inst_extr_r_r_r_i emit_extr :: emit_extr_r_r_r_i inst_b :: inst_b_l diff --git a/core/rexcode/arm64/tablegen/encoding_table.odin b/core/rexcode/arm64/tablegen/encoding_table.odin index daec6ad10..34629dc67 100644 --- a/core/rexcode/arm64/tablegen/encoding_table.odin +++ b/core/rexcode/arm64/tablegen/encoding_table.odin @@ -282,6 +282,25 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{ {.CSNEG, {.X_REG, .X_REG, .X_REG, .COND}, {.RD, .RN, .RM, .COND_HI}, 0xDA800400, 0xFFE00C00, .BASE, {is_64=true}}, }, + // ========================================================================= + // §7b Conditional compare (register form) + // ========================================================================= + // + // sf op S 11010010 Rm cond 0 o2 Rn o3 nzcv (o2 = bit11 = 0 for register) + // Mask = bits[31:21] + bits[11:10] + bit[4] = 0xFFE00C10 + // CCMP op=1 (0x7A/0xFA), CCMN op=0 (0x3A/0xBA); nzcv@3:0, cond@15:12. + // (imm5 forms, which place the immediate at bits 20:16, need a new + // Operand_Encoding and are added separately.) + + .CCMP_REG = { + {.CCMP_REG, {.W_REG, .W_REG, .NZCV_IMM, .COND}, {.RN, .RM, .NZCV_FIELD, .COND_HI}, 0x7A400000, 0xFFE00C10, .BASE, {sets_flags=true}}, + {.CCMP_REG, {.X_REG, .X_REG, .NZCV_IMM, .COND}, {.RN, .RM, .NZCV_FIELD, .COND_HI}, 0xFA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true}}, + }, + .CCMN_REG = { + {.CCMN_REG, {.W_REG, .W_REG, .NZCV_IMM, .COND}, {.RN, .RM, .NZCV_FIELD, .COND_HI}, 0x3A400000, 0xFFE00C10, .BASE, {sets_flags=true}}, + {.CCMN_REG, {.X_REG, .X_REG, .NZCV_IMM, .COND}, {.RN, .RM, .NZCV_FIELD, .COND_HI}, 0xBA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true}}, + }, + // ========================================================================= // §8 Branches // ========================================================================= diff --git a/core/rexcode/arm64/tablegen/generated/decode_tables.odin b/core/rexcode/arm64/tablegen/generated/decode_tables.odin index 717d5eb30..f4437ec44 100644 --- a/core/rexcode/arm64/tablegen/generated/decode_tables.odin +++ b/core/rexcode/arm64/tablegen/generated/decode_tables.odin @@ -8,7 +8,7 @@ package rexcode_arm64_generated import lib "../.." @(rodata) -DECODE_ENTRIES := [1198]lib.Decode_Entry{ +DECODE_ENTRIES := [1202]lib.Decode_Entry{ { .AMX_SET, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00201220, 0xFFFFFFFF, .AMX, {} }, { .AMX_CLR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00201240, 0xFFFFFFFF, .AMX, {} }, { .AMX_LDX, {.X_REG,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x00201000, 0xFFFFFFE0, .AMX, {is_64=true} }, @@ -60,12 +60,12 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SME_FMOPS, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_S}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0x80800010, 0xFFE08010, .SME, {} }, { .SME_BFMOPA, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0x81800000, 0xFFE08010, .SME, {} }, { .SME_BFMOPS, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0x81800010, 0xFFE08010, .SME, {} }, - { .SME_SMOPA, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA0C00000, 0xFFE08010, .SME, {is_64=true} }, { .SME_SMOPA, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_B}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0xA0800000, 0xFFE08010, .SME, {} }, - { .SME_SMOPS, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA0C00010, 0xFFE08010, .SME, {is_64=true} }, + { .SME_SMOPA, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA0C00000, 0xFFE08010, .SME, {is_64=true} }, { .SME_SMOPS, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_B}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0xA0800010, 0xFFE08010, .SME, {} }, - { .SME_UMOPA, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA1E00000, 0xFFE08010, .SME, {is_64=true} }, + { .SME_SMOPS, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA0C00010, 0xFFE08010, .SME, {is_64=true} }, { .SME_UMOPA, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_B}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0xA1A00000, 0xFFE08010, .SME, {} }, + { .SME_UMOPA, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA1E00000, 0xFFE08010, .SME, {is_64=true} }, { .SME_UMOPS, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_B}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0xA1A00010, 0xFFE08010, .SME, {} }, { .SME_UMOPS, {.ZA_TILE_D,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_H}, {.ZA_TILE_NUM_D,.PG,.PM3,.VN}, 0xA1E00010, 0xFFE08010, .SME, {is_64=true} }, { .SME_USMOPA, {.ZA_TILE_S,.P_REG_MERGE,.P_REG_MERGE,.Z_REG_B}, {.ZA_TILE_NUM_S,.PG,.PM3,.VN}, 0xA1800000, 0xFFE08010, .SME, {} }, @@ -93,13 +93,13 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SVE_PTRUE, {.P_REG,.SVE_PATTERN,.NONE,.NONE}, {.PD,.SVE_PATTERN,.NONE,.NONE}, 0x2518E000, 0xFFFFFC10, .SVE, {} }, { .SVE_PTRUES, {.P_REG,.SVE_PATTERN,.NONE,.NONE}, {.PD,.SVE_PATTERN,.NONE,.NONE}, 0x2519E000, 0xFFFFFC10, .SVE, {sets_flags=true} }, { .SVE_DUP_Z, {.Z_REG_H,.W_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05603800, 0xFFFFFC00, .SVE, {} }, - { .SVE_DUP_Z, {.Z_REG_B,.W_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05203800, 0xFFFFFC00, .SVE, {} }, { .SVE_DUP_Z, {.Z_REG_D,.X_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05E03800, 0xFFFFFC00, .SVE, {is_64=true} }, + { .SVE_DUP_Z, {.Z_REG_B,.W_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05203800, 0xFFFFFC00, .SVE, {} }, { .SVE_DUP_Z, {.Z_REG_S,.W_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05A03800, 0xFFFFFC00, .SVE, {} }, - { .SVE_REV_Z, {.Z_REG_S,.Z_REG_S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05B83800, 0xFFFFFC00, .SVE, {} }, + { .SVE_REV_Z, {.Z_REG_H,.Z_REG_H,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05783800, 0xFFFFFC00, .SVE, {} }, { .SVE_REV_Z, {.Z_REG_B,.Z_REG_B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05383800, 0xFFFFFC00, .SVE, {} }, { .SVE_REV_Z, {.Z_REG_D,.Z_REG_D,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05F83800, 0xFFFFFC00, .SVE, {is_64=true} }, - { .SVE_REV_Z, {.Z_REG_H,.Z_REG_H,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05783800, 0xFFFFFC00, .SVE, {} }, + { .SVE_REV_Z, {.Z_REG_S,.Z_REG_S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x05B83800, 0xFFFFFC00, .SVE, {} }, { .SVE_AESE, {.Z_REG_B,.Z_REG_B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x4522E000, 0xFFFFFC00, .SVE2, {} }, { .SVE_AESD, {.Z_REG_B,.Z_REG_B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x4522E400, 0xFFFFFC00, .SVE2, {} }, { .SME_RDSVL, {.X_REG,.IMM_6,.NONE,.NONE}, {.RD,.IMM6,.NONE,.NONE}, 0x04BF5800, 0xFFFFFC00, .SME, {is_64=true} }, @@ -116,92 +116,92 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SVE_SPLICE, {.Z_REG_B,.P_REG_GOV,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VN}, 0x052C8000, 0xFFFFE000, .SVE, {} }, { .SVE_BFCVT, {.Z_REG_H,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x658AA000, 0xFFFFE000, .SVE, {} }, { .SVE_BFCVTNT, {.Z_REG_H,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x648AA000, 0xFFFFE000, .SVE, {} }, - { .SVE_ADD_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04200000, 0xFFE0FC00, .SVE, {} }, - { .SVE_ADD_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E00000, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_ADD_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04600000, 0xFFE0FC00, .SVE, {} }, + { .SVE_ADD_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E00000, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_ADD_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04200000, 0xFFE0FC00, .SVE, {} }, { .SVE_ADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A00000, 0xFFE0FC00, .SVE, {} }, - { .SVE_SUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A00400, 0xFFE0FC00, .SVE, {} }, - { .SVE_SUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E00400, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_SUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04600400, 0xFFE0FC00, .SVE, {} }, { .SVE_SUB_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04200400, 0xFFE0FC00, .SVE, {} }, + { .SVE_SUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E00400, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_SUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A00400, 0xFFE0FC00, .SVE, {} }, { .SVE_SQADD_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E01000, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_SQADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01000, 0xFFE0FC00, .SVE, {} }, { .SVE_SQADD_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201000, 0xFFE0FC00, .SVE, {} }, { .SVE_SQADD_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601000, 0xFFE0FC00, .SVE, {} }, - { .SVE_UQADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01400, 0xFFE0FC00, .SVE, {} }, - { .SVE_UQADD_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201400, 0xFFE0FC00, .SVE, {} }, - { .SVE_UQADD_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601400, 0xFFE0FC00, .SVE, {} }, { .SVE_UQADD_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E01400, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_SQSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601800, 0xFFE0FC00, .SVE, {} }, - { .SVE_SQSUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01800, 0xFFE0FC00, .SVE, {} }, + { .SVE_UQADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01400, 0xFFE0FC00, .SVE, {} }, + { .SVE_UQADD_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601400, 0xFFE0FC00, .SVE, {} }, + { .SVE_UQADD_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201400, 0xFFE0FC00, .SVE, {} }, { .SVE_SQSUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E01800, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_SQSUB_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201800, 0xFFE0FC00, .SVE, {} }, - { .SVE_UQSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601C00, 0xFFE0FC00, .SVE, {} }, + { .SVE_SQSUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01800, 0xFFE0FC00, .SVE, {} }, + { .SVE_SQSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601800, 0xFFE0FC00, .SVE, {} }, { .SVE_UQSUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04A01C00, 0xFFE0FC00, .SVE, {} }, - { .SVE_UQSUB_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201C00, 0xFFE0FC00, .SVE, {} }, { .SVE_UQSUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04E01C00, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_UQSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04601C00, 0xFFE0FC00, .SVE, {} }, + { .SVE_UQSUB_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x04201C00, 0xFFE0FC00, .SVE, {} }, + { .SVE_FADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800000, 0xFFE0FC00, .SVE, {} }, { .SVE_FADD_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C00000, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_FADD_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65400000, 0xFFE0FC00, .SVE, {} }, - { .SVE_FADD_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800000, 0xFFE0FC00, .SVE, {} }, - { .SVE_FSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65400400, 0xFFE0FC00, .SVE, {} }, - { .SVE_FSUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C00400, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_FSUB_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800400, 0xFFE0FC00, .SVE, {} }, - { .SVE_FMUL_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800800, 0xFFE0FC00, .SVE, {} }, + { .SVE_FSUB_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C00400, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_FSUB_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65400400, 0xFFE0FC00, .SVE, {} }, { .SVE_FMUL_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C00800, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_FMUL_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800800, 0xFFE0FC00, .SVE, {} }, { .SVE_FMUL_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65400800, 0xFFE0FC00, .SVE, {} }, - { .SVE_FRECPS, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C01800, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_FRECPS, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65801800, 0xFFE0FC00, .SVE, {} }, { .SVE_FRECPS, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65401800, 0xFFE0FC00, .SVE, {} }, + { .SVE_FRECPS, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C01800, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_FRSQRTS, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C01C00, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_FRSQRTS, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65401C00, 0xFFE0FC00, .SVE, {} }, { .SVE_FRSQRTS, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65801C00, 0xFFE0FC00, .SVE, {} }, - { .SVE_FRSQRTS, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C01C00, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_FTSMUL, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65400C00, 0xFFE0FC00, .SVE, {} }, { .SVE_FTSMUL, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65800C00, 0xFFE0FC00, .SVE, {} }, { .SVE_FTSMUL, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x65C00C00, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_TBL, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05603000, 0xFFE0FC00, .SVE, {} }, - { .SVE_TBL, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A03000, 0xFFE0FC00, .SVE, {} }, { .SVE_TBL, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E03000, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_TBL, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A03000, 0xFFE0FC00, .SVE, {} }, + { .SVE_TBL, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05603000, 0xFFE0FC00, .SVE, {} }, { .SVE_TBL, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05203000, 0xFFE0FC00, .SVE, {} }, - { .SVE_ZIP1_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606000, 0xFFE0FC00, .SVE, {} }, { .SVE_ZIP1_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206000, 0xFFE0FC00, .SVE, {} }, { .SVE_ZIP1_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E06000, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_ZIP1_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606000, 0xFFE0FC00, .SVE, {} }, { .SVE_ZIP1_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A06000, 0xFFE0FC00, .SVE, {} }, { .SVE_ZIP2_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E06400, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_ZIP2_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606400, 0xFFE0FC00, .SVE, {} }, - { .SVE_ZIP2_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206400, 0xFFE0FC00, .SVE, {} }, { .SVE_ZIP2_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A06400, 0xFFE0FC00, .SVE, {} }, - { .SVE_UZP1_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E06800, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_UZP1_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606800, 0xFFE0FC00, .SVE, {} }, - { .SVE_UZP1_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206800, 0xFFE0FC00, .SVE, {} }, + { .SVE_ZIP2_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206400, 0xFFE0FC00, .SVE, {} }, + { .SVE_ZIP2_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606400, 0xFFE0FC00, .SVE, {} }, { .SVE_UZP1_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A06800, 0xFFE0FC00, .SVE, {} }, + { .SVE_UZP1_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E06800, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_UZP1_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206800, 0xFFE0FC00, .SVE, {} }, + { .SVE_UZP1_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606800, 0xFFE0FC00, .SVE, {} }, { .SVE_UZP2_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05206C00, 0xFFE0FC00, .SVE, {} }, + { .SVE_UZP2_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606C00, 0xFFE0FC00, .SVE, {} }, { .SVE_UZP2_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A06C00, 0xFFE0FC00, .SVE, {} }, { .SVE_UZP2_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E06C00, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_UZP2_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05606C00, 0xFFE0FC00, .SVE, {} }, - { .SVE_TRN1_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05207000, 0xFFE0FC00, .SVE, {} }, - { .SVE_TRN1_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E07000, 0xFFE0FC00, .SVE, {is_64=true} }, - { .SVE_TRN1_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A07000, 0xFFE0FC00, .SVE, {} }, { .SVE_TRN1_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05607000, 0xFFE0FC00, .SVE, {} }, - { .SVE_TRN2_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E07400, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_TRN1_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05207000, 0xFFE0FC00, .SVE, {} }, + { .SVE_TRN1_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A07000, 0xFFE0FC00, .SVE, {} }, + { .SVE_TRN1_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E07000, 0xFFE0FC00, .SVE, {is_64=true} }, { .SVE_TRN2_Z, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05607400, 0xFFE0FC00, .SVE, {} }, - { .SVE_TRN2_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A07400, 0xFFE0FC00, .SVE, {} }, { .SVE_TRN2_Z, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05207400, 0xFFE0FC00, .SVE, {} }, + { .SVE_TRN2_Z, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05E07400, 0xFFE0FC00, .SVE, {is_64=true} }, + { .SVE_TRN2_Z, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05A07400, 0xFFE0FC00, .SVE, {} }, { .SVE_SQRDMLAH, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44C07000, 0xFFE0FC00, .SVE2, {is_64=true} }, - { .SVE_SQRDMLAH, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44007000, 0xFFE0FC00, .SVE2, {} }, { .SVE_SQRDMLAH, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44807000, 0xFFE0FC00, .SVE2, {} }, { .SVE_SQRDMLAH, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44407000, 0xFFE0FC00, .SVE2, {} }, + { .SVE_SQRDMLAH, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44007000, 0xFFE0FC00, .SVE2, {} }, + { .SVE_SQRDMLSH, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44807400, 0xFFE0FC00, .SVE2, {} }, { .SVE_SQRDMLSH, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44007400, 0xFFE0FC00, .SVE2, {} }, { .SVE_SQRDMLSH, {.Z_REG_H,.Z_REG_H,.Z_REG_H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44407400, 0xFFE0FC00, .SVE2, {} }, { .SVE_SQRDMLSH, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44C07400, 0xFFE0FC00, .SVE2, {is_64=true} }, - { .SVE_SQRDMLSH, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x44807400, 0xFFE0FC00, .SVE2, {} }, - { .SVE_ADCLB, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4540D000, 0xFFE0FC00, .SVE2, {is_64=true} }, { .SVE_ADCLB, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4500D000, 0xFFE0FC00, .SVE2, {} }, - { .SVE_ADCLT, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4500D400, 0xFFE0FC00, .SVE2, {} }, + { .SVE_ADCLB, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4540D000, 0xFFE0FC00, .SVE2, {is_64=true} }, { .SVE_ADCLT, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4540D400, 0xFFE0FC00, .SVE2, {is_64=true} }, + { .SVE_ADCLT, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4500D400, 0xFFE0FC00, .SVE2, {} }, { .SVE_SBCLB, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4580D000, 0xFFE0FC00, .SVE2, {} }, { .SVE_SBCLB, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x45C0D000, 0xFFE0FC00, .SVE2, {is_64=true} }, - { .SVE_SBCLT, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x45C0D400, 0xFFE0FC00, .SVE2, {is_64=true} }, { .SVE_SBCLT, {.Z_REG_S,.Z_REG_S,.Z_REG_S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4580D400, 0xFFE0FC00, .SVE2, {} }, + { .SVE_SBCLT, {.Z_REG_D,.Z_REG_D,.Z_REG_D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x45C0D400, 0xFFE0FC00, .SVE2, {is_64=true} }, { .SVE_TBL2, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05202800, 0xFFE0FC00, .SVE2, {} }, { .SVE_TBX, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x05202C00, 0xFFE0FC00, .SVE2, {} }, { .SVE_HISTSEG, {.Z_REG_B,.Z_REG_B,.Z_REG_B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4520A000, 0xFFE0FC00, .SVE2, {} }, @@ -248,23 +248,23 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SVE_EORS_P, {.P_REG,.P_REG_ZERO,.P_REG,.P_REG}, {.PD,.PG4,.PN,.PM}, 0x25404200, 0xFFE0C210, .SVE, {sets_flags=true} }, { .SVE_CMPNE, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x2480A010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPNE, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x2400A010, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPNE, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x2440A010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPNE, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C0A010, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, - { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C08000, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, - { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24408000, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24808000, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPNE, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x2440A010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x24008000, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24808010, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24408000, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C08000, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, + { .SVE_CMPGE, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24808000, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C08010, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24408010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x24008010, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C08010, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, - { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24400010, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24800010, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C00010, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, + { .SVE_CMPGT, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24808010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x24000010, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24800000, 0xFFE0E010, .SVE, {sets_flags=true} }, - { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24400000, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C00010, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, + { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24800010, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPHI, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24400010, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C00000, 0xFFE0E010, .SVE, {sets_flags=true, is_64=true} }, + { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x24400000, 0xFFE0E010, .SVE, {sets_flags=true} }, + { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x24800000, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_CMPHS, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x24000000, 0xFFE0E010, .SVE, {sets_flags=true} }, { .SVE_LDR_P, {.P_REG,.MEM,.NONE,.NONE}, {.PD,.SVE_OFFSET_BASE_SI,.NONE,.NONE}, 0x85800000, 0xFFE0E010, .SVE, {} }, { .SVE_STR_P, {.P_REG,.MEM,.NONE,.NONE}, {.PD,.SVE_OFFSET_BASE_SI,.NONE,.NONE}, 0xE5800000, 0xFFE0E010, .SVE, {} }, @@ -272,137 +272,137 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SVE_MATCH, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x45608000, 0xFFE0E010, .SVE2, {sets_flags=true} }, { .SVE_NMATCH, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x45208010, 0xFFE0E010, .SVE2, {sets_flags=true} }, { .SVE_NMATCH, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x45608010, 0xFFE0E010, .SVE2, {sets_flags=true} }, - { .SVE_ADD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C00000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_ADD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04400000, 0xFFE0E000, .SVE, {} }, { .SVE_ADD_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04000000, 0xFFE0E000, .SVE, {} }, + { .SVE_ADD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C00000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_ADD_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04800000, 0xFFE0E000, .SVE, {} }, + { .SVE_ADD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04400000, 0xFFE0E000, .SVE, {} }, + { .SVE_SUB_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C10000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_SUB_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04810000, 0xFFE0E000, .SVE, {} }, { .SVE_SUB_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04010000, 0xFFE0E000, .SVE, {} }, { .SVE_SUB_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04410000, 0xFFE0E000, .SVE, {} }, - { .SVE_SUB_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04810000, 0xFFE0E000, .SVE, {} }, - { .SVE_SUB_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C10000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_SUBR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04830000, 0xFFE0E000, .SVE, {} }, + { .SVE_SUBR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04030000, 0xFFE0E000, .SVE, {} }, { .SVE_SUBR_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04430000, 0xFFE0E000, .SVE, {} }, { .SVE_SUBR_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C30000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_SUBR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04030000, 0xFFE0E000, .SVE, {} }, - { .SVE_MUL_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04900000, 0xFFE0E000, .SVE, {} }, + { .SVE_SUBR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04830000, 0xFFE0E000, .SVE, {} }, { .SVE_MUL_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04100000, 0xFFE0E000, .SVE, {} }, { .SVE_MUL_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D00000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_MUL_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04500000, 0xFFE0E000, .SVE, {} }, - { .SVE_SMULH_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04520000, 0xFFE0E000, .SVE, {} }, + { .SVE_MUL_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04900000, 0xFFE0E000, .SVE, {} }, + { .SVE_SMULH_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D20000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_SMULH_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04920000, 0xFFE0E000, .SVE, {} }, { .SVE_SMULH_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04120000, 0xFFE0E000, .SVE, {} }, - { .SVE_SMULH_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D20000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_UMULH_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04130000, 0xFFE0E000, .SVE, {} }, - { .SVE_UMULH_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D30000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_SMULH_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04520000, 0xFFE0E000, .SVE, {} }, { .SVE_UMULH_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04930000, 0xFFE0E000, .SVE, {} }, + { .SVE_UMULH_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D30000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_UMULH_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04530000, 0xFFE0E000, .SVE, {} }, - { .SVE_SDIV_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D40000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_UMULH_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04130000, 0xFFE0E000, .SVE, {} }, { .SVE_SDIV_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04940000, 0xFFE0E000, .SVE, {} }, - { .SVE_UDIV_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04950000, 0xFFE0E000, .SVE, {} }, + { .SVE_SDIV_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D40000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_UDIV_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D50000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_SMAX_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04880000, 0xFFE0E000, .SVE, {} }, + { .SVE_UDIV_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04950000, 0xFFE0E000, .SVE, {} }, { .SVE_SMAX_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04080000, 0xFFE0E000, .SVE, {} }, + { .SVE_SMAX_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04880000, 0xFFE0E000, .SVE, {} }, { .SVE_SMAX_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04480000, 0xFFE0E000, .SVE, {} }, { .SVE_SMAX_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C80000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_UMAX_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04890000, 0xFFE0E000, .SVE, {} }, - { .SVE_UMAX_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04490000, 0xFFE0E000, .SVE, {} }, - { .SVE_UMAX_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04090000, 0xFFE0E000, .SVE, {} }, { .SVE_UMAX_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04C90000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_UMAX_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04090000, 0xFFE0E000, .SVE, {} }, + { .SVE_UMAX_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04490000, 0xFFE0E000, .SVE, {} }, { .SVE_SMIN_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x044A0000, 0xFFE0E000, .SVE, {} }, + { .SVE_SMIN_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040A0000, 0xFFE0E000, .SVE, {} }, { .SVE_SMIN_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04CA0000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_SMIN_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x048A0000, 0xFFE0E000, .SVE, {} }, - { .SVE_SMIN_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040A0000, 0xFFE0E000, .SVE, {} }, + { .SVE_UMIN_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040B0000, 0xFFE0E000, .SVE, {} }, { .SVE_UMIN_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x048B0000, 0xFFE0E000, .SVE, {} }, { .SVE_UMIN_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04CB0000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_UMIN_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x044B0000, 0xFFE0E000, .SVE, {} }, - { .SVE_UMIN_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040B0000, 0xFFE0E000, .SVE, {} }, { .SVE_SABD_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040C0000, 0xFFE0E000, .SVE, {} }, - { .SVE_SABD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x044C0000, 0xFFE0E000, .SVE, {} }, - { .SVE_SABD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04CC0000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_SABD_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x048C0000, 0xFFE0E000, .SVE, {} }, + { .SVE_SABD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04CC0000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_SABD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x044C0000, 0xFFE0E000, .SVE, {} }, { .SVE_UABD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x044D0000, 0xFFE0E000, .SVE, {} }, - { .SVE_UABD_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040D0000, 0xFFE0E000, .SVE, {} }, { .SVE_UABD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04CD0000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_UABD_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x040D0000, 0xFFE0E000, .SVE, {} }, { .SVE_UABD_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x048D0000, 0xFFE0E000, .SVE, {} }, - { .SVE_ASR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04908000, 0xFFE0E000, .SVE, {} }, { .SVE_ASR_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D08000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_ASR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04108000, 0xFFE0E000, .SVE, {} }, + { .SVE_ASR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04908000, 0xFFE0E000, .SVE, {} }, { .SVE_ASR_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04508000, 0xFFE0E000, .SVE, {} }, - { .SVE_LSL_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D38000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_ASR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04108000, 0xFFE0E000, .SVE, {} }, { .SVE_LSL_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04138000, 0xFFE0E000, .SVE, {} }, + { .SVE_LSL_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D38000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_LSL_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04938000, 0xFFE0E000, .SVE, {} }, { .SVE_LSL_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04538000, 0xFFE0E000, .SVE, {} }, + { .SVE_LSR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04118000, 0xFFE0E000, .SVE, {} }, + { .SVE_LSR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04918000, 0xFFE0E000, .SVE, {} }, { .SVE_LSR_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x04D18000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_LSR_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x04518000, 0xFFE0E000, .SVE, {} }, - { .SVE_LSR_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x04918000, 0xFFE0E000, .SVE, {} }, - { .SVE_LSR_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.Z_REG_B}, {.VD,.PG,.VD,.VM}, 0x04118000, 0xFFE0E000, .SVE, {} }, + { .SVE_ABS_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D6A000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_ABS_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0496A000, 0xFFE0E000, .SVE, {} }, { .SVE_ABS_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0456A000, 0xFFE0E000, .SVE, {} }, { .SVE_ABS_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0416A000, 0xFFE0E000, .SVE, {} }, - { .SVE_ABS_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D6A000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_NEG_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D7A000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_NEG_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0417A000, 0xFFE0E000, .SVE, {} }, - { .SVE_NEG_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0457A000, 0xFFE0E000, .SVE, {} }, { .SVE_NEG_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0497A000, 0xFFE0E000, .SVE, {} }, - { .SVE_CLS_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0458A000, 0xFFE0E000, .SVE, {} }, + { .SVE_NEG_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0457A000, 0xFFE0E000, .SVE, {} }, + { .SVE_NEG_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D7A000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_CLS_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0418A000, 0xFFE0E000, .SVE, {} }, - { .SVE_CLS_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0498A000, 0xFFE0E000, .SVE, {} }, { .SVE_CLS_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D8A000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_CLZ_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0499A000, 0xFFE0E000, .SVE, {} }, + { .SVE_CLS_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0458A000, 0xFFE0E000, .SVE, {} }, + { .SVE_CLS_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0498A000, 0xFFE0E000, .SVE, {} }, { .SVE_CLZ_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04D9A000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_CLZ_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0459A000, 0xFFE0E000, .SVE, {} }, { .SVE_CLZ_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0419A000, 0xFFE0E000, .SVE, {} }, - { .SVE_CNT_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04DAA000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_CNT_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x041AA000, 0xFFE0E000, .SVE, {} }, - { .SVE_CNT_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x045AA000, 0xFFE0E000, .SVE, {} }, + { .SVE_CLZ_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x0499A000, 0xFFE0E000, .SVE, {} }, { .SVE_CNT_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x049AA000, 0xFFE0E000, .SVE, {} }, - { .SVE_FADD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C08000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_FADD_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65808000, 0xFFE0E000, .SVE, {} }, + { .SVE_CNT_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x045AA000, 0xFFE0E000, .SVE, {} }, + { .SVE_CNT_PRED, {.Z_REG_B,.P_REG_MERGE,.Z_REG_B,.NONE}, {.VD,.PG,.VN,.NONE}, 0x041AA000, 0xFFE0E000, .SVE, {} }, + { .SVE_CNT_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04DAA000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FADD_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65408000, 0xFFE0E000, .SVE, {} }, + { .SVE_FADD_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65808000, 0xFFE0E000, .SVE, {} }, + { .SVE_FADD_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C08000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FSUB_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65418000, 0xFFE0E000, .SVE, {} }, { .SVE_FSUB_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65818000, 0xFFE0E000, .SVE, {} }, { .SVE_FSUB_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C18000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FMUL_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65828000, 0xFFE0E000, .SVE, {} }, { .SVE_FMUL_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65428000, 0xFFE0E000, .SVE, {} }, { .SVE_FMUL_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C28000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_FDIV_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x654D8000, 0xFFE0E000, .SVE, {} }, { .SVE_FDIV_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x658D8000, 0xFFE0E000, .SVE, {} }, + { .SVE_FDIV_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x654D8000, 0xFFE0E000, .SVE, {} }, { .SVE_FDIV_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65CD8000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_FMAX_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C68000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_FMAX_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65868000, 0xFFE0E000, .SVE, {} }, { .SVE_FMAX_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65468000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMIN_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65878000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMAX_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65868000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMAX_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C68000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FMIN_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C78000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_FMIN_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65878000, 0xFFE0E000, .SVE, {} }, { .SVE_FMIN_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65478000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMAXNM_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65848000, 0xFFE0E000, .SVE, {} }, { .SVE_FMAXNM_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65448000, 0xFFE0E000, .SVE, {} }, { .SVE_FMAXNM_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C48000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_FMAXNM_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65848000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMINNM_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65458000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMINNM_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C58000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FMINNM_PRED, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VD,.VM}, 0x65858000, 0xFFE0E000, .SVE, {} }, - { .SVE_FABS_Z, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x049CA000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMINNM_PRED, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VD,.VM}, 0x65C58000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_FMINNM_PRED, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VD,.VM}, 0x65458000, 0xFFE0E000, .SVE, {} }, { .SVE_FABS_Z, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04DCA000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FABS_Z, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x045CA000, 0xFFE0E000, .SVE, {} }, - { .SVE_FNEG_Z, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x045DA000, 0xFFE0E000, .SVE, {} }, - { .SVE_FNEG_Z, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x049DA000, 0xFFE0E000, .SVE, {} }, + { .SVE_FABS_Z, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x049CA000, 0xFFE0E000, .SVE, {} }, { .SVE_FNEG_Z, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x04DDA000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_FNEG_Z, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x049DA000, 0xFFE0E000, .SVE, {} }, + { .SVE_FNEG_Z, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x045DA000, 0xFFE0E000, .SVE, {} }, { .SVE_FSQRT_Z, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.NONE}, {.VD,.PG,.VN,.NONE}, 0x658DA000, 0xFFE0E000, .SVE, {} }, { .SVE_FSQRT_Z, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.NONE}, {.VD,.PG,.VN,.NONE}, 0x65CDA000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FSQRT_Z, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.NONE}, {.VD,.PG,.VN,.NONE}, 0x654DA000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMLA, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65600000, 0xFFE0E000, .SVE, {} }, { .SVE_FMLA, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VN,.VM}, 0x65E00000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FMLA, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A00000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMLS, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A02000, 0xFFE0E000, .SVE, {} }, - { .SVE_FMLS, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65602000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMLA, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65600000, 0xFFE0E000, .SVE, {} }, { .SVE_FMLS, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VN,.VM}, 0x65E02000, 0xFFE0E000, .SVE, {is_64=true} }, + { .SVE_FMLS, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65602000, 0xFFE0E000, .SVE, {} }, + { .SVE_FMLS, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A02000, 0xFFE0E000, .SVE, {} }, { .SVE_FNMLA, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65604000, 0xFFE0E000, .SVE, {} }, - { .SVE_FNMLA, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VN,.VM}, 0x65E04000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FNMLA, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A04000, 0xFFE0E000, .SVE, {} }, - { .SVE_FNMLS, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A06000, 0xFFE0E000, .SVE, {} }, - { .SVE_FNMLS, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65606000, 0xFFE0E000, .SVE, {} }, + { .SVE_FNMLA, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VN,.VM}, 0x65E04000, 0xFFE0E000, .SVE, {is_64=true} }, { .SVE_FNMLS, {.Z_REG_D,.P_REG_MERGE,.Z_REG_D,.Z_REG_D}, {.VD,.PG,.VN,.VM}, 0x65E06000, 0xFFE0E000, .SVE, {is_64=true} }, - { .SVE_CMPEQ, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C0A000, 0xFFE0E000, .SVE, {sets_flags=true, is_64=true} }, + { .SVE_FNMLS, {.Z_REG_H,.P_REG_MERGE,.Z_REG_H,.Z_REG_H}, {.VD,.PG,.VN,.VM}, 0x65606000, 0xFFE0E000, .SVE, {} }, + { .SVE_FNMLS, {.Z_REG_S,.P_REG_MERGE,.Z_REG_S,.Z_REG_S}, {.VD,.PG,.VN,.VM}, 0x65A06000, 0xFFE0E000, .SVE, {} }, { .SVE_CMPEQ, {.P_REG,.P_REG_ZERO,.Z_REG_B,.Z_REG_B}, {.PD,.PG,.VN,.VM}, 0x2400A000, 0xFFE0E000, .SVE, {sets_flags=true} }, + { .SVE_CMPEQ, {.P_REG,.P_REG_ZERO,.Z_REG_D,.Z_REG_D}, {.PD,.PG,.VN,.VM}, 0x24C0A000, 0xFFE0E000, .SVE, {sets_flags=true, is_64=true} }, { .SVE_CMPEQ, {.P_REG,.P_REG_ZERO,.Z_REG_H,.Z_REG_H}, {.PD,.PG,.VN,.VM}, 0x2440A000, 0xFFE0E000, .SVE, {sets_flags=true} }, { .SVE_CMPEQ, {.P_REG,.P_REG_ZERO,.Z_REG_S,.Z_REG_S}, {.PD,.PG,.VN,.VM}, 0x2480A000, 0xFFE0E000, .SVE, {sets_flags=true} }, { .SVE_LD1B, {.Z_REG_B,.P_REG_ZERO,.MEM,.NONE}, {.VD,.PG,.SVE_OFFSET_BASE_SS,.NONE}, 0xA4004000, 0xFFE0E000, .SVE, {} }, @@ -463,8 +463,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SVE_ST1W_SCATTER_S, {.Z_REG_S,.P_REG,.MEM,.NONE}, {.VD,.PG,.SVE_OFFSET_BASE_VEC,.NONE}, 0xE5008000, 0xFFA0E000, .SVE, {} }, { .SVE_ST1W_SCATTER_D, {.Z_REG_D,.P_REG,.MEM,.NONE}, {.VD,.PG,.SVE_OFFSET_BASE_VEC,.NONE}, 0xE5008000, 0xFFA0E000, .SVE, {is_64=true} }, { .SVE_ST1D_SCATTER_D, {.Z_REG_D,.P_REG,.MEM,.NONE}, {.VD,.PG,.SVE_OFFSET_BASE_VEC,.NONE}, 0xE5808000, 0xFFA0E000, .SVE, {is_64=true} }, - { .LDAR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xC8DFFC00, 0xFFFFFC00, .BASE, {is_64=true} }, { .LDAR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x88DFFC00, 0xFFFFFC00, .BASE, {} }, + { .LDAR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xC8DFFC00, 0xFFFFFC00, .BASE, {is_64=true} }, { .STLR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xC89FFC00, 0xFFFFFC00, .BASE, {is_64=true} }, { .STLR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x889FFC00, 0xFFFFFC00, .BASE, {} }, { .LDARB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x08DFFC00, 0xFFFFFC00, .BASE, {} }, @@ -473,14 +473,14 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .STLRH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x489FFC00, 0xFFFFFC00, .BASE, {} }, { .LDXR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xC85F7C00, 0xFFE0FC00, .BASE, {is_64=true} }, { .LDXR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x885F7C00, 0xFFE0FC00, .BASE, {} }, - { .STXR, {.W_REG,.X_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0xC8007C00, 0xFFE0FC00, .BASE, {is_64=true} }, { .STXR, {.W_REG,.W_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0x88007C00, 0xFFE0FC00, .BASE, {} }, + { .STXR, {.W_REG,.X_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0xC8007C00, 0xFFE0FC00, .BASE, {is_64=true} }, { .LDAXR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xC85FFC00, 0xFFE0FC00, .BASE, {is_64=true} }, { .LDAXR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x885FFC00, 0xFFE0FC00, .BASE, {} }, { .STLXR, {.W_REG,.W_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0x8800FC00, 0xFFE0FC00, .BASE, {} }, { .STLXR, {.W_REG,.X_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0xC800FC00, 0xFFE0FC00, .BASE, {is_64=true} }, - { .LDXP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_A,.NONE}, 0x887F0000, 0xFFFF8000, .BASE, {} }, { .LDXP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_A,.NONE}, 0xC87F0000, 0xFFFF8000, .BASE, {is_64=true} }, + { .LDXP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_A,.NONE}, 0x887F0000, 0xFFFF8000, .BASE, {} }, { .LDAXP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_A,.NONE}, 0xC87F8000, 0xFFFF8000, .BASE, {is_64=true} }, { .LDAXP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_A,.NONE}, 0x887F8000, 0xFFFF8000, .BASE, {} }, { .LDXRB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x085F7C00, 0xFFE0FC00, .BASE, {} }, @@ -491,14 +491,14 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .STXRH, {.W_REG,.W_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0x48007C00, 0xFFE0FC00, .BASE, {} }, { .LDAXRH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x485FFC00, 0xFFE0FC00, .BASE, {} }, { .STLXRH, {.W_REG,.W_REG,.MEM,.NONE}, {.RD,.RT,.OFFSET_BASE_A,.NONE}, 0x4800FC00, 0xFFE0FC00, .BASE, {} }, - { .CAS, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8A07C00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CAS, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x88A07C00, 0xFFE0FC00, .LSE, {} }, - { .CASA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x88E07C00, 0xFFE0FC00, .LSE, {} }, + { .CAS, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8A07C00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8E07C00, 0xFFE0FC00, .LSE, {is_64=true} }, + { .CASA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x88E07C00, 0xFFE0FC00, .LSE, {} }, { .CASL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x88A0FC00, 0xFFE0FC00, .LSE, {} }, { .CASL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8A0FC00, 0xFFE0FC00, .LSE, {is_64=true} }, - { .CASAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8E0FC00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x88E0FC00, 0xFFE0FC00, .LSE, {} }, + { .CASAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xC8E0FC00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASB, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08A07C00, 0xFFE0FC00, .LSE, {} }, { .CASAB, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08E07C00, 0xFFE0FC00, .LSE, {} }, { .CASLB, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08A0FC00, 0xFFE0FC00, .LSE, {} }, @@ -507,52 +507,52 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .CASAH, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48E07C00, 0xFFE0FC00, .LSE, {} }, { .CASLH, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48A0FC00, 0xFFE0FC00, .LSE, {} }, { .CASALH, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48E0FC00, 0xFFE0FC00, .LSE, {} }, - { .CASP, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48207C00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASP, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08207C00, 0xFFE0FC00, .LSE, {} }, - { .CASPA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08607C00, 0xFFE0FC00, .LSE, {} }, + { .CASP, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48207C00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASPA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x48607C00, 0xFFE0FC00, .LSE, {is_64=true} }, + { .CASPA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x08607C00, 0xFFE0FC00, .LSE, {} }, { .CASPL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x0820FC00, 0xFFE0FC00, .LSE, {} }, { .CASPL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x4820FC00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASPAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x4860FC00, 0xFFE0FC00, .LSE, {is_64=true} }, { .CASPAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0x0860FC00, 0xFFE0FC00, .LSE, {} }, { .STXP, {.W_REG,.W_REG,.W_REG,.MEM}, {.RD,.RT,.RT2,.OFFSET_BASE_A}, 0x88200000, 0xFFE08000, .BASE, {} }, { .STXP, {.W_REG,.X_REG,.X_REG,.MEM}, {.RD,.RT,.RT2,.OFFSET_BASE_A}, 0xC8200000, 0xFFE08000, .BASE, {is_64=true} }, - { .STLXP, {.W_REG,.W_REG,.W_REG,.MEM}, {.RD,.RT,.RT2,.OFFSET_BASE_A}, 0x88208000, 0xFFE08000, .BASE, {} }, { .STLXP, {.W_REG,.X_REG,.X_REG,.MEM}, {.RD,.RT,.RT2,.OFFSET_BASE_A}, 0xC8208000, 0xFFE08000, .BASE, {is_64=true} }, - { .LDP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x29400000, 0xFFC00000, .BASE, {} }, + { .STLXP, {.W_REG,.W_REG,.W_REG,.MEM}, {.RD,.RT,.RT2,.OFFSET_BASE_A}, 0x88208000, 0xFFE08000, .BASE, {} }, { .LDP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0xA9400000, 0xFFC00000, .BASE, {is_64=true} }, + { .LDP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x29400000, 0xFFC00000, .BASE, {} }, { .STP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x29000000, 0xFFC00000, .BASE, {} }, { .STP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0xA9000000, 0xFFC00000, .BASE, {is_64=true} }, { .LDPSW, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x69400000, 0xFFC00000, .BASE, {is_64=true} }, { .LDP_PRE, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0x29C00000, 0xFFC00000, .BASE, {} }, { .LDP_PRE, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0xA9C00000, 0xFFC00000, .BASE, {is_64=true} }, - { .STP_PRE, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0xA9800000, 0xFFC00000, .BASE, {is_64=true} }, { .STP_PRE, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0x29800000, 0xFFC00000, .BASE, {} }, - { .LDP_POST, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0x28C00000, 0xFFC00000, .BASE, {} }, + { .STP_PRE, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0xA9800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDP_POST, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0xA8C00000, 0xFFC00000, .BASE, {is_64=true} }, + { .LDP_POST, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0x28C00000, 0xFFC00000, .BASE, {} }, { .STP_POST, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0x28800000, 0xFFC00000, .BASE, {} }, { .STP_POST, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0xA8800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDPSW_PRE, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_PRE,.NONE}, 0x69C00000, 0xFFC00000, .BASE, {is_64=true} }, { .LDPSW_POST, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_POST,.NONE}, 0x68C00000, 0xFFC00000, .BASE, {is_64=true} }, { .LDNP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x28400000, 0xFFC00000, .BASE, {} }, { .LDNP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0xA8400000, 0xFFC00000, .BASE, {is_64=true} }, - { .STNP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0xA8000000, 0xFFC00000, .BASE, {is_64=true} }, { .STNP, {.W_REG,.W_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x28000000, 0xFFC00000, .BASE, {} }, + { .STNP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0xA8000000, 0xFFC00000, .BASE, {is_64=true} }, { .STGP, {.X_REG,.X_REG,.MEM,.NONE}, {.RT,.RT2,.OFFSET_BASE_S9,.NONE}, 0x69000000, 0xFFC00000, .MTE, {is_64=true} }, - { .MOV_REG, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x2A0003E0, 0xFFE0FFE0, .BASE, {} }, { .MOV_REG, {.X_REG,.X_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xAA0003E0, 0xFFE0FFE0, .BASE, {is_64=true} }, + { .MOV_REG, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x2A0003E0, 0xFFE0FFE0, .BASE, {} }, { .MVN, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x2A2003E0, 0xFFE0FFE0, .BASE, {} }, { .MVN, {.X_REG,.X_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xAA2003E0, 0xFFE0FFE0, .BASE, {is_64=true} }, - { .CMP_ER, {.XSP_REG,.X_EXTENDED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xEB20001F, 0xFFE0001F, .BASE, {sets_flags=true, is_64=true} }, { .CMP_ER, {.WSP_REG,.W_EXTENDED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x6B20001F, 0xFFE0001F, .BASE, {sets_flags=true} }, + { .CMP_ER, {.XSP_REG,.X_EXTENDED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xEB20001F, 0xFFE0001F, .BASE, {sets_flags=true, is_64=true} }, { .CMN_ER, {.WSP_REG,.W_EXTENDED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x2B20001F, 0xFFE0001F, .BASE, {sets_flags=true} }, { .CMN_ER, {.XSP_REG,.X_EXTENDED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xAB20001F, 0xFFE0001F, .BASE, {sets_flags=true, is_64=true} }, - { .NEG_SR, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xCB0003E0, 0xFF2003E0, .BASE, {is_64=true} }, { .NEG_SR, {.W_REG,.W_SHIFTED,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x4B0003E0, 0xFF2003E0, .BASE, {} }, + { .NEG_SR, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xCB0003E0, 0xFF2003E0, .BASE, {is_64=true} }, { .NEGS, {.W_REG,.W_SHIFTED,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x6B0003E0, 0xFF2003E0, .BASE, {sets_flags=true} }, { .NEGS, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xEB0003E0, 0xFF2003E0, .BASE, {sets_flags=true, is_64=true} }, - { .CMP_SR, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xEB00001F, 0xFF20001F, .BASE, {sets_flags=true, is_64=true} }, { .CMP_SR, {.W_REG,.W_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x6B00001F, 0xFF20001F, .BASE, {sets_flags=true} }, + { .CMP_SR, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xEB00001F, 0xFF20001F, .BASE, {sets_flags=true, is_64=true} }, { .CMN_SR, {.X_REG,.X_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0xAB00001F, 0xFF20001F, .BASE, {sets_flags=true, is_64=true} }, { .CMN_SR, {.W_REG,.W_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x2B00001F, 0xFF20001F, .BASE, {sets_flags=true} }, { .TST_SR, {.W_REG,.W_SHIFTED,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x6A00001F, 0xFF20001F, .BASE, {sets_flags=true} }, @@ -591,8 +591,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .EON_SR, {.X_REG,.X_REG,.X_SHIFTED,.NONE}, {.RD,.RN,.RM,.NONE}, 0xCA200000, 0xFF200000, .BASE, {is_64=true} }, { .LD1, {.V_2D,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C407C00, 0xFFFFFC00, .NEON, {} }, { .ST1, {.V_2D,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C007C00, 0xFFFFFC00, .NEON, {} }, - { .LD1, {.V_8H,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C407400, 0xFFFFF400, .NEON, {} }, { .LD1, {.V_4S,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C407800, 0xFFFFF800, .NEON, {} }, + { .LD1, {.V_8H,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C407400, 0xFFFFF400, .NEON, {} }, { .ST1, {.V_4S,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C007800, 0xFFFFF800, .NEON, {} }, { .ST1, {.V_8H,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C007400, 0xFFFFF400, .NEON, {} }, { .LD1, {.V_16B,.MEM,.NONE,.NONE}, {.VD,.OFFSET_BASE_A,.NONE,.NONE}, 0x4C407000, 0xFFFFF000, .NEON, {} }, @@ -605,8 +605,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SM4E, {.V_4S,.V_4S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0xCEC08400, 0xFFFFFC00, .CRYPTO, {} }, { .BFCVTN, {.V_8H,.V_4S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x0EA16800, 0xFFFFFC00, .BF16, {} }, { .BFCVTN2, {.V_8H,.V_4S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x4EA16800, 0xFFFFFC00, .BF16, {} }, - { .NOT_V_ALIAS, {.V_8B,.V_8B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x2E205800, 0xFFFFFC00, .NEON, {} }, { .NOT_V_ALIAS, {.V_16B,.V_16B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x6E205800, 0xFFFFFC00, .NEON, {} }, + { .NOT_V_ALIAS, {.V_8B,.V_8B,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x2E205800, 0xFFFFFC00, .NEON, {} }, { .SHA512H, {.Q_REG,.Q_REG,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE608000, 0xFFE0FC00, .CRYPTO, {} }, { .SHA512H2, {.Q_REG,.Q_REG,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE608400, 0xFFE0FC00, .CRYPTO, {} }, { .SHA512SU1, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE608800, 0xFFE0FC00, .CRYPTO, {} }, @@ -614,54 +614,54 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SM3PARTW1, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE60C000, 0xFFE0FC00, .CRYPTO, {} }, { .SM3PARTW2, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE60C400, 0xFFE0FC00, .CRYPTO, {} }, { .SM4EKEY, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0xCE60C800, 0xFFE0FC00, .CRYPTO, {} }, - { .PMULL, {.V_8H,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E20E000, 0xFFE0FC00, .CRYPTO, {} }, { .PMULL, {.V_2D,.V_1D,.V_1D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0EE0E000, 0xFFE0FC00, .CRYPTO, {} }, + { .PMULL, {.V_8H,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E20E000, 0xFFE0FC00, .CRYPTO, {} }, { .PMULL2, {.V_8H,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E20E000, 0xFFE0FC00, .CRYPTO, {} }, { .PMULL2, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EE0E000, 0xFFE0FC00, .CRYPTO, {} }, { .BFDOT, {.V_4S,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x2E40FC00, 0xFFE0FC00, .BF16, {} }, { .BFMMLA, {.V_4S,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E40EC00, 0xFFE0FC00, .BF16, {} }, { .BFMLALB, {.V_4S,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x2EC0FC00, 0xFFE0FC00, .BF16, {} }, { .BFMLALT, {.V_4S,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EC0FC00, 0xFFE0FC00, .BF16, {} }, - { .ADD_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0EA08400, 0xFFE0FC00, .NEON, {} }, - { .ADD_V, {.V_8B,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E208400, 0xFFE0FC00, .NEON, {} }, - { .ADD_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA08400, 0xFFE0FC00, .NEON, {} }, - { .ADD_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E608400, 0xFFE0FC00, .NEON, {} }, { .ADD_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EE08400, 0xFFE0FC00, .NEON, {} }, - { .ADD_V, {.V_4H,.V_4H,.V_4H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E608400, 0xFFE0FC00, .NEON, {} }, + { .ADD_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA08400, 0xFFE0FC00, .NEON, {} }, + { .ADD_V, {.V_8B,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E208400, 0xFFE0FC00, .NEON, {} }, { .ADD_V, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E208400, 0xFFE0FC00, .NEON, {} }, - { .SUB_V, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E208400, 0xFFE0FC00, .NEON, {} }, - { .SUB_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E608400, 0xFFE0FC00, .NEON, {} }, + { .ADD_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E608400, 0xFFE0FC00, .NEON, {} }, + { .ADD_V, {.V_4H,.V_4H,.V_4H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E608400, 0xFFE0FC00, .NEON, {} }, + { .ADD_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0EA08400, 0xFFE0FC00, .NEON, {} }, { .SUB_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EA08400, 0xFFE0FC00, .NEON, {} }, + { .SUB_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E608400, 0xFFE0FC00, .NEON, {} }, { .SUB_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EE08400, 0xFFE0FC00, .NEON, {} }, + { .SUB_V, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E208400, 0xFFE0FC00, .NEON, {} }, { .MUL_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA09C00, 0xFFE0FC00, .NEON, {} }, - { .MUL_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E609C00, 0xFFE0FC00, .NEON, {} }, { .MUL_V, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E209C00, 0xFFE0FC00, .NEON, {} }, - { .SDOT, {.V_4S,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E809400, 0xFFE0FC00, .DOT, {} }, + { .MUL_V, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E609C00, 0xFFE0FC00, .NEON, {} }, { .SDOT, {.V_2S,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E809400, 0xFFE0FC00, .DOT, {} }, + { .SDOT, {.V_4S,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E809400, 0xFFE0FC00, .DOT, {} }, { .UDOT, {.V_4S,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E809400, 0xFFE0FC00, .DOT, {} }, { .UDOT, {.V_2S,.V_8B,.V_8B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x2E809400, 0xFFE0FC00, .DOT, {} }, + { .FADD_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E60D400, 0xFFE0FC00, .NEON, {} }, { .FADD_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0E20D400, 0xFFE0FC00, .NEON, {} }, { .FADD_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E20D400, 0xFFE0FC00, .NEON, {} }, - { .FADD_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E60D400, 0xFFE0FC00, .NEON, {} }, - { .FSUB_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA0D400, 0xFFE0FC00, .NEON, {} }, - { .FSUB_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0EA0D400, 0xFFE0FC00, .NEON, {} }, { .FSUB_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EE0D400, 0xFFE0FC00, .NEON, {} }, + { .FSUB_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x0EA0D400, 0xFFE0FC00, .NEON, {} }, + { .FSUB_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA0D400, 0xFFE0FC00, .NEON, {} }, + { .FMUL_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E60DC00, 0xFFE0FC00, .NEON, {} }, { .FMUL_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x2E20DC00, 0xFFE0FC00, .NEON, {} }, { .FMUL_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E20DC00, 0xFFE0FC00, .NEON, {} }, - { .FMUL_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E60DC00, 0xFFE0FC00, .NEON, {} }, + { .FDIV_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E60FC00, 0xFFE0FC00, .NEON, {} }, { .FDIV_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E20FC00, 0xFFE0FC00, .NEON, {} }, { .FDIV_V, {.V_2S,.V_2S,.V_2S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x2E20FC00, 0xFFE0FC00, .NEON, {} }, - { .FDIV_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E60FC00, 0xFFE0FC00, .NEON, {} }, { .FMLA_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E20CC00, 0xFFE0FC00, .NEON, {} }, { .FMLA_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E60CC00, 0xFFE0FC00, .NEON, {} }, { .FMLS_V, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EE0CC00, 0xFFE0FC00, .NEON, {} }, { .FMLS_V, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EA0CC00, 0xFFE0FC00, .NEON, {} }, - { .CMEQ, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EE08C00, 0xFFE0FC00, .NEON, {} }, + { .CMEQ, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EA08C00, 0xFFE0FC00, .NEON, {} }, { .CMEQ, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E208C00, 0xFFE0FC00, .NEON, {} }, { .CMEQ, {.V_8H,.V_8H,.V_8H,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E608C00, 0xFFE0FC00, .NEON, {} }, - { .CMEQ, {.V_4S,.V_4S,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EA08C00, 0xFFE0FC00, .NEON, {} }, - { .CMGT, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E203400, 0xFFE0FC00, .NEON, {} }, + { .CMEQ, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EE08C00, 0xFFE0FC00, .NEON, {} }, { .CMGT, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4EE03400, 0xFFE0FC00, .NEON, {} }, + { .CMGT, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E203400, 0xFFE0FC00, .NEON, {} }, { .CMHI, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6E203400, 0xFFE0FC00, .NEON, {} }, { .CMHI, {.V_2D,.V_2D,.V_2D,.NONE}, {.VD,.VN,.VM,.NONE}, 0x6EE03400, 0xFFE0FC00, .NEON, {} }, { .AND_V, {.V_16B,.V_16B,.V_16B,.NONE}, {.VD,.VN,.VM,.NONE}, 0x4E201C00, 0xFFE0FC00, .NEON, {} }, @@ -712,24 +712,24 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SXTB, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x13001C00, 0xFFFFFC00, .BASE, {} }, { .SXTH, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x13003C00, 0xFFFFFC00, .BASE, {} }, { .SXTW, {.X_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x93407C00, 0xFFFFFC00, .BASE, {is_64=true} }, - { .LSR_IMM, {.X_REG,.X_REG,.IMM_6,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0xD340FC00, 0xFFC0FC00, .BASE, {is_64=true} }, { .LSR_IMM, {.W_REG,.W_REG,.IMM_5,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0x53007C00, 0xFFC0FC00, .BASE, {} }, + { .LSR_IMM, {.X_REG,.X_REG,.IMM_6,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0xD340FC00, 0xFFC0FC00, .BASE, {is_64=true} }, { .ASR_IMM, {.W_REG,.W_REG,.IMM_5,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0x13007C00, 0xFFC0FC00, .BASE, {} }, { .ASR_IMM, {.X_REG,.X_REG,.IMM_6,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0x9340FC00, 0xFFC0FC00, .BASE, {is_64=true} }, { .TST_IMM, {.W_REG,.BITMASK_IMM,.NONE,.NONE}, {.RN,.BITMASK_FIELD,.NONE,.NONE}, 0x7200001F, 0xFFC0001F, .BASE, {sets_flags=true} }, { .MOV_BITMASK, {.W_REG,.BITMASK_IMM,.NONE,.NONE}, {.RD,.BITMASK_FIELD,.NONE,.NONE}, 0x320003E0, 0xFFC003E0, .BASE, {} }, { .TST_IMM, {.X_REG,.BITMASK_IMM,.NONE,.NONE}, {.RN,.BITMASK_FIELD,.NONE,.NONE}, 0xF200001F, 0xFF80001F, .BASE, {sets_flags=true, is_64=true} }, { .MOV_BITMASK, {.X_REG,.BITMASK_IMM,.NONE,.NONE}, {.RD,.BITMASK_FIELD,.NONE,.NONE}, 0xB20003E0, 0xFF8003E0, .BASE, {is_64=true} }, - { .EXTR, {.X_REG,.X_REG,.X_REG,.IMM_6}, {.RD,.RN,.RM,.IMM6}, 0x93C00000, 0xFFE08000, .BASE, {is_64=true} }, { .EXTR, {.W_REG,.W_REG,.W_REG,.IMM_6}, {.RD,.RN,.RM,.IMM6}, 0x13800000, 0xFFE08000, .BASE, {} }, + { .EXTR, {.X_REG,.X_REG,.X_REG,.IMM_6}, {.RD,.RN,.RM,.IMM6}, 0x93C00000, 0xFFE08000, .BASE, {is_64=true} }, { .ROR_IMM, {.W_REG,.W_REG,.IMM_5,.NONE}, {.RD,.ENC_DUAL_RN_RM,.ENC_ROR_SHIFT,.NONE}, 0x13800000, 0xFFE00000, .BASE, {} }, { .ROR_IMM, {.X_REG,.X_REG,.IMM_6,.NONE}, {.RD,.ENC_DUAL_RN_RM,.ENC_ROR_SHIFT,.NONE}, 0x93C00000, 0xFFE00000, .BASE, {is_64=true} }, { .AND_IMM, {.WSP_REG,.W_REG,.BITMASK_IMM,.NONE}, {.RD,.RN,.BITMASK_FIELD,.NONE}, 0x12000000, 0xFFC00000, .BASE, {} }, { .ANDS_IMM, {.W_REG,.W_REG,.BITMASK_IMM,.NONE}, {.RD,.RN,.BITMASK_FIELD,.NONE}, 0x72000000, 0xFFC00000, .BASE, {sets_flags=true} }, { .ORR_IMM, {.WSP_REG,.W_REG,.BITMASK_IMM,.NONE}, {.RD,.RN,.BITMASK_FIELD,.NONE}, 0x32000000, 0xFFC00000, .BASE, {} }, { .EOR_IMM, {.WSP_REG,.W_REG,.BITMASK_IMM,.NONE}, {.RD,.RN,.BITMASK_FIELD,.NONE}, 0x52000000, 0xFFC00000, .BASE, {} }, - { .LSL_IMM, {.W_REG,.W_REG,.IMM_5,.NONE}, {.RD,.RN,.ENC_LSL_IMM_W,.NONE}, 0x53000000, 0xFFC00000, .BASE, {} }, { .LSL_IMM, {.X_REG,.X_REG,.IMM_6,.NONE}, {.RD,.RN,.ENC_LSL_IMM_X,.NONE}, 0xD3400000, 0xFFC00000, .BASE, {is_64=true} }, + { .LSL_IMM, {.W_REG,.W_REG,.IMM_5,.NONE}, {.RD,.RN,.ENC_LSL_IMM_W,.NONE}, 0x53000000, 0xFFC00000, .BASE, {} }, { .MOVZ, {.X_REG,.IMM_16,.HW_SHIFT,.NONE}, {.RD,.IMM16,.IMM_HW,.NONE}, 0xD2800000, 0xFF800000, .BASE, {is_64=true} }, { .MOVZ, {.W_REG,.IMM_16,.HW_SHIFT,.NONE}, {.RD,.IMM16,.IMM_HW,.NONE}, 0x52800000, 0xFF800000, .BASE, {} }, { .MOVN, {.W_REG,.IMM_16,.HW_SHIFT,.NONE}, {.RD,.IMM16,.IMM_HW,.NONE}, 0x12800000, 0xFF800000, .BASE, {} }, @@ -832,8 +832,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .MSR_REG, {.SYS_REG,.X_REG,.NONE,.NONE}, {.SYS_FIELD,.RT,.NONE,.NONE}, 0xD5100000, 0xFFF00000, .BASE, {} }, { .B_COND, {.COND,.REL_19,.NONE,.NONE}, {.COND_LO,.BRANCH_19,.NONE,.NONE}, 0x54000000, 0xFF000010, .BASE, {cond_branch=true} }, { .BC_COND, {.COND,.REL_19,.NONE,.NONE}, {.COND_LO,.BRANCH_19,.NONE,.NONE}, 0x54000010, 0xFF000010, .BASE, {cond_branch=true} }, - { .CBZ, {.X_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0xB4000000, 0xFF000000, .BASE, {cond_branch=true, is_64=true} }, { .CBZ, {.W_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0x34000000, 0xFF000000, .BASE, {cond_branch=true} }, + { .CBZ, {.X_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0xB4000000, 0xFF000000, .BASE, {cond_branch=true, is_64=true} }, { .CBNZ, {.W_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0x35000000, 0xFF000000, .BASE, {cond_branch=true} }, { .CBNZ, {.X_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0xB5000000, 0xFF000000, .BASE, {cond_branch=true, is_64=true} }, { .B, {.REL_26,.NONE,.NONE,.NONE}, {.BRANCH_26,.NONE,.NONE,.NONE}, 0x14000000, 0xFC000000, .BASE, {branch=true} }, @@ -859,78 +859,78 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .TBNZ, {.X_REG,.IMM_5,.REL_14,.NONE}, {.RT,.TBZ_BIT,.BRANCH_14,.NONE}, 0x37000000, 0x7F000000, .BASE, {cond_branch=true} }, { .B, {.REL_26,.NONE,.NONE,.NONE}, {.BRANCH_26,.NONE,.NONE,.NONE}, 0x14000000, 0xFC000000, .BASE, {branch=true} }, { .BL, {.REL_26,.NONE,.NONE,.NONE}, {.BRANCH_26,.NONE,.NONE,.NONE}, 0x94000000, 0xFC000000, .BASE, {branch=true} }, - { .LDAPR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xF8BFC000, 0xFFFFFC00, .LSE2, {is_64=true} }, { .LDAPR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xB8BFC000, 0xFFFFFC00, .LSE2, {} }, + { .LDAPR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xF8BFC000, 0xFFFFFC00, .LSE2, {is_64=true} }, { .LDAPRB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x38BFC000, 0xFFFFFC00, .LSE2, {} }, { .LDAPRH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0x78BFC000, 0xFFFFFC00, .LSE2, {} }, { .LDADD, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8200000, 0xFFE0FC00, .LSE, {} }, { .LDADD, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8200000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDADDA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A00000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDADDA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A00000, 0xFFE0FC00, .LSE, {} }, - { .LDADDL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8600000, 0xFFE0FC00, .LSE, {} }, { .LDADDL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8600000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDADDAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E00000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDADDL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8600000, 0xFFE0FC00, .LSE, {} }, { .LDADDAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E00000, 0xFFE0FC00, .LSE, {} }, + { .LDADDAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E00000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDCLR, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8201000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDCLR, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8201000, 0xFFE0FC00, .LSE, {} }, - { .LDCLRA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A01000, 0xFFE0FC00, .LSE, {} }, { .LDCLRA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A01000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDCLRA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A01000, 0xFFE0FC00, .LSE, {} }, { .LDCLRL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8601000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDCLRL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8601000, 0xFFE0FC00, .LSE, {} }, - { .LDCLRAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E01000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDCLRAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E01000, 0xFFE0FC00, .LSE, {} }, - { .LDEOR, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8202000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDCLRAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E01000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDEOR, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8202000, 0xFFE0FC00, .LSE, {} }, - { .LDEORA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A02000, 0xFFE0FC00, .LSE, {} }, + { .LDEOR, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8202000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDEORA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A02000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDEORL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8602000, 0xFFE0FC00, .LSE, {} }, + { .LDEORA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A02000, 0xFFE0FC00, .LSE, {} }, { .LDEORL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8602000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDEORL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8602000, 0xFFE0FC00, .LSE, {} }, { .LDEORAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E02000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDEORAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E02000, 0xFFE0FC00, .LSE, {} }, - { .LDSET, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8203000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSET, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8203000, 0xFFE0FC00, .LSE, {} }, + { .LDSET, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8203000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSETA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A03000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSETA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A03000, 0xFFE0FC00, .LSE, {} }, { .LDSETL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8603000, 0xFFE0FC00, .LSE, {} }, { .LDSETL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8603000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDSETAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E03000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSETAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E03000, 0xFFE0FC00, .LSE, {} }, + { .LDSETAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E03000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMAX, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8204000, 0xFFE0FC00, .LSE, {} }, { .LDSMAX, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8204000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDSMAXA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A04000, 0xFFE0FC00, .LSE, {} }, { .LDSMAXA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A04000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDSMAXL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8604000, 0xFFE0FC00, .LSE, {} }, + { .LDSMAXA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A04000, 0xFFE0FC00, .LSE, {} }, { .LDSMAXL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8604000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDSMAXL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8604000, 0xFFE0FC00, .LSE, {} }, { .LDSMAXAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E04000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMAXAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E04000, 0xFFE0FC00, .LSE, {} }, - { .LDSMIN, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8205000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMIN, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8205000, 0xFFE0FC00, .LSE, {} }, + { .LDSMIN, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8205000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMINA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A05000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMINA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A05000, 0xFFE0FC00, .LSE, {} }, { .LDSMINL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8605000, 0xFFE0FC00, .LSE, {} }, { .LDSMINL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8605000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDSMINAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E05000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDSMINAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E05000, 0xFFE0FC00, .LSE, {} }, - { .LDUMAX, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8206000, 0xFFE0FC00, .LSE, {} }, + { .LDSMINAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E05000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDUMAX, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8206000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDUMAX, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8206000, 0xFFE0FC00, .LSE, {} }, { .LDUMAXA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A06000, 0xFFE0FC00, .LSE, {} }, { .LDUMAXA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A06000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDUMAXL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8606000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDUMAXL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8606000, 0xFFE0FC00, .LSE, {} }, - { .LDUMAXAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E06000, 0xFFE0FC00, .LSE, {} }, + { .LDUMAXL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8606000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDUMAXAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E06000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDUMAXAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E06000, 0xFFE0FC00, .LSE, {} }, { .LDUMIN, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8207000, 0xFFE0FC00, .LSE, {} }, { .LDUMIN, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8207000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDUMINA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A07000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDUMINA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A07000, 0xFFE0FC00, .LSE, {} }, - { .LDUMINL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8607000, 0xFFE0FC00, .LSE, {} }, + { .LDUMINA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A07000, 0xFFE0FC00, .LSE, {is_64=true} }, { .LDUMINL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8607000, 0xFFE0FC00, .LSE, {is_64=true} }, - { .LDUMINAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E07000, 0xFFE0FC00, .LSE, {} }, + { .LDUMINL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8607000, 0xFFE0FC00, .LSE, {} }, { .LDUMINAL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8E07000, 0xFFE0FC00, .LSE, {is_64=true} }, + { .LDUMINAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E07000, 0xFFE0FC00, .LSE, {} }, { .SWP, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8208000, 0xFFE0FC00, .LSE, {is_64=true} }, { .SWP, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8208000, 0xFFE0FC00, .LSE, {} }, - { .SWPA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A08000, 0xFFE0FC00, .LSE, {is_64=true} }, { .SWPA, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8A08000, 0xFFE0FC00, .LSE, {} }, + { .SWPA, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8A08000, 0xFFE0FC00, .LSE, {is_64=true} }, { .SWPL, {.X_REG,.X_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xF8608000, 0xFFE0FC00, .LSE, {is_64=true} }, { .SWPL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8608000, 0xFFE0FC00, .LSE, {} }, { .SWPAL, {.W_REG,.W_REG,.MEM,.NONE}, {.ATOMIC_RS,.ATOMIC_RT,.ATOMIC_RN,.NONE}, 0xB8E08000, 0xFFE0FC00, .LSE, {} }, @@ -941,14 +941,14 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .SETP, {.XSP_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x19C00400, 0xFFE03C00, .BASE, {is_64=true} }, { .SETM, {.XSP_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x19C04400, 0xFFE03C00, .BASE, {is_64=true} }, { .SETE, {.XSP_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x19C08400, 0xFFE03C00, .BASE, {is_64=true} }, - { .LDUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xB8400000, 0xFFE00C00, .BASE, {} }, { .LDUR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xF8400000, 0xFFE00C00, .BASE, {is_64=true} }, + { .LDUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xB8400000, 0xFFE00C00, .BASE, {} }, { .STUR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xF8000000, 0xFFE00C00, .BASE, {is_64=true} }, { .STUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xB8000000, 0xFFE00C00, .BASE, {} }, { .LDURB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x38400000, 0xFFE00C00, .BASE, {} }, { .STURB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x38000000, 0xFFE00C00, .BASE, {} }, - { .LDURSB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x38C00000, 0xFFE00C00, .BASE, {} }, { .LDURSB, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x38800000, 0xFFE00C00, .BASE, {is_64=true} }, + { .LDURSB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x38C00000, 0xFFE00C00, .BASE, {} }, { .LDURH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x78400000, 0xFFE00C00, .BASE, {} }, { .STURH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x78000000, 0xFFE00C00, .BASE, {} }, { .LDURSH, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x78800000, 0xFFE00C00, .BASE, {is_64=true} }, @@ -956,16 +956,16 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .LDURSW, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xB8800000, 0xFFE00C00, .BASE, {is_64=true} }, { .LDR_PRE, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xF8400C00, 0xFFE00C00, .BASE, {is_64=true} }, { .LDR_PRE, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xB8400C00, 0xFFE00C00, .BASE, {} }, - { .STR_PRE, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xF8000C00, 0xFFE00C00, .BASE, {is_64=true} }, { .STR_PRE, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xB8000C00, 0xFFE00C00, .BASE, {} }, + { .STR_PRE, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xF8000C00, 0xFFE00C00, .BASE, {is_64=true} }, { .LDR_POST, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_POST,.NONE,.NONE}, 0xF8400400, 0xFFE00C00, .BASE, {is_64=true} }, { .LDR_POST, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_POST,.NONE,.NONE}, 0xB8400400, 0xFFE00C00, .BASE, {} }, { .STR_POST, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_POST,.NONE,.NONE}, 0xB8000400, 0xFFE00C00, .BASE, {} }, { .STR_POST, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_POST,.NONE,.NONE}, 0xF8000400, 0xFFE00C00, .BASE, {is_64=true} }, - { .LDR_REG, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xF8600800, 0xFFE00C00, .BASE, {is_64=true} }, { .LDR_REG, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xB8600800, 0xFFE00C00, .BASE, {} }, - { .STR_REG, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xB8200800, 0xFFE00C00, .BASE, {} }, + { .LDR_REG, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xF8600800, 0xFFE00C00, .BASE, {is_64=true} }, { .STR_REG, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xF8200800, 0xFFE00C00, .BASE, {is_64=true} }, + { .STR_REG, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_REG,.NONE,.NONE}, 0xB8200800, 0xFFE00C00, .BASE, {} }, { .LDG, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xD9600000, 0xFFE00C00, .MTE, {is_64=true} }, { .STG, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xD9200800, 0xFFE00C00, .MTE, {is_64=true} }, { .ST2G, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xD9A00800, 0xFFE00C00, .MTE, {is_64=true} }, @@ -976,8 +976,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .STZGM, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_A,.NONE,.NONE}, 0xD9200000, 0xFFE00C00, .MTE, {is_64=true} }, { .LDAPUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x99400000, 0xFFE00C00, .BASE, {} }, { .LDAPUR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xD9400000, 0xFFE00C00, .BASE, {is_64=true} }, - { .STLUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x99000000, 0xFFE00C00, .BASE, {} }, { .STLUR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0xD9000000, 0xFFE00C00, .BASE, {is_64=true} }, + { .STLUR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x99000000, 0xFFE00C00, .BASE, {} }, { .LDAPURB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x19400000, 0xFFE00C00, .BASE, {} }, { .STLURB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x19000000, 0xFFE00C00, .BASE, {} }, { .LDAPURH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_S9,.NONE,.NONE}, 0x59400000, 0xFFE00C00, .BASE, {} }, @@ -994,16 +994,16 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .LDRAB_PRE, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_PRE,.NONE,.NONE}, 0xF8A00C00, 0xFFA00C00, .PAC, {is_64=true} }, { .LDR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xB9400000, 0xFFC00000, .BASE, {} }, { .LDR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xF9400000, 0xFFC00000, .BASE, {is_64=true} }, - { .STR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xF9000000, 0xFFC00000, .BASE, {is_64=true} }, { .STR, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xB9000000, 0xFFC00000, .BASE, {} }, + { .STR, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xF9000000, 0xFFC00000, .BASE, {is_64=true} }, { .LDRB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x39400000, 0xFFC00000, .BASE, {} }, { .STRB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x39000000, 0xFFC00000, .BASE, {} }, { .LDRSB, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x39800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDRSB, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x39C00000, 0xFFC00000, .BASE, {} }, { .LDRH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x79400000, 0xFFC00000, .BASE, {} }, { .STRH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x79000000, 0xFFC00000, .BASE, {} }, - { .LDRSH, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x79800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDRSH, {.W_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x79C00000, 0xFFC00000, .BASE, {} }, + { .LDRSH, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x79800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDRSW, {.X_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xB9800000, 0xFFC00000, .BASE, {is_64=true} }, { .PRFM, {.IMM_5,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xF9800000, 0xFFC00000, .BASE, {is_64=true} }, { .LDR_LIT, {.X_REG,.REL_19,.NONE,.NONE}, {.RT,.BRANCH_19,.NONE,.NONE}, 0x58000000, 0xFF000000, .BASE, {is_64=true} }, @@ -1038,8 +1038,8 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .AUTIB, {.X_REG,.XSP_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0xDAC11400, 0xFFFFFC00, .PAC, {is_64=true} }, { .AUTDA, {.X_REG,.XSP_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0xDAC11800, 0xFFFFFC00, .PAC, {is_64=true} }, { .AUTDB, {.X_REG,.XSP_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0xDAC11C00, 0xFFFFFC00, .PAC, {is_64=true} }, - { .NGC, {.X_REG,.X_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xDA0003E0, 0xFFE0FFE0, .BASE, {is_64=true} }, { .NGC, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x5A0003E0, 0xFFE0FFE0, .BASE, {} }, + { .NGC, {.X_REG,.X_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xDA0003E0, 0xFFE0FFE0, .BASE, {is_64=true} }, { .NGCS, {.W_REG,.W_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0x7A0003E0, 0xFFE0FFE0, .BASE, {sets_flags=true} }, { .NGCS, {.X_REG,.X_REG,.NONE,.NONE}, {.RD,.RM,.NONE,.NONE}, 0xFA0003E0, 0xFFE0FFE0, .BASE, {sets_flags=true, is_64=true} }, { .LSLV, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1AC02000, 0xFFE0FC00, .BASE, {} }, @@ -1071,12 +1071,16 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .CRC32CX, {.W_REG,.W_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x9AC05C00, 0xFFE0FC00, .CRC32, {is_64=true} }, { .ADC, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x9A000000, 0xFFE0FC00, .BASE, {is_64=true} }, { .ADC, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1A000000, 0xFFE0FC00, .BASE, {} }, - { .ADCS, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0xBA000000, 0xFFE0FC00, .BASE, {sets_flags=true, is_64=true} }, { .ADCS, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x3A000000, 0xFFE0FC00, .BASE, {sets_flags=true} }, - { .SBC, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0xDA000000, 0xFFE0FC00, .BASE, {is_64=true} }, + { .ADCS, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0xBA000000, 0xFFE0FC00, .BASE, {sets_flags=true, is_64=true} }, { .SBC, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x5A000000, 0xFFE0FC00, .BASE, {} }, - { .SBCS, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x7A000000, 0xFFE0FC00, .BASE, {sets_flags=true} }, + { .SBC, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0xDA000000, 0xFFE0FC00, .BASE, {is_64=true} }, { .SBCS, {.X_REG,.X_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0xFA000000, 0xFFE0FC00, .BASE, {sets_flags=true, is_64=true} }, + { .SBCS, {.W_REG,.W_REG,.W_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x7A000000, 0xFFE0FC00, .BASE, {sets_flags=true} }, + { .CCMP_REG, {.X_REG,.X_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0xFA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true} }, + { .CCMP_REG, {.W_REG,.W_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0x7A400000, 0xFFE00C10, .BASE, {sets_flags=true} }, + { .CCMN_REG, {.X_REG,.X_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0xBA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true} }, + { .CCMN_REG, {.W_REG,.W_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0x3A400000, 0xFFE00C10, .BASE, {sets_flags=true} }, { .CSEL, {.X_REG,.X_REG,.X_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x9A800000, 0xFFE00C00, .BASE, {is_64=true} }, { .CSEL, {.W_REG,.W_REG,.W_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1A800000, 0xFFE00C00, .BASE, {} }, { .CSINC, {.W_REG,.W_REG,.W_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1A800400, 0xFFE00C00, .BASE, {} }, @@ -1096,50 +1100,50 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .CPYP, {.XSP_REG,.XSP_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1D000400, 0xFFE03C00, .BASE, {is_64=true} }, { .CPYM, {.XSP_REG,.XSP_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1D400400, 0xFFE03C00, .BASE, {is_64=true} }, { .CPYE, {.XSP_REG,.XSP_REG,.X_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1D800400, 0xFFE03C00, .BASE, {is_64=true} }, + { .LDR_V, {.Q_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3DC00000, 0xFFC00000, .FP, {} }, { .LDR_V, {.S_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xBD400000, 0xFFC00000, .FP, {} }, { .LDR_V, {.H_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x7D400000, 0xFFC00000, .FP, {} }, { .LDR_V, {.D_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xFD400000, 0xFFC00000, .FP, {} }, { .LDR_V, {.B_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3D400000, 0xFFC00000, .FP, {} }, - { .LDR_V, {.Q_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3DC00000, 0xFFC00000, .FP, {} }, { .STR_V, {.D_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xFD000000, 0xFFC00000, .FP, {} }, - { .STR_V, {.H_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x7D000000, 0xFFC00000, .FP, {} }, - { .STR_V, {.B_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3D000000, 0xFFC00000, .FP, {} }, { .STR_V, {.S_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0xBD000000, 0xFFC00000, .FP, {} }, { .STR_V, {.Q_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3D800000, 0xFFC00000, .FP, {} }, - { .FMOV_REG, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E604000, 0xFFFFFC00, .FP, {} }, + { .STR_V, {.B_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x3D000000, 0xFFC00000, .FP, {} }, + { .STR_V, {.H_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE_U12,.NONE,.NONE}, 0x7D000000, 0xFFC00000, .FP, {} }, { .FMOV_REG, {.S_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E204000, 0xFFFFFC00, .FP, {} }, + { .FMOV_REG, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E604000, 0xFFFFFC00, .FP, {} }, + { .FMOV_GEN, {.D_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E670000, 0xFFFFFC00, .FP, {is_64=true} }, { .FMOV_GEN, {.S_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E270000, 0xFFFFFC00, .FP, {} }, { .FMOV_GEN, {.W_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E260000, 0xFFFFFC00, .FP, {} }, { .FMOV_GEN, {.X_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E660000, 0xFFFFFC00, .FP, {is_64=true} }, - { .FMOV_GEN, {.D_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E670000, 0xFFFFFC00, .FP, {is_64=true} }, { .FABS, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E60C000, 0xFFFFFC00, .FP, {} }, { .FABS, {.S_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E20C000, 0xFFFFFC00, .FP, {} }, - { .FNEG, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E614000, 0xFFFFFC00, .FP, {} }, { .FNEG, {.S_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E214000, 0xFFFFFC00, .FP, {} }, - { .FSQRT, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E61C000, 0xFFFFFC00, .FP, {} }, + { .FNEG, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E614000, 0xFFFFFC00, .FP, {} }, { .FSQRT, {.S_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E21C000, 0xFFFFFC00, .FP, {} }, + { .FSQRT, {.D_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E61C000, 0xFFFFFC00, .FP, {} }, { .FCMP, {.S_REG,.S_REG,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x1E202000, 0xFFE0FC1F, .FP, {sets_flags=true} }, { .FCMP, {.D_REG,.D_REG,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x1E602000, 0xFFE0FC1F, .FP, {sets_flags=true} }, - { .FCMPE, {.D_REG,.D_REG,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x1E602010, 0xFFE0FC1F, .FP, {sets_flags=true} }, { .FCMPE, {.S_REG,.S_REG,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x1E202010, 0xFFE0FC1F, .FP, {sets_flags=true} }, - { .FCVT, {.D_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E22C000, 0xFFFFFC00, .FP, {} }, + { .FCMPE, {.D_REG,.D_REG,.NONE,.NONE}, {.RN,.RM,.NONE,.NONE}, 0x1E602010, 0xFFE0FC1F, .FP, {sets_flags=true} }, { .FCVT, {.S_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E624000, 0xFFFFFC00, .FP, {} }, + { .FCVT, {.D_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E22C000, 0xFFFFFC00, .FP, {} }, { .SCVTF, {.D_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E620000, 0xFFFFFC00, .FP, {is_64=true} }, { .SCVTF, {.S_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E220000, 0xFFFFFC00, .FP, {is_64=true} }, { .SCVTF, {.S_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E220000, 0xFFFFFC00, .FP, {} }, { .SCVTF, {.D_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E620000, 0xFFFFFC00, .FP, {} }, - { .UCVTF, {.D_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E630000, 0xFFFFFC00, .FP, {is_64=true} }, - { .UCVTF, {.S_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E230000, 0xFFFFFC00, .FP, {is_64=true} }, - { .UCVTF, {.S_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E230000, 0xFFFFFC00, .FP, {} }, { .UCVTF, {.D_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E630000, 0xFFFFFC00, .FP, {} }, - { .FCVTZS, {.W_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E780000, 0xFFFFFC00, .FP, {} }, - { .FCVTZS, {.W_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E380000, 0xFFFFFC00, .FP, {} }, + { .UCVTF, {.S_REG,.W_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E230000, 0xFFFFFC00, .FP, {} }, + { .UCVTF, {.S_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E230000, 0xFFFFFC00, .FP, {is_64=true} }, + { .UCVTF, {.D_REG,.X_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E630000, 0xFFFFFC00, .FP, {is_64=true} }, { .FCVTZS, {.X_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E380000, 0xFFFFFC00, .FP, {is_64=true} }, + { .FCVTZS, {.W_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E780000, 0xFFFFFC00, .FP, {} }, { .FCVTZS, {.X_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E780000, 0xFFFFFC00, .FP, {is_64=true} }, - { .FCVTZU, {.X_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E390000, 0xFFFFFC00, .FP, {is_64=true} }, - { .FCVTZU, {.W_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E790000, 0xFFFFFC00, .FP, {} }, + { .FCVTZS, {.W_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E380000, 0xFFFFFC00, .FP, {} }, { .FCVTZU, {.X_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E790000, 0xFFFFFC00, .FP, {is_64=true} }, + { .FCVTZU, {.X_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x9E390000, 0xFFFFFC00, .FP, {is_64=true} }, { .FCVTZU, {.W_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E390000, 0xFFFFFC00, .FP, {} }, + { .FCVTZU, {.W_REG,.D_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E790000, 0xFFFFFC00, .FP, {} }, { .SHA1H, {.S_REG,.S_REG,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x5E280800, 0xFFFFFC00, .CRYPTO, {} }, { .SHA1SU1, {.V_4S,.V_4S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x5E281800, 0xFFFFFC00, .CRYPTO, {} }, { .SHA256SU0, {.V_4S,.V_4S,.NONE,.NONE}, {.VD,.VN,.NONE,.NONE}, 0x5E282800, 0xFFFFFC00, .CRYPTO, {} }, @@ -1160,22 +1164,22 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .BFCVT, {.H_REG,.S_REG,.NONE,.NONE}, {.RD,.RN,.NONE,.NONE}, 0x1E634000, 0xFFFFFC00, .BF16, {} }, { .FADD, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E202800, 0xFFE0FC00, .FP, {} }, { .FADD, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E602800, 0xFFE0FC00, .FP, {} }, - { .FSUB, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E203800, 0xFFE0FC00, .FP, {} }, { .FSUB, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E603800, 0xFFE0FC00, .FP, {} }, - { .FMUL, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E200800, 0xFFE0FC00, .FP, {} }, + { .FSUB, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E203800, 0xFFE0FC00, .FP, {} }, { .FMUL, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E600800, 0xFFE0FC00, .FP, {} }, + { .FMUL, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E200800, 0xFFE0FC00, .FP, {} }, { .FDIV, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E601800, 0xFFE0FC00, .FP, {} }, { .FDIV, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E201800, 0xFFE0FC00, .FP, {} }, - { .FNMUL, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E608800, 0xFFE0FC00, .FP, {} }, { .FNMUL, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E208800, 0xFFE0FC00, .FP, {} }, + { .FNMUL, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E608800, 0xFFE0FC00, .FP, {} }, { .FMAX, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E204800, 0xFFE0FC00, .FP, {} }, { .FMAX, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E604800, 0xFFE0FC00, .FP, {} }, { .FMIN, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E605800, 0xFFE0FC00, .FP, {} }, { .FMIN, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E205800, 0xFFE0FC00, .FP, {} }, { .FMAXNM, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E206800, 0xFFE0FC00, .FP, {} }, { .FMAXNM, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E606800, 0xFFE0FC00, .FP, {} }, - { .FMINNM, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E607800, 0xFFE0FC00, .FP, {} }, { .FMINNM, {.S_REG,.S_REG,.S_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E207800, 0xFFE0FC00, .FP, {} }, + { .FMINNM, {.D_REG,.D_REG,.D_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1E607800, 0xFFE0FC00, .FP, {} }, { .SHA1C, {.Q_REG,.S_REG,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x5E000000, 0xFFE0FC00, .CRYPTO, {} }, { .SHA1P, {.Q_REG,.S_REG,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x5E001000, 0xFFE0FC00, .CRYPTO, {} }, { .SHA1M, {.Q_REG,.S_REG,.V_4S,.NONE}, {.VD,.VN,.VM,.NONE}, 0x5E002000, 0xFFE0FC00, .CRYPTO, {} }, @@ -1192,17 +1196,17 @@ DECODE_ENTRIES := [1198]lib.Decode_Entry{ { .FMIN_H, {.H_REG,.H_REG,.H_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1EE05800, 0xFFE0FC00, .FP16, {} }, { .FMAXNM_H, {.H_REG,.H_REG,.H_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1EE06800, 0xFFE0FC00, .FP16, {} }, { .FMINNM_H, {.H_REG,.H_REG,.H_REG,.NONE}, {.RD,.RN,.RM,.NONE}, 0x1EE07800, 0xFFE0FC00, .FP16, {} }, - { .FCSEL, {.S_REG,.S_REG,.S_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1E200C00, 0xFFE00C00, .FP, {} }, { .FCSEL, {.D_REG,.D_REG,.D_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1E600C00, 0xFFE00C00, .FP, {} }, + { .FCSEL, {.S_REG,.S_REG,.S_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1E200C00, 0xFFE00C00, .FP, {} }, { .FCSEL_H, {.H_REG,.H_REG,.H_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x1EE00C00, 0xFFE00C00, .FP16, {} }, { .FMADD, {.D_REG,.D_REG,.D_REG,.D_REG}, {.RD,.RN,.RM,.RA}, 0x1F400000, 0xFFE08000, .FP, {} }, { .FMADD, {.S_REG,.S_REG,.S_REG,.S_REG}, {.RD,.RN,.RM,.RA}, 0x1F000000, 0xFFE08000, .FP, {} }, { .FMSUB, {.S_REG,.S_REG,.S_REG,.S_REG}, {.RD,.RN,.RM,.RA}, 0x1F008000, 0xFFE08000, .FP, {} }, { .FMSUB, {.D_REG,.D_REG,.D_REG,.D_REG}, {.RD,.RN,.RM,.RA}, 0x1F408000, 0xFFE08000, .FP, {} }, - { .FNMADD, {.D_REG,.D_REG,.D_REG,.D_REG}, {.RD,.RN,.RM,.RA}, 0x1F600000, 0xFFE08000, .FP, {} }, { .FNMADD, {.S_REG,.S_REG,.S_REG,.S_REG}, {.RD,.RN,.RM,.RA}, 0x1F200000, 0xFFE08000, .FP, {} }, - { .FNMSUB, {.S_REG,.S_REG,.S_REG,.S_REG}, {.RD,.RN,.RM,.RA}, 0x1F208000, 0xFFE08000, .FP, {} }, + { .FNMADD, {.D_REG,.D_REG,.D_REG,.D_REG}, {.RD,.RN,.RM,.RA}, 0x1F600000, 0xFFE08000, .FP, {} }, { .FNMSUB, {.D_REG,.D_REG,.D_REG,.D_REG}, {.RD,.RN,.RM,.RA}, 0x1F608000, 0xFFE08000, .FP, {} }, + { .FNMSUB, {.S_REG,.S_REG,.S_REG,.S_REG}, {.RD,.RN,.RM,.RA}, 0x1F208000, 0xFFE08000, .FP, {} }, { .FMADD_H, {.H_REG,.H_REG,.H_REG,.H_REG}, {.RD,.RN,.RM,.RA}, 0x1FC00000, 0xFFE08000, .FP16, {} }, { .FMSUB_H, {.H_REG,.H_REG,.H_REG,.H_REG}, {.RD,.RN,.RM,.RA}, 0x1FC08000, 0xFFE08000, .FP16, {} }, { .FNMADD_H, {.H_REG,.H_REG,.H_REG,.H_REG}, {.RD,.RN,.RM,.RA}, 0x1FE00000, 0xFFE08000, .FP16, {} }, @@ -1222,8 +1226,8 @@ DECODE_INDEX_OP0 := [16]lib.Decode_Index{ 0x0A = { 731, 98}, 0x0B = { 829, 21}, 0x0C = { 850, 150}, - 0x0D = {1000, 84}, - 0x0E = {1084, 13}, - 0x0F = {1097, 101}, + 0x0D = {1000, 88}, + 0x0E = {1088, 13}, + 0x0F = {1101, 101}, } diff --git a/core/rexcode/arm64/tablegen/generated/encode_tables.odin b/core/rexcode/arm64/tablegen/generated/encode_tables.odin index 40eb48d85..32f11d7c6 100644 --- a/core/rexcode/arm64/tablegen/generated/encode_tables.odin +++ b/core/rexcode/arm64/tablegen/generated/encode_tables.odin @@ -8,7 +8,7 @@ package rexcode_arm64_generated import lib "../.." @(rodata) -ENCODE_FORMS := [1196]lib.Encoding{ +ENCODE_FORMS := [1200]lib.Encoding{ // .ADD_IMM { .ADD_IMM, {.WSP_REG,.WSP_REG,.IMM_12,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0x11000000, 0xFF800000, .BASE, {} }, { .ADD_IMM, {.XSP_REG,.XSP_REG,.IMM_12,.NONE}, {.RD,.RN,.IMM12,.NONE}, 0x91000000, 0xFF800000, .BASE, {is_64=true} }, @@ -147,6 +147,12 @@ ENCODE_FORMS := [1196]lib.Encoding{ // .CSNEG { .CSNEG, {.W_REG,.W_REG,.W_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0x5A800400, 0xFFE00C00, .BASE, {} }, { .CSNEG, {.X_REG,.X_REG,.X_REG,.COND}, {.RD,.RN,.RM,.COND_HI}, 0xDA800400, 0xFFE00C00, .BASE, {is_64=true} }, + // .CCMP_REG + { .CCMP_REG, {.W_REG,.W_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0x7A400000, 0xFFE00C10, .BASE, {sets_flags=true} }, + { .CCMP_REG, {.X_REG,.X_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0xFA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true} }, + // .CCMN_REG + { .CCMN_REG, {.W_REG,.W_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0x3A400000, 0xFFE00C10, .BASE, {sets_flags=true} }, + { .CCMN_REG, {.X_REG,.X_REG,.NZCV_IMM,.COND}, {.RN,.RM,.NZCV_FIELD,.COND_HI}, 0xBA400000, 0xFFE00C10, .BASE, {sets_flags=true, is_64=true} }, // .EXTR { .EXTR, {.W_REG,.W_REG,.W_REG,.IMM_6}, {.RD,.RN,.RM,.IMM6}, 0x13800000, 0xFFE08000, .BASE, {} }, { .EXTR, {.X_REG,.X_REG,.X_REG,.IMM_6}, {.RD,.RN,.RM,.IMM6}, 0x93C00000, 0xFFE08000, .BASE, {is_64=true} }, @@ -2036,1074 +2042,1074 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{ .CSINC = { 83, 2}, .CSINV = { 85, 2}, .CSNEG = { 87, 2}, - .CCMP_REG = { 89, 0}, - .CCMP_IMM = { 89, 0}, - .CCMN_REG = { 89, 0}, - .CCMN_IMM = { 89, 0}, - .EXTR = { 89, 2}, - .B = { 91, 1}, - .BL = { 92, 1}, - .BR = { 93, 1}, - .BLR = { 94, 1}, - .RET = { 95, 2}, - .B_COND = { 97, 1}, - .CBZ = { 98, 2}, - .CBNZ = { 100, 2}, - .TBZ = { 102, 1}, - .TBNZ = { 103, 1}, - .LDR = { 104, 2}, - .STR = { 106, 2}, - .LDRB = { 108, 1}, - .STRB = { 109, 1}, - .LDRSB = { 110, 2}, - .LDRH = { 112, 1}, - .STRH = { 113, 1}, - .LDRSH = { 114, 2}, - .LDRSW = { 116, 1}, - .LDP = { 117, 2}, - .STP = { 119, 2}, - .LDPSW = { 121, 1}, - .LDR_LIT = { 122, 2}, - .LDAR = { 124, 2}, - .STLR = { 126, 2}, - .LDARB = { 128, 1}, - .STLRB = { 129, 1}, - .LDARH = { 130, 1}, - .STLRH = { 131, 1}, - .LDXR = { 132, 2}, - .STXR = { 134, 2}, - .LDAXR = { 136, 2}, - .STLXR = { 138, 2}, - .NOP = { 140, 1}, - .YIELD = { 141, 1}, - .WFE = { 142, 1}, - .WFI = { 143, 1}, - .SEV = { 144, 1}, - .SEVL = { 145, 1}, - .HINT = { 146, 0}, - .MRS = { 146, 1}, - .MSR_IMM = { 147, 0}, - .MSR_REG = { 147, 1}, - .ISB = { 148, 1}, - .DSB = { 149, 1}, - .DMB = { 150, 1}, - .SVC = { 151, 1}, - .HVC = { 152, 1}, - .SMC = { 153, 1}, - .BRK = { 154, 1}, - .HLT = { 155, 1}, - .ERET = { 156, 1}, - .FMOV_REG = { 157, 2}, - .FMOV_IMM = { 159, 0}, - .FMOV_GEN = { 159, 4}, - .FABS = { 163, 2}, - .FNEG = { 165, 2}, - .FSQRT = { 167, 2}, - .FADD = { 169, 2}, - .FSUB = { 171, 2}, - .FMUL = { 173, 2}, - .FDIV = { 175, 2}, - .FNMUL = { 177, 2}, - .FMADD = { 179, 2}, - .FMSUB = { 181, 2}, - .FNMADD = { 183, 2}, - .FNMSUB = { 185, 2}, - .FCMP = { 187, 2}, - .FCMPE = { 189, 2}, - .FCSEL = { 191, 2}, - .FMAX = { 193, 2}, - .FMIN = { 195, 2}, - .FMAXNM = { 197, 2}, - .FMINNM = { 199, 2}, - .FCVT = { 201, 2}, - .SCVTF = { 203, 4}, - .UCVTF = { 207, 4}, - .FCVTZS = { 211, 4}, - .FCVTZU = { 215, 4}, - .FCVTAS = { 219, 0}, - .FCVTAU = { 219, 0}, - .FCVTNS = { 219, 0}, - .FCVTNU = { 219, 0}, - .FCVTPS = { 219, 0}, - .FCVTPU = { 219, 0}, - .FCVTMS = { 219, 0}, - .FCVTMU = { 219, 0}, - .FRINTA = { 219, 0}, - .FRINTI = { 219, 0}, - .FRINTM = { 219, 0}, - .FRINTN = { 219, 0}, - .FRINTP = { 219, 0}, - .FRINTX = { 219, 0}, - .FRINTZ = { 219, 0}, - .AND_IMM = { 219, 2}, - .ANDS_IMM = { 221, 2}, - .ORR_IMM = { 223, 2}, - .EOR_IMM = { 225, 2}, - .TST_IMM = { 227, 2}, - .LDUR = { 229, 2}, - .STUR = { 231, 2}, - .LDURB = { 233, 1}, - .STURB = { 234, 1}, - .LDURSB = { 235, 2}, - .LDURH = { 237, 1}, - .STURH = { 238, 1}, - .LDURSH = { 239, 2}, - .LDURSW = { 241, 1}, - .LDR_PRE = { 242, 2}, - .STR_PRE = { 244, 2}, - .LDR_POST = { 246, 2}, - .STR_POST = { 248, 2}, - .LDRB_PRE = { 250, 0}, - .STRB_PRE = { 250, 0}, - .LDRB_POST = { 250, 0}, - .STRB_POST = { 250, 0}, - .LDRH_PRE = { 250, 0}, - .STRH_PRE = { 250, 0}, - .LDRH_POST = { 250, 0}, - .STRH_POST = { 250, 0}, - .LDR_REG = { 250, 2}, - .STR_REG = { 252, 2}, - .LDRB_REG = { 254, 0}, - .STRB_REG = { 254, 0}, - .LDRH_REG = { 254, 0}, - .STRH_REG = { 254, 0}, - .LDRSB_REG = { 254, 0}, - .LDRSH_REG = { 254, 0}, - .LDRSW_REG = { 254, 0}, - .LDP_PRE = { 254, 2}, - .STP_PRE = { 256, 2}, - .LDP_POST = { 258, 2}, - .STP_POST = { 260, 2}, - .LDPSW_PRE = { 262, 1}, - .LDPSW_POST = { 263, 1}, - .LDNP = { 264, 2}, - .STNP = { 266, 2}, - .LDXP = { 268, 2}, - .STXP = { 270, 2}, - .LDAXP = { 272, 2}, - .STLXP = { 274, 2}, - .LDXRB = { 276, 1}, - .STXRB = { 277, 1}, - .LDAXRB = { 278, 1}, - .STLXRB = { 279, 1}, - .LDXRH = { 280, 1}, - .STXRH = { 281, 1}, - .LDAXRH = { 282, 1}, - .STLXRH = { 283, 1}, - .LDARB_X = { 284, 0}, - .STLRB_X = { 284, 0}, - .LDARH_X = { 284, 0}, - .STLRH_X = { 284, 0}, - .LDAPR = { 284, 2}, - .LDAPRB = { 286, 1}, - .LDAPRH = { 287, 1}, - .LDADD = { 288, 2}, - .LDADDA = { 290, 2}, - .LDADDL = { 292, 2}, - .LDADDAL = { 294, 2}, - .LDCLR = { 296, 2}, - .LDCLRA = { 298, 2}, - .LDCLRL = { 300, 2}, - .LDCLRAL = { 302, 2}, - .LDEOR = { 304, 2}, - .LDEORA = { 306, 2}, - .LDEORL = { 308, 2}, - .LDEORAL = { 310, 2}, - .LDSET = { 312, 2}, - .LDSETA = { 314, 2}, - .LDSETL = { 316, 2}, - .LDSETAL = { 318, 2}, - .LDSMAX = { 320, 2}, - .LDSMAXA = { 322, 2}, - .LDSMAXL = { 324, 2}, - .LDSMAXAL = { 326, 2}, - .LDSMIN = { 328, 2}, - .LDSMINA = { 330, 2}, - .LDSMINL = { 332, 2}, - .LDSMINAL = { 334, 2}, - .LDUMAX = { 336, 2}, - .LDUMAXA = { 338, 2}, - .LDUMAXL = { 340, 2}, - .LDUMAXAL = { 342, 2}, - .LDUMIN = { 344, 2}, - .LDUMINA = { 346, 2}, - .LDUMINL = { 348, 2}, - .LDUMINAL = { 350, 2}, - .SWP = { 352, 2}, - .SWPA = { 354, 2}, - .SWPL = { 356, 2}, - .SWPAL = { 358, 2}, - .CAS = { 360, 2}, - .CASA = { 362, 2}, - .CASL = { 364, 2}, - .CASAL = { 366, 2}, - .CASB = { 368, 1}, - .CASAB = { 369, 1}, - .CASLB = { 370, 1}, - .CASALB = { 371, 1}, - .CASH = { 372, 1}, - .CASAH = { 373, 1}, - .CASLH = { 374, 1}, - .CASALH = { 375, 1}, - .CASP = { 376, 2}, - .CASPA = { 378, 2}, - .CASPL = { 380, 2}, - .CASPAL = { 382, 2}, - .PACIA = { 384, 1}, - .PACIB = { 385, 1}, - .PACDA = { 386, 1}, - .PACDB = { 387, 1}, - .PACIZA = { 388, 1}, - .PACIZB = { 389, 1}, - .PACDZA = { 390, 1}, - .PACDZB = { 391, 1}, - .AUTIA = { 392, 1}, - .AUTIB = { 393, 1}, - .AUTDA = { 394, 1}, - .AUTDB = { 395, 1}, - .AUTIZA = { 396, 1}, - .AUTIZB = { 397, 1}, - .AUTDZA = { 398, 1}, - .AUTDZB = { 399, 1}, - .PACIASP = { 400, 1}, - .PACIBSP = { 401, 1}, - .AUTIASP = { 402, 1}, - .AUTIBSP = { 403, 1}, - .PACIA1716 = { 404, 1}, - .PACIB1716 = { 405, 1}, - .AUTIA1716 = { 406, 1}, - .AUTIB1716 = { 407, 1}, - .PACGA = { 408, 1}, - .XPACI = { 409, 1}, - .XPACD = { 410, 1}, - .XPACLRI = { 411, 1}, - .RETAA = { 412, 1}, - .RETAB = { 413, 1}, - .BRAA = { 414, 1}, - .BRAB = { 415, 1}, - .BRAAZ = { 416, 1}, - .BRABZ = { 417, 1}, - .BLRAA = { 418, 1}, - .BLRAB = { 419, 1}, - .BLRAAZ = { 420, 1}, - .BLRABZ = { 421, 1}, - .ERETAA = { 422, 1}, - .ERETAB = { 423, 1}, - .BTI = { 424, 1}, - .IRG = { 425, 1}, - .ADDG = { 426, 1}, - .SUBG = { 427, 1}, - .GMI = { 428, 1}, - .SUBP = { 429, 1}, - .SUBPS = { 430, 1}, - .LDG = { 431, 1}, - .STG = { 432, 1}, - .ST2G = { 433, 1}, - .STZG = { 434, 1}, - .STZ2G = { 435, 1}, - .STGP = { 436, 1}, - .LDGM = { 437, 1}, - .STGM = { 438, 1}, - .STZGM = { 439, 1}, - .CRC32B = { 440, 1}, - .CRC32H = { 441, 1}, - .CRC32W = { 442, 1}, - .CRC32X = { 443, 1}, - .CRC32CB = { 444, 1}, - .CRC32CH = { 445, 1}, - .CRC32CW = { 446, 1}, - .CRC32CX = { 447, 1}, - .AESE = { 448, 1}, - .AESD = { 449, 1}, - .AESMC = { 450, 1}, - .AESIMC = { 451, 1}, - .SHA1H = { 452, 1}, - .SHA1C = { 453, 1}, - .SHA1P = { 454, 1}, - .SHA1M = { 455, 1}, - .SHA1SU0 = { 456, 1}, - .SHA1SU1 = { 457, 1}, - .SHA256H = { 458, 1}, - .SHA256H2 = { 459, 1}, - .SHA256SU0 = { 460, 1}, - .SHA256SU1 = { 461, 1}, - .SHA512H = { 462, 1}, - .SHA512H2 = { 463, 1}, - .SHA512SU0 = { 464, 1}, - .SHA512SU1 = { 465, 1}, - .EOR3 = { 466, 1}, - .BCAX = { 467, 1}, - .RAX1 = { 468, 1}, - .XAR = { 469, 1}, - .SM3PARTW1 = { 470, 1}, - .SM3PARTW2 = { 471, 1}, - .SM3SS1 = { 472, 1}, - .SM3TT1A = { 473, 1}, - .SM3TT1B = { 474, 1}, - .SM3TT2A = { 475, 1}, - .SM3TT2B = { 476, 1}, - .SM4E = { 477, 1}, - .SM4EKEY = { 478, 1}, - .PMULL = { 479, 2}, - .PMULL2 = { 481, 2}, - .FABS_H = { 483, 1}, - .FNEG_H = { 484, 1}, - .FSQRT_H = { 485, 1}, - .FADD_H = { 486, 1}, - .FSUB_H = { 487, 1}, - .FMUL_H = { 488, 1}, - .FDIV_H = { 489, 1}, - .FNMUL_H = { 490, 1}, - .FMADD_H = { 491, 1}, - .FMSUB_H = { 492, 1}, - .FNMADD_H = { 493, 1}, - .FNMSUB_H = { 494, 1}, - .FCMP_H = { 495, 1}, - .FCMPE_H = { 496, 1}, - .FCSEL_H = { 497, 1}, - .FMAX_H = { 498, 1}, - .FMIN_H = { 499, 1}, - .FMAXNM_H = { 500, 1}, - .FMINNM_H = { 501, 1}, - .FCVT_H_S = { 502, 1}, - .FCVT_H_D = { 503, 1}, - .FCVT_S_H = { 504, 1}, - .FCVT_D_H = { 505, 1}, - .FMOV_H = { 506, 1}, - .SCVTF_H = { 507, 1}, - .UCVTF_H = { 508, 1}, - .FCVTZS_H = { 509, 1}, - .FCVTZU_H = { 510, 1}, - .BFCVT = { 511, 1}, - .BFDOT = { 512, 1}, - .BFMMLA = { 513, 1}, - .BFMLALB = { 514, 1}, - .BFMLALT = { 515, 1}, - .BFCVTN = { 516, 1}, - .BFCVTN2 = { 517, 1}, - .ADD_V = { 518, 7}, - .SUB_V = { 525, 4}, - .MUL_V = { 529, 3}, - .MLA_V = { 532, 0}, - .MLS_V = { 532, 0}, - .NEG_V = { 532, 0}, - .ABS_V = { 532, 0}, - .SHADD = { 532, 0}, - .UHADD = { 532, 0}, - .SHSUB = { 532, 0}, - .UHSUB = { 532, 0}, - .SRHADD = { 532, 0}, - .URHADD = { 532, 0}, - .SQADD = { 532, 0}, - .UQADD = { 532, 0}, - .SQSUB = { 532, 0}, - .UQSUB = { 532, 0}, - .SMAX = { 532, 0}, - .UMAX = { 532, 0}, - .SMIN = { 532, 0}, - .UMIN = { 532, 0}, - .SABD = { 532, 0}, - .UABD = { 532, 0}, - .SABA = { 532, 0}, - .UABA = { 532, 0}, - .ADDP_V = { 532, 0}, - .ADDV = { 532, 0}, - .SADDLP = { 532, 0}, - .UADDLP = { 532, 0}, - .SADALP = { 532, 0}, - .UADALP = { 532, 0}, - .SADDLV = { 532, 0}, - .UADDLV = { 532, 0}, - .SMAXV = { 532, 0}, - .UMAXV = { 532, 0}, - .SMINV = { 532, 0}, - .UMINV = { 532, 0}, - .SMAXP = { 532, 0}, - .UMAXP = { 532, 0}, - .SMINP = { 532, 0}, - .UMINP = { 532, 0}, - .SADDL = { 532, 0}, - .SADDL2 = { 532, 0}, - .UADDL = { 532, 0}, - .UADDL2 = { 532, 0}, - .SSUBL = { 532, 0}, - .SSUBL2 = { 532, 0}, - .USUBL = { 532, 0}, - .USUBL2 = { 532, 0}, - .SADDW = { 532, 0}, - .SADDW2 = { 532, 0}, - .UADDW = { 532, 0}, - .UADDW2 = { 532, 0}, - .SSUBW = { 532, 0}, - .SSUBW2 = { 532, 0}, - .USUBW = { 532, 0}, - .USUBW2 = { 532, 0}, - .RADDHN = { 532, 0}, - .RADDHN2 = { 532, 0}, - .RSUBHN = { 532, 0}, - .RSUBHN2 = { 532, 0}, - .ADDHN = { 532, 0}, - .ADDHN2 = { 532, 0}, - .SUBHN = { 532, 0}, - .SUBHN2 = { 532, 0}, - .XTN = { 532, 0}, - .XTN2 = { 532, 0}, - .SQXTN = { 532, 0}, - .SQXTN2 = { 532, 0}, - .UQXTN = { 532, 0}, - .UQXTN2 = { 532, 0}, - .SQXTUN = { 532, 0}, - .SQXTUN2 = { 532, 0}, - .SMULL_V = { 532, 0}, - .SMULL2_V = { 532, 0}, - .UMULL_V = { 532, 0}, - .UMULL2_V = { 532, 0}, - .SMLAL = { 532, 0}, - .SMLAL2 = { 532, 0}, - .UMLAL = { 532, 0}, - .UMLAL2 = { 532, 0}, - .SMLSL = { 532, 0}, - .SMLSL2 = { 532, 0}, - .UMLSL = { 532, 0}, - .UMLSL2 = { 532, 0}, - .SQDMULL = { 532, 0}, - .SQDMULL2 = { 532, 0}, - .SQDMLAL = { 532, 0}, - .SQDMLAL2 = { 532, 0}, - .SQDMLSL = { 532, 0}, - .SQDMLSL2 = { 532, 0}, - .SQDMULH = { 532, 0}, - .SQRDMULH = { 532, 0}, - .SDOT = { 532, 2}, - .UDOT = { 534, 2}, - .USDOT = { 536, 0}, - .FADD_V = { 536, 3}, - .FSUB_V = { 539, 3}, - .FMUL_V = { 542, 3}, - .FDIV_V = { 545, 3}, - .FNEG_V = { 548, 0}, - .FABS_V = { 548, 0}, - .FSQRT_V = { 548, 0}, - .FMLA_V = { 548, 2}, - .FMLS_V = { 550, 2}, - .FMULX = { 552, 0}, - .FMAX_V = { 552, 0}, - .FMIN_V = { 552, 0}, - .FMAXNM_V = { 552, 0}, - .FMINNM_V = { 552, 0}, - .FMAXP_V = { 552, 0}, - .FMINP_V = { 552, 0}, - .FMAXNMP = { 552, 0}, - .FMINNMP = { 552, 0}, - .FMAXV_V = { 552, 0}, - .FMINV_V = { 552, 0}, - .FMAXNMV = { 552, 0}, - .FMINNMV = { 552, 0}, - .FRECPE = { 552, 0}, - .FRSQRTE = { 552, 0}, - .FRECPS = { 552, 0}, - .FRSQRTS = { 552, 0}, - .FRECPX = { 552, 0}, - .FADDP_V = { 552, 0}, - .FRINTA_V = { 552, 0}, - .FRINTI_V = { 552, 0}, - .FRINTM_V = { 552, 0}, - .FRINTN_V = { 552, 0}, - .FRINTP_V = { 552, 0}, - .FRINTX_V = { 552, 0}, - .FRINTZ_V = { 552, 0}, - .SCVTF_V = { 552, 0}, - .UCVTF_V = { 552, 0}, - .FCVTAS_V = { 552, 0}, - .FCVTAU_V = { 552, 0}, - .FCVTMS_V = { 552, 0}, - .FCVTMU_V = { 552, 0}, - .FCVTNS_V = { 552, 0}, - .FCVTNU_V = { 552, 0}, - .FCVTPS_V = { 552, 0}, - .FCVTPU_V = { 552, 0}, - .FCVTZS_V = { 552, 0}, - .FCVTZU_V = { 552, 0}, - .FCVTL = { 552, 0}, - .FCVTL2 = { 552, 0}, - .FCVTN = { 552, 0}, - .FCVTN2 = { 552, 0}, - .FCVTXN = { 552, 0}, - .FCVTXN2 = { 552, 0}, - .FCMEQ = { 552, 0}, - .FCMGE = { 552, 0}, - .FCMGT = { 552, 0}, - .FCMLE = { 552, 0}, - .FCMLT = { 552, 0}, - .FACGE = { 552, 0}, - .FACGT = { 552, 0}, - .CMEQ = { 552, 4}, - .CMGE = { 556, 0}, - .CMGT = { 556, 2}, - .CMHI = { 558, 2}, - .CMHS = { 560, 0}, - .CMLE = { 560, 0}, - .CMLT = { 560, 0}, - .CMTST = { 560, 0}, - .AND_V = { 560, 1}, - .ORR_V = { 561, 1}, - .EOR_V = { 562, 1}, - .BIC_V = { 563, 1}, - .ORN_V = { 564, 1}, - .MVN_V = { 565, 0}, - .BIT = { 565, 1}, - .BIF = { 566, 1}, - .BSL = { 567, 1}, - .SHL_V = { 568, 0}, - .SQSHL_V = { 568, 0}, - .SQSHLU = { 568, 0}, - .SRSHL = { 568, 0}, - .URSHL = { 568, 0}, - .SSHR = { 568, 0}, - .USHR = { 568, 0}, - .SSRA = { 568, 0}, - .USRA = { 568, 0}, - .SRSHR = { 568, 0}, - .URSHR = { 568, 0}, - .SRSRA = { 568, 0}, - .URSRA = { 568, 0}, - .SSHL = { 568, 0}, - .USHL = { 568, 0}, - .SLI = { 568, 0}, - .SRI = { 568, 0}, - .SSHLL = { 568, 0}, - .SSHLL2 = { 568, 0}, - .USHLL = { 568, 0}, - .USHLL2 = { 568, 0}, - .SXTL = { 568, 0}, - .SXTL2 = { 568, 0}, - .UXTL = { 568, 0}, - .UXTL2 = { 568, 0}, - .SHRN = { 568, 0}, - .SHRN2 = { 568, 0}, - .RSHRN = { 568, 0}, - .RSHRN2 = { 568, 0}, - .SQSHRN = { 568, 0}, - .SQSHRN2 = { 568, 0}, - .UQSHRN = { 568, 0}, - .UQSHRN2 = { 568, 0}, - .SQRSHRN = { 568, 0}, - .SQRSHRN2 = { 568, 0}, - .UQRSHRN = { 568, 0}, - .UQRSHRN2 = { 568, 0}, - .SQSHRUN = { 568, 0}, - .SQSHRUN2 = { 568, 0}, - .SQRSHRUN = { 568, 0}, - .SQRSHRUN2 = { 568, 0}, - .DUP_V = { 568, 0}, - .INS = { 568, 0}, - .MOV_V = { 568, 0}, - .EXT_V = { 568, 0}, - .TBL = { 568, 0}, - .TBX = { 568, 0}, - .ZIP1 = { 568, 0}, - .ZIP2 = { 568, 0}, - .UZP1 = { 568, 0}, - .UZP2 = { 568, 0}, - .TRN1 = { 568, 0}, - .TRN2 = { 568, 0}, - .NOT_V = { 568, 0}, - .RBIT_V = { 568, 0}, - .REV16_V = { 568, 0}, - .REV32_V = { 568, 0}, - .REV64 = { 568, 0}, - .CLS_V = { 568, 0}, - .CLZ_V = { 568, 0}, - .CNT = { 568, 0}, - .URECPE_V = { 568, 0}, - .URSQRTE_V = { 568, 0}, - .MOVI = { 568, 0}, - .MVNI = { 568, 0}, - .FMOV_V_IMM = { 568, 0}, - .LD1 = { 568, 4}, - .LD2 = { 572, 0}, - .LD3 = { 572, 0}, - .LD4 = { 572, 0}, - .ST1 = { 572, 4}, - .ST2 = { 576, 0}, - .ST3 = { 576, 0}, - .ST4 = { 576, 0}, - .LD1R = { 576, 0}, - .LD2R = { 576, 0}, - .LD3R = { 576, 0}, - .LD4R = { 576, 0}, - .LD1_LANE = { 576, 0}, - .LD2_LANE = { 576, 0}, - .LD3_LANE = { 576, 0}, - .LD4_LANE = { 576, 0}, - .ST1_LANE = { 576, 0}, - .ST2_LANE = { 576, 0}, - .ST3_LANE = { 576, 0}, - .ST4_LANE = { 576, 0}, - .LDR_V = { 576, 5}, - .STR_V = { 581, 5}, - .LDP_V = { 586, 0}, - .STP_V = { 586, 0}, - .LDUR_V = { 586, 0}, - .STUR_V = { 586, 0}, - .SVE_ADD_Z = { 586, 4}, - .SVE_SUB_Z = { 590, 4}, - .SVE_SQADD_Z = { 594, 4}, - .SVE_UQADD_Z = { 598, 4}, - .SVE_SQSUB_Z = { 602, 4}, - .SVE_UQSUB_Z = { 606, 4}, - .SVE_ADD_PRED = { 610, 4}, - .SVE_SUB_PRED = { 614, 4}, - .SVE_SUBR_PRED = { 618, 4}, - .SVE_MUL_PRED = { 622, 4}, - .SVE_SMULH_PRED = { 626, 4}, - .SVE_UMULH_PRED = { 630, 4}, - .SVE_SDIV_PRED = { 634, 2}, - .SVE_UDIV_PRED = { 636, 2}, - .SVE_SMAX_PRED = { 638, 4}, - .SVE_UMAX_PRED = { 642, 4}, - .SVE_SMIN_PRED = { 646, 4}, - .SVE_UMIN_PRED = { 650, 4}, - .SVE_SABD_PRED = { 654, 4}, - .SVE_UABD_PRED = { 658, 4}, - .SVE_AND_PRED = { 662, 1}, - .SVE_ORR_PRED = { 663, 1}, - .SVE_EOR_PRED = { 664, 1}, - .SVE_BIC_PRED = { 665, 1}, - .SVE_ASR_PRED = { 666, 4}, - .SVE_LSL_PRED = { 670, 4}, - .SVE_LSR_PRED = { 674, 4}, - .SVE_ASRR_PRED = { 678, 0}, - .SVE_LSLR_PRED = { 678, 0}, - .SVE_LSRR_PRED = { 678, 0}, - .SVE_ABS_PRED = { 678, 4}, - .SVE_NEG_PRED = { 682, 4}, - .SVE_CLS_PRED = { 686, 4}, - .SVE_CLZ_PRED = { 690, 4}, - .SVE_CNT_PRED = { 694, 4}, - .SVE_MOV_PRED = { 698, 0}, - .SVE_FADD_Z = { 698, 3}, - .SVE_FSUB_Z = { 701, 3}, - .SVE_FMUL_Z = { 704, 3}, - .SVE_FRECPS = { 707, 3}, - .SVE_FRSQRTS = { 710, 3}, - .SVE_FTSMUL = { 713, 3}, - .SVE_FADD_PRED = { 716, 3}, - .SVE_FSUB_PRED = { 719, 3}, - .SVE_FSUBR_PRED = { 722, 0}, - .SVE_FMUL_PRED = { 722, 3}, - .SVE_FDIV_PRED = { 725, 3}, - .SVE_FDIVR_PRED = { 728, 0}, - .SVE_FMAX_PRED = { 728, 3}, - .SVE_FMIN_PRED = { 731, 3}, - .SVE_FMAXNM_PRED = { 734, 3}, - .SVE_FMINNM_PRED = { 737, 3}, - .SVE_FABS_Z = { 740, 3}, - .SVE_FNEG_Z = { 743, 3}, - .SVE_FSQRT_Z = { 746, 3}, - .SVE_FRECPX_Z = { 749, 0}, - .SVE_FRINTN = { 749, 0}, - .SVE_FRINTP = { 749, 0}, - .SVE_FRINTM = { 749, 0}, - .SVE_FRINTZ = { 749, 0}, - .SVE_FRINTA = { 749, 0}, - .SVE_FRINTX = { 749, 0}, - .SVE_FRINTI = { 749, 0}, - .SVE_FMLA = { 749, 3}, - .SVE_FMLS = { 752, 3}, - .SVE_FNMLA = { 755, 3}, - .SVE_FNMLS = { 758, 3}, - .SVE_AND_P = { 761, 1}, - .SVE_BIC_P = { 762, 1}, - .SVE_ORR_P = { 763, 1}, - .SVE_EOR_P = { 764, 1}, - .SVE_NAND_P = { 765, 1}, - .SVE_NOR_P = { 766, 1}, - .SVE_ORN_P = { 767, 1}, - .SVE_SEL_P = { 768, 1}, - .SVE_ANDS_P = { 769, 1}, - .SVE_BICS_P = { 770, 1}, - .SVE_ORRS_P = { 771, 1}, - .SVE_EORS_P = { 772, 1}, - .SVE_NANDS_P = { 773, 0}, - .SVE_NORS_P = { 773, 0}, - .SVE_ORNS_P = { 773, 0}, - .SVE_NOT_P = { 773, 0}, - .SVE_MOV_P = { 773, 0}, - .SVE_MOVS_P = { 773, 0}, - .SVE_PTRUE = { 773, 1}, - .SVE_PTRUES = { 774, 1}, - .SVE_PFALSE = { 775, 1}, - .SVE_PFIRST = { 776, 1}, - .SVE_PNEXT = { 777, 1}, - .SVE_BRKA = { 778, 0}, - .SVE_BRKB = { 778, 0}, - .SVE_BRKAS = { 778, 0}, - .SVE_BRKBS = { 778, 0}, - .SVE_BRKPA = { 778, 0}, - .SVE_BRKPB = { 778, 0}, - .SVE_BRKN = { 778, 0}, - .SVE_RDFFR = { 778, 0}, - .SVE_WRFFR = { 778, 0}, - .SVE_SETFFR = { 778, 0}, - .SVE_CMPEQ = { 778, 4}, - .SVE_CMPNE = { 782, 4}, - .SVE_CMPGE = { 786, 4}, - .SVE_CMPGT = { 790, 4}, - .SVE_CMPLE = { 794, 0}, - .SVE_CMPLT = { 794, 0}, - .SVE_CMPHI = { 794, 4}, - .SVE_CMPHS = { 798, 4}, - .SVE_CMPLO = { 802, 0}, - .SVE_CMPLS = { 802, 0}, - .SVE_FCMEQ = { 802, 0}, - .SVE_FCMNE = { 802, 0}, - .SVE_FCMGE = { 802, 0}, - .SVE_FCMGT = { 802, 0}, - .SVE_FCMLE = { 802, 0}, - .SVE_FCMLT = { 802, 0}, - .SVE_FCMUO = { 802, 0}, - .SVE_DUP_Z = { 802, 4}, - .SVE_INSR = { 806, 0}, - .SVE_REV_Z = { 806, 4}, - .SVE_REV_P = { 810, 1}, - .SVE_TBL = { 811, 4}, - .SVE_ZIP1_Z = { 815, 4}, - .SVE_ZIP2_Z = { 819, 4}, - .SVE_UZP1_Z = { 823, 4}, - .SVE_UZP2_Z = { 827, 4}, - .SVE_TRN1_Z = { 831, 4}, - .SVE_TRN2_Z = { 835, 4}, - .SVE_ZIP1_P = { 839, 1}, - .SVE_ZIP2_P = { 840, 1}, - .SVE_UZP1_P = { 841, 1}, - .SVE_UZP2_P = { 842, 1}, - .SVE_TRN1_P = { 843, 1}, - .SVE_TRN2_P = { 844, 1}, - .SVE_CPY_Z = { 845, 0}, - .SVE_COMPACT = { 845, 0}, - .SVE_EXT_Z = { 845, 0}, - .SVE_LD1B = { 845, 1}, - .SVE_LD1H = { 846, 1}, - .SVE_LD1W = { 847, 1}, - .SVE_LD1D = { 848, 1}, - .SVE_LD1SB = { 849, 1}, - .SVE_LD1SH = { 850, 1}, - .SVE_LD1SW = { 851, 1}, - .SVE_ST1B = { 852, 1}, - .SVE_ST1H = { 853, 1}, - .SVE_ST1W = { 854, 1}, - .SVE_ST1D = { 855, 1}, - .SVE_LDR_Z = { 856, 1}, - .SVE_STR_Z = { 857, 1}, - .SVE_LDR_P = { 858, 1}, - .SVE_STR_P = { 859, 1}, - .SVE_LDFF1B = { 860, 1}, - .SVE_LDFF1H = { 861, 1}, - .SVE_LDFF1W = { 862, 1}, - .SVE_LDFF1D = { 863, 1}, - .SVE_WHILEGE = { 864, 1}, - .SVE_WHILEGT = { 865, 1}, - .SVE_WHILELE = { 866, 1}, - .SVE_WHILELT = { 867, 1}, - .SVE_WHILEHI = { 868, 1}, - .SVE_WHILEHS = { 869, 1}, - .SVE_WHILELO = { 870, 1}, - .SVE_WHILELS = { 871, 1}, - .SVE_SQRDMLAH = { 872, 4}, - .SVE_SQRDMLSH = { 876, 4}, - .SVE_ADCLB = { 880, 2}, - .SVE_ADCLT = { 882, 2}, - .SVE_SBCLB = { 884, 2}, - .SVE_SBCLT = { 886, 2}, - .SVE_TBL2 = { 888, 1}, - .SVE_TBX = { 889, 1}, - .SVE_AESE = { 890, 1}, - .SVE_AESD = { 891, 1}, - .SVE_AESMC = { 892, 1}, - .SVE_AESIMC = { 893, 1}, - .SVE_BCAX_Z = { 894, 0}, - .SVE_XAR_Z = { 894, 0}, - .SVE_EOR3_Z = { 894, 0}, - .SVE_MATCH = { 894, 2}, - .SVE_NMATCH = { 896, 2}, - .SVE_HISTCNT = { 898, 2}, - .SVE_HISTSEG = { 900, 1}, - .SME_SMSTART = { 901, 1}, - .SME_SMSTOP = { 902, 1}, - .SME_RDSVL = { 903, 1}, - .SME_ADDHA = { 904, 0}, - .SME_ADDVA = { 904, 0}, - .SME_ZERO = { 904, 1}, - .SME_FMOPA = { 905, 1}, - .SME_FMOPS = { 906, 1}, - .SME_BFMOPA = { 907, 1}, - .SME_BFMOPS = { 908, 1}, - .SME_SMOPA = { 909, 2}, - .SME_SMOPS = { 911, 2}, - .SME_UMOPA = { 913, 2}, - .SME_UMOPS = { 915, 2}, - .SME_USMOPA = { 917, 1}, - .SME_SUMOPA = { 918, 1}, - .SME_MOVA_TO_Z = { 919, 0}, - .SME_MOVA_TO_ZA = { 919, 0}, - .SME_LD1B_ZA = { 919, 0}, - .SME_LD1H_ZA = { 919, 0}, - .SME_LD1W_ZA = { 919, 0}, - .SME_LD1D_ZA = { 919, 0}, - .SME_LD1Q_ZA = { 919, 0}, - .SME_ST1B_ZA = { 919, 0}, - .SME_ST1H_ZA = { 919, 0}, - .SME_ST1W_ZA = { 919, 0}, - .SME_ST1D_ZA = { 919, 0}, - .SME_ST1Q_ZA = { 919, 0}, - .SME_LDR_ZA = { 919, 1}, - .SME_STR_ZA = { 920, 1}, - .SVE_FMLA_IDX_H = { 921, 1}, - .SVE_FMLA_IDX_S = { 922, 1}, - .SVE_FMLA_IDX_D = { 923, 1}, - .SVE_FMLS_IDX_H = { 924, 1}, - .SVE_FMLS_IDX_S = { 925, 1}, - .SVE_FMLS_IDX_D = { 926, 1}, - .SVE_LD1B_GATHER_S = { 927, 1}, - .SVE_LD1B_GATHER_D = { 928, 1}, - .SVE_LD1H_GATHER_S = { 929, 1}, - .SVE_LD1H_GATHER_D = { 930, 1}, - .SVE_LD1W_GATHER_S = { 931, 1}, - .SVE_LD1W_GATHER_D = { 932, 1}, - .SVE_LD1D_GATHER_D = { 933, 1}, - .SVE_LD1SB_GATHER_S = { 934, 1}, - .SVE_LD1SB_GATHER_D = { 935, 1}, - .SVE_LD1SH_GATHER_S = { 936, 1}, - .SVE_LD1SH_GATHER_D = { 937, 1}, - .SVE_LD1SW_GATHER_D = { 938, 1}, - .SVE_ST1B_SCATTER_S = { 939, 1}, - .SVE_ST1B_SCATTER_D = { 940, 1}, - .SVE_ST1H_SCATTER_S = { 941, 1}, - .SVE_ST1H_SCATTER_D = { 942, 1}, - .SVE_ST1W_SCATTER_S = { 943, 1}, - .SVE_ST1W_SCATTER_D = { 944, 1}, - .SVE_ST1D_SCATTER_D = { 945, 1}, - .SME_LD1B_TILE = { 946, 1}, - .SME_LD1H_TILE = { 947, 1}, - .SME_LD1W_TILE = { 948, 1}, - .SME_LD1D_TILE = { 949, 1}, - .SME_LD1Q_TILE = { 950, 1}, - .SME_ST1B_TILE = { 951, 1}, - .SME_ST1H_TILE = { 952, 1}, - .SME_ST1W_TILE = { 953, 1}, - .SME_ST1D_TILE = { 954, 1}, - .SME_ST1Q_TILE = { 955, 1}, - .SME_MOVA_Z_FROM_TILE = { 956, 1}, - .SME_MOVA_TILE_FROM_Z = { 957, 1}, - .FCMLA_4H = { 958, 1}, - .FCMLA_8H = { 959, 1}, - .FCMLA_4S = { 960, 1}, - .FCMLA_2D = { 961, 1}, - .FCADD_4H = { 962, 1}, - .FCADD_8H = { 963, 1}, - .FCADD_4S = { 964, 1}, - .FCADD_2D = { 965, 1}, - .SVE_PRFB = { 966, 1}, - .SVE_PRFH = { 967, 1}, - .SVE_PRFW = { 968, 1}, - .SVE_PRFD = { 969, 1}, - .SVE_LDNT1B = { 970, 1}, - .SVE_LDNT1H = { 971, 1}, - .SVE_LDNT1W = { 972, 1}, - .SVE_LDNT1D = { 973, 1}, - .SVE_STNT1B = { 974, 1}, - .SVE_STNT1H = { 975, 1}, - .SVE_STNT1W = { 976, 1}, - .SVE_STNT1D = { 977, 1}, - .SVE_EXT = { 978, 1}, - .SVE_SPLICE = { 979, 1}, - .SVE_INDEX_II = { 980, 1}, - .SVE_INDEX_IR = { 981, 1}, - .SVE_INDEX_RI = { 982, 1}, - .SVE_INDEX_RR = { 983, 1}, - .SVE_BSL = { 984, 1}, - .SVE_BSL1N = { 985, 1}, - .SVE_BSL2N = { 986, 1}, - .SVE_NBSL = { 987, 1}, - .SVE_PMUL_VEC = { 988, 1}, - .SVE_PMULLB = { 989, 1}, - .SVE_PMULLT = { 990, 1}, - .SVE_BFCVT = { 991, 1}, - .SVE_BFCVTNT = { 992, 1}, - .LDRAA = { 993, 1}, - .LDRAB = { 994, 1}, - .LDRAA_PRE = { 995, 1}, - .LDRAB_PRE = { 996, 1}, - .TSTART = { 997, 1}, - .TCOMMIT = { 998, 1}, - .TCANCEL = { 999, 1}, - .TTEST = { 1000, 1}, - .WFET = { 1001, 1}, - .WFIT = { 1002, 1}, - .BC_COND = { 1003, 1}, - .UXTB = { 1004, 1}, - .UXTH = { 1005, 1}, - .UXTW = { 1006, 1}, - .SXTB = { 1007, 1}, - .SXTH = { 1008, 1}, - .SXTW = { 1009, 1}, - .ADC = { 1010, 2}, - .ADCS = { 1012, 2}, - .SBC = { 1014, 2}, - .SBCS = { 1016, 2}, - .NGC = { 1018, 2}, - .NGCS = { 1020, 2}, - .LDAPUR = { 1022, 2}, - .STLUR = { 1024, 2}, - .LDAPURB = { 1026, 1}, - .STLURB = { 1027, 1}, - .LDAPURH = { 1028, 1}, - .STLURH = { 1029, 1}, - .LDAPURSB = { 1030, 2}, - .LDAPURSH = { 1032, 2}, - .LDAPURSW = { 1034, 1}, - .SVE_BFADD = { 1035, 1}, - .SVE_BFSUB = { 1036, 1}, - .SVE_BFMUL = { 1037, 1}, - .SVE_BFMLA = { 1038, 1}, - .SVE_BFMLS = { 1039, 1}, - .SB = { 1040, 1}, - .CSDB = { 1041, 1}, - .DGH = { 1042, 1}, - .PSB_CSYNC = { 1043, 1}, - .TSB_CSYNC = { 1044, 1}, - .BTI_J = { 1045, 1}, - .BTI_C = { 1046, 1}, - .BTI_JC = { 1047, 1}, - .MOV_V_ALIAS = { 1048, 2}, - .NOT_V_ALIAS = { 1050, 2}, - .LSL_IMM = { 1052, 2}, - .LSR_IMM = { 1054, 2}, - .ASR_IMM = { 1056, 2}, - .ROR_IMM = { 1058, 2}, - .SVE_BFADD_UNPRED = { 1060, 1}, - .SVE_BFSUB_UNPRED = { 1061, 1}, - .SVE_BFMUL_UNPRED = { 1062, 1}, - .SVE_BFCLAMP = { 1063, 1}, - .SVE_BFMAXNM = { 1064, 1}, - .SVE_BFMINNM = { 1065, 1}, - .SME2_LUTI2_B = { 1066, 1}, - .SME2_LUTI4_B = { 1067, 1}, - .SME2_LD1B_X2 = { 1068, 1}, - .SME2_LD1H_X2 = { 1069, 1}, - .SME2_LD1W_X2 = { 1070, 1}, - .SME2_LD1D_X2 = { 1071, 1}, - .SME2_LD1B_X4 = { 1072, 1}, - .SME2_LD1H_X4 = { 1073, 1}, - .SME2_LD1W_X4 = { 1074, 1}, - .SME2_LD1D_X4 = { 1075, 1}, - .SME2_ST1B_X2 = { 1076, 1}, - .SME2_ST1H_X2 = { 1077, 1}, - .SME2_ST1W_X2 = { 1078, 1}, - .SME2_ST1D_X2 = { 1079, 1}, - .SME2_ST1B_X4 = { 1080, 1}, - .SME2_ST1H_X4 = { 1081, 1}, - .SME2_ST1W_X4 = { 1082, 1}, - .SME2_ST1D_X4 = { 1083, 1}, - .SME2_ZIP_3 = { 1084, 1}, - .SME2_ZIP_4 = { 1085, 1}, - .SME2_UZP_3 = { 1086, 1}, - .SME2_UZP_4 = { 1087, 1}, - .TLBI_RPALOS = { 1088, 1}, - .TLBI_RPAOS = { 1089, 1}, - .AT_S1E1A = { 1090, 1}, - .DC_CIPAPA = { 1091, 1}, - .DC_CIGDPAPA = { 1092, 1}, - .TLBI_PAALL = { 1093, 1}, - .TLBI_PAALLOS = { 1094, 1}, - .AMX_LDX = { 1095, 1}, - .AMX_LDY = { 1096, 1}, - .AMX_STX = { 1097, 1}, - .AMX_STY = { 1098, 1}, - .AMX_LDZ = { 1099, 1}, - .AMX_STZ = { 1100, 1}, - .AMX_LDZI = { 1101, 1}, - .AMX_STZI = { 1102, 1}, - .AMX_EXTRX = { 1103, 1}, - .AMX_EXTRY = { 1104, 1}, - .AMX_FMA64 = { 1105, 1}, - .AMX_FMS64 = { 1106, 1}, - .AMX_FMA32 = { 1107, 1}, - .AMX_FMS32 = { 1108, 1}, - .AMX_MAC16 = { 1109, 1}, - .AMX_FMA16 = { 1110, 1}, - .AMX_FMS16 = { 1111, 1}, - .AMX_SET = { 1112, 1}, - .AMX_CLR = { 1113, 1}, - .AMX_VECINT = { 1114, 1}, - .AMX_VECFP = { 1115, 1}, - .AMX_MATINT = { 1116, 1}, - .AMX_MATFP = { 1117, 1}, - .AMX_GENLUT = { 1118, 1}, - .CPYP = { 1119, 1}, - .CPYM = { 1120, 1}, - .CPYE = { 1121, 1}, - .CPYFP = { 1122, 1}, - .CPYFM = { 1123, 1}, - .CPYFE = { 1124, 1}, - .SETP = { 1125, 1}, - .SETM = { 1126, 1}, - .SETE = { 1127, 1}, - .DC_IVAC = { 1128, 1}, - .DC_ISW = { 1129, 1}, - .DC_CSW = { 1130, 1}, - .DC_CISW = { 1131, 1}, - .DC_ZVA = { 1132, 1}, - .DC_CVAC = { 1133, 1}, - .DC_CVAU = { 1134, 1}, - .DC_CIVAC = { 1135, 1}, - .IC_IALLUIS = { 1136, 1}, - .IC_IALLU = { 1137, 1}, - .IC_IVAU = { 1138, 1}, - .AT_S1E1R = { 1139, 1}, - .AT_S1E1W = { 1140, 1}, - .AT_S1E0R = { 1141, 1}, - .AT_S1E0W = { 1142, 1}, - .AT_S1E2R = { 1143, 1}, - .AT_S1E2W = { 1144, 1}, - .AT_S1E3R = { 1145, 1}, - .AT_S1E3W = { 1146, 1}, - .AT_S12E1R = { 1147, 1}, - .AT_S12E1W = { 1148, 1}, - .AT_S12E0R = { 1149, 1}, - .AT_S12E0W = { 1150, 1}, - .TLBI_VMALLE1 = { 1151, 1}, - .TLBI_VMALLE1IS = { 1152, 1}, - .TLBI_VAE1 = { 1153, 1}, - .TLBI_VAE1IS = { 1154, 1}, - .TLBI_ASIDE1 = { 1155, 1}, - .TLBI_ASIDE1IS = { 1156, 1}, - .TLBI_VAAE1 = { 1157, 1}, - .TLBI_VAAE1IS = { 1158, 1}, - .TLBI_VALE1 = { 1159, 1}, - .TLBI_VALE1IS = { 1160, 1}, - .TLBI_VAALE1 = { 1161, 1}, - .TLBI_VAALE1IS = { 1162, 1}, - .TLBI_ALLE1 = { 1163, 1}, - .TLBI_ALLE1IS = { 1164, 1}, - .TLBI_ALLE2 = { 1165, 1}, - .TLBI_ALLE2IS = { 1166, 1}, - .TLBI_ALLE3 = { 1167, 1}, - .TLBI_ALLE3IS = { 1168, 1}, - .PRFM = { 1169, 1}, - .PRFUM = { 1170, 1}, - .PRFM_LIT = { 1171, 1}, - .MOV_REG = { 1172, 2}, - .MOV_BITMASK = { 1174, 2}, - .MVN = { 1176, 2}, - .NEG_SR = { 1178, 2}, - .NEGS = { 1180, 2}, - .CMP_SR = { 1182, 2}, - .CMP_ER = { 1184, 2}, - .CMP_IMM = { 1186, 2}, - .CMN_SR = { 1188, 2}, - .CMN_ER = { 1190, 2}, - .CMN_IMM = { 1192, 2}, - .TST_SR = { 1194, 2}, + .CCMP_REG = { 89, 2}, + .CCMP_IMM = { 91, 0}, + .CCMN_REG = { 91, 2}, + .CCMN_IMM = { 93, 0}, + .EXTR = { 93, 2}, + .B = { 95, 1}, + .BL = { 96, 1}, + .BR = { 97, 1}, + .BLR = { 98, 1}, + .RET = { 99, 2}, + .B_COND = { 101, 1}, + .CBZ = { 102, 2}, + .CBNZ = { 104, 2}, + .TBZ = { 106, 1}, + .TBNZ = { 107, 1}, + .LDR = { 108, 2}, + .STR = { 110, 2}, + .LDRB = { 112, 1}, + .STRB = { 113, 1}, + .LDRSB = { 114, 2}, + .LDRH = { 116, 1}, + .STRH = { 117, 1}, + .LDRSH = { 118, 2}, + .LDRSW = { 120, 1}, + .LDP = { 121, 2}, + .STP = { 123, 2}, + .LDPSW = { 125, 1}, + .LDR_LIT = { 126, 2}, + .LDAR = { 128, 2}, + .STLR = { 130, 2}, + .LDARB = { 132, 1}, + .STLRB = { 133, 1}, + .LDARH = { 134, 1}, + .STLRH = { 135, 1}, + .LDXR = { 136, 2}, + .STXR = { 138, 2}, + .LDAXR = { 140, 2}, + .STLXR = { 142, 2}, + .NOP = { 144, 1}, + .YIELD = { 145, 1}, + .WFE = { 146, 1}, + .WFI = { 147, 1}, + .SEV = { 148, 1}, + .SEVL = { 149, 1}, + .HINT = { 150, 0}, + .MRS = { 150, 1}, + .MSR_IMM = { 151, 0}, + .MSR_REG = { 151, 1}, + .ISB = { 152, 1}, + .DSB = { 153, 1}, + .DMB = { 154, 1}, + .SVC = { 155, 1}, + .HVC = { 156, 1}, + .SMC = { 157, 1}, + .BRK = { 158, 1}, + .HLT = { 159, 1}, + .ERET = { 160, 1}, + .FMOV_REG = { 161, 2}, + .FMOV_IMM = { 163, 0}, + .FMOV_GEN = { 163, 4}, + .FABS = { 167, 2}, + .FNEG = { 169, 2}, + .FSQRT = { 171, 2}, + .FADD = { 173, 2}, + .FSUB = { 175, 2}, + .FMUL = { 177, 2}, + .FDIV = { 179, 2}, + .FNMUL = { 181, 2}, + .FMADD = { 183, 2}, + .FMSUB = { 185, 2}, + .FNMADD = { 187, 2}, + .FNMSUB = { 189, 2}, + .FCMP = { 191, 2}, + .FCMPE = { 193, 2}, + .FCSEL = { 195, 2}, + .FMAX = { 197, 2}, + .FMIN = { 199, 2}, + .FMAXNM = { 201, 2}, + .FMINNM = { 203, 2}, + .FCVT = { 205, 2}, + .SCVTF = { 207, 4}, + .UCVTF = { 211, 4}, + .FCVTZS = { 215, 4}, + .FCVTZU = { 219, 4}, + .FCVTAS = { 223, 0}, + .FCVTAU = { 223, 0}, + .FCVTNS = { 223, 0}, + .FCVTNU = { 223, 0}, + .FCVTPS = { 223, 0}, + .FCVTPU = { 223, 0}, + .FCVTMS = { 223, 0}, + .FCVTMU = { 223, 0}, + .FRINTA = { 223, 0}, + .FRINTI = { 223, 0}, + .FRINTM = { 223, 0}, + .FRINTN = { 223, 0}, + .FRINTP = { 223, 0}, + .FRINTX = { 223, 0}, + .FRINTZ = { 223, 0}, + .AND_IMM = { 223, 2}, + .ANDS_IMM = { 225, 2}, + .ORR_IMM = { 227, 2}, + .EOR_IMM = { 229, 2}, + .TST_IMM = { 231, 2}, + .LDUR = { 233, 2}, + .STUR = { 235, 2}, + .LDURB = { 237, 1}, + .STURB = { 238, 1}, + .LDURSB = { 239, 2}, + .LDURH = { 241, 1}, + .STURH = { 242, 1}, + .LDURSH = { 243, 2}, + .LDURSW = { 245, 1}, + .LDR_PRE = { 246, 2}, + .STR_PRE = { 248, 2}, + .LDR_POST = { 250, 2}, + .STR_POST = { 252, 2}, + .LDRB_PRE = { 254, 0}, + .STRB_PRE = { 254, 0}, + .LDRB_POST = { 254, 0}, + .STRB_POST = { 254, 0}, + .LDRH_PRE = { 254, 0}, + .STRH_PRE = { 254, 0}, + .LDRH_POST = { 254, 0}, + .STRH_POST = { 254, 0}, + .LDR_REG = { 254, 2}, + .STR_REG = { 256, 2}, + .LDRB_REG = { 258, 0}, + .STRB_REG = { 258, 0}, + .LDRH_REG = { 258, 0}, + .STRH_REG = { 258, 0}, + .LDRSB_REG = { 258, 0}, + .LDRSH_REG = { 258, 0}, + .LDRSW_REG = { 258, 0}, + .LDP_PRE = { 258, 2}, + .STP_PRE = { 260, 2}, + .LDP_POST = { 262, 2}, + .STP_POST = { 264, 2}, + .LDPSW_PRE = { 266, 1}, + .LDPSW_POST = { 267, 1}, + .LDNP = { 268, 2}, + .STNP = { 270, 2}, + .LDXP = { 272, 2}, + .STXP = { 274, 2}, + .LDAXP = { 276, 2}, + .STLXP = { 278, 2}, + .LDXRB = { 280, 1}, + .STXRB = { 281, 1}, + .LDAXRB = { 282, 1}, + .STLXRB = { 283, 1}, + .LDXRH = { 284, 1}, + .STXRH = { 285, 1}, + .LDAXRH = { 286, 1}, + .STLXRH = { 287, 1}, + .LDARB_X = { 288, 0}, + .STLRB_X = { 288, 0}, + .LDARH_X = { 288, 0}, + .STLRH_X = { 288, 0}, + .LDAPR = { 288, 2}, + .LDAPRB = { 290, 1}, + .LDAPRH = { 291, 1}, + .LDADD = { 292, 2}, + .LDADDA = { 294, 2}, + .LDADDL = { 296, 2}, + .LDADDAL = { 298, 2}, + .LDCLR = { 300, 2}, + .LDCLRA = { 302, 2}, + .LDCLRL = { 304, 2}, + .LDCLRAL = { 306, 2}, + .LDEOR = { 308, 2}, + .LDEORA = { 310, 2}, + .LDEORL = { 312, 2}, + .LDEORAL = { 314, 2}, + .LDSET = { 316, 2}, + .LDSETA = { 318, 2}, + .LDSETL = { 320, 2}, + .LDSETAL = { 322, 2}, + .LDSMAX = { 324, 2}, + .LDSMAXA = { 326, 2}, + .LDSMAXL = { 328, 2}, + .LDSMAXAL = { 330, 2}, + .LDSMIN = { 332, 2}, + .LDSMINA = { 334, 2}, + .LDSMINL = { 336, 2}, + .LDSMINAL = { 338, 2}, + .LDUMAX = { 340, 2}, + .LDUMAXA = { 342, 2}, + .LDUMAXL = { 344, 2}, + .LDUMAXAL = { 346, 2}, + .LDUMIN = { 348, 2}, + .LDUMINA = { 350, 2}, + .LDUMINL = { 352, 2}, + .LDUMINAL = { 354, 2}, + .SWP = { 356, 2}, + .SWPA = { 358, 2}, + .SWPL = { 360, 2}, + .SWPAL = { 362, 2}, + .CAS = { 364, 2}, + .CASA = { 366, 2}, + .CASL = { 368, 2}, + .CASAL = { 370, 2}, + .CASB = { 372, 1}, + .CASAB = { 373, 1}, + .CASLB = { 374, 1}, + .CASALB = { 375, 1}, + .CASH = { 376, 1}, + .CASAH = { 377, 1}, + .CASLH = { 378, 1}, + .CASALH = { 379, 1}, + .CASP = { 380, 2}, + .CASPA = { 382, 2}, + .CASPL = { 384, 2}, + .CASPAL = { 386, 2}, + .PACIA = { 388, 1}, + .PACIB = { 389, 1}, + .PACDA = { 390, 1}, + .PACDB = { 391, 1}, + .PACIZA = { 392, 1}, + .PACIZB = { 393, 1}, + .PACDZA = { 394, 1}, + .PACDZB = { 395, 1}, + .AUTIA = { 396, 1}, + .AUTIB = { 397, 1}, + .AUTDA = { 398, 1}, + .AUTDB = { 399, 1}, + .AUTIZA = { 400, 1}, + .AUTIZB = { 401, 1}, + .AUTDZA = { 402, 1}, + .AUTDZB = { 403, 1}, + .PACIASP = { 404, 1}, + .PACIBSP = { 405, 1}, + .AUTIASP = { 406, 1}, + .AUTIBSP = { 407, 1}, + .PACIA1716 = { 408, 1}, + .PACIB1716 = { 409, 1}, + .AUTIA1716 = { 410, 1}, + .AUTIB1716 = { 411, 1}, + .PACGA = { 412, 1}, + .XPACI = { 413, 1}, + .XPACD = { 414, 1}, + .XPACLRI = { 415, 1}, + .RETAA = { 416, 1}, + .RETAB = { 417, 1}, + .BRAA = { 418, 1}, + .BRAB = { 419, 1}, + .BRAAZ = { 420, 1}, + .BRABZ = { 421, 1}, + .BLRAA = { 422, 1}, + .BLRAB = { 423, 1}, + .BLRAAZ = { 424, 1}, + .BLRABZ = { 425, 1}, + .ERETAA = { 426, 1}, + .ERETAB = { 427, 1}, + .BTI = { 428, 1}, + .IRG = { 429, 1}, + .ADDG = { 430, 1}, + .SUBG = { 431, 1}, + .GMI = { 432, 1}, + .SUBP = { 433, 1}, + .SUBPS = { 434, 1}, + .LDG = { 435, 1}, + .STG = { 436, 1}, + .ST2G = { 437, 1}, + .STZG = { 438, 1}, + .STZ2G = { 439, 1}, + .STGP = { 440, 1}, + .LDGM = { 441, 1}, + .STGM = { 442, 1}, + .STZGM = { 443, 1}, + .CRC32B = { 444, 1}, + .CRC32H = { 445, 1}, + .CRC32W = { 446, 1}, + .CRC32X = { 447, 1}, + .CRC32CB = { 448, 1}, + .CRC32CH = { 449, 1}, + .CRC32CW = { 450, 1}, + .CRC32CX = { 451, 1}, + .AESE = { 452, 1}, + .AESD = { 453, 1}, + .AESMC = { 454, 1}, + .AESIMC = { 455, 1}, + .SHA1H = { 456, 1}, + .SHA1C = { 457, 1}, + .SHA1P = { 458, 1}, + .SHA1M = { 459, 1}, + .SHA1SU0 = { 460, 1}, + .SHA1SU1 = { 461, 1}, + .SHA256H = { 462, 1}, + .SHA256H2 = { 463, 1}, + .SHA256SU0 = { 464, 1}, + .SHA256SU1 = { 465, 1}, + .SHA512H = { 466, 1}, + .SHA512H2 = { 467, 1}, + .SHA512SU0 = { 468, 1}, + .SHA512SU1 = { 469, 1}, + .EOR3 = { 470, 1}, + .BCAX = { 471, 1}, + .RAX1 = { 472, 1}, + .XAR = { 473, 1}, + .SM3PARTW1 = { 474, 1}, + .SM3PARTW2 = { 475, 1}, + .SM3SS1 = { 476, 1}, + .SM3TT1A = { 477, 1}, + .SM3TT1B = { 478, 1}, + .SM3TT2A = { 479, 1}, + .SM3TT2B = { 480, 1}, + .SM4E = { 481, 1}, + .SM4EKEY = { 482, 1}, + .PMULL = { 483, 2}, + .PMULL2 = { 485, 2}, + .FABS_H = { 487, 1}, + .FNEG_H = { 488, 1}, + .FSQRT_H = { 489, 1}, + .FADD_H = { 490, 1}, + .FSUB_H = { 491, 1}, + .FMUL_H = { 492, 1}, + .FDIV_H = { 493, 1}, + .FNMUL_H = { 494, 1}, + .FMADD_H = { 495, 1}, + .FMSUB_H = { 496, 1}, + .FNMADD_H = { 497, 1}, + .FNMSUB_H = { 498, 1}, + .FCMP_H = { 499, 1}, + .FCMPE_H = { 500, 1}, + .FCSEL_H = { 501, 1}, + .FMAX_H = { 502, 1}, + .FMIN_H = { 503, 1}, + .FMAXNM_H = { 504, 1}, + .FMINNM_H = { 505, 1}, + .FCVT_H_S = { 506, 1}, + .FCVT_H_D = { 507, 1}, + .FCVT_S_H = { 508, 1}, + .FCVT_D_H = { 509, 1}, + .FMOV_H = { 510, 1}, + .SCVTF_H = { 511, 1}, + .UCVTF_H = { 512, 1}, + .FCVTZS_H = { 513, 1}, + .FCVTZU_H = { 514, 1}, + .BFCVT = { 515, 1}, + .BFDOT = { 516, 1}, + .BFMMLA = { 517, 1}, + .BFMLALB = { 518, 1}, + .BFMLALT = { 519, 1}, + .BFCVTN = { 520, 1}, + .BFCVTN2 = { 521, 1}, + .ADD_V = { 522, 7}, + .SUB_V = { 529, 4}, + .MUL_V = { 533, 3}, + .MLA_V = { 536, 0}, + .MLS_V = { 536, 0}, + .NEG_V = { 536, 0}, + .ABS_V = { 536, 0}, + .SHADD = { 536, 0}, + .UHADD = { 536, 0}, + .SHSUB = { 536, 0}, + .UHSUB = { 536, 0}, + .SRHADD = { 536, 0}, + .URHADD = { 536, 0}, + .SQADD = { 536, 0}, + .UQADD = { 536, 0}, + .SQSUB = { 536, 0}, + .UQSUB = { 536, 0}, + .SMAX = { 536, 0}, + .UMAX = { 536, 0}, + .SMIN = { 536, 0}, + .UMIN = { 536, 0}, + .SABD = { 536, 0}, + .UABD = { 536, 0}, + .SABA = { 536, 0}, + .UABA = { 536, 0}, + .ADDP_V = { 536, 0}, + .ADDV = { 536, 0}, + .SADDLP = { 536, 0}, + .UADDLP = { 536, 0}, + .SADALP = { 536, 0}, + .UADALP = { 536, 0}, + .SADDLV = { 536, 0}, + .UADDLV = { 536, 0}, + .SMAXV = { 536, 0}, + .UMAXV = { 536, 0}, + .SMINV = { 536, 0}, + .UMINV = { 536, 0}, + .SMAXP = { 536, 0}, + .UMAXP = { 536, 0}, + .SMINP = { 536, 0}, + .UMINP = { 536, 0}, + .SADDL = { 536, 0}, + .SADDL2 = { 536, 0}, + .UADDL = { 536, 0}, + .UADDL2 = { 536, 0}, + .SSUBL = { 536, 0}, + .SSUBL2 = { 536, 0}, + .USUBL = { 536, 0}, + .USUBL2 = { 536, 0}, + .SADDW = { 536, 0}, + .SADDW2 = { 536, 0}, + .UADDW = { 536, 0}, + .UADDW2 = { 536, 0}, + .SSUBW = { 536, 0}, + .SSUBW2 = { 536, 0}, + .USUBW = { 536, 0}, + .USUBW2 = { 536, 0}, + .RADDHN = { 536, 0}, + .RADDHN2 = { 536, 0}, + .RSUBHN = { 536, 0}, + .RSUBHN2 = { 536, 0}, + .ADDHN = { 536, 0}, + .ADDHN2 = { 536, 0}, + .SUBHN = { 536, 0}, + .SUBHN2 = { 536, 0}, + .XTN = { 536, 0}, + .XTN2 = { 536, 0}, + .SQXTN = { 536, 0}, + .SQXTN2 = { 536, 0}, + .UQXTN = { 536, 0}, + .UQXTN2 = { 536, 0}, + .SQXTUN = { 536, 0}, + .SQXTUN2 = { 536, 0}, + .SMULL_V = { 536, 0}, + .SMULL2_V = { 536, 0}, + .UMULL_V = { 536, 0}, + .UMULL2_V = { 536, 0}, + .SMLAL = { 536, 0}, + .SMLAL2 = { 536, 0}, + .UMLAL = { 536, 0}, + .UMLAL2 = { 536, 0}, + .SMLSL = { 536, 0}, + .SMLSL2 = { 536, 0}, + .UMLSL = { 536, 0}, + .UMLSL2 = { 536, 0}, + .SQDMULL = { 536, 0}, + .SQDMULL2 = { 536, 0}, + .SQDMLAL = { 536, 0}, + .SQDMLAL2 = { 536, 0}, + .SQDMLSL = { 536, 0}, + .SQDMLSL2 = { 536, 0}, + .SQDMULH = { 536, 0}, + .SQRDMULH = { 536, 0}, + .SDOT = { 536, 2}, + .UDOT = { 538, 2}, + .USDOT = { 540, 0}, + .FADD_V = { 540, 3}, + .FSUB_V = { 543, 3}, + .FMUL_V = { 546, 3}, + .FDIV_V = { 549, 3}, + .FNEG_V = { 552, 0}, + .FABS_V = { 552, 0}, + .FSQRT_V = { 552, 0}, + .FMLA_V = { 552, 2}, + .FMLS_V = { 554, 2}, + .FMULX = { 556, 0}, + .FMAX_V = { 556, 0}, + .FMIN_V = { 556, 0}, + .FMAXNM_V = { 556, 0}, + .FMINNM_V = { 556, 0}, + .FMAXP_V = { 556, 0}, + .FMINP_V = { 556, 0}, + .FMAXNMP = { 556, 0}, + .FMINNMP = { 556, 0}, + .FMAXV_V = { 556, 0}, + .FMINV_V = { 556, 0}, + .FMAXNMV = { 556, 0}, + .FMINNMV = { 556, 0}, + .FRECPE = { 556, 0}, + .FRSQRTE = { 556, 0}, + .FRECPS = { 556, 0}, + .FRSQRTS = { 556, 0}, + .FRECPX = { 556, 0}, + .FADDP_V = { 556, 0}, + .FRINTA_V = { 556, 0}, + .FRINTI_V = { 556, 0}, + .FRINTM_V = { 556, 0}, + .FRINTN_V = { 556, 0}, + .FRINTP_V = { 556, 0}, + .FRINTX_V = { 556, 0}, + .FRINTZ_V = { 556, 0}, + .SCVTF_V = { 556, 0}, + .UCVTF_V = { 556, 0}, + .FCVTAS_V = { 556, 0}, + .FCVTAU_V = { 556, 0}, + .FCVTMS_V = { 556, 0}, + .FCVTMU_V = { 556, 0}, + .FCVTNS_V = { 556, 0}, + .FCVTNU_V = { 556, 0}, + .FCVTPS_V = { 556, 0}, + .FCVTPU_V = { 556, 0}, + .FCVTZS_V = { 556, 0}, + .FCVTZU_V = { 556, 0}, + .FCVTL = { 556, 0}, + .FCVTL2 = { 556, 0}, + .FCVTN = { 556, 0}, + .FCVTN2 = { 556, 0}, + .FCVTXN = { 556, 0}, + .FCVTXN2 = { 556, 0}, + .FCMEQ = { 556, 0}, + .FCMGE = { 556, 0}, + .FCMGT = { 556, 0}, + .FCMLE = { 556, 0}, + .FCMLT = { 556, 0}, + .FACGE = { 556, 0}, + .FACGT = { 556, 0}, + .CMEQ = { 556, 4}, + .CMGE = { 560, 0}, + .CMGT = { 560, 2}, + .CMHI = { 562, 2}, + .CMHS = { 564, 0}, + .CMLE = { 564, 0}, + .CMLT = { 564, 0}, + .CMTST = { 564, 0}, + .AND_V = { 564, 1}, + .ORR_V = { 565, 1}, + .EOR_V = { 566, 1}, + .BIC_V = { 567, 1}, + .ORN_V = { 568, 1}, + .MVN_V = { 569, 0}, + .BIT = { 569, 1}, + .BIF = { 570, 1}, + .BSL = { 571, 1}, + .SHL_V = { 572, 0}, + .SQSHL_V = { 572, 0}, + .SQSHLU = { 572, 0}, + .SRSHL = { 572, 0}, + .URSHL = { 572, 0}, + .SSHR = { 572, 0}, + .USHR = { 572, 0}, + .SSRA = { 572, 0}, + .USRA = { 572, 0}, + .SRSHR = { 572, 0}, + .URSHR = { 572, 0}, + .SRSRA = { 572, 0}, + .URSRA = { 572, 0}, + .SSHL = { 572, 0}, + .USHL = { 572, 0}, + .SLI = { 572, 0}, + .SRI = { 572, 0}, + .SSHLL = { 572, 0}, + .SSHLL2 = { 572, 0}, + .USHLL = { 572, 0}, + .USHLL2 = { 572, 0}, + .SXTL = { 572, 0}, + .SXTL2 = { 572, 0}, + .UXTL = { 572, 0}, + .UXTL2 = { 572, 0}, + .SHRN = { 572, 0}, + .SHRN2 = { 572, 0}, + .RSHRN = { 572, 0}, + .RSHRN2 = { 572, 0}, + .SQSHRN = { 572, 0}, + .SQSHRN2 = { 572, 0}, + .UQSHRN = { 572, 0}, + .UQSHRN2 = { 572, 0}, + .SQRSHRN = { 572, 0}, + .SQRSHRN2 = { 572, 0}, + .UQRSHRN = { 572, 0}, + .UQRSHRN2 = { 572, 0}, + .SQSHRUN = { 572, 0}, + .SQSHRUN2 = { 572, 0}, + .SQRSHRUN = { 572, 0}, + .SQRSHRUN2 = { 572, 0}, + .DUP_V = { 572, 0}, + .INS = { 572, 0}, + .MOV_V = { 572, 0}, + .EXT_V = { 572, 0}, + .TBL = { 572, 0}, + .TBX = { 572, 0}, + .ZIP1 = { 572, 0}, + .ZIP2 = { 572, 0}, + .UZP1 = { 572, 0}, + .UZP2 = { 572, 0}, + .TRN1 = { 572, 0}, + .TRN2 = { 572, 0}, + .NOT_V = { 572, 0}, + .RBIT_V = { 572, 0}, + .REV16_V = { 572, 0}, + .REV32_V = { 572, 0}, + .REV64 = { 572, 0}, + .CLS_V = { 572, 0}, + .CLZ_V = { 572, 0}, + .CNT = { 572, 0}, + .URECPE_V = { 572, 0}, + .URSQRTE_V = { 572, 0}, + .MOVI = { 572, 0}, + .MVNI = { 572, 0}, + .FMOV_V_IMM = { 572, 0}, + .LD1 = { 572, 4}, + .LD2 = { 576, 0}, + .LD3 = { 576, 0}, + .LD4 = { 576, 0}, + .ST1 = { 576, 4}, + .ST2 = { 580, 0}, + .ST3 = { 580, 0}, + .ST4 = { 580, 0}, + .LD1R = { 580, 0}, + .LD2R = { 580, 0}, + .LD3R = { 580, 0}, + .LD4R = { 580, 0}, + .LD1_LANE = { 580, 0}, + .LD2_LANE = { 580, 0}, + .LD3_LANE = { 580, 0}, + .LD4_LANE = { 580, 0}, + .ST1_LANE = { 580, 0}, + .ST2_LANE = { 580, 0}, + .ST3_LANE = { 580, 0}, + .ST4_LANE = { 580, 0}, + .LDR_V = { 580, 5}, + .STR_V = { 585, 5}, + .LDP_V = { 590, 0}, + .STP_V = { 590, 0}, + .LDUR_V = { 590, 0}, + .STUR_V = { 590, 0}, + .SVE_ADD_Z = { 590, 4}, + .SVE_SUB_Z = { 594, 4}, + .SVE_SQADD_Z = { 598, 4}, + .SVE_UQADD_Z = { 602, 4}, + .SVE_SQSUB_Z = { 606, 4}, + .SVE_UQSUB_Z = { 610, 4}, + .SVE_ADD_PRED = { 614, 4}, + .SVE_SUB_PRED = { 618, 4}, + .SVE_SUBR_PRED = { 622, 4}, + .SVE_MUL_PRED = { 626, 4}, + .SVE_SMULH_PRED = { 630, 4}, + .SVE_UMULH_PRED = { 634, 4}, + .SVE_SDIV_PRED = { 638, 2}, + .SVE_UDIV_PRED = { 640, 2}, + .SVE_SMAX_PRED = { 642, 4}, + .SVE_UMAX_PRED = { 646, 4}, + .SVE_SMIN_PRED = { 650, 4}, + .SVE_UMIN_PRED = { 654, 4}, + .SVE_SABD_PRED = { 658, 4}, + .SVE_UABD_PRED = { 662, 4}, + .SVE_AND_PRED = { 666, 1}, + .SVE_ORR_PRED = { 667, 1}, + .SVE_EOR_PRED = { 668, 1}, + .SVE_BIC_PRED = { 669, 1}, + .SVE_ASR_PRED = { 670, 4}, + .SVE_LSL_PRED = { 674, 4}, + .SVE_LSR_PRED = { 678, 4}, + .SVE_ASRR_PRED = { 682, 0}, + .SVE_LSLR_PRED = { 682, 0}, + .SVE_LSRR_PRED = { 682, 0}, + .SVE_ABS_PRED = { 682, 4}, + .SVE_NEG_PRED = { 686, 4}, + .SVE_CLS_PRED = { 690, 4}, + .SVE_CLZ_PRED = { 694, 4}, + .SVE_CNT_PRED = { 698, 4}, + .SVE_MOV_PRED = { 702, 0}, + .SVE_FADD_Z = { 702, 3}, + .SVE_FSUB_Z = { 705, 3}, + .SVE_FMUL_Z = { 708, 3}, + .SVE_FRECPS = { 711, 3}, + .SVE_FRSQRTS = { 714, 3}, + .SVE_FTSMUL = { 717, 3}, + .SVE_FADD_PRED = { 720, 3}, + .SVE_FSUB_PRED = { 723, 3}, + .SVE_FSUBR_PRED = { 726, 0}, + .SVE_FMUL_PRED = { 726, 3}, + .SVE_FDIV_PRED = { 729, 3}, + .SVE_FDIVR_PRED = { 732, 0}, + .SVE_FMAX_PRED = { 732, 3}, + .SVE_FMIN_PRED = { 735, 3}, + .SVE_FMAXNM_PRED = { 738, 3}, + .SVE_FMINNM_PRED = { 741, 3}, + .SVE_FABS_Z = { 744, 3}, + .SVE_FNEG_Z = { 747, 3}, + .SVE_FSQRT_Z = { 750, 3}, + .SVE_FRECPX_Z = { 753, 0}, + .SVE_FRINTN = { 753, 0}, + .SVE_FRINTP = { 753, 0}, + .SVE_FRINTM = { 753, 0}, + .SVE_FRINTZ = { 753, 0}, + .SVE_FRINTA = { 753, 0}, + .SVE_FRINTX = { 753, 0}, + .SVE_FRINTI = { 753, 0}, + .SVE_FMLA = { 753, 3}, + .SVE_FMLS = { 756, 3}, + .SVE_FNMLA = { 759, 3}, + .SVE_FNMLS = { 762, 3}, + .SVE_AND_P = { 765, 1}, + .SVE_BIC_P = { 766, 1}, + .SVE_ORR_P = { 767, 1}, + .SVE_EOR_P = { 768, 1}, + .SVE_NAND_P = { 769, 1}, + .SVE_NOR_P = { 770, 1}, + .SVE_ORN_P = { 771, 1}, + .SVE_SEL_P = { 772, 1}, + .SVE_ANDS_P = { 773, 1}, + .SVE_BICS_P = { 774, 1}, + .SVE_ORRS_P = { 775, 1}, + .SVE_EORS_P = { 776, 1}, + .SVE_NANDS_P = { 777, 0}, + .SVE_NORS_P = { 777, 0}, + .SVE_ORNS_P = { 777, 0}, + .SVE_NOT_P = { 777, 0}, + .SVE_MOV_P = { 777, 0}, + .SVE_MOVS_P = { 777, 0}, + .SVE_PTRUE = { 777, 1}, + .SVE_PTRUES = { 778, 1}, + .SVE_PFALSE = { 779, 1}, + .SVE_PFIRST = { 780, 1}, + .SVE_PNEXT = { 781, 1}, + .SVE_BRKA = { 782, 0}, + .SVE_BRKB = { 782, 0}, + .SVE_BRKAS = { 782, 0}, + .SVE_BRKBS = { 782, 0}, + .SVE_BRKPA = { 782, 0}, + .SVE_BRKPB = { 782, 0}, + .SVE_BRKN = { 782, 0}, + .SVE_RDFFR = { 782, 0}, + .SVE_WRFFR = { 782, 0}, + .SVE_SETFFR = { 782, 0}, + .SVE_CMPEQ = { 782, 4}, + .SVE_CMPNE = { 786, 4}, + .SVE_CMPGE = { 790, 4}, + .SVE_CMPGT = { 794, 4}, + .SVE_CMPLE = { 798, 0}, + .SVE_CMPLT = { 798, 0}, + .SVE_CMPHI = { 798, 4}, + .SVE_CMPHS = { 802, 4}, + .SVE_CMPLO = { 806, 0}, + .SVE_CMPLS = { 806, 0}, + .SVE_FCMEQ = { 806, 0}, + .SVE_FCMNE = { 806, 0}, + .SVE_FCMGE = { 806, 0}, + .SVE_FCMGT = { 806, 0}, + .SVE_FCMLE = { 806, 0}, + .SVE_FCMLT = { 806, 0}, + .SVE_FCMUO = { 806, 0}, + .SVE_DUP_Z = { 806, 4}, + .SVE_INSR = { 810, 0}, + .SVE_REV_Z = { 810, 4}, + .SVE_REV_P = { 814, 1}, + .SVE_TBL = { 815, 4}, + .SVE_ZIP1_Z = { 819, 4}, + .SVE_ZIP2_Z = { 823, 4}, + .SVE_UZP1_Z = { 827, 4}, + .SVE_UZP2_Z = { 831, 4}, + .SVE_TRN1_Z = { 835, 4}, + .SVE_TRN2_Z = { 839, 4}, + .SVE_ZIP1_P = { 843, 1}, + .SVE_ZIP2_P = { 844, 1}, + .SVE_UZP1_P = { 845, 1}, + .SVE_UZP2_P = { 846, 1}, + .SVE_TRN1_P = { 847, 1}, + .SVE_TRN2_P = { 848, 1}, + .SVE_CPY_Z = { 849, 0}, + .SVE_COMPACT = { 849, 0}, + .SVE_EXT_Z = { 849, 0}, + .SVE_LD1B = { 849, 1}, + .SVE_LD1H = { 850, 1}, + .SVE_LD1W = { 851, 1}, + .SVE_LD1D = { 852, 1}, + .SVE_LD1SB = { 853, 1}, + .SVE_LD1SH = { 854, 1}, + .SVE_LD1SW = { 855, 1}, + .SVE_ST1B = { 856, 1}, + .SVE_ST1H = { 857, 1}, + .SVE_ST1W = { 858, 1}, + .SVE_ST1D = { 859, 1}, + .SVE_LDR_Z = { 860, 1}, + .SVE_STR_Z = { 861, 1}, + .SVE_LDR_P = { 862, 1}, + .SVE_STR_P = { 863, 1}, + .SVE_LDFF1B = { 864, 1}, + .SVE_LDFF1H = { 865, 1}, + .SVE_LDFF1W = { 866, 1}, + .SVE_LDFF1D = { 867, 1}, + .SVE_WHILEGE = { 868, 1}, + .SVE_WHILEGT = { 869, 1}, + .SVE_WHILELE = { 870, 1}, + .SVE_WHILELT = { 871, 1}, + .SVE_WHILEHI = { 872, 1}, + .SVE_WHILEHS = { 873, 1}, + .SVE_WHILELO = { 874, 1}, + .SVE_WHILELS = { 875, 1}, + .SVE_SQRDMLAH = { 876, 4}, + .SVE_SQRDMLSH = { 880, 4}, + .SVE_ADCLB = { 884, 2}, + .SVE_ADCLT = { 886, 2}, + .SVE_SBCLB = { 888, 2}, + .SVE_SBCLT = { 890, 2}, + .SVE_TBL2 = { 892, 1}, + .SVE_TBX = { 893, 1}, + .SVE_AESE = { 894, 1}, + .SVE_AESD = { 895, 1}, + .SVE_AESMC = { 896, 1}, + .SVE_AESIMC = { 897, 1}, + .SVE_BCAX_Z = { 898, 0}, + .SVE_XAR_Z = { 898, 0}, + .SVE_EOR3_Z = { 898, 0}, + .SVE_MATCH = { 898, 2}, + .SVE_NMATCH = { 900, 2}, + .SVE_HISTCNT = { 902, 2}, + .SVE_HISTSEG = { 904, 1}, + .SME_SMSTART = { 905, 1}, + .SME_SMSTOP = { 906, 1}, + .SME_RDSVL = { 907, 1}, + .SME_ADDHA = { 908, 0}, + .SME_ADDVA = { 908, 0}, + .SME_ZERO = { 908, 1}, + .SME_FMOPA = { 909, 1}, + .SME_FMOPS = { 910, 1}, + .SME_BFMOPA = { 911, 1}, + .SME_BFMOPS = { 912, 1}, + .SME_SMOPA = { 913, 2}, + .SME_SMOPS = { 915, 2}, + .SME_UMOPA = { 917, 2}, + .SME_UMOPS = { 919, 2}, + .SME_USMOPA = { 921, 1}, + .SME_SUMOPA = { 922, 1}, + .SME_MOVA_TO_Z = { 923, 0}, + .SME_MOVA_TO_ZA = { 923, 0}, + .SME_LD1B_ZA = { 923, 0}, + .SME_LD1H_ZA = { 923, 0}, + .SME_LD1W_ZA = { 923, 0}, + .SME_LD1D_ZA = { 923, 0}, + .SME_LD1Q_ZA = { 923, 0}, + .SME_ST1B_ZA = { 923, 0}, + .SME_ST1H_ZA = { 923, 0}, + .SME_ST1W_ZA = { 923, 0}, + .SME_ST1D_ZA = { 923, 0}, + .SME_ST1Q_ZA = { 923, 0}, + .SME_LDR_ZA = { 923, 1}, + .SME_STR_ZA = { 924, 1}, + .SVE_FMLA_IDX_H = { 925, 1}, + .SVE_FMLA_IDX_S = { 926, 1}, + .SVE_FMLA_IDX_D = { 927, 1}, + .SVE_FMLS_IDX_H = { 928, 1}, + .SVE_FMLS_IDX_S = { 929, 1}, + .SVE_FMLS_IDX_D = { 930, 1}, + .SVE_LD1B_GATHER_S = { 931, 1}, + .SVE_LD1B_GATHER_D = { 932, 1}, + .SVE_LD1H_GATHER_S = { 933, 1}, + .SVE_LD1H_GATHER_D = { 934, 1}, + .SVE_LD1W_GATHER_S = { 935, 1}, + .SVE_LD1W_GATHER_D = { 936, 1}, + .SVE_LD1D_GATHER_D = { 937, 1}, + .SVE_LD1SB_GATHER_S = { 938, 1}, + .SVE_LD1SB_GATHER_D = { 939, 1}, + .SVE_LD1SH_GATHER_S = { 940, 1}, + .SVE_LD1SH_GATHER_D = { 941, 1}, + .SVE_LD1SW_GATHER_D = { 942, 1}, + .SVE_ST1B_SCATTER_S = { 943, 1}, + .SVE_ST1B_SCATTER_D = { 944, 1}, + .SVE_ST1H_SCATTER_S = { 945, 1}, + .SVE_ST1H_SCATTER_D = { 946, 1}, + .SVE_ST1W_SCATTER_S = { 947, 1}, + .SVE_ST1W_SCATTER_D = { 948, 1}, + .SVE_ST1D_SCATTER_D = { 949, 1}, + .SME_LD1B_TILE = { 950, 1}, + .SME_LD1H_TILE = { 951, 1}, + .SME_LD1W_TILE = { 952, 1}, + .SME_LD1D_TILE = { 953, 1}, + .SME_LD1Q_TILE = { 954, 1}, + .SME_ST1B_TILE = { 955, 1}, + .SME_ST1H_TILE = { 956, 1}, + .SME_ST1W_TILE = { 957, 1}, + .SME_ST1D_TILE = { 958, 1}, + .SME_ST1Q_TILE = { 959, 1}, + .SME_MOVA_Z_FROM_TILE = { 960, 1}, + .SME_MOVA_TILE_FROM_Z = { 961, 1}, + .FCMLA_4H = { 962, 1}, + .FCMLA_8H = { 963, 1}, + .FCMLA_4S = { 964, 1}, + .FCMLA_2D = { 965, 1}, + .FCADD_4H = { 966, 1}, + .FCADD_8H = { 967, 1}, + .FCADD_4S = { 968, 1}, + .FCADD_2D = { 969, 1}, + .SVE_PRFB = { 970, 1}, + .SVE_PRFH = { 971, 1}, + .SVE_PRFW = { 972, 1}, + .SVE_PRFD = { 973, 1}, + .SVE_LDNT1B = { 974, 1}, + .SVE_LDNT1H = { 975, 1}, + .SVE_LDNT1W = { 976, 1}, + .SVE_LDNT1D = { 977, 1}, + .SVE_STNT1B = { 978, 1}, + .SVE_STNT1H = { 979, 1}, + .SVE_STNT1W = { 980, 1}, + .SVE_STNT1D = { 981, 1}, + .SVE_EXT = { 982, 1}, + .SVE_SPLICE = { 983, 1}, + .SVE_INDEX_II = { 984, 1}, + .SVE_INDEX_IR = { 985, 1}, + .SVE_INDEX_RI = { 986, 1}, + .SVE_INDEX_RR = { 987, 1}, + .SVE_BSL = { 988, 1}, + .SVE_BSL1N = { 989, 1}, + .SVE_BSL2N = { 990, 1}, + .SVE_NBSL = { 991, 1}, + .SVE_PMUL_VEC = { 992, 1}, + .SVE_PMULLB = { 993, 1}, + .SVE_PMULLT = { 994, 1}, + .SVE_BFCVT = { 995, 1}, + .SVE_BFCVTNT = { 996, 1}, + .LDRAA = { 997, 1}, + .LDRAB = { 998, 1}, + .LDRAA_PRE = { 999, 1}, + .LDRAB_PRE = { 1000, 1}, + .TSTART = { 1001, 1}, + .TCOMMIT = { 1002, 1}, + .TCANCEL = { 1003, 1}, + .TTEST = { 1004, 1}, + .WFET = { 1005, 1}, + .WFIT = { 1006, 1}, + .BC_COND = { 1007, 1}, + .UXTB = { 1008, 1}, + .UXTH = { 1009, 1}, + .UXTW = { 1010, 1}, + .SXTB = { 1011, 1}, + .SXTH = { 1012, 1}, + .SXTW = { 1013, 1}, + .ADC = { 1014, 2}, + .ADCS = { 1016, 2}, + .SBC = { 1018, 2}, + .SBCS = { 1020, 2}, + .NGC = { 1022, 2}, + .NGCS = { 1024, 2}, + .LDAPUR = { 1026, 2}, + .STLUR = { 1028, 2}, + .LDAPURB = { 1030, 1}, + .STLURB = { 1031, 1}, + .LDAPURH = { 1032, 1}, + .STLURH = { 1033, 1}, + .LDAPURSB = { 1034, 2}, + .LDAPURSH = { 1036, 2}, + .LDAPURSW = { 1038, 1}, + .SVE_BFADD = { 1039, 1}, + .SVE_BFSUB = { 1040, 1}, + .SVE_BFMUL = { 1041, 1}, + .SVE_BFMLA = { 1042, 1}, + .SVE_BFMLS = { 1043, 1}, + .SB = { 1044, 1}, + .CSDB = { 1045, 1}, + .DGH = { 1046, 1}, + .PSB_CSYNC = { 1047, 1}, + .TSB_CSYNC = { 1048, 1}, + .BTI_J = { 1049, 1}, + .BTI_C = { 1050, 1}, + .BTI_JC = { 1051, 1}, + .MOV_V_ALIAS = { 1052, 2}, + .NOT_V_ALIAS = { 1054, 2}, + .LSL_IMM = { 1056, 2}, + .LSR_IMM = { 1058, 2}, + .ASR_IMM = { 1060, 2}, + .ROR_IMM = { 1062, 2}, + .SVE_BFADD_UNPRED = { 1064, 1}, + .SVE_BFSUB_UNPRED = { 1065, 1}, + .SVE_BFMUL_UNPRED = { 1066, 1}, + .SVE_BFCLAMP = { 1067, 1}, + .SVE_BFMAXNM = { 1068, 1}, + .SVE_BFMINNM = { 1069, 1}, + .SME2_LUTI2_B = { 1070, 1}, + .SME2_LUTI4_B = { 1071, 1}, + .SME2_LD1B_X2 = { 1072, 1}, + .SME2_LD1H_X2 = { 1073, 1}, + .SME2_LD1W_X2 = { 1074, 1}, + .SME2_LD1D_X2 = { 1075, 1}, + .SME2_LD1B_X4 = { 1076, 1}, + .SME2_LD1H_X4 = { 1077, 1}, + .SME2_LD1W_X4 = { 1078, 1}, + .SME2_LD1D_X4 = { 1079, 1}, + .SME2_ST1B_X2 = { 1080, 1}, + .SME2_ST1H_X2 = { 1081, 1}, + .SME2_ST1W_X2 = { 1082, 1}, + .SME2_ST1D_X2 = { 1083, 1}, + .SME2_ST1B_X4 = { 1084, 1}, + .SME2_ST1H_X4 = { 1085, 1}, + .SME2_ST1W_X4 = { 1086, 1}, + .SME2_ST1D_X4 = { 1087, 1}, + .SME2_ZIP_3 = { 1088, 1}, + .SME2_ZIP_4 = { 1089, 1}, + .SME2_UZP_3 = { 1090, 1}, + .SME2_UZP_4 = { 1091, 1}, + .TLBI_RPALOS = { 1092, 1}, + .TLBI_RPAOS = { 1093, 1}, + .AT_S1E1A = { 1094, 1}, + .DC_CIPAPA = { 1095, 1}, + .DC_CIGDPAPA = { 1096, 1}, + .TLBI_PAALL = { 1097, 1}, + .TLBI_PAALLOS = { 1098, 1}, + .AMX_LDX = { 1099, 1}, + .AMX_LDY = { 1100, 1}, + .AMX_STX = { 1101, 1}, + .AMX_STY = { 1102, 1}, + .AMX_LDZ = { 1103, 1}, + .AMX_STZ = { 1104, 1}, + .AMX_LDZI = { 1105, 1}, + .AMX_STZI = { 1106, 1}, + .AMX_EXTRX = { 1107, 1}, + .AMX_EXTRY = { 1108, 1}, + .AMX_FMA64 = { 1109, 1}, + .AMX_FMS64 = { 1110, 1}, + .AMX_FMA32 = { 1111, 1}, + .AMX_FMS32 = { 1112, 1}, + .AMX_MAC16 = { 1113, 1}, + .AMX_FMA16 = { 1114, 1}, + .AMX_FMS16 = { 1115, 1}, + .AMX_SET = { 1116, 1}, + .AMX_CLR = { 1117, 1}, + .AMX_VECINT = { 1118, 1}, + .AMX_VECFP = { 1119, 1}, + .AMX_MATINT = { 1120, 1}, + .AMX_MATFP = { 1121, 1}, + .AMX_GENLUT = { 1122, 1}, + .CPYP = { 1123, 1}, + .CPYM = { 1124, 1}, + .CPYE = { 1125, 1}, + .CPYFP = { 1126, 1}, + .CPYFM = { 1127, 1}, + .CPYFE = { 1128, 1}, + .SETP = { 1129, 1}, + .SETM = { 1130, 1}, + .SETE = { 1131, 1}, + .DC_IVAC = { 1132, 1}, + .DC_ISW = { 1133, 1}, + .DC_CSW = { 1134, 1}, + .DC_CISW = { 1135, 1}, + .DC_ZVA = { 1136, 1}, + .DC_CVAC = { 1137, 1}, + .DC_CVAU = { 1138, 1}, + .DC_CIVAC = { 1139, 1}, + .IC_IALLUIS = { 1140, 1}, + .IC_IALLU = { 1141, 1}, + .IC_IVAU = { 1142, 1}, + .AT_S1E1R = { 1143, 1}, + .AT_S1E1W = { 1144, 1}, + .AT_S1E0R = { 1145, 1}, + .AT_S1E0W = { 1146, 1}, + .AT_S1E2R = { 1147, 1}, + .AT_S1E2W = { 1148, 1}, + .AT_S1E3R = { 1149, 1}, + .AT_S1E3W = { 1150, 1}, + .AT_S12E1R = { 1151, 1}, + .AT_S12E1W = { 1152, 1}, + .AT_S12E0R = { 1153, 1}, + .AT_S12E0W = { 1154, 1}, + .TLBI_VMALLE1 = { 1155, 1}, + .TLBI_VMALLE1IS = { 1156, 1}, + .TLBI_VAE1 = { 1157, 1}, + .TLBI_VAE1IS = { 1158, 1}, + .TLBI_ASIDE1 = { 1159, 1}, + .TLBI_ASIDE1IS = { 1160, 1}, + .TLBI_VAAE1 = { 1161, 1}, + .TLBI_VAAE1IS = { 1162, 1}, + .TLBI_VALE1 = { 1163, 1}, + .TLBI_VALE1IS = { 1164, 1}, + .TLBI_VAALE1 = { 1165, 1}, + .TLBI_VAALE1IS = { 1166, 1}, + .TLBI_ALLE1 = { 1167, 1}, + .TLBI_ALLE1IS = { 1168, 1}, + .TLBI_ALLE2 = { 1169, 1}, + .TLBI_ALLE2IS = { 1170, 1}, + .TLBI_ALLE3 = { 1171, 1}, + .TLBI_ALLE3IS = { 1172, 1}, + .PRFM = { 1173, 1}, + .PRFUM = { 1174, 1}, + .PRFM_LIT = { 1175, 1}, + .MOV_REG = { 1176, 2}, + .MOV_BITMASK = { 1178, 2}, + .MVN = { 1180, 2}, + .NEG_SR = { 1182, 2}, + .NEGS = { 1184, 2}, + .CMP_SR = { 1186, 2}, + .CMP_ER = { 1188, 2}, + .CMP_IMM = { 1190, 2}, + .CMN_SR = { 1192, 2}, + .CMN_ER = { 1194, 2}, + .CMN_IMM = { 1196, 2}, + .TST_SR = { 1198, 2}, } diff --git a/core/rexcode/arm64/tables/arm64.encode_forms.bin b/core/rexcode/arm64/tables/arm64.encode_forms.bin index 19ca350d2ea5689db2427253d012592d61ae925d..95c96d464af7d9bc75b88a8716b9cd92735db4c7 100644 GIT binary patch delta 95 zcmeyci}Ap2#tmQC0*n|K8J&Ds*o6fd7#ykucpm&`;4orfVuFkP0*gtQAgi+ii*cAB PtJ?(@li2))ttJcrW{wvD delta 14 WcmX@GoAJXg#tmQCHoLIbgaH6I_y(c? diff --git a/core/rexcode/arm64/tables/arm64.encode_runs.bin b/core/rexcode/arm64/tables/arm64.encode_runs.bin index 28c850f39acdd92e8c8abd0bcd388c9ae0bb2672..484a41c11fbfb09f1fe3a335e64b74ced16b57f2 100644 GIT binary patch literal 8960 zcmZQT0!$1H3^2?BWwSwP4k*n9rFoz<9|HpeBLf2iKa>`LiVHz$5hyJNr6r)W6qJ^M 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