diff --git a/core/rexcode/mips/decoder.odin b/core/rexcode/mips/decoder.odin index db0cf8dbb..a1535bf0d 100644 --- a/core/rexcode/mips/decoder.odin +++ b/core/rexcode/mips/decoder.odin @@ -200,6 +200,12 @@ extract_operand_inline :: #force_inline proc "contextless" ( return reg_operand(decode_reg(word, 11, ot), ot) case .FD: return reg_operand(decode_reg(word, 6, ot), ot) + case .FR: + return reg_operand(decode_reg(word, 21, ot), ot) + case .GPR_AT_6: + return reg_operand(decode_reg(word, 6, ot), ot) + case .GPR_AT_11: + return reg_operand(decode_reg(word, 11, ot), ot) // Immediates ------------------------------------------------------------ case .IMM_16: diff --git a/core/rexcode/mips/encoder.odin b/core/rexcode/mips/encoder.odin index 8739f516a..ef08bda3d 100644 --- a/core/rexcode/mips/encoder.odin +++ b/core/rexcode/mips/encoder.odin @@ -394,6 +394,12 @@ pack_operand_inline :: #force_inline proc( return (u32(op.immediate) & 0x3F) << 16 case .MSA_I8: return (u32(op.immediate) & 0xFF) << 16 + case .FR: + return (u32(reg_hw(op.reg)) & 0x1F) << 21 + case .GPR_AT_6: + return (u32(reg_hw(op.reg)) & 0x1F) << 6 + case .GPR_AT_11: + return (u32(reg_hw(op.reg)) & 0x1F) << 11 // MSA memory operand: base GPR at 15:11, signed-10 disp at 25:16 // (caller has already scaled the displacement by element size). diff --git a/core/rexcode/mips/encoding_types.odin b/core/rexcode/mips/encoding_types.odin index 05556fa3d..cc9d99386 100644 --- a/core/rexcode/mips/encoding_types.odin +++ b/core/rexcode/mips/encoding_types.odin @@ -237,6 +237,9 @@ Operand_Encoding :: enum u8 { MSA_BIT_SHIFT, // BIT-format shift amount (.B m=0x70|sh, .H 0x60|sh, .W 0x40|sh, .D sh) MSA_ELM_IDX, // ELM-format element index (.B n, .H 0x20|n, .W 0x30|n, .D 0x38|n) MSA_I8, // 8-bit immediate at bits 23:16 (I8 forms: ANDI.B/SHF/...) + FR, // FP register at bits 25:21 (COP1X 4-register FMA: fr) + GPR_AT_6, // GPR at bits 10:6 (MSA COPY destination) + GPR_AT_11, // GPR at bits 15:11 (MSA INSERT source) // MSA memory operand: base GPR at bits 15:11 + signed 10-bit disp at 25:16, // scaled by element size (1/2/4/8 for B/H/W/D). diff --git a/core/rexcode/mips/mnemonic_builders.odin b/core/rexcode/mips/mnemonic_builders.odin index 61d419199..7b5e5d725 100644 --- a/core/rexcode/mips/mnemonic_builders.odin +++ b/core/rexcode/mips/mnemonic_builders.odin @@ -330,6 +330,12 @@ inst_seb_r_r :: #force_inline proc "contextless" (dst: GPR, src: G emit_seb_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_seb_r_r(dst, src)) } inst_seh_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .SEH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } emit_seh_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_seh_r_r(dst, src)) } +inst_rdhwr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .RDHWR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_rdhwr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_rdhwr_r_r(dst, src)) } +inst_di_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .DI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} } +emit_di_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_di_r(dst)) } +inst_ei_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .EI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} } +emit_ei_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_ei_r(dst)) } inst_eret_none :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .ERET, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} } emit_eret_none :: #force_inline proc(instructions: ^[dynamic]Instruction) { append(instructions, inst_eret_none()) } inst_deret_none :: #force_inline proc "contextless" () -> Instruction { return Instruction{mnemonic = .DERET, operand_count = 0, length = 4, ops = {{}, {}, {}, {}}} } @@ -504,6 +510,22 @@ inst_rsqrt_s_f_f :: #force_inline proc "contextless" (dst: FPR, src: F emit_rsqrt_s_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_rsqrt_s_f_f(dst, src)) } inst_rsqrt_d_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .RSQRT_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} } emit_rsqrt_d_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_rsqrt_d_f_f(dst, src)) } +inst_madd_s_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_madd_s_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_s_f_f_f_f(dst, src, src2, src3)) } +inst_madd_d_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_madd_d_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_d_f_f_f_f(dst, src, src2, src3)) } +inst_msub_s_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_msub_s_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_s_f_f_f_f(dst, src, src2, src3)) } +inst_msub_d_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_msub_d_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_d_f_f_f_f(dst, src, src2, src3)) } +inst_nmadd_s_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_nmadd_s_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_s_f_f_f_f(dst, src, src2, src3)) } +inst_nmadd_d_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_nmadd_d_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_d_f_f_f_f(dst, src, src2, src3)) } +inst_nmsub_s_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_nmsub_s_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_s_f_f_f_f(dst, src, src2, src3)) } +inst_nmsub_d_f_f_f_f :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} } +emit_nmsub_d_f_f_f_f :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_d_f_f_f_f(dst, src, src2, src3)) } inst_movn_s_f_f_r :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} } emit_movn_s_f_f_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_s_f_f_r(dst, src, src2)) } inst_movn_d_f_f_r :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} } @@ -1066,10 +1088,18 @@ inst_precequ_ph_qbl_r_r :: #force_inline proc "contextless" (dst: GPR, src: G emit_precequ_ph_qbl_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbl_r_r(dst, src)) } inst_precequ_ph_qbr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } emit_precequ_ph_qbr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbr_r_r(dst, src)) } +inst_precequ_ph_qbla_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBLA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_precequ_ph_qbla_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbla_r_r(dst, src)) } +inst_precequ_ph_qbra_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEQU_PH_QBRA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_precequ_ph_qbra_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_precequ_ph_qbra_r_r(dst, src)) } inst_preceu_ph_qbl_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBL, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } emit_preceu_ph_qbl_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbl_r_r(dst, src)) } inst_preceu_ph_qbr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } emit_preceu_ph_qbr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbr_r_r(dst, src)) } +inst_preceu_ph_qbla_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBLA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_preceu_ph_qbla_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbla_r_r(dst, src)) } +inst_preceu_ph_qbra_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .PRECEU_PH_QBRA, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_preceu_ph_qbra_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_preceu_ph_qbra_r_r(dst, src)) } inst_precrq_rs_ph_w_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .PRECRQ_RS_PH_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} } emit_precrq_rs_ph_w_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_precrq_rs_ph_w_r_r_r(dst, src, src2)) } inst_cmpu_eq_qb_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .CMPU_EQ_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } @@ -1146,6 +1176,10 @@ inst_absq_s_ph_r_r :: #force_inline proc "contextless" (dst: GPR, src: G emit_absq_s_ph_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_absq_s_ph_r_r(dst, src)) } inst_absq_s_w_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .ABSQ_S_W, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } emit_absq_s_w_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_absq_s_w_r_r(dst, src)) } +inst_replv_ph_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .REPLV_PH, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_replv_ph_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_replv_ph_r_r(dst, src)) } +inst_replv_qb_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .REPLV_QB, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} } +emit_replv_qb_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_replv_qb_r_r(dst, src)) } inst_addv_b_w_w_w :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} } emit_addv_b_w_w_w :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) { append(instructions, inst_addv_b_w_w_w(dst, src, src2)) } inst_addv_h_w_w_w :: #force_inline proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction { return Instruction{mnemonic = .ADDV_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_reg(src2), {}}} } @@ -1512,6 +1546,22 @@ inst_ldi_w_w_i5 :: #force_inline proc "contextless" (dst: Register, i emit_ldi_w_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_w_w_i5(dst, imm)) } inst_ldi_d_w_i5 :: #force_inline proc "contextless" (dst: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .LDI_D, operand_count = 2, length = 4, ops = {op_reg(dst), op_imm(imm, 1), {}, {}}} } emit_ldi_d_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) { append(instructions, inst_ldi_d_w_i5(dst, imm)) } +inst_copy_s_b_r_w_i5 :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_B, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} } +emit_copy_s_b_r_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_b_r_w_i5(dst, src, imm)) } +inst_copy_s_h_r_w_i5 :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} } +emit_copy_s_h_r_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_h_r_w_i5(dst, src, imm)) } +inst_copy_s_w_r_w_i5 :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_S_W, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} } +emit_copy_s_w_r_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_s_w_r_w_i5(dst, src, imm)) } +inst_copy_u_b_r_w_i5 :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_U_B, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} } +emit_copy_u_b_r_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_u_b_r_w_i5(dst, src, imm)) } +inst_copy_u_h_r_w_i5 :: #force_inline proc "contextless" (dst: GPR, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .COPY_U_H, operand_count = 3, length = 4, ops = {op_gpr(dst), op_reg(src), op_imm(imm, 1), {}}} } +emit_copy_u_h_r_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: Register, imm: i64) { append(instructions, inst_copy_u_h_r_w_i5(dst, src, imm)) } +inst_insert_b_w_r_i5 :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} } +emit_insert_b_w_r_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_b_w_r_i5(dst, src, imm)) } +inst_insert_h_w_r_i5 :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} } +emit_insert_h_w_r_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_h_w_r_i5(dst, src, imm)) } +inst_insert_w_w_r_i5 :: #force_inline proc "contextless" (dst: Register, src: GPR, imm: i64) -> Instruction { return Instruction{mnemonic = .INSERT_W, operand_count = 3, length = 4, ops = {op_reg(dst), op_gpr(src), op_imm(imm, 1), {}}} } +emit_insert_w_w_r_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: GPR, imm: i64) { append(instructions, inst_insert_w_w_r_i5(dst, src, imm)) } inst_insve_b_w_w_i5 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_B, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} } emit_insve_b_w_w_i5 :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) { append(instructions, inst_insve_b_w_w_i5(dst, src, imm)) } inst_insve_h_w_w_i5 :: #force_inline proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction { return Instruction{mnemonic = .INSVE_H, operand_count = 3, length = 4, ops = {op_reg(dst), op_reg(src), op_imm(imm, 1), {}}} } @@ -2197,6 +2247,12 @@ inst_seb :: inst_seb_r_r emit_seb :: emit_seb_r_r inst_seh :: inst_seh_r_r emit_seh :: emit_seh_r_r +inst_rdhwr :: inst_rdhwr_r_r +emit_rdhwr :: emit_rdhwr_r_r +inst_di :: inst_di_r +emit_di :: emit_di_r +inst_ei :: inst_ei_r +emit_ei :: emit_ei_r inst_eret :: inst_eret_none emit_eret :: emit_eret_none inst_deret :: inst_deret_none @@ -2371,6 +2427,22 @@ inst_rsqrt_s :: inst_rsqrt_s_f_f emit_rsqrt_s :: emit_rsqrt_s_f_f inst_rsqrt_d :: inst_rsqrt_d_f_f emit_rsqrt_d :: emit_rsqrt_d_f_f +inst_madd_s :: inst_madd_s_f_f_f_f +emit_madd_s :: emit_madd_s_f_f_f_f +inst_madd_d :: inst_madd_d_f_f_f_f +emit_madd_d :: emit_madd_d_f_f_f_f +inst_msub_s :: inst_msub_s_f_f_f_f +emit_msub_s :: emit_msub_s_f_f_f_f +inst_msub_d :: inst_msub_d_f_f_f_f +emit_msub_d :: emit_msub_d_f_f_f_f +inst_nmadd_s :: inst_nmadd_s_f_f_f_f +emit_nmadd_s :: emit_nmadd_s_f_f_f_f +inst_nmadd_d :: inst_nmadd_d_f_f_f_f +emit_nmadd_d :: emit_nmadd_d_f_f_f_f +inst_nmsub_s :: inst_nmsub_s_f_f_f_f +emit_nmsub_s :: emit_nmsub_s_f_f_f_f +inst_nmsub_d :: inst_nmsub_d_f_f_f_f +emit_nmsub_d :: emit_nmsub_d_f_f_f_f inst_movn_s :: inst_movn_s_f_f_r emit_movn_s :: emit_movn_s_f_f_r inst_movn_d :: inst_movn_d_f_f_r @@ -2933,10 +3005,18 @@ inst_precequ_ph_qbl :: inst_precequ_ph_qbl_r_r emit_precequ_ph_qbl :: emit_precequ_ph_qbl_r_r inst_precequ_ph_qbr :: inst_precequ_ph_qbr_r_r emit_precequ_ph_qbr :: emit_precequ_ph_qbr_r_r +inst_precequ_ph_qbla :: inst_precequ_ph_qbla_r_r +emit_precequ_ph_qbla :: emit_precequ_ph_qbla_r_r +inst_precequ_ph_qbra :: inst_precequ_ph_qbra_r_r +emit_precequ_ph_qbra :: emit_precequ_ph_qbra_r_r inst_preceu_ph_qbl :: inst_preceu_ph_qbl_r_r emit_preceu_ph_qbl :: emit_preceu_ph_qbl_r_r inst_preceu_ph_qbr :: inst_preceu_ph_qbr_r_r emit_preceu_ph_qbr :: emit_preceu_ph_qbr_r_r +inst_preceu_ph_qbla :: inst_preceu_ph_qbla_r_r +emit_preceu_ph_qbla :: emit_preceu_ph_qbla_r_r +inst_preceu_ph_qbra :: inst_preceu_ph_qbra_r_r +emit_preceu_ph_qbra :: emit_preceu_ph_qbra_r_r inst_precrq_rs_ph_w :: inst_precrq_rs_ph_w_r_r_r emit_precrq_rs_ph_w :: emit_precrq_rs_ph_w_r_r_r inst_cmpu_eq_qb :: inst_cmpu_eq_qb_r_r @@ -3013,6 +3093,10 @@ inst_absq_s_ph :: inst_absq_s_ph_r_r emit_absq_s_ph :: emit_absq_s_ph_r_r inst_absq_s_w :: inst_absq_s_w_r_r emit_absq_s_w :: emit_absq_s_w_r_r +inst_replv_ph :: inst_replv_ph_r_r +emit_replv_ph :: emit_replv_ph_r_r +inst_replv_qb :: inst_replv_qb_r_r +emit_replv_qb :: emit_replv_qb_r_r inst_addv_b :: inst_addv_b_w_w_w emit_addv_b :: emit_addv_b_w_w_w inst_addv_h :: inst_addv_h_w_w_w @@ -3379,6 +3463,22 @@ inst_ldi_w :: inst_ldi_w_w_i5 emit_ldi_w :: emit_ldi_w_w_i5 inst_ldi_d :: inst_ldi_d_w_i5 emit_ldi_d :: emit_ldi_d_w_i5 +inst_copy_s_b :: inst_copy_s_b_r_w_i5 +emit_copy_s_b :: emit_copy_s_b_r_w_i5 +inst_copy_s_h :: inst_copy_s_h_r_w_i5 +emit_copy_s_h :: emit_copy_s_h_r_w_i5 +inst_copy_s_w :: inst_copy_s_w_r_w_i5 +emit_copy_s_w :: emit_copy_s_w_r_w_i5 +inst_copy_u_b :: inst_copy_u_b_r_w_i5 +emit_copy_u_b :: emit_copy_u_b_r_w_i5 +inst_copy_u_h :: inst_copy_u_h_r_w_i5 +emit_copy_u_h :: emit_copy_u_h_r_w_i5 +inst_insert_b :: inst_insert_b_w_r_i5 +emit_insert_b :: emit_insert_b_w_r_i5 +inst_insert_h :: inst_insert_h_w_r_i5 +emit_insert_h :: emit_insert_h_w_r_i5 +inst_insert_w :: inst_insert_w_w_r_i5 +emit_insert_w :: emit_insert_w_w_r_i5 inst_insve_b :: inst_insve_b_w_w_i5 emit_insve_b :: emit_insve_b_w_w_i5 inst_insve_h :: inst_insve_h_w_w_i5 diff --git a/core/rexcode/mips/tablegen/encoding_table.odin b/core/rexcode/mips/tablegen/encoding_table.odin index b361c73aa..00f84eadb 100644 --- a/core/rexcode/mips/tablegen/encoding_table.odin +++ b/core/rexcode/mips/tablegen/encoding_table.odin @@ -1600,5 +1600,30 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{ .FCVT_D_W = { {.FCVT_D_W, {.FPR_D,.FPR_W,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46800021, 0xFFFF003F, .FPU, {}} }, .FCVT_S_D = { {.FCVT_S_D, {.FPR_S,.FPR_D,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46200020, 0xFFFF003F, .FPU, {}} }, .FCVT_S_W = { {.FCVT_S_W, {.FPR_S,.FPR_W,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46800020, 0xFFFF003F, .FPU, {}} }, + .PRECEQU_PH_QBLA = { {.PRECEQU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000192, 0xFFE007FF, .DSP_R2, {}} }, + .PRECEQU_PH_QBRA = { {.PRECEQU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0001D2, 0xFFE007FF, .DSP_R2, {}} }, + .PRECEU_PH_QBLA = { {.PRECEU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000792, 0xFFE007FF, .DSP_R2, {}} }, + .PRECEU_PH_QBRA = { {.PRECEU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0007D2, 0xFFE007FF, .DSP_R2, {}} }, + .REPLV_PH = { {.REPLV_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0002D2, 0xFFE007FF, .DSP_R2, {}} }, + .REPLV_QB = { {.REPLV_QB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0000D2, 0xFFE007FF, .DSP_R2, {}} }, + .MADD_S = { {.MADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000020, 0xFC00003F, .FPU, {}} }, + .MADD_D = { {.MADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000021, 0xFC00003F, .FPU, {}} }, + .MSUB_S = { {.MSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000028, 0xFC00003F, .FPU, {}} }, + .MSUB_D = { {.MSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000029, 0xFC00003F, .FPU, {}} }, + .NMADD_S = { {.NMADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000030, 0xFC00003F, .FPU, {}} }, + .NMADD_D = { {.NMADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000031, 0xFC00003F, .FPU, {}} }, + .NMSUB_S = { {.NMSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000038, 0xFC00003F, .FPU, {}} }, + .NMSUB_D = { {.NMSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000039, 0xFC00003F, .FPU, {}} }, + .COPY_S_B = { {.COPY_S_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78800019, 0xFFF0003F, .MSA, {}} }, + .COPY_S_H = { {.COPY_S_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78A00019, 0xFFF8003F, .MSA, {}} }, + .COPY_S_W = { {.COPY_S_W, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78B00019, 0xFFFC003F, .MSA, {}} }, + .COPY_U_B = { {.COPY_U_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78C00019, 0xFFF0003F, .MSA, {}} }, + .COPY_U_H = { {.COPY_U_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78E00019, 0xFFF8003F, .MSA, {}} }, + .INSERT_B = { {.INSERT_B, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79000019, 0xFFF0003F, .MSA, {}} }, + .INSERT_H = { {.INSERT_H, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79200019, 0xFFF8003F, .MSA, {}} }, + .INSERT_W = { {.INSERT_W, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79300019, 0xFFFC003F, .MSA, {}} }, + .DI = { {.DI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606000, 0xFFE0FFFF, .MIPS32_R2, {}} }, + .EI = { {.EI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606020, 0xFFE0FFFF, .MIPS32_R2, {}} }, + .RDHWR = { {.RDHWR, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RD,.NONE,.NONE}, 0x7C00003B, 0xFFE007FF, .MIPS32_R2, {}} }, // SPECGEN:END } diff --git a/core/rexcode/mips/tablegen/generated/decode_tables.odin b/core/rexcode/mips/tablegen/generated/decode_tables.odin index 9476a6ddf..295814fc0 100644 --- a/core/rexcode/mips/tablegen/generated/decode_tables.odin +++ b/core/rexcode/mips/tablegen/generated/decode_tables.odin @@ -8,7 +8,7 @@ package rexcode_mips_generated import lib "../.." @(rodata) -DECODE_ENTRIES := [931]lib.Decode_Entry{ +DECODE_ENTRIES := [956]lib.Decode_Entry{ { .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} }, { .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} }, { .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} }, @@ -134,6 +134,8 @@ DECODE_ENTRIES := [931]lib.Decode_Entry{ { .TLBR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000001, 0xFFFFFFFF, .COP0, {} }, { .TLBWI, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000002, 0xFFFFFFFF, .COP0, {} }, { .TLBWR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000006, 0xFFFFFFFF, .COP0, {} }, + { .DI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606000, 0xFFE0FFFF, .MIPS32_R2, {} }, + { .EI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606020, 0xFFE0FFFF, .MIPS32_R2, {} }, { .MFC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40000000, 0xFFE007F8, .COP0, {} }, { .MTC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40800000, 0xFFE007F8, .COP0, {} }, { .DMFC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40200000, 0xFFE007F8, .COP0, {only_64=true} }, @@ -307,6 +309,14 @@ DECODE_ENTRIES := [931]lib.Decode_Entry{ { .SWXC1, {.FPR_S,.GPR,.GPR,.NONE}, {.FS,.RS,.RT,.NONE}, 0x4C000008, 0xFC0007FF, .MIPS_IV, {} }, { .LDXC1, {.FPR_D,.GPR,.GPR,.NONE}, {.FD,.RS,.RT,.NONE}, 0x4C000001, 0xFC0007FF, .MIPS_IV, {} }, { .SDXC1, {.FPR_D,.GPR,.GPR,.NONE}, {.FS,.RS,.RT,.NONE}, 0x4C000009, 0xFC0007FF, .MIPS_IV, {} }, + { .MADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000020, 0xFC00003F, .FPU, {} }, + { .MADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000021, 0xFC00003F, .FPU, {} }, + { .MSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000028, 0xFC00003F, .FPU, {} }, + { .MSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000029, 0xFC00003F, .FPU, {} }, + { .NMADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000030, 0xFC00003F, .FPU, {} }, + { .NMADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000031, 0xFC00003F, .FPU, {} }, + { .NMSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000038, 0xFC00003F, .FPU, {} }, + { .NMSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000039, 0xFC00003F, .FPU, {} }, { .BEQL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x50000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} }, { .BNEL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x54000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} }, { .BLEZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} }, @@ -494,18 +504,26 @@ DECODE_ENTRIES := [931]lib.Decode_Entry{ { .INSVE_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79780019, 0xFFFE003F, .MSA, {} }, { .SLDI_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78380019, 0xFFFE003F, .MSA, {} }, { .SPLATI_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78780019, 0xFFFE003F, .MSA, {} }, + { .COPY_S_W, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78B00019, 0xFFFC003F, .MSA, {} }, + { .INSERT_W, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79300019, 0xFFFC003F, .MSA, {} }, { .INSVE_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79700019, 0xFFFC003F, .MSA, {} }, { .SLDI_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78300019, 0xFFFC003F, .MSA, {} }, { .SPLATI_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78700019, 0xFFFC003F, .MSA, {} }, { .SLLI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78700009, 0xFFF8003F, .MSA, {} }, { .SRLI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x79700009, 0xFFF8003F, .MSA, {} }, { .SRAI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78F00009, 0xFFF8003F, .MSA, {} }, + { .COPY_S_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78A00019, 0xFFF8003F, .MSA, {} }, + { .COPY_U_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78E00019, 0xFFF8003F, .MSA, {} }, + { .INSERT_H, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79200019, 0xFFF8003F, .MSA, {} }, { .INSVE_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79600019, 0xFFF8003F, .MSA, {} }, { .SLDI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78200019, 0xFFF8003F, .MSA, {} }, { .SPLATI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78600019, 0xFFF8003F, .MSA, {} }, { .SLLI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78600009, 0xFFF0003F, .MSA, {} }, { .SRLI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x79600009, 0xFFF0003F, .MSA, {} }, { .SRAI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78E00009, 0xFFF0003F, .MSA, {} }, + { .COPY_S_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78800019, 0xFFF0003F, .MSA, {} }, + { .COPY_U_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78C00019, 0xFFF0003F, .MSA, {} }, + { .INSERT_B, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79000019, 0xFFF0003F, .MSA, {} }, { .INSVE_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79400019, 0xFFF0003F, .MSA, {} }, { .SLDI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78000019, 0xFFF0003F, .MSA, {} }, { .SPLATI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78400019, 0xFFF0003F, .MSA, {} }, @@ -745,11 +763,17 @@ DECODE_ENTRIES := [931]lib.Decode_Entry{ { .PRECEQ_W_PHR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000352, 0xFFE007FF, .DSP_R1, {} }, { .PRECEQU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000112, 0xFFE007FF, .DSP_R1, {} }, { .PRECEQU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000152, 0xFFE007FF, .DSP_R1, {} }, + { .PRECEQU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000192, 0xFFE007FF, .DSP_R2, {} }, + { .PRECEQU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0001D2, 0xFFE007FF, .DSP_R2, {} }, { .PRECEU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000712, 0xFFE007FF, .DSP_R1, {} }, { .PRECEU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000752, 0xFFE007FF, .DSP_R1, {} }, + { .PRECEU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000792, 0xFFE007FF, .DSP_R2, {} }, + { .PRECEU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0007D2, 0xFFE007FF, .DSP_R2, {} }, { .BITREV, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0006D2, 0xFFE007FF, .DSP_R2, {} }, { .ABSQ_S_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000252, 0xFFE007FF, .DSP_R1, {} }, { .ABSQ_S_W, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000452, 0xFFE007FF, .DSP_R1, {} }, + { .REPLV_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0002D2, 0xFFE007FF, .DSP_R2, {} }, + { .REPLV_QB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0000D2, 0xFFE007FF, .DSP_R2, {} }, { .SHLL_QB, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000013, 0xFFE0073F, .DSP_R1, {} }, { .SHLL_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000213, 0xFFE0073F, .DSP_R1, {} }, { .SHLL_S_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000313, 0xFFE0073F, .DSP_R1, {} }, @@ -795,6 +819,7 @@ DECODE_ENTRIES := [931]lib.Decode_Entry{ { .EXTR_RS_W, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0001B8, 0xFC00073F, .DSP_R1, {} }, { .EXTR_S_H, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0003B8, 0xFC00073F, .DSP_R1, {} }, { .EXTP, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0000B8, 0xFC00073F, .DSP_R1, {} }, + { .RDHWR, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RD,.NONE,.NONE}, 0x7C00003B, 0xFFE007FF, .MIPS32_R2, {} }, { .LB, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x80000000, 0xFC000000, .MIPS_I, {} }, { .LH, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x84000000, 0xFC000000, .MIPS_I, {} }, { .LWL, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x88000000, 0xFC000000, .MIPS_I, {} }, @@ -960,54 +985,54 @@ DECODE_INDEX_PRIMARY := [64]lib.Decode_Index{ 0x0D = { 115, 1}, 0x0E = { 116, 1}, 0x0F = { 117, 2}, - 0x10 = { 119, 13}, - 0x11 = { 132, 125}, - 0x12 = { 257, 36}, - 0x13 = { 293, 5}, - 0x14 = { 298, 1}, - 0x15 = { 299, 1}, - 0x16 = { 300, 1}, - 0x17 = { 301, 1}, - 0x18 = { 302, 13}, - 0x19 = { 315, 15}, - 0x1A = { 330, 1}, - 0x1B = { 331, 13}, - 0x1C = { 344, 109}, - 0x1D = { 453, 1}, - 0x1E = { 454, 220}, - 0x1F = { 674, 112}, - 0x20 = { 786, 1}, - 0x21 = { 787, 1}, - 0x22 = { 788, 1}, - 0x23 = { 789, 1}, - 0x24 = { 790, 1}, - 0x25 = { 791, 1}, - 0x26 = { 792, 1}, - 0x27 = { 793, 1}, - 0x28 = { 794, 1}, - 0x29 = { 795, 1}, - 0x2A = { 796, 1}, - 0x2B = { 797, 1}, - 0x2C = { 798, 1}, - 0x2D = { 799, 1}, - 0x2E = { 800, 1}, - 0x2F = { 801, 1}, - 0x30 = { 802, 1}, - 0x31 = { 803, 1}, - 0x32 = { 804, 3}, - 0x33 = { 807, 1}, - 0x34 = { 808, 63}, - 0x35 = { 871, 3}, - 0x36 = { 874, 5}, - 0x37 = { 879, 6}, - 0x38 = { 885, 1}, - 0x39 = { 886, 1}, - 0x3A = { 887, 3}, - 0x3B = { 890, 2}, - 0x3C = { 892, 27}, - 0x3D = { 919, 3}, - 0x3E = { 922, 5}, - 0x3F = { 927, 4}, + 0x10 = { 119, 15}, + 0x11 = { 134, 125}, + 0x12 = { 259, 36}, + 0x13 = { 295, 13}, + 0x14 = { 308, 1}, + 0x15 = { 309, 1}, + 0x16 = { 310, 1}, + 0x17 = { 311, 1}, + 0x18 = { 312, 13}, + 0x19 = { 325, 15}, + 0x1A = { 340, 1}, + 0x1B = { 341, 13}, + 0x1C = { 354, 109}, + 0x1D = { 463, 1}, + 0x1E = { 464, 228}, + 0x1F = { 692, 119}, + 0x20 = { 811, 1}, + 0x21 = { 812, 1}, + 0x22 = { 813, 1}, + 0x23 = { 814, 1}, + 0x24 = { 815, 1}, + 0x25 = { 816, 1}, + 0x26 = { 817, 1}, + 0x27 = { 818, 1}, + 0x28 = { 819, 1}, + 0x29 = { 820, 1}, + 0x2A = { 821, 1}, + 0x2B = { 822, 1}, + 0x2C = { 823, 1}, + 0x2D = { 824, 1}, + 0x2E = { 825, 1}, + 0x2F = { 826, 1}, + 0x30 = { 827, 1}, + 0x31 = { 828, 1}, + 0x32 = { 829, 3}, + 0x33 = { 832, 1}, + 0x34 = { 833, 63}, + 0x35 = { 896, 3}, + 0x36 = { 899, 5}, + 0x37 = { 904, 6}, + 0x38 = { 910, 1}, + 0x39 = { 911, 1}, + 0x3A = { 912, 3}, + 0x3B = { 915, 2}, + 0x3C = { 917, 27}, + 0x3D = { 944, 3}, + 0x3E = { 947, 5}, + 0x3F = { 952, 4}, } @(rodata) @@ -1101,77 +1126,78 @@ DECODE_INDEX_REGIMM := [32]lib.Decode_Index{ @(rodata) DECODE_INDEX_COP1 := [32]lib.Decode_Index{ - 0x00 = { 132, 1}, - 0x01 = { 133, 1}, - 0x02 = { 134, 1}, - 0x03 = { 135, 1}, - 0x04 = { 136, 1}, - 0x05 = { 137, 1}, - 0x06 = { 138, 1}, - 0x07 = { 139, 1}, - 0x08 = { 140, 4}, - 0x09 = { 144, 1}, - 0x0D = { 145, 1}, - 0x10 = { 146, 41}, - 0x11 = { 187, 42}, - 0x14 = { 229, 4}, - 0x15 = { 233, 2}, - 0x16 = { 235, 22}, + 0x00 = { 134, 1}, + 0x01 = { 135, 1}, + 0x02 = { 136, 1}, + 0x03 = { 137, 1}, + 0x04 = { 138, 1}, + 0x05 = { 139, 1}, + 0x06 = { 140, 1}, + 0x07 = { 141, 1}, + 0x08 = { 142, 4}, + 0x09 = { 146, 1}, + 0x0D = { 147, 1}, + 0x10 = { 148, 41}, + 0x11 = { 189, 42}, + 0x14 = { 231, 4}, + 0x15 = { 235, 2}, + 0x16 = { 237, 22}, } @(rodata) DECODE_INDEX_SPECIAL2 := [64]lib.Decode_Index{ - 0x00 = { 344, 1}, - 0x01 = { 345, 1}, - 0x02 = { 346, 1}, - 0x04 = { 347, 2}, - 0x05 = { 349, 1}, - 0x08 = { 350, 25}, - 0x09 = { 375, 26}, - 0x10 = { 401, 1}, - 0x11 = { 402, 1}, - 0x12 = { 403, 1}, - 0x13 = { 404, 1}, - 0x18 = { 405, 1}, - 0x19 = { 406, 1}, - 0x1A = { 407, 1}, - 0x1B = { 408, 1}, - 0x20 = { 409, 2}, - 0x21 = { 411, 2}, - 0x24 = { 413, 1}, - 0x25 = { 414, 1}, - 0x28 = { 415, 17}, - 0x29 = { 432, 8}, - 0x30 = { 440, 5}, - 0x31 = { 445, 1}, - 0x34 = { 446, 1}, - 0x36 = { 447, 1}, - 0x37 = { 448, 1}, - 0x3C = { 449, 1}, - 0x3E = { 450, 1}, - 0x3F = { 451, 2}, + 0x00 = { 354, 1}, + 0x01 = { 355, 1}, + 0x02 = { 356, 1}, + 0x04 = { 357, 2}, + 0x05 = { 359, 1}, + 0x08 = { 360, 25}, + 0x09 = { 385, 26}, + 0x10 = { 411, 1}, + 0x11 = { 412, 1}, + 0x12 = { 413, 1}, + 0x13 = { 414, 1}, + 0x18 = { 415, 1}, + 0x19 = { 416, 1}, + 0x1A = { 417, 1}, + 0x1B = { 418, 1}, + 0x20 = { 419, 2}, + 0x21 = { 421, 2}, + 0x24 = { 423, 1}, + 0x25 = { 424, 1}, + 0x28 = { 425, 17}, + 0x29 = { 442, 8}, + 0x30 = { 450, 5}, + 0x31 = { 455, 1}, + 0x34 = { 456, 1}, + 0x36 = { 457, 1}, + 0x37 = { 458, 1}, + 0x3C = { 459, 1}, + 0x3E = { 460, 1}, + 0x3F = { 461, 2}, } @(rodata) DECODE_INDEX_SPECIAL3 := [64]lib.Decode_Index{ - 0x00 = { 674, 2}, - 0x01 = { 676, 1}, - 0x02 = { 677, 1}, - 0x03 = { 678, 1}, - 0x04 = { 679, 1}, - 0x05 = { 680, 1}, - 0x06 = { 681, 1}, - 0x07 = { 682, 1}, - 0x0A = { 683, 3}, - 0x0C = { 686, 1}, - 0x0F = { 687, 8}, - 0x10 = { 695, 22}, - 0x11 = { 717, 15}, - 0x12 = { 732, 9}, - 0x13 = { 741, 18}, - 0x20 = { 759, 5}, - 0x24 = { 764, 4}, - 0x30 = { 768, 9}, - 0x38 = { 777, 9}, + 0x00 = { 692, 2}, + 0x01 = { 694, 1}, + 0x02 = { 695, 1}, + 0x03 = { 696, 1}, + 0x04 = { 697, 1}, + 0x05 = { 698, 1}, + 0x06 = { 699, 1}, + 0x07 = { 700, 1}, + 0x0A = { 701, 3}, + 0x0C = { 704, 1}, + 0x0F = { 705, 8}, + 0x10 = { 713, 22}, + 0x11 = { 735, 15}, + 0x12 = { 750, 15}, + 0x13 = { 765, 18}, + 0x20 = { 783, 5}, + 0x24 = { 788, 4}, + 0x30 = { 792, 9}, + 0x38 = { 801, 9}, + 0x3B = { 810, 1}, } diff --git a/core/rexcode/mips/tablegen/generated/encode_tables.odin b/core/rexcode/mips/tablegen/generated/encode_tables.odin index f00e47128..746a22687 100644 --- a/core/rexcode/mips/tablegen/generated/encode_tables.odin +++ b/core/rexcode/mips/tablegen/generated/encode_tables.odin @@ -8,7 +8,7 @@ package rexcode_mips_generated import lib "../.." @(rodata) -ENCODE_FORMS := [931]lib.Encoding{ +ENCODE_FORMS := [956]lib.Encoding{ // .ADD { .ADD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000020, 0xFC0007FF, .MIPS_I, {} }, // .ADDU @@ -311,6 +311,12 @@ ENCODE_FORMS := [931]lib.Encoding{ { .SEB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000420, 0xFFE007FF, .MIPS32_R2, {} }, // .SEH { .SEH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000620, 0xFFE007FF, .MIPS32_R2, {} }, + // .RDHWR + { .RDHWR, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RD,.NONE,.NONE}, 0x7C00003B, 0xFFE007FF, .MIPS32_R2, {} }, + // .DI + { .DI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606000, 0xFFE0FFFF, .MIPS32_R2, {} }, + // .EI + { .EI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606020, 0xFFE0FFFF, .MIPS32_R2, {} }, // .ERET { .ERET, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000018, 0xFFFFFFFF, .MIPS_II, {} }, // .DERET @@ -485,6 +491,22 @@ ENCODE_FORMS := [931]lib.Encoding{ { .RSQRT_S, {.FPR_S,.FPR_S,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46000016, 0xFFFF003F, .MIPS_IV, {} }, // .RSQRT_D { .RSQRT_D, {.FPR_D,.FPR_D,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46200016, 0xFFFF003F, .MIPS_IV, {} }, + // .MADD_S + { .MADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000020, 0xFC00003F, .FPU, {} }, + // .MADD_D + { .MADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000021, 0xFC00003F, .FPU, {} }, + // .MSUB_S + { .MSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000028, 0xFC00003F, .FPU, {} }, + // .MSUB_D + { .MSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000029, 0xFC00003F, .FPU, {} }, + // .NMADD_S + { .NMADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000030, 0xFC00003F, .FPU, {} }, + // .NMADD_D + { .NMADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000031, 0xFC00003F, .FPU, {} }, + // .NMSUB_S + { .NMSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000038, 0xFC00003F, .FPU, {} }, + // .NMSUB_D + { .NMSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000039, 0xFC00003F, .FPU, {} }, // .MOVN_S { .MOVN_S, {.FPR_S,.FPR_S,.GPR,.NONE}, {.FD,.FS,.RT,.NONE}, 0x46000013, 0xFFE0003F, .FPU, {} }, // .MOVN_D @@ -1047,10 +1069,18 @@ ENCODE_FORMS := [931]lib.Encoding{ { .PRECEQU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000112, 0xFFE007FF, .DSP_R1, {} }, // .PRECEQU_PH_QBR { .PRECEQU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000152, 0xFFE007FF, .DSP_R1, {} }, + // .PRECEQU_PH_QBLA + { .PRECEQU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000192, 0xFFE007FF, .DSP_R2, {} }, + // .PRECEQU_PH_QBRA + { .PRECEQU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0001D2, 0xFFE007FF, .DSP_R2, {} }, // .PRECEU_PH_QBL { .PRECEU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000712, 0xFFE007FF, .DSP_R1, {} }, // .PRECEU_PH_QBR { .PRECEU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000752, 0xFFE007FF, .DSP_R1, {} }, + // .PRECEU_PH_QBLA + { .PRECEU_PH_QBLA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000792, 0xFFE007FF, .DSP_R2, {} }, + // .PRECEU_PH_QBRA + { .PRECEU_PH_QBRA, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0007D2, 0xFFE007FF, .DSP_R2, {} }, // .PRECRQ_RS_PH_W { .PRECRQ_RS_PH_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000551, 0xFC0007FF, .DSP_R2, {} }, // .CMPU_EQ_QB @@ -1127,6 +1157,10 @@ ENCODE_FORMS := [931]lib.Encoding{ { .ABSQ_S_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000252, 0xFFE007FF, .DSP_R1, {} }, // .ABSQ_S_W { .ABSQ_S_W, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000452, 0xFFE007FF, .DSP_R1, {} }, + // .REPLV_PH + { .REPLV_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0002D2, 0xFFE007FF, .DSP_R2, {} }, + // .REPLV_QB + { .REPLV_QB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0000D2, 0xFFE007FF, .DSP_R2, {} }, // .ADDV_B { .ADDV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800000E, 0xFFE0003F, .MSA, {} }, // .ADDV_H @@ -1493,6 +1527,22 @@ ENCODE_FORMS := [931]lib.Encoding{ { .LDI_W, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B400007, 0xFFE0003F, .MSA, {} }, // .LDI_D { .LDI_D, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B600007, 0xFFE0003F, .MSA, {} }, + // .COPY_S_B + { .COPY_S_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78800019, 0xFFF0003F, .MSA, {} }, + // .COPY_S_H + { .COPY_S_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78A00019, 0xFFF8003F, .MSA, {} }, + // .COPY_S_W + { .COPY_S_W, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78B00019, 0xFFFC003F, .MSA, {} }, + // .COPY_U_B + { .COPY_U_B, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78C00019, 0xFFF0003F, .MSA, {} }, + // .COPY_U_H + { .COPY_U_H, {.GPR,.MSA_VEC,.IMM5,.NONE}, {.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}, 0x78E00019, 0xFFF8003F, .MSA, {} }, + // .INSERT_B + { .INSERT_B, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79000019, 0xFFF0003F, .MSA, {} }, + // .INSERT_H + { .INSERT_H, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79200019, 0xFFF8003F, .MSA, {} }, + // .INSERT_W + { .INSERT_W, {.MSA_VEC,.GPR,.IMM5,.NONE}, {.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}, 0x79300019, 0xFFFC003F, .MSA, {} }, // .INSVE_B { .INSVE_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79400019, 0xFFF0003F, .MSA, {} }, // .INSVE_H @@ -2027,880 +2077,880 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{ .DSHD = { 148, 1}, .SEB = { 149, 1}, .SEH = { 150, 1}, - .RDHWR = { 151, 0}, - .RDPGPR = { 151, 0}, - .WRPGPR = { 151, 0}, - .DI = { 151, 0}, - .EI = { 151, 0}, - .ERET = { 151, 1}, - .DERET = { 152, 1}, - .WAIT = { 153, 1}, - .BC = { 154, 1}, - .BALC = { 155, 1}, - .BEQC = { 156, 0}, - .BNEC = { 156, 0}, - .BLTC = { 156, 0}, - .BGEC = { 156, 0}, - .BLTUC = { 156, 0}, - .BGEUC = { 156, 0}, - .BLEZC = { 156, 0}, - .BGEZC = { 156, 0}, - .BGTZC = { 156, 0}, - .BLTZC = { 156, 0}, - .BEQZC = { 156, 1}, - .BNEZC = { 157, 1}, - .BC1EQZ = { 158, 1}, - .BC1NEZ = { 159, 1}, - .BC2EQZ = { 160, 1}, - .BC2NEZ = { 161, 1}, - .JIC = { 162, 1}, - .JIALC = { 163, 1}, - .MUH = { 164, 1}, - .MULU = { 165, 1}, - .MUHU = { 166, 1}, - .MOD = { 167, 1}, - .MODU = { 168, 1}, - .DMUL_R6 = { 169, 1}, - .DMUH = { 170, 1}, - .DMULU = { 171, 1}, - .DMUHU = { 172, 1}, - .DDIV_R6 = { 173, 1}, - .DMOD = { 174, 1}, - .DDIVU_R6 = { 175, 1}, - .DMODU = { 176, 1}, - .AUI = { 177, 1}, - .AUIPC = { 178, 1}, - .ALUIPC = { 179, 1}, - .DAUI = { 180, 1}, - .DAHI = { 181, 1}, - .DATI = { 182, 1}, - .ALIGN = { 183, 1}, - .DALIGN = { 184, 1}, - .BITSWAP = { 185, 1}, - .DBITSWAP = { 186, 1}, - .LSA = { 187, 1}, - .DLSA = { 188, 1}, - .LWPC = { 189, 0}, - .LWUPC = { 189, 0}, - .LDPC = { 189, 0}, - .SELEQZ = { 189, 1}, - .SELNEZ = { 190, 1}, - .CRC32B = { 191, 1}, - .CRC32H = { 192, 1}, - .CRC32W = { 193, 1}, - .CRC32D = { 194, 1}, - .CRC32CB = { 195, 1}, - .CRC32CH = { 196, 1}, - .CRC32CW = { 197, 1}, - .CRC32CD = { 198, 1}, - .SIGRIE = { 199, 1}, - .MFC1 = { 200, 1}, - .MTC1 = { 201, 1}, - .DMFC1 = { 202, 1}, - .DMTC1 = { 203, 1}, - .CFC1 = { 204, 1}, - .CTC1 = { 205, 1}, - .MFHC1 = { 206, 1}, - .MTHC1 = { 207, 1}, - .LWC1 = { 208, 1}, - .SWC1 = { 209, 1}, - .LDC1 = { 210, 1}, - .SDC1 = { 211, 1}, - .ADD_S = { 212, 1}, - .ADD_D = { 213, 1}, - .ADD_PS = { 214, 1}, - .SUB_S = { 215, 1}, - .SUB_D = { 216, 1}, - .SUB_PS = { 217, 1}, - .MUL_S = { 218, 1}, - .MUL_D = { 219, 1}, - .MUL_PS = { 220, 1}, - .DIV_S = { 221, 1}, - .DIV_D = { 222, 1}, - .SQRT_S = { 223, 1}, - .SQRT_D = { 224, 1}, - .ABS_S = { 225, 1}, - .ABS_D = { 226, 1}, - .ABS_PS = { 227, 1}, - .NEG_S = { 228, 1}, - .NEG_D = { 229, 1}, - .NEG_PS = { 230, 1}, - .MOV_S = { 231, 1}, - .MOV_D = { 232, 1}, - .MOV_PS = { 233, 1}, - .RECIP_S = { 234, 1}, - .RECIP_D = { 235, 1}, - .RSQRT_S = { 236, 1}, - .RSQRT_D = { 237, 1}, - .MADD_S = { 238, 0}, - .MADD_D = { 238, 0}, - .MADD_PS = { 238, 0}, - .MSUB_S = { 238, 0}, - .MSUB_D = { 238, 0}, - .MSUB_PS = { 238, 0}, - .NMADD_S = { 238, 0}, - .NMADD_D = { 238, 0}, - .NMADD_PS = { 238, 0}, - .NMSUB_S = { 238, 0}, - .NMSUB_D = { 238, 0}, - .NMSUB_PS = { 238, 0}, - .MOVN_S = { 238, 1}, - .MOVN_D = { 239, 1}, - .MOVN_PS = { 240, 0}, - .MOVZ_S = { 240, 1}, - .MOVZ_D = { 241, 1}, - .MOVZ_PS = { 242, 0}, - .MOVF_S = { 242, 1}, - .MOVF_D = { 243, 1}, - .MOVF_PS = { 244, 0}, - .MOVT_S = { 244, 1}, - .MOVT_D = { 245, 1}, - .MOVT_PS = { 246, 0}, - .CVT_S_D = { 246, 1}, - .CVT_S_W = { 247, 1}, - .CVT_S_L = { 248, 1}, - .CVT_D_S = { 249, 1}, - .CVT_D_W = { 250, 1}, - .CVT_D_L = { 251, 1}, - .CVT_W_S = { 252, 1}, - .CVT_W_D = { 253, 1}, - .CVT_L_S = { 254, 1}, - .CVT_L_D = { 255, 1}, - .CVT_PS_S = { 256, 0}, - .CVT_S_PU = { 256, 0}, - .CVT_S_PL = { 256, 0}, - .PLL_PS = { 256, 0}, - .PLU_PS = { 256, 0}, - .PUL_PS = { 256, 0}, - .PUU_PS = { 256, 0}, - .ROUND_W_S = { 256, 1}, - .ROUND_W_D = { 257, 1}, - .ROUND_L_S = { 258, 1}, - .ROUND_L_D = { 259, 1}, - .TRUNC_W_S = { 260, 1}, - .TRUNC_W_D = { 261, 1}, - .TRUNC_L_S = { 262, 1}, - .TRUNC_L_D = { 263, 1}, - .CEIL_W_S = { 264, 1}, - .CEIL_W_D = { 265, 1}, - .CEIL_L_S = { 266, 1}, - .CEIL_L_D = { 267, 1}, - .FLOOR_W_S = { 268, 1}, - .FLOOR_W_D = { 269, 1}, - .FLOOR_L_S = { 270, 1}, - .FLOOR_L_D = { 271, 1}, - .C_F_S = { 272, 1}, - .C_F_D = { 273, 1}, - .C_F_PS = { 274, 1}, - .C_UN_S = { 275, 1}, - .C_UN_D = { 276, 1}, - .C_UN_PS = { 277, 1}, - .C_EQ_S = { 278, 1}, - .C_EQ_D = { 279, 1}, - .C_EQ_PS = { 280, 1}, - .C_UEQ_S = { 281, 1}, - .C_UEQ_D = { 282, 1}, - .C_UEQ_PS = { 283, 1}, - .C_OLT_S = { 284, 1}, - .C_OLT_D = { 285, 1}, - .C_OLT_PS = { 286, 1}, - .C_ULT_S = { 287, 1}, - .C_ULT_D = { 288, 1}, - .C_ULT_PS = { 289, 1}, - .C_OLE_S = { 290, 1}, - .C_OLE_D = { 291, 1}, - .C_OLE_PS = { 292, 1}, - .C_ULE_S = { 293, 1}, - .C_ULE_D = { 294, 1}, - .C_ULE_PS = { 295, 1}, - .C_SF_S = { 296, 1}, - .C_SF_D = { 297, 1}, - .C_SF_PS = { 298, 1}, - .C_NGLE_S = { 299, 1}, - .C_NGLE_D = { 300, 1}, - .C_NGLE_PS = { 301, 1}, - .C_SEQ_S = { 302, 1}, - .C_SEQ_D = { 303, 1}, - .C_SEQ_PS = { 304, 1}, - .C_NGL_S = { 305, 1}, - .C_NGL_D = { 306, 1}, - .C_NGL_PS = { 307, 1}, - .C_LT_S = { 308, 1}, - .C_LT_D = { 309, 1}, - .C_LT_PS = { 310, 1}, - .C_NGE_S = { 311, 1}, - .C_NGE_D = { 312, 1}, - .C_NGE_PS = { 313, 1}, - .C_LE_S = { 314, 1}, - .C_LE_D = { 315, 1}, - .C_LE_PS = { 316, 1}, - .C_NGT_S = { 317, 1}, - .C_NGT_D = { 318, 1}, - .C_NGT_PS = { 319, 1}, - .BC1F = { 320, 1}, - .BC1T = { 321, 1}, - .BC1FL = { 322, 1}, - .BC1TL = { 323, 1}, - .MFC0 = { 324, 1}, - .MTC0 = { 325, 1}, - .DMFC0 = { 326, 1}, - .DMTC0 = { 327, 1}, - .MFHC0 = { 328, 1}, - .MTHC0 = { 329, 1}, - .TLBP = { 330, 1}, - .TLBR = { 331, 1}, - .TLBWI = { 332, 1}, - .TLBWR = { 333, 1}, - .CACHE = { 334, 1}, - .MFC2 = { 335, 1}, - .MTC2 = { 336, 1}, - .CFC2 = { 337, 1}, - .CTC2 = { 338, 1}, - .LWC2 = { 339, 1}, - .SWC2 = { 340, 1}, - .LDC2 = { 341, 1}, - .SDC2 = { 342, 1}, - .RTPS = { 343, 1}, - .RTPT = { 344, 1}, - .DPCS = { 345, 1}, - .DPCT = { 346, 1}, - .INTPL = { 347, 1}, - .MVMVA = { 348, 1}, - .NCDS = { 349, 1}, - .NCDT = { 350, 1}, - .NCCS = { 351, 1}, - .NCCT = { 352, 1}, - .NCS = { 353, 1}, - .NCT = { 354, 1}, - .CDP = { 355, 1}, - .CC = { 356, 1}, - .NCLIP = { 357, 1}, - .AVSZ3 = { 358, 1}, - .AVSZ4 = { 359, 1}, - .OP_GTE = { 360, 1}, - .GPF = { 361, 1}, - .GPL = { 362, 1}, - .SQR_GTE = { 363, 1}, - .DCPL = { 364, 1}, - .LQ = { 365, 1}, - .SQ = { 366, 1}, - .LQC2 = { 367, 1}, - .SQC2 = { 368, 1}, - .MFHI1 = { 369, 1}, - .MFLO1 = { 370, 1}, - .MTHI1 = { 371, 1}, - .MTLO1 = { 372, 1}, - .MULT1 = { 373, 1}, - .MULTU1 = { 374, 1}, - .DIV1 = { 375, 1}, - .DIVU1 = { 376, 1}, - .MADD_EE = { 377, 0}, - .MADDU_EE = { 377, 0}, - .MSUB_EE = { 377, 0}, - .MSUBU_EE = { 377, 0}, - .MADD1 = { 377, 1}, - .MADDU1 = { 378, 1}, - .MSUB1 = { 379, 0}, - .MSUBU1 = { 379, 0}, - .PMFHL_LW = { 379, 1}, - .PMFHL_UW = { 380, 1}, - .PMFHL_LH = { 381, 1}, - .PMFHL_SH = { 382, 1}, - .PMFHL_SLW = { 383, 1}, - .PMTHL_LW = { 384, 1}, - .PADDB = { 385, 1}, - .PADDH = { 386, 1}, - .PADDW = { 387, 1}, - .PADDSB = { 388, 1}, - .PADDSH = { 389, 1}, - .PADDSW = { 390, 1}, - .PADDUB = { 391, 1}, - .PADDUH = { 392, 1}, - .PADDUW = { 393, 1}, - .PSUBB = { 394, 1}, - .PSUBH = { 395, 1}, - .PSUBW = { 396, 1}, - .PSUBSB = { 397, 1}, - .PSUBSH = { 398, 1}, - .PSUBSW = { 399, 1}, - .PSUBUB = { 400, 1}, - .PSUBUH = { 401, 1}, - .PSUBUW = { 402, 1}, - .PSLLH = { 403, 1}, - .PSRLH = { 404, 1}, - .PSRAH = { 405, 1}, - .PSLLW = { 406, 1}, - .PSRLW = { 407, 1}, - .PSRAW = { 408, 1}, - .PSLLVW = { 409, 1}, - .PSRLVW = { 410, 1}, - .PSRAVW = { 411, 1}, - .QFSRV = { 412, 1}, - .PAND = { 413, 1}, - .POR = { 414, 1}, - .PXOR = { 415, 1}, - .PNOR = { 416, 1}, - .PCEQB = { 417, 1}, - .PCEQH = { 418, 1}, - .PCEQW = { 419, 1}, - .PCGTB = { 420, 1}, - .PCGTH = { 421, 1}, - .PCGTW = { 422, 1}, - .PMULTW = { 423, 1}, - .PMULTUW = { 424, 1}, - .PMULTH = { 425, 1}, - .PMADDW = { 426, 1}, - .PMADDUW = { 427, 1}, - .PMADDH = { 428, 1}, - .PMSUBW = { 429, 1}, - .PMSUBH = { 430, 1}, - .PHMADH = { 431, 1}, - .PHMSBH = { 432, 1}, - .PDIVW = { 433, 1}, - .PDIVUW = { 434, 1}, - .PDIVBW = { 435, 1}, - .PCPYLD = { 436, 1}, - .PCPYUD = { 437, 1}, - .PCPYH = { 438, 1}, - .PINTH = { 439, 1}, - .PINTOH = { 440, 1}, - .PEXEH = { 441, 1}, - .PEXEW = { 442, 1}, - .PEXCH = { 443, 1}, - .PEXCW = { 444, 1}, - .PROT3W = { 445, 1}, - .PPACB = { 446, 1}, - .PPACH = { 447, 1}, - .PPACW = { 448, 1}, - .PPAC5 = { 449, 1}, - .PEXT5 = { 450, 1}, - .PEXTLB = { 451, 1}, - .PEXTLH = { 452, 1}, - .PEXTLW = { 453, 1}, - .PEXTUB = { 454, 1}, - .PEXTUH = { 455, 1}, - .PEXTUW = { 456, 1}, - .PMFHI = { 457, 1}, - .PMFLO = { 458, 1}, - .PMTHI = { 459, 1}, - .PMTLO = { 460, 1}, - .PLZCW = { 461, 1}, - .PABSH = { 462, 1}, - .PABSW = { 463, 1}, - .PMAXH = { 464, 1}, - .PMAXW = { 465, 1}, - .PMINH = { 466, 1}, - .PMINW = { 467, 1}, - .MFSA = { 468, 1}, - .MTSA = { 469, 1}, - .MTSAB = { 470, 1}, - .MTSAH = { 471, 1}, - .ADDQ_PH = { 472, 1}, - .ADDQ_S_PH = { 473, 1}, - .ADDQ_S_W = { 474, 1}, - .SUBQ_PH = { 475, 1}, - .SUBQ_S_PH = { 476, 1}, - .SUBQ_S_W = { 477, 1}, - .ADDU_QB = { 478, 1}, - .ADDU_S_QB = { 479, 1}, - .ADDU_PH = { 480, 1}, - .ADDU_S_PH = { 481, 1}, - .SUBU_QB = { 482, 1}, - .SUBU_S_QB = { 483, 1}, - .SUBU_PH = { 484, 1}, - .SUBU_S_PH = { 485, 1}, - .ADDSC = { 486, 1}, - .ADDWC = { 487, 1}, - .MULEU_S_PH_QBL = { 488, 1}, - .MULEU_S_PH_QBR = { 489, 1}, - .MULEQ_S_W_PHL = { 490, 1}, - .MULEQ_S_W_PHR = { 491, 1}, - .MULQ_RS_PH = { 492, 1}, - .MULQ_S_PH = { 493, 1}, - .MULSAQ_S_W_PH = { 494, 1}, - .DPAQ_S_W_PH = { 495, 1}, - .DPSQ_S_W_PH = { 496, 1}, - .DPAQ_SA_L_W = { 497, 1}, - .DPSQ_SA_L_W = { 498, 1}, - .DPAU_H_QBL = { 499, 1}, - .DPAU_H_QBR = { 500, 1}, - .DPSU_H_QBL = { 501, 1}, - .DPSU_H_QBR = { 502, 1}, - .DPA_W_PH = { 503, 0}, - .DPS_W_PH = { 503, 0}, - .DPAX_W_PH = { 503, 0}, - .DPSX_W_PH = { 503, 0}, - .MAQ_S_W_PHL = { 503, 0}, - .MAQ_S_W_PHR = { 503, 0}, - .MAQ_SA_W_PHL = { 503, 0}, - .MAQ_SA_W_PHR = { 503, 0}, - .EXTR_W = { 503, 1}, - .EXTR_R_W = { 504, 1}, - .EXTR_RS_W = { 505, 1}, - .EXTR_S_H = { 506, 1}, - .EXTRV_W = { 507, 1}, - .EXTRV_R_W = { 508, 0}, - .EXTRV_RS_W = { 508, 0}, - .EXTRV_S_H = { 508, 0}, - .EXTP = { 508, 1}, - .EXTPV = { 509, 1}, - .EXTPDP = { 510, 0}, - .EXTPDPV = { 510, 0}, - .SHILO = { 510, 0}, - .SHILOV = { 510, 0}, - .MTHLIP = { 510, 0}, - .WRDSP = { 510, 1}, - .RDDSP = { 511, 1}, - .PRECRQ_QB_PH = { 512, 1}, - .PRECRQ_PH_W = { 513, 1}, - .PRECRQU_S_QB_PH = { 514, 1}, - .PRECEQ_W_PHL = { 515, 1}, - .PRECEQ_W_PHR = { 516, 1}, - .PRECEQU_PH_QBL = { 517, 1}, - .PRECEQU_PH_QBR = { 518, 1}, - .PRECEQU_PH_QBLA = { 519, 0}, - .PRECEQU_PH_QBRA = { 519, 0}, - .PRECEU_PH_QBL = { 519, 1}, - .PRECEU_PH_QBR = { 520, 1}, - .PRECEU_PH_QBLA = { 521, 0}, - .PRECEU_PH_QBRA = { 521, 0}, - .PRECRQ_RS_PH_W = { 521, 1}, - .CMPU_EQ_QB = { 522, 1}, - .CMPU_LT_QB = { 523, 1}, - .CMPU_LE_QB = { 524, 1}, - .CMP_EQ_PH = { 525, 1}, - .CMP_LT_PH = { 526, 1}, - .CMP_LE_PH = { 527, 1}, - .CMPGU_EQ_QB = { 528, 1}, - .CMPGU_LT_QB = { 529, 1}, - .CMPGU_LE_QB = { 530, 1}, - .PICK_QB = { 531, 1}, - .PICK_PH = { 532, 1}, - .SHLL_QB = { 533, 1}, - .SHLL_PH = { 534, 1}, - .SHLL_S_PH = { 535, 1}, - .SHLL_S_W = { 536, 1}, - .SHLLV_QB = { 537, 1}, - .SHLLV_PH = { 538, 1}, - .SHLLV_S_PH = { 539, 1}, - .SHLLV_S_W = { 540, 1}, - .SHRL_QB = { 541, 1}, - .SHRL_PH = { 542, 0}, - .SHRLV_QB = { 542, 1}, - .SHRLV_PH = { 543, 1}, - .SHRA_QB = { 544, 0}, - .SHRA_R_QB = { 544, 0}, - .SHRA_PH = { 544, 1}, - .SHRA_R_PH = { 545, 0}, - .SHRA_R_W = { 545, 1}, - .SHRAV_QB = { 546, 1}, - .SHRAV_R_QB = { 547, 1}, - .SHRAV_PH = { 548, 1}, - .SHRAV_R_PH = { 549, 1}, - .SHRAV_R_W = { 550, 1}, - .LBUX = { 551, 1}, - .LHX = { 552, 1}, - .LWX = { 553, 1}, - .BPOSGE32 = { 554, 1}, - .BPOSGE64 = { 555, 0}, - .INSV = { 555, 1}, - .BITREV = { 556, 1}, - .ABSQ_S_PH = { 557, 1}, - .ABSQ_S_W = { 558, 1}, - .REPL_PH = { 559, 0}, - .REPLV_PH = { 559, 0}, - .REPL_QB = { 559, 0}, - .REPLV_QB = { 559, 0}, - .ADDV_B = { 559, 1}, - .ADDV_H = { 560, 1}, - .ADDV_W = { 561, 1}, - .ADDV_D = { 562, 1}, - .SUBV_B = { 563, 1}, - .SUBV_H = { 564, 1}, - .SUBV_W = { 565, 1}, - .SUBV_D = { 566, 1}, - .ADDS_S_B = { 567, 1}, - .ADDS_S_H = { 568, 1}, - .ADDS_S_W = { 569, 1}, - .ADDS_S_D = { 570, 1}, - .ADDS_U_B = { 571, 1}, - .ADDS_U_H = { 572, 1}, - .ADDS_U_W = { 573, 1}, - .ADDS_U_D = { 574, 1}, - .SUBS_S_B = { 575, 1}, - .SUBS_S_H = { 576, 1}, - .SUBS_S_W = { 577, 1}, - .SUBS_S_D = { 578, 1}, - .SUBS_U_B = { 579, 1}, - .SUBS_U_H = { 580, 1}, - .SUBS_U_W = { 581, 1}, - .SUBS_U_D = { 582, 1}, - .MULV_B = { 583, 1}, - .MULV_H = { 584, 1}, - .MULV_W = { 585, 1}, - .MULV_D = { 586, 1}, - .DIV_S_B = { 587, 1}, - .DIV_S_H = { 588, 1}, - .DIV_S_W = { 589, 1}, - .DIV_S_D = { 590, 1}, - .DIV_U_B = { 591, 1}, - .DIV_U_H = { 592, 1}, - .DIV_U_W = { 593, 1}, - .DIV_U_D = { 594, 1}, - .MOD_S_B = { 595, 1}, - .MOD_S_H = { 596, 1}, - .MOD_S_W = { 597, 1}, - .MOD_S_D = { 598, 1}, - .MOD_U_B = { 599, 1}, - .MOD_U_H = { 600, 1}, - .MOD_U_W = { 601, 1}, - .MOD_U_D = { 602, 1}, - .MADDV_B = { 603, 1}, - .MADDV_H = { 604, 1}, - .MADDV_W = { 605, 1}, - .MADDV_D = { 606, 1}, - .MSUBV_B = { 607, 1}, - .MSUBV_H = { 608, 1}, - .MSUBV_W = { 609, 1}, - .MSUBV_D = { 610, 1}, - .DOTP_S_H = { 611, 1}, - .DOTP_S_W = { 612, 1}, - .DOTP_S_D = { 613, 1}, - .DOTP_U_H = { 614, 1}, - .DOTP_U_W = { 615, 1}, - .DOTP_U_D = { 616, 1}, - .AND_V = { 617, 1}, - .OR_V = { 618, 1}, - .NOR_V = { 619, 1}, - .XOR_V = { 620, 1}, - .ANDI_B = { 621, 1}, - .ORI_B = { 622, 1}, - .NORI_B = { 623, 1}, - .XORI_B = { 624, 1}, - .BSEL_V = { 625, 1}, - .BSELI_B = { 626, 1}, - .BMNZ_V = { 627, 1}, - .BMNZI_B = { 628, 1}, - .BMZ_V = { 629, 1}, - .BMZI_B = { 630, 1}, - .CEQ_B = { 631, 1}, - .CEQ_H = { 632, 1}, - .CEQ_W = { 633, 1}, - .CEQ_D = { 634, 1}, - .CLT_S_B = { 635, 1}, - .CLT_S_H = { 636, 1}, - .CLT_S_W = { 637, 1}, - .CLT_S_D = { 638, 1}, - .CLT_U_B = { 639, 1}, - .CLT_U_H = { 640, 1}, - .CLT_U_W = { 641, 1}, - .CLT_U_D = { 642, 1}, - .CLE_S_B = { 643, 1}, - .CLE_S_H = { 644, 1}, - .CLE_S_W = { 645, 1}, - .CLE_S_D = { 646, 1}, - .CLE_U_B = { 647, 1}, - .CLE_U_H = { 648, 1}, - .CLE_U_W = { 649, 1}, - .CLE_U_D = { 650, 1}, - .MIN_S_B = { 651, 1}, - .MIN_S_H = { 652, 1}, - .MIN_S_W = { 653, 1}, - .MIN_S_D = { 654, 1}, - .MIN_U_B = { 655, 1}, - .MIN_U_H = { 656, 1}, - .MIN_U_W = { 657, 1}, - .MIN_U_D = { 658, 1}, - .MAX_S_B = { 659, 1}, - .MAX_S_H = { 660, 1}, - .MAX_S_W = { 661, 1}, - .MAX_S_D = { 662, 1}, - .MAX_U_B = { 663, 1}, - .MAX_U_H = { 664, 1}, - .MAX_U_W = { 665, 1}, - .MAX_U_D = { 666, 1}, - .SLL_B = { 667, 1}, - .SLL_H = { 668, 1}, - .SLL_W = { 669, 1}, - .SLL_D = { 670, 1}, - .SRL_B = { 671, 1}, - .SRL_H = { 672, 1}, - .SRL_W = { 673, 1}, - .SRL_D = { 674, 1}, - .SRA_B = { 675, 1}, - .SRA_H = { 676, 1}, - .SRA_W = { 677, 1}, - .SRA_D = { 678, 1}, - .SLLI_B = { 679, 1}, - .SLLI_H = { 680, 1}, - .SLLI_W = { 681, 1}, - .SLLI_D = { 682, 1}, - .SRLI_B = { 683, 1}, - .SRLI_H = { 684, 1}, - .SRLI_W = { 685, 1}, - .SRLI_D = { 686, 1}, - .SRAI_B = { 687, 1}, - .SRAI_H = { 688, 1}, - .SRAI_W = { 689, 1}, - .SRAI_D = { 690, 1}, - .FADD_W = { 691, 1}, - .FADD_D = { 692, 1}, - .FSUB_W = { 693, 1}, - .FSUB_D = { 694, 1}, - .FMUL_W = { 695, 1}, - .FMUL_D = { 696, 1}, - .FDIV_W = { 697, 1}, - .FDIV_D = { 698, 1}, - .FSQRT_W = { 699, 1}, - .FSQRT_D = { 700, 1}, - .FRSQRT_W = { 701, 1}, - .FRSQRT_D = { 702, 1}, - .FRCP_W = { 703, 1}, - .FRCP_D = { 704, 1}, - .FRINT_W = { 705, 1}, - .FRINT_D = { 706, 1}, - .FMAX_W = { 707, 1}, - .FMAX_D = { 708, 1}, - .FMIN_W = { 709, 1}, - .FMIN_D = { 710, 1}, - .FCEQ_W = { 711, 1}, - .FCEQ_D = { 712, 1}, - .FCNE_W = { 713, 1}, - .FCNE_D = { 714, 1}, - .FCLT_W = { 715, 1}, - .FCLT_D = { 716, 1}, - .FCLE_W = { 717, 1}, - .FCLE_D = { 718, 1}, - .FFINT_S_W = { 719, 1}, - .FFINT_S_D = { 720, 1}, - .FFINT_U_W = { 721, 1}, - .FFINT_U_D = { 722, 1}, - .FTRUNC_S_W = { 723, 1}, - .FTRUNC_S_D = { 724, 1}, - .FTRUNC_U_W = { 725, 1}, - .FTRUNC_U_D = { 726, 1}, - .FCVT_S_W = { 727, 1}, - .FCVT_S_D = { 728, 1}, - .FCVT_D_W = { 729, 1}, - .LD_B = { 730, 1}, - .LD_H = { 731, 1}, - .LD_W = { 732, 1}, - .LD_D = { 733, 1}, - .ST_B = { 734, 1}, - .ST_H = { 735, 1}, - .ST_W = { 736, 1}, - .ST_D = { 737, 1}, - .LDI_B = { 738, 1}, - .LDI_H = { 739, 1}, - .LDI_W = { 740, 1}, - .LDI_D = { 741, 1}, - .COPY_S_B = { 742, 0}, - .COPY_S_H = { 742, 0}, - .COPY_S_W = { 742, 0}, - .COPY_U_B = { 742, 0}, - .COPY_U_H = { 742, 0}, - .COPY_U_W = { 742, 0}, - .INSERT_B = { 742, 0}, - .INSERT_H = { 742, 0}, - .INSERT_W = { 742, 0}, - .INSERT_D = { 742, 0}, - .INSVE_B = { 742, 1}, - .INSVE_H = { 743, 1}, - .INSVE_W = { 744, 1}, - .INSVE_D = { 745, 1}, - .SHF_B = { 746, 1}, - .SHF_H = { 747, 1}, - .SHF_W = { 748, 1}, - .VSHF_B = { 749, 1}, - .VSHF_H = { 750, 1}, - .VSHF_W = { 751, 1}, - .VSHF_D = { 752, 1}, - .SLD_B = { 753, 1}, - .SLD_H = { 754, 1}, - .SLD_W = { 755, 1}, - .SLD_D = { 756, 1}, - .SLDI_B = { 757, 1}, - .SLDI_H = { 758, 1}, - .SLDI_W = { 759, 1}, - .SLDI_D = { 760, 1}, - .SPLAT_B = { 761, 1}, - .SPLAT_H = { 762, 1}, - .SPLAT_W = { 763, 1}, - .SPLAT_D = { 764, 1}, - .SPLATI_B = { 765, 1}, - .SPLATI_H = { 766, 1}, - .SPLATI_W = { 767, 1}, - .SPLATI_D = { 768, 1}, - .BZ_V = { 769, 0}, - .BNZ_V = { 769, 0}, - .BZ_B = { 769, 0}, - .BZ_H = { 769, 0}, - .BZ_W = { 769, 0}, - .BZ_D = { 769, 0}, - .BNZ_B = { 769, 0}, - .BNZ_H = { 769, 0}, - .BNZ_W = { 769, 0}, - .BNZ_D = { 769, 0}, - .NLOC_B = { 769, 1}, - .NLOC_H = { 770, 1}, - .NLOC_W = { 771, 1}, - .NLOC_D = { 772, 1}, - .NLZC_B = { 773, 1}, - .NLZC_H = { 774, 1}, - .NLZC_W = { 775, 1}, - .NLZC_D = { 776, 1}, - .PCNT_B = { 777, 1}, - .PCNT_H = { 778, 1}, - .PCNT_W = { 779, 1}, - .PCNT_D = { 780, 1}, - .VMOV_S = { 781, 1}, - .VMOV_P = { 782, 1}, - .VMOV_T = { 783, 1}, - .VMOV_Q = { 784, 1}, - .LV_S = { 785, 1}, - .LV_Q = { 786, 1}, - .SV_S = { 787, 1}, - .SV_Q = { 788, 1}, - .LVL_Q = { 789, 1}, - .LVR_Q = { 790, 1}, - .SVL_Q = { 791, 1}, - .SVR_Q = { 792, 1}, - .VIIM_S = { 793, 1}, - .VFIM_S = { 794, 1}, - .VADD_S = { 795, 1}, - .VADD_P = { 796, 1}, - .VADD_T = { 797, 1}, - .VADD_Q = { 798, 1}, - .VSUB_S = { 799, 1}, - .VSUB_P = { 800, 1}, - .VSUB_T = { 801, 1}, - .VSUB_Q = { 802, 1}, - .VMUL_S = { 803, 1}, - .VMUL_P = { 804, 1}, - .VMUL_T = { 805, 1}, - .VMUL_Q = { 806, 1}, - .VDIV_S = { 807, 1}, - .VDIV_P = { 808, 1}, - .VDIV_T = { 809, 1}, - .VDIV_Q = { 810, 1}, - .VABS_S = { 811, 1}, - .VABS_P = { 812, 1}, - .VABS_T = { 813, 1}, - .VABS_Q = { 814, 1}, - .VNEG_S = { 815, 1}, - .VNEG_P = { 816, 1}, - .VNEG_T = { 817, 1}, - .VNEG_Q = { 818, 1}, - .VSQRT_S = { 819, 1}, - .VRCP_S = { 820, 1}, - .VRCP_P = { 821, 1}, - .VRCP_T = { 822, 1}, - .VRCP_Q = { 823, 1}, - .VRSQ_S = { 824, 1}, - .VRSQ_P = { 825, 1}, - .VRSQ_T = { 826, 1}, - .VRSQ_Q = { 827, 1}, - .VDOT_P = { 828, 1}, - .VDOT_T = { 829, 1}, - .VDOT_Q = { 830, 1}, - .VSCL_P = { 831, 1}, - .VSCL_T = { 832, 1}, - .VSCL_Q = { 833, 1}, - .VHDP_P = { 834, 1}, - .VHDP_T = { 835, 1}, - .VHDP_Q = { 836, 1}, - .VAVG_P = { 837, 1}, - .VAVG_T = { 838, 1}, - .VAVG_Q = { 839, 1}, - .VFAD_P = { 840, 1}, - .VFAD_T = { 841, 1}, - .VFAD_Q = { 842, 1}, - .VMMUL_P = { 843, 1}, - .VMMUL_T = { 844, 1}, - .VMMUL_Q = { 845, 1}, - .VTFM2_P = { 846, 1}, - .VTFM3_T = { 847, 1}, - .VTFM4_Q = { 848, 1}, - .VHTFM2_P = { 849, 1}, - .VHTFM3_T = { 850, 1}, - .VHTFM4_Q = { 851, 1}, - .VMSCL_P = { 852, 1}, - .VMSCL_T = { 853, 1}, - .VMSCL_Q = { 854, 1}, - .VMMOV_P = { 855, 1}, - .VMMOV_T = { 856, 1}, - .VMMOV_Q = { 857, 1}, - .VMIDT_P = { 858, 1}, - .VMIDT_T = { 859, 1}, - .VMIDT_Q = { 860, 1}, - .VMZERO_P = { 861, 1}, - .VMZERO_T = { 862, 1}, - .VMZERO_Q = { 863, 1}, - .VMONE_P = { 864, 1}, - .VMONE_T = { 865, 1}, - .VMONE_Q = { 866, 1}, - .VCRS_T = { 867, 1}, - .VCRSP_T = { 868, 1}, - .VQMUL_Q = { 869, 1}, - .VCMP_S = { 870, 1}, - .VCMP_P = { 871, 1}, - .VCMP_T = { 872, 1}, - .VCMP_Q = { 873, 1}, - .VMIN_S = { 874, 1}, - .VMIN_P = { 875, 1}, - .VMIN_T = { 876, 1}, - .VMIN_Q = { 877, 1}, - .VMAX_S = { 878, 1}, - .VMAX_P = { 879, 1}, - .VMAX_T = { 880, 1}, - .VMAX_Q = { 881, 1}, - .VSIN_S = { 882, 1}, - .VCOS_S = { 883, 1}, - .VEXP2_S = { 884, 1}, - .VLOG2_S = { 885, 1}, - .VASIN_S = { 886, 1}, - .VNRCP_S = { 887, 1}, - .VNSIN_S = { 888, 1}, - .VREXP2_S = { 889, 1}, - .VSGN_S = { 890, 1}, - .VI2F_S = { 891, 1}, - .VI2F_P = { 892, 1}, - .VI2F_T = { 893, 1}, - .VI2F_Q = { 894, 1}, - .VF2IN_S = { 895, 1}, - .VF2IN_P = { 896, 1}, - .VF2IN_T = { 897, 1}, - .VF2IN_Q = { 898, 1}, - .VF2IZ_S = { 899, 1}, - .VF2IZ_P = { 900, 1}, - .VF2IZ_T = { 901, 1}, - .VF2IZ_Q = { 902, 1}, - .VF2IU_S = { 903, 1}, - .VF2IU_P = { 904, 1}, - .VF2IU_T = { 905, 1}, - .VF2IU_Q = { 906, 1}, - .VF2ID_S = { 907, 1}, - .VF2ID_P = { 908, 1}, - .VF2ID_T = { 909, 1}, - .VF2ID_Q = { 910, 1}, - .VF2H_P = { 911, 1}, - .VH2F_S = { 912, 1}, - .VFLUSH = { 913, 1}, - .VSYNC = { 914, 1}, - .VNOP = { 915, 1}, - .VPFXS = { 916, 1}, - .VPFXT = { 917, 1}, - .VPFXD = { 918, 1}, - .VCST_S = { 919, 1}, - .VCST_P = { 920, 1}, - .VCST_T = { 921, 1}, - .VCST_Q = { 922, 1}, - .MFV = { 923, 1}, - .MTV = { 924, 1}, - .MFVC = { 925, 1}, - .MTVC = { 926, 1}, - .BVF = { 927, 1}, - .BVT = { 928, 1}, - .BVFL = { 929, 1}, - .BVTL = { 930, 1}, + .RDHWR = { 151, 1}, + .RDPGPR = { 152, 0}, + .WRPGPR = { 152, 0}, + .DI = { 152, 1}, + .EI = { 153, 1}, + .ERET = { 154, 1}, + .DERET = { 155, 1}, + .WAIT = { 156, 1}, + .BC = { 157, 1}, + .BALC = { 158, 1}, + .BEQC = { 159, 0}, + .BNEC = { 159, 0}, + .BLTC = { 159, 0}, + .BGEC = { 159, 0}, + .BLTUC = { 159, 0}, + .BGEUC = { 159, 0}, + .BLEZC = { 159, 0}, + .BGEZC = { 159, 0}, + .BGTZC = { 159, 0}, + .BLTZC = { 159, 0}, + .BEQZC = { 159, 1}, + .BNEZC = { 160, 1}, + .BC1EQZ = { 161, 1}, + .BC1NEZ = { 162, 1}, + .BC2EQZ = { 163, 1}, + .BC2NEZ = { 164, 1}, + .JIC = { 165, 1}, + .JIALC = { 166, 1}, + .MUH = { 167, 1}, + .MULU = { 168, 1}, + .MUHU = { 169, 1}, + .MOD = { 170, 1}, + .MODU = { 171, 1}, + .DMUL_R6 = { 172, 1}, + .DMUH = { 173, 1}, + .DMULU = { 174, 1}, + .DMUHU = { 175, 1}, + .DDIV_R6 = { 176, 1}, + .DMOD = { 177, 1}, + .DDIVU_R6 = { 178, 1}, + .DMODU = { 179, 1}, + .AUI = { 180, 1}, + .AUIPC = { 181, 1}, + .ALUIPC = { 182, 1}, + .DAUI = { 183, 1}, + .DAHI = { 184, 1}, + .DATI = { 185, 1}, + .ALIGN = { 186, 1}, + .DALIGN = { 187, 1}, + .BITSWAP = { 188, 1}, + .DBITSWAP = { 189, 1}, + .LSA = { 190, 1}, + .DLSA = { 191, 1}, + .LWPC = { 192, 0}, + .LWUPC = { 192, 0}, + .LDPC = { 192, 0}, + .SELEQZ = { 192, 1}, + .SELNEZ = { 193, 1}, + .CRC32B = { 194, 1}, + .CRC32H = { 195, 1}, + .CRC32W = { 196, 1}, + .CRC32D = { 197, 1}, + .CRC32CB = { 198, 1}, + .CRC32CH = { 199, 1}, + .CRC32CW = { 200, 1}, + .CRC32CD = { 201, 1}, + .SIGRIE = { 202, 1}, + .MFC1 = { 203, 1}, + .MTC1 = { 204, 1}, + .DMFC1 = { 205, 1}, + .DMTC1 = { 206, 1}, + .CFC1 = { 207, 1}, + .CTC1 = { 208, 1}, + .MFHC1 = { 209, 1}, + .MTHC1 = { 210, 1}, + .LWC1 = { 211, 1}, + .SWC1 = { 212, 1}, + .LDC1 = { 213, 1}, + .SDC1 = { 214, 1}, + .ADD_S = { 215, 1}, + .ADD_D = { 216, 1}, + .ADD_PS = { 217, 1}, + .SUB_S = { 218, 1}, + .SUB_D = { 219, 1}, + .SUB_PS = { 220, 1}, + .MUL_S = { 221, 1}, + .MUL_D = { 222, 1}, + .MUL_PS = { 223, 1}, + .DIV_S = { 224, 1}, + .DIV_D = { 225, 1}, + .SQRT_S = { 226, 1}, + .SQRT_D = { 227, 1}, + .ABS_S = { 228, 1}, + .ABS_D = { 229, 1}, + .ABS_PS = { 230, 1}, + .NEG_S = { 231, 1}, + .NEG_D = { 232, 1}, + .NEG_PS = { 233, 1}, + .MOV_S = { 234, 1}, + .MOV_D = { 235, 1}, + .MOV_PS = { 236, 1}, + .RECIP_S = { 237, 1}, + .RECIP_D = { 238, 1}, + .RSQRT_S = { 239, 1}, + .RSQRT_D = { 240, 1}, + .MADD_S = { 241, 1}, + .MADD_D = { 242, 1}, + .MADD_PS = { 243, 0}, + .MSUB_S = { 243, 1}, + .MSUB_D = { 244, 1}, + .MSUB_PS = { 245, 0}, + .NMADD_S = { 245, 1}, + .NMADD_D = { 246, 1}, + .NMADD_PS = { 247, 0}, + .NMSUB_S = { 247, 1}, + .NMSUB_D = { 248, 1}, + .NMSUB_PS = { 249, 0}, + .MOVN_S = { 249, 1}, + .MOVN_D = { 250, 1}, + .MOVN_PS = { 251, 0}, + .MOVZ_S = { 251, 1}, + .MOVZ_D = { 252, 1}, + .MOVZ_PS = { 253, 0}, + .MOVF_S = { 253, 1}, + .MOVF_D = { 254, 1}, + .MOVF_PS = { 255, 0}, + .MOVT_S = { 255, 1}, + .MOVT_D = { 256, 1}, + .MOVT_PS = { 257, 0}, + .CVT_S_D = { 257, 1}, + .CVT_S_W = { 258, 1}, + .CVT_S_L = { 259, 1}, + .CVT_D_S = { 260, 1}, + .CVT_D_W = { 261, 1}, + .CVT_D_L = { 262, 1}, + .CVT_W_S = { 263, 1}, + .CVT_W_D = { 264, 1}, + .CVT_L_S = { 265, 1}, + .CVT_L_D = { 266, 1}, + .CVT_PS_S = { 267, 0}, + .CVT_S_PU = { 267, 0}, + .CVT_S_PL = { 267, 0}, + .PLL_PS = { 267, 0}, + .PLU_PS = { 267, 0}, + .PUL_PS = { 267, 0}, + .PUU_PS = { 267, 0}, + .ROUND_W_S = { 267, 1}, + .ROUND_W_D = { 268, 1}, + .ROUND_L_S = { 269, 1}, + .ROUND_L_D = { 270, 1}, + .TRUNC_W_S = { 271, 1}, + .TRUNC_W_D = { 272, 1}, + .TRUNC_L_S = { 273, 1}, + .TRUNC_L_D = { 274, 1}, + .CEIL_W_S = { 275, 1}, + .CEIL_W_D = { 276, 1}, + .CEIL_L_S = { 277, 1}, + .CEIL_L_D = { 278, 1}, + .FLOOR_W_S = { 279, 1}, + .FLOOR_W_D = { 280, 1}, + .FLOOR_L_S = { 281, 1}, + .FLOOR_L_D = { 282, 1}, + .C_F_S = { 283, 1}, + .C_F_D = { 284, 1}, + .C_F_PS = { 285, 1}, + .C_UN_S = { 286, 1}, + .C_UN_D = { 287, 1}, + .C_UN_PS = { 288, 1}, + .C_EQ_S = { 289, 1}, + .C_EQ_D = { 290, 1}, + .C_EQ_PS = { 291, 1}, + .C_UEQ_S = { 292, 1}, + .C_UEQ_D = { 293, 1}, + .C_UEQ_PS = { 294, 1}, + .C_OLT_S = { 295, 1}, + .C_OLT_D = { 296, 1}, + .C_OLT_PS = { 297, 1}, + .C_ULT_S = { 298, 1}, + .C_ULT_D = { 299, 1}, + .C_ULT_PS = { 300, 1}, + .C_OLE_S = { 301, 1}, + .C_OLE_D = { 302, 1}, + .C_OLE_PS = { 303, 1}, + .C_ULE_S = { 304, 1}, + .C_ULE_D = { 305, 1}, + .C_ULE_PS = { 306, 1}, + .C_SF_S = { 307, 1}, + .C_SF_D = { 308, 1}, + .C_SF_PS = { 309, 1}, + .C_NGLE_S = { 310, 1}, + .C_NGLE_D = { 311, 1}, + .C_NGLE_PS = { 312, 1}, + .C_SEQ_S = { 313, 1}, + .C_SEQ_D = { 314, 1}, + .C_SEQ_PS = { 315, 1}, + .C_NGL_S = { 316, 1}, + .C_NGL_D = { 317, 1}, + .C_NGL_PS = { 318, 1}, + .C_LT_S = { 319, 1}, + .C_LT_D = { 320, 1}, + .C_LT_PS = { 321, 1}, + .C_NGE_S = { 322, 1}, + .C_NGE_D = { 323, 1}, + .C_NGE_PS = { 324, 1}, + .C_LE_S = { 325, 1}, + .C_LE_D = { 326, 1}, + .C_LE_PS = { 327, 1}, + .C_NGT_S = { 328, 1}, + .C_NGT_D = { 329, 1}, + .C_NGT_PS = { 330, 1}, + .BC1F = { 331, 1}, + .BC1T = { 332, 1}, + .BC1FL = { 333, 1}, + .BC1TL = { 334, 1}, + .MFC0 = { 335, 1}, + .MTC0 = { 336, 1}, + .DMFC0 = { 337, 1}, + .DMTC0 = { 338, 1}, + .MFHC0 = { 339, 1}, + .MTHC0 = { 340, 1}, + .TLBP = { 341, 1}, + .TLBR = { 342, 1}, + .TLBWI = { 343, 1}, + .TLBWR = { 344, 1}, + .CACHE = { 345, 1}, + .MFC2 = { 346, 1}, + .MTC2 = { 347, 1}, + .CFC2 = { 348, 1}, + .CTC2 = { 349, 1}, + .LWC2 = { 350, 1}, + .SWC2 = { 351, 1}, + .LDC2 = { 352, 1}, + .SDC2 = { 353, 1}, + .RTPS = { 354, 1}, + .RTPT = { 355, 1}, + .DPCS = { 356, 1}, + .DPCT = { 357, 1}, + .INTPL = { 358, 1}, + .MVMVA = { 359, 1}, + .NCDS = { 360, 1}, + .NCDT = { 361, 1}, + .NCCS = { 362, 1}, + .NCCT = { 363, 1}, + .NCS = { 364, 1}, + .NCT = { 365, 1}, + .CDP = { 366, 1}, + .CC = { 367, 1}, + .NCLIP = { 368, 1}, + .AVSZ3 = { 369, 1}, + .AVSZ4 = { 370, 1}, + .OP_GTE = { 371, 1}, + .GPF = { 372, 1}, + .GPL = { 373, 1}, + .SQR_GTE = { 374, 1}, + .DCPL = { 375, 1}, + .LQ = { 376, 1}, + .SQ = { 377, 1}, + .LQC2 = { 378, 1}, + .SQC2 = { 379, 1}, + .MFHI1 = { 380, 1}, + .MFLO1 = { 381, 1}, + .MTHI1 = { 382, 1}, + .MTLO1 = { 383, 1}, + .MULT1 = { 384, 1}, + .MULTU1 = { 385, 1}, + .DIV1 = { 386, 1}, + .DIVU1 = { 387, 1}, + .MADD_EE = { 388, 0}, + .MADDU_EE = { 388, 0}, + .MSUB_EE = { 388, 0}, + .MSUBU_EE = { 388, 0}, + .MADD1 = { 388, 1}, + .MADDU1 = { 389, 1}, + .MSUB1 = { 390, 0}, + .MSUBU1 = { 390, 0}, + .PMFHL_LW = { 390, 1}, + .PMFHL_UW = { 391, 1}, + .PMFHL_LH = { 392, 1}, + .PMFHL_SH = { 393, 1}, + .PMFHL_SLW = { 394, 1}, + .PMTHL_LW = { 395, 1}, + .PADDB = { 396, 1}, + .PADDH = { 397, 1}, + .PADDW = { 398, 1}, + .PADDSB = { 399, 1}, + .PADDSH = { 400, 1}, + .PADDSW = { 401, 1}, + .PADDUB = { 402, 1}, + .PADDUH = { 403, 1}, + .PADDUW = { 404, 1}, + .PSUBB = { 405, 1}, + .PSUBH = { 406, 1}, + .PSUBW = { 407, 1}, + .PSUBSB = { 408, 1}, + .PSUBSH = { 409, 1}, + .PSUBSW = { 410, 1}, + .PSUBUB = { 411, 1}, + .PSUBUH = { 412, 1}, + .PSUBUW = { 413, 1}, + .PSLLH = { 414, 1}, + .PSRLH = { 415, 1}, + .PSRAH = { 416, 1}, + .PSLLW = { 417, 1}, + .PSRLW = { 418, 1}, + .PSRAW = { 419, 1}, + .PSLLVW = { 420, 1}, + .PSRLVW = { 421, 1}, + .PSRAVW = { 422, 1}, + .QFSRV = { 423, 1}, + .PAND = { 424, 1}, + .POR = { 425, 1}, + .PXOR = { 426, 1}, + .PNOR = { 427, 1}, + .PCEQB = { 428, 1}, + .PCEQH = { 429, 1}, + .PCEQW = { 430, 1}, + .PCGTB = { 431, 1}, + .PCGTH = { 432, 1}, + .PCGTW = { 433, 1}, + .PMULTW = { 434, 1}, + .PMULTUW = { 435, 1}, + .PMULTH = { 436, 1}, + .PMADDW = { 437, 1}, + .PMADDUW = { 438, 1}, + .PMADDH = { 439, 1}, + .PMSUBW = { 440, 1}, + .PMSUBH = { 441, 1}, + .PHMADH = { 442, 1}, + .PHMSBH = { 443, 1}, + .PDIVW = { 444, 1}, + .PDIVUW = { 445, 1}, + .PDIVBW = { 446, 1}, + .PCPYLD = { 447, 1}, + .PCPYUD = { 448, 1}, + .PCPYH = { 449, 1}, + .PINTH = { 450, 1}, + .PINTOH = { 451, 1}, + .PEXEH = { 452, 1}, + .PEXEW = { 453, 1}, + .PEXCH = { 454, 1}, + .PEXCW = { 455, 1}, + .PROT3W = { 456, 1}, + .PPACB = { 457, 1}, + .PPACH = { 458, 1}, + .PPACW = { 459, 1}, + .PPAC5 = { 460, 1}, + .PEXT5 = { 461, 1}, + .PEXTLB = { 462, 1}, + .PEXTLH = { 463, 1}, + .PEXTLW = { 464, 1}, + .PEXTUB = { 465, 1}, + .PEXTUH = { 466, 1}, + .PEXTUW = { 467, 1}, + .PMFHI = { 468, 1}, + .PMFLO = { 469, 1}, + .PMTHI = { 470, 1}, + .PMTLO = { 471, 1}, + .PLZCW = { 472, 1}, + .PABSH = { 473, 1}, + .PABSW = { 474, 1}, + .PMAXH = { 475, 1}, + .PMAXW = { 476, 1}, + .PMINH = { 477, 1}, + .PMINW = { 478, 1}, + .MFSA = { 479, 1}, + .MTSA = { 480, 1}, + .MTSAB = { 481, 1}, + .MTSAH = { 482, 1}, + .ADDQ_PH = { 483, 1}, + .ADDQ_S_PH = { 484, 1}, + .ADDQ_S_W = { 485, 1}, + .SUBQ_PH = { 486, 1}, + .SUBQ_S_PH = { 487, 1}, + .SUBQ_S_W = { 488, 1}, + .ADDU_QB = { 489, 1}, + .ADDU_S_QB = { 490, 1}, + .ADDU_PH = { 491, 1}, + .ADDU_S_PH = { 492, 1}, + .SUBU_QB = { 493, 1}, + .SUBU_S_QB = { 494, 1}, + .SUBU_PH = { 495, 1}, + .SUBU_S_PH = { 496, 1}, + .ADDSC = { 497, 1}, + .ADDWC = { 498, 1}, + .MULEU_S_PH_QBL = { 499, 1}, + .MULEU_S_PH_QBR = { 500, 1}, + .MULEQ_S_W_PHL = { 501, 1}, + .MULEQ_S_W_PHR = { 502, 1}, + .MULQ_RS_PH = { 503, 1}, + .MULQ_S_PH = { 504, 1}, + .MULSAQ_S_W_PH = { 505, 1}, + .DPAQ_S_W_PH = { 506, 1}, + .DPSQ_S_W_PH = { 507, 1}, + .DPAQ_SA_L_W = { 508, 1}, + .DPSQ_SA_L_W = { 509, 1}, + .DPAU_H_QBL = { 510, 1}, + .DPAU_H_QBR = { 511, 1}, + .DPSU_H_QBL = { 512, 1}, + .DPSU_H_QBR = { 513, 1}, + .DPA_W_PH = { 514, 0}, + .DPS_W_PH = { 514, 0}, + .DPAX_W_PH = { 514, 0}, + .DPSX_W_PH = { 514, 0}, + .MAQ_S_W_PHL = { 514, 0}, + .MAQ_S_W_PHR = { 514, 0}, + .MAQ_SA_W_PHL = { 514, 0}, + .MAQ_SA_W_PHR = { 514, 0}, + .EXTR_W = { 514, 1}, + .EXTR_R_W = { 515, 1}, + .EXTR_RS_W = { 516, 1}, + .EXTR_S_H = { 517, 1}, + .EXTRV_W = { 518, 1}, + .EXTRV_R_W = { 519, 0}, + .EXTRV_RS_W = { 519, 0}, + .EXTRV_S_H = { 519, 0}, + .EXTP = { 519, 1}, + .EXTPV = { 520, 1}, + .EXTPDP = { 521, 0}, + .EXTPDPV = { 521, 0}, + .SHILO = { 521, 0}, + .SHILOV = { 521, 0}, + .MTHLIP = { 521, 0}, + .WRDSP = { 521, 1}, + .RDDSP = { 522, 1}, + .PRECRQ_QB_PH = { 523, 1}, + .PRECRQ_PH_W = { 524, 1}, + .PRECRQU_S_QB_PH = { 525, 1}, + .PRECEQ_W_PHL = { 526, 1}, + .PRECEQ_W_PHR = { 527, 1}, + .PRECEQU_PH_QBL = { 528, 1}, + .PRECEQU_PH_QBR = { 529, 1}, + .PRECEQU_PH_QBLA = { 530, 1}, + .PRECEQU_PH_QBRA = { 531, 1}, + .PRECEU_PH_QBL = { 532, 1}, + .PRECEU_PH_QBR = { 533, 1}, + .PRECEU_PH_QBLA = { 534, 1}, + .PRECEU_PH_QBRA = { 535, 1}, + .PRECRQ_RS_PH_W = { 536, 1}, + .CMPU_EQ_QB = { 537, 1}, + .CMPU_LT_QB = { 538, 1}, + .CMPU_LE_QB = { 539, 1}, + .CMP_EQ_PH = { 540, 1}, + .CMP_LT_PH = { 541, 1}, + .CMP_LE_PH = { 542, 1}, + .CMPGU_EQ_QB = { 543, 1}, + .CMPGU_LT_QB = { 544, 1}, + .CMPGU_LE_QB = { 545, 1}, + .PICK_QB = { 546, 1}, + .PICK_PH = { 547, 1}, + .SHLL_QB = { 548, 1}, + .SHLL_PH = { 549, 1}, + .SHLL_S_PH = { 550, 1}, + .SHLL_S_W = { 551, 1}, + .SHLLV_QB = { 552, 1}, + .SHLLV_PH = { 553, 1}, + .SHLLV_S_PH = { 554, 1}, + .SHLLV_S_W = { 555, 1}, + .SHRL_QB = { 556, 1}, + .SHRL_PH = { 557, 0}, + .SHRLV_QB = { 557, 1}, + .SHRLV_PH = { 558, 1}, + .SHRA_QB = { 559, 0}, + .SHRA_R_QB = { 559, 0}, + .SHRA_PH = { 559, 1}, + .SHRA_R_PH = { 560, 0}, + .SHRA_R_W = { 560, 1}, + .SHRAV_QB = { 561, 1}, + .SHRAV_R_QB = { 562, 1}, + .SHRAV_PH = { 563, 1}, + .SHRAV_R_PH = { 564, 1}, + .SHRAV_R_W = { 565, 1}, + .LBUX = { 566, 1}, + .LHX = { 567, 1}, + .LWX = { 568, 1}, + .BPOSGE32 = { 569, 1}, + .BPOSGE64 = { 570, 0}, + .INSV = { 570, 1}, + .BITREV = { 571, 1}, + .ABSQ_S_PH = { 572, 1}, + .ABSQ_S_W = { 573, 1}, + .REPL_PH = { 574, 0}, + .REPLV_PH = { 574, 1}, + .REPL_QB = { 575, 0}, + .REPLV_QB = { 575, 1}, + .ADDV_B = { 576, 1}, + .ADDV_H = { 577, 1}, + .ADDV_W = { 578, 1}, + .ADDV_D = { 579, 1}, + .SUBV_B = { 580, 1}, + .SUBV_H = { 581, 1}, + .SUBV_W = { 582, 1}, + .SUBV_D = { 583, 1}, + .ADDS_S_B = { 584, 1}, + .ADDS_S_H = { 585, 1}, + .ADDS_S_W = { 586, 1}, + .ADDS_S_D = { 587, 1}, + .ADDS_U_B = { 588, 1}, + .ADDS_U_H = { 589, 1}, + .ADDS_U_W = { 590, 1}, + .ADDS_U_D = { 591, 1}, + .SUBS_S_B = { 592, 1}, + .SUBS_S_H = { 593, 1}, + .SUBS_S_W = { 594, 1}, + .SUBS_S_D = { 595, 1}, + .SUBS_U_B = { 596, 1}, + .SUBS_U_H = { 597, 1}, + .SUBS_U_W = { 598, 1}, + .SUBS_U_D = { 599, 1}, + .MULV_B = { 600, 1}, + .MULV_H = { 601, 1}, + .MULV_W = { 602, 1}, + .MULV_D = { 603, 1}, + .DIV_S_B = { 604, 1}, + .DIV_S_H = { 605, 1}, + .DIV_S_W = { 606, 1}, + .DIV_S_D = { 607, 1}, + .DIV_U_B = { 608, 1}, + .DIV_U_H = { 609, 1}, + .DIV_U_W = { 610, 1}, + .DIV_U_D = { 611, 1}, + .MOD_S_B = { 612, 1}, + .MOD_S_H = { 613, 1}, + .MOD_S_W = { 614, 1}, + .MOD_S_D = { 615, 1}, + .MOD_U_B = { 616, 1}, + .MOD_U_H = { 617, 1}, + .MOD_U_W = { 618, 1}, + .MOD_U_D = { 619, 1}, + .MADDV_B = { 620, 1}, + .MADDV_H = { 621, 1}, + .MADDV_W = { 622, 1}, + .MADDV_D = { 623, 1}, + .MSUBV_B = { 624, 1}, + .MSUBV_H = { 625, 1}, + .MSUBV_W = { 626, 1}, + .MSUBV_D = { 627, 1}, + .DOTP_S_H = { 628, 1}, + .DOTP_S_W = { 629, 1}, + .DOTP_S_D = { 630, 1}, + .DOTP_U_H = { 631, 1}, + .DOTP_U_W = { 632, 1}, + .DOTP_U_D = { 633, 1}, + .AND_V = { 634, 1}, + .OR_V = { 635, 1}, + .NOR_V = { 636, 1}, + .XOR_V = { 637, 1}, + .ANDI_B = { 638, 1}, + .ORI_B = { 639, 1}, + .NORI_B = { 640, 1}, + .XORI_B = { 641, 1}, + .BSEL_V = { 642, 1}, + .BSELI_B = { 643, 1}, + .BMNZ_V = { 644, 1}, + .BMNZI_B = { 645, 1}, + .BMZ_V = { 646, 1}, + .BMZI_B = { 647, 1}, + .CEQ_B = { 648, 1}, + .CEQ_H = { 649, 1}, + .CEQ_W = { 650, 1}, + .CEQ_D = { 651, 1}, + .CLT_S_B = { 652, 1}, + .CLT_S_H = { 653, 1}, + .CLT_S_W = { 654, 1}, + .CLT_S_D = { 655, 1}, + .CLT_U_B = { 656, 1}, + .CLT_U_H = { 657, 1}, + .CLT_U_W = { 658, 1}, + .CLT_U_D = { 659, 1}, + .CLE_S_B = { 660, 1}, + .CLE_S_H = { 661, 1}, + .CLE_S_W = { 662, 1}, + .CLE_S_D = { 663, 1}, + .CLE_U_B = { 664, 1}, + .CLE_U_H = { 665, 1}, + .CLE_U_W = { 666, 1}, + .CLE_U_D = { 667, 1}, + .MIN_S_B = { 668, 1}, + .MIN_S_H = { 669, 1}, + .MIN_S_W = { 670, 1}, + .MIN_S_D = { 671, 1}, + .MIN_U_B = { 672, 1}, + .MIN_U_H = { 673, 1}, + .MIN_U_W = { 674, 1}, + .MIN_U_D = { 675, 1}, + .MAX_S_B = { 676, 1}, + .MAX_S_H = { 677, 1}, + .MAX_S_W = { 678, 1}, + .MAX_S_D = { 679, 1}, + .MAX_U_B = { 680, 1}, + .MAX_U_H = { 681, 1}, + .MAX_U_W = { 682, 1}, + .MAX_U_D = { 683, 1}, + .SLL_B = { 684, 1}, + .SLL_H = { 685, 1}, + .SLL_W = { 686, 1}, + .SLL_D = { 687, 1}, + .SRL_B = { 688, 1}, + .SRL_H = { 689, 1}, + .SRL_W = { 690, 1}, + .SRL_D = { 691, 1}, + .SRA_B = { 692, 1}, + .SRA_H = { 693, 1}, + .SRA_W = { 694, 1}, + .SRA_D = { 695, 1}, + .SLLI_B = { 696, 1}, + .SLLI_H = { 697, 1}, + .SLLI_W = { 698, 1}, + .SLLI_D = { 699, 1}, + .SRLI_B = { 700, 1}, + .SRLI_H = { 701, 1}, + .SRLI_W = { 702, 1}, + .SRLI_D = { 703, 1}, + .SRAI_B = { 704, 1}, + .SRAI_H = { 705, 1}, + .SRAI_W = { 706, 1}, + .SRAI_D = { 707, 1}, + .FADD_W = { 708, 1}, + .FADD_D = { 709, 1}, + .FSUB_W = { 710, 1}, + .FSUB_D = { 711, 1}, + .FMUL_W = { 712, 1}, + .FMUL_D = { 713, 1}, + .FDIV_W = { 714, 1}, + .FDIV_D = { 715, 1}, + .FSQRT_W = { 716, 1}, + .FSQRT_D = { 717, 1}, + .FRSQRT_W = { 718, 1}, + .FRSQRT_D = { 719, 1}, + .FRCP_W = { 720, 1}, + .FRCP_D = { 721, 1}, + .FRINT_W = { 722, 1}, + .FRINT_D = { 723, 1}, + .FMAX_W = { 724, 1}, + .FMAX_D = { 725, 1}, + .FMIN_W = { 726, 1}, + .FMIN_D = { 727, 1}, + .FCEQ_W = { 728, 1}, + .FCEQ_D = { 729, 1}, + .FCNE_W = { 730, 1}, + .FCNE_D = { 731, 1}, + .FCLT_W = { 732, 1}, + .FCLT_D = { 733, 1}, + .FCLE_W = { 734, 1}, + .FCLE_D = { 735, 1}, + .FFINT_S_W = { 736, 1}, + .FFINT_S_D = { 737, 1}, + .FFINT_U_W = { 738, 1}, + .FFINT_U_D = { 739, 1}, + .FTRUNC_S_W = { 740, 1}, + .FTRUNC_S_D = { 741, 1}, + .FTRUNC_U_W = { 742, 1}, + .FTRUNC_U_D = { 743, 1}, + .FCVT_S_W = { 744, 1}, + .FCVT_S_D = { 745, 1}, + .FCVT_D_W = { 746, 1}, + .LD_B = { 747, 1}, + .LD_H = { 748, 1}, + .LD_W = { 749, 1}, + .LD_D = { 750, 1}, + .ST_B = { 751, 1}, + .ST_H = { 752, 1}, + .ST_W = { 753, 1}, + .ST_D = { 754, 1}, + .LDI_B = { 755, 1}, + .LDI_H = { 756, 1}, + .LDI_W = { 757, 1}, + .LDI_D = { 758, 1}, + .COPY_S_B = { 759, 1}, + .COPY_S_H = { 760, 1}, + .COPY_S_W = { 761, 1}, + .COPY_U_B = { 762, 1}, + .COPY_U_H = { 763, 1}, + .COPY_U_W = { 764, 0}, + .INSERT_B = { 764, 1}, + .INSERT_H = { 765, 1}, + .INSERT_W = { 766, 1}, + .INSERT_D = { 767, 0}, + .INSVE_B = { 767, 1}, + .INSVE_H = { 768, 1}, + .INSVE_W = { 769, 1}, + .INSVE_D = { 770, 1}, + .SHF_B = { 771, 1}, + .SHF_H = { 772, 1}, + .SHF_W = { 773, 1}, + .VSHF_B = { 774, 1}, + .VSHF_H = { 775, 1}, + .VSHF_W = { 776, 1}, + .VSHF_D = { 777, 1}, + .SLD_B = { 778, 1}, + .SLD_H = { 779, 1}, + .SLD_W = { 780, 1}, + .SLD_D = { 781, 1}, + .SLDI_B = { 782, 1}, + .SLDI_H = { 783, 1}, + .SLDI_W = { 784, 1}, + .SLDI_D = { 785, 1}, + .SPLAT_B = { 786, 1}, + .SPLAT_H = { 787, 1}, + .SPLAT_W = { 788, 1}, + .SPLAT_D = { 789, 1}, + .SPLATI_B = { 790, 1}, + .SPLATI_H = { 791, 1}, + .SPLATI_W = { 792, 1}, + .SPLATI_D = { 793, 1}, + .BZ_V = { 794, 0}, + .BNZ_V = { 794, 0}, + .BZ_B = { 794, 0}, + .BZ_H = { 794, 0}, + .BZ_W = { 794, 0}, + .BZ_D = { 794, 0}, + .BNZ_B = { 794, 0}, + .BNZ_H = { 794, 0}, + .BNZ_W = { 794, 0}, + .BNZ_D = { 794, 0}, + .NLOC_B = { 794, 1}, + .NLOC_H = { 795, 1}, + .NLOC_W = { 796, 1}, + .NLOC_D = { 797, 1}, + .NLZC_B = { 798, 1}, + .NLZC_H = { 799, 1}, + .NLZC_W = { 800, 1}, + .NLZC_D = { 801, 1}, + .PCNT_B = { 802, 1}, + .PCNT_H = { 803, 1}, + .PCNT_W = { 804, 1}, + .PCNT_D = { 805, 1}, + .VMOV_S = { 806, 1}, + .VMOV_P = { 807, 1}, + .VMOV_T = { 808, 1}, + .VMOV_Q = { 809, 1}, + .LV_S = { 810, 1}, + .LV_Q = { 811, 1}, + .SV_S = { 812, 1}, + .SV_Q = { 813, 1}, + .LVL_Q = { 814, 1}, + .LVR_Q = { 815, 1}, + .SVL_Q = { 816, 1}, + .SVR_Q = { 817, 1}, + .VIIM_S = { 818, 1}, + .VFIM_S = { 819, 1}, + .VADD_S = { 820, 1}, + .VADD_P = { 821, 1}, + .VADD_T = { 822, 1}, + .VADD_Q = { 823, 1}, + .VSUB_S = { 824, 1}, + .VSUB_P = { 825, 1}, + .VSUB_T = { 826, 1}, + .VSUB_Q = { 827, 1}, + .VMUL_S = { 828, 1}, + .VMUL_P = { 829, 1}, + .VMUL_T = { 830, 1}, + .VMUL_Q = { 831, 1}, + .VDIV_S = { 832, 1}, + .VDIV_P = { 833, 1}, + .VDIV_T = { 834, 1}, + .VDIV_Q = { 835, 1}, + .VABS_S = { 836, 1}, + .VABS_P = { 837, 1}, + .VABS_T = { 838, 1}, + .VABS_Q = { 839, 1}, + .VNEG_S = { 840, 1}, + .VNEG_P = { 841, 1}, + .VNEG_T = { 842, 1}, + .VNEG_Q = { 843, 1}, + .VSQRT_S = { 844, 1}, + .VRCP_S = { 845, 1}, + .VRCP_P = { 846, 1}, + .VRCP_T = { 847, 1}, + .VRCP_Q = { 848, 1}, + .VRSQ_S = { 849, 1}, + .VRSQ_P = { 850, 1}, + .VRSQ_T = { 851, 1}, + .VRSQ_Q = { 852, 1}, + .VDOT_P = { 853, 1}, + .VDOT_T = { 854, 1}, + .VDOT_Q = { 855, 1}, + .VSCL_P = { 856, 1}, + .VSCL_T = { 857, 1}, + .VSCL_Q = { 858, 1}, + .VHDP_P = { 859, 1}, + .VHDP_T = { 860, 1}, + .VHDP_Q = { 861, 1}, + .VAVG_P = { 862, 1}, + .VAVG_T = { 863, 1}, + .VAVG_Q = { 864, 1}, + .VFAD_P = { 865, 1}, + .VFAD_T = { 866, 1}, + .VFAD_Q = { 867, 1}, + .VMMUL_P = { 868, 1}, + .VMMUL_T = { 869, 1}, + .VMMUL_Q = { 870, 1}, + .VTFM2_P = { 871, 1}, + .VTFM3_T = { 872, 1}, + .VTFM4_Q = { 873, 1}, + .VHTFM2_P = { 874, 1}, + .VHTFM3_T = { 875, 1}, + .VHTFM4_Q = { 876, 1}, + .VMSCL_P = { 877, 1}, + .VMSCL_T = { 878, 1}, + .VMSCL_Q = { 879, 1}, + .VMMOV_P = { 880, 1}, + .VMMOV_T = { 881, 1}, + .VMMOV_Q = { 882, 1}, + .VMIDT_P = { 883, 1}, + .VMIDT_T = { 884, 1}, + .VMIDT_Q = { 885, 1}, + .VMZERO_P = { 886, 1}, + .VMZERO_T = { 887, 1}, + .VMZERO_Q = { 888, 1}, + .VMONE_P = { 889, 1}, + .VMONE_T = { 890, 1}, + .VMONE_Q = { 891, 1}, + .VCRS_T = { 892, 1}, + .VCRSP_T = { 893, 1}, + .VQMUL_Q = { 894, 1}, + .VCMP_S = { 895, 1}, + .VCMP_P = { 896, 1}, + .VCMP_T = { 897, 1}, + .VCMP_Q = { 898, 1}, + .VMIN_S = { 899, 1}, + .VMIN_P = { 900, 1}, + .VMIN_T = { 901, 1}, + .VMIN_Q = { 902, 1}, + .VMAX_S = { 903, 1}, + .VMAX_P = { 904, 1}, + .VMAX_T = { 905, 1}, + .VMAX_Q = { 906, 1}, + .VSIN_S = { 907, 1}, + .VCOS_S = { 908, 1}, + .VEXP2_S = { 909, 1}, + .VLOG2_S = { 910, 1}, + .VASIN_S = { 911, 1}, + .VNRCP_S = { 912, 1}, + .VNSIN_S = { 913, 1}, + .VREXP2_S = { 914, 1}, + .VSGN_S = { 915, 1}, + .VI2F_S = { 916, 1}, + .VI2F_P = { 917, 1}, + .VI2F_T = { 918, 1}, + .VI2F_Q = { 919, 1}, + .VF2IN_S = { 920, 1}, + .VF2IN_P = { 921, 1}, + .VF2IN_T = { 922, 1}, + .VF2IN_Q = { 923, 1}, + .VF2IZ_S = { 924, 1}, + .VF2IZ_P = { 925, 1}, + .VF2IZ_T = { 926, 1}, + .VF2IZ_Q = { 927, 1}, + .VF2IU_S = { 928, 1}, + .VF2IU_P = { 929, 1}, + .VF2IU_T = { 930, 1}, + .VF2IU_Q = { 931, 1}, + .VF2ID_S = { 932, 1}, + .VF2ID_P = { 933, 1}, + .VF2ID_T = { 934, 1}, + .VF2ID_Q = { 935, 1}, + .VF2H_P = { 936, 1}, + .VH2F_S = { 937, 1}, + .VFLUSH = { 938, 1}, + .VSYNC = { 939, 1}, + .VNOP = { 940, 1}, + .VPFXS = { 941, 1}, + .VPFXT = { 942, 1}, + .VPFXD = { 943, 1}, + .VCST_S = { 944, 1}, + .VCST_P = { 945, 1}, + .VCST_T = { 946, 1}, + .VCST_Q = { 947, 1}, + .MFV = { 948, 1}, + .MTV = { 949, 1}, + .MFVC = { 950, 1}, + .MTVC = { 951, 1}, + .BVF = { 952, 1}, + .BVT = { 953, 1}, + .BVFL = { 954, 1}, + .BVTL = { 955, 1}, } diff --git a/core/rexcode/mips/tablegen/specgen.lua b/core/rexcode/mips/tablegen/specgen.lua index 7d2b0cd9c..f33b66f28 100644 --- a/core/rexcode/mips/tablegen/specgen.lua +++ b/core/rexcode/mips/tablegen/specgen.lua @@ -219,6 +219,52 @@ for _, b in ipairs({{"FCVT_D_W","cvt.d.w","FPR_D","FPR_W"},{"FCVT_S_D","cvt.s.d" if r then sections[#sections+1]=r end end +-- ---- DSP ASE two-register (Rd, Rt) ---------------------------------------- +for _, b in ipairs({ + {"PRECEQU_PH_QBLA","precequ.ph.qbla"},{"PRECEQU_PH_QBRA","precequ.ph.qbra"}, + {"PRECEU_PH_QBLA","preceu.ph.qbla"},{"PRECEU_PH_QBRA","preceu.ph.qbra"}, + {"REPLV_PH","replv.ph"},{"REPLV_QB","replv.qb"}, +}) do + local r = entry(b[1], "{.GPR,.GPR,.NONE,.NONE}", "{.RD,.RT,.NONE,.NONE}", "DSP_R2", + function(v) return string.format("%s $%d,$%d", b[2], v[1], v[2]) end, {31,31}) + if r then sections[#sections+1]=r end +end + +-- ---- FPU fused multiply-add (COP1X 4-register: fd, fr, fs, ft) ------------- +for _, b in ipairs({{"MADD","madd"},{"MSUB","msub"},{"NMADD","nmadd"},{"NMSUB","nmsub"}}) do + for _, f in ipairs({{"S","s","FPR_S"},{"D","d","FPR_D"}}) do + local r = entry(b[1].."_"..f[1], "{."..f[3]..",."..f[3]..",."..f[3]..",."..f[3].."}", "{.FD,.FR,.FS,.FT}", "FPU", + function(v) return string.format("%s.%s $f%d,$f%d,$f%d,$f%d", b[2], f[2], v[1], v[2], v[3], v[4]) end, {31,31,31,31}) + if r then sections[#sections+1]=r end + end +end + +-- ---- MSA COPY (vector lane -> GPR) and INSERT (GPR -> vector lane) ---------- +for _, b in ipairs({{"COPY_S","copy_s"},{"COPY_U","copy_u"}}) do + for _, d in ipairs({{"B","b",15},{"H","h",7},{"W","w",3}}) do + local r = entry(b[1].."_"..d[1], "{.GPR,.MSA_VEC,.IMM5,.NONE}", "{.GPR_AT_6,.WS,.MSA_ELM_IDX,.NONE}", "MSA", + function(v) return string.format("%s.%s $%d,$w%d[%d]", b[2], d[2], v[1], v[2], v[3]) end, {31,31,d[3]}) + if r then sections[#sections+1]=r end + end +end +for _, d in ipairs({{"B","b",15},{"H","h",7},{"W","w",3}}) do + local r = entry("INSERT_"..d[1], "{.MSA_VEC,.GPR,.IMM5,.NONE}", "{.WD,.GPR_AT_11,.MSA_ELM_IDX,.NONE}", "MSA", + function(v) return string.format("insert.%s $w%d[%d],$%d", d[2], v[1], v[3], v[2]) end, {31,31,d[3]}) + if r then sections[#sections+1]=r end +end + +-- ---- Misc control: DI/EI (rt), RDHWR (rt, rd) ------------------------------ +for _, b in ipairs({{"DI","di"},{"EI","ei"}}) do + local r = entry(b[1], "{.GPR,.NONE,.NONE,.NONE}", "{.RT,.NONE,.NONE,.NONE}", "MIPS32_R2", + function(v) return string.format("%s $%d", b[2], v[1]) end, {31}) + if r then sections[#sections+1]=r end +end +do + local r = entry("RDHWR", "{.GPR,.GPR,.NONE,.NONE}", "{.RT,.RD,.NONE,.NONE}", "MIPS32_R2", + function(v) return string.format("rdhwr $%d,$%d", v[1], v[2]) end, {31,31}) + if r then sections[#sections+1]=r end +end + -- ---- splice into the SoT --------------------------------------------------- local region = " // SPECGEN:BEGIN\n" .. table.concat(sections, "\n") .. "\n // SPECGEN:END" local fh = assert(io.open(TABLE, "r")); local src = fh:read("*a"); fh:close() diff --git a/core/rexcode/mips/tables/mips.encode_forms.bin b/core/rexcode/mips/tables/mips.encode_forms.bin index 52d5169cb..ae2778287 100644 Binary files a/core/rexcode/mips/tables/mips.encode_forms.bin and b/core/rexcode/mips/tables/mips.encode_forms.bin differ diff --git a/core/rexcode/mips/tables/mips.encode_runs.bin b/core/rexcode/mips/tables/mips.encode_runs.bin index ae38bfeb2..72f3d8f37 100644 Binary files a/core/rexcode/mips/tables/mips.encode_runs.bin and b/core/rexcode/mips/tables/mips.encode_runs.bin differ diff --git a/core/rexcode/mips/tables/mips.entries.bin b/core/rexcode/mips/tables/mips.entries.bin index 29b1fe98a..e051be632 100644 Binary files a/core/rexcode/mips/tables/mips.entries.bin and b/core/rexcode/mips/tables/mips.entries.bin differ diff --git a/core/rexcode/mips/tables/mips.idx_cop1.bin b/core/rexcode/mips/tables/mips.idx_cop1.bin index d06c0c5fa..98de5f986 100644 Binary files a/core/rexcode/mips/tables/mips.idx_cop1.bin and b/core/rexcode/mips/tables/mips.idx_cop1.bin differ diff --git a/core/rexcode/mips/tables/mips.idx_primary.bin b/core/rexcode/mips/tables/mips.idx_primary.bin index 1bf73ef8b..d7a76390e 100644 Binary files a/core/rexcode/mips/tables/mips.idx_primary.bin and b/core/rexcode/mips/tables/mips.idx_primary.bin differ diff --git a/core/rexcode/mips/tables/mips.idx_special2.bin b/core/rexcode/mips/tables/mips.idx_special2.bin index 8454bd15d..de9b3a914 100644 Binary files a/core/rexcode/mips/tables/mips.idx_special2.bin and b/core/rexcode/mips/tables/mips.idx_special2.bin differ diff --git a/core/rexcode/mips/tables/mips.idx_special3.bin b/core/rexcode/mips/tables/mips.idx_special3.bin index fd24d41a9..6421853e6 100644 Binary files a/core/rexcode/mips/tables/mips.idx_special3.bin and b/core/rexcode/mips/tables/mips.idx_special3.bin differ