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Fix register width test for risc-v, and improve operand slot type inference for risc-v

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This commit is contained in:
gingerBill
2026-08-21 00:38:34 +01:00
parent 09204e8982
commit de8c0dc4fe
5 changed files with 54 additions and 14 deletions
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4
src/asm_tables_amd64.cpp
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@@ -555,6 +555,10 @@ struct Asm_amd64 {
return 0;
}
bool integer_reg_width_is_exact() const {
return true;
}
AsmOperandKind kind_from_operand_type(OperandType type) const {
switch (type) {
case OP_R8: case OP_R16: case OP_R32: case OP_R64: