Commit Graph

22 Commits

Author SHA1 Message Date
Brendan Punsky
47fc72e0ba rexcode: 100% generated mnemonic-builder coverage; drop hand-written collisions
Every mnemonic with an encode form now has a generated inst_<mnem>/emit_<mnem> overload group. The per-arch generators map ALL operand types — nothing is skipped: arm64 gains shifted/extended registers (multi-param via op_shifted/op_extended), SVE Z-regs + predicates, SME tile/slice, NEON arrangements/lanes, bitmask/sysreg/pattern immediates and condition codes (427 -> 777 mnemonics); arm32 gains shifted/register-shifted regs, register lists, NEON lanes and all encoded-immediate subclasses (479 -> 592); x86 gains m80 and descriptor-table memory operands — FBLD/FBSTP, LGDT/SGDT/LIDT/SIDT, FLD/FSTP, far-indirect JMP/CALL, BOUND (1167 -> 1175).

Mnemonic-specific builders are now fully generated, not hand-written: deleted the hand-written helpers the generated groups collided with — riscv inst_jal/inst_jalr, arm64 inst_b_cond/inst_cbz/inst_tbz/inst_csel, mos6502 inst_tst — and let the generators own those names (arm64 also gains inst_cbnz/tbnz/csinc/csinv/csneg). Updated the affected test call-sites. The generic operand-shape helpers (inst_r_r, inst_r_r_i, inst_ldst, ...) remain as delegation targets.

Decode-only mnemonics with no encode form are correctly left without builders. ppc/ppc_vle/rsp/mos65816 were already complete.

All 10 ISAs: structure + compile + tests pass; generators idempotent.
2026-06-15 12:52:10 -04:00
Brendan Punsky
1b72d425d4 rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen
Add generated mnemonic_builders.odin (inst_<mnem>/emit_<mnem> typed overload sets) for arm32, arm64, mips, riscv, ppc, ppc_vle, rsp, mos6502 and mos65816, matching the existing x86 builders. Each is produced by a per-arch tools/gen_mnemonic_builders.odin that walks ENCODE_FORMS and maps operand types to typed params + op_* constructors.

Anchor every generator's output via #directory so regeneration is CWD-independent; previously the bare "mnemonic_builders.odin" path wrote to the current directory and misfired when run from the repo root.

Wire a --builders task into build.lua (folded into 'all', covered by --idempotent, enforced by the structural invariants) and document it in the README.
2026-06-15 12:52:10 -04:00
gingerBill
f895e96bde Add benchmark flag for x86 tests to just test that 2026-06-15 14:17:11 +01:00
gingerBill
2dd262ea10 x86: improve benchmark test do not run the code on Windows since it relies in SysV 2026-06-15 14:14:38 +01:00
gingerBill
61c869833e Minimize x86.Instruction size to be 64-bytes rather than 72-bytes 2026-06-15 14:13:56 +01:00
gingerBill
5400b0f610 rexcode/x86: Add more @(rodata) usage 2026-06-15 13:49:57 +01:00
Flāvius
a4f08f8307 Load rexcode encode/decode tables from committed binary blobs
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives
in a per-arch tablegen/ metaprogram that flattens it and serializes committed
binary blobs; the library #loads those into @(rodata) at compile time rather
than compiling a table body. No arch keeps encoding_table.odin or
decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin.

* Two-stage, type-checked pipeline: tablegen Stage A emits human-readable
  generated Odin, which compiles and serializes the blobs in Stage B.
* encode() goes through encoding_forms(m); decoders are unchanged apart from
  x86's flattened 2-D index. Decode tables are byte-identical to the old ones.
* build.lua: a LuaJIT driver for the metaprograms, validations, and tests,
  with cross-platform gating and a clear report.
* Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md
  trimmed to what was actually built.
* Attribution headers added to all rexcode source files; the generators emit
  them so generated files keep them.
2026-06-15 07:43:29 -04:00
gingerBill
5c9cd0146d Add @(require_results) to operand procedures 2026-06-14 21:57:27 +01:00
gingerBill
611cc807cd Add @(require_results) to instruction procedures 2026-06-14 21:54:24 +01:00
gingerBill
ced500fc94 Add fmt formatting to the Instruction.operands 2026-06-14 21:52:14 +01:00
gingerBill
695dd62b58 Align instruction helpers 2026-06-14 21:01:51 +01:00
gingerBill
15a426c6b3 Minor code style changes 2026-06-14 21:00:38 +01:00
gingerBill
2f0c1457e5 Make x86 decoding tables very uniform and orderly 2026-06-14 20:46:27 +01:00
gingerBill
19bc584a0d Manually format the x86 encoding table 2026-06-14 20:05:10 +01:00
gingerBill
ce3ff285b6 Minor style improvement 2026-06-14 19:50:32 +01:00
gingerBill
efa535eec2 Minor clean up of the mnemonics code 2026-06-14 19:48:02 +01:00
gingerBill
340fb4f697 Clean up x86 decoding tables 2026-06-14 19:39:34 +01:00
gingerBill
1adbd0dcb4 Improve formatting for x86 tables and minimize outputting "zero" entries 2026-06-14 19:16:53 +01:00
gingerBill
c49e296f5e Update doc files 2026-06-14 18:24:59 +01:00
gingerBill
a116f69b7e Use core:mem/virtual instead of the posix specific calls 2026-06-14 17:14:14 +01:00
gingerBill
2e58cc51d9 Improve mnemonic_builders for x86 2026-06-14 17:03:19 +01:00
gingerBill
d6ae77b67e core:rexcode 2026-06-14 16:30:18 +01:00