Commit Graph

80 Commits

Author SHA1 Message Date
Antonino Simone Di Stefano
357c8f6f34 Replace "." with "," in parameter list 2024-09-22 23:19:36 +02:00
Karl Zylinski
19f0127e55 Moved all packages in core, base, vendor, tests and examples to use new #+ file tag syntax. 2024-09-14 18:27:49 +02:00
Laytan Laats
58e5078b66 add riscv to simd.IS_EMULATED 2024-08-22 14:17:45 +02:00
Yawning Angel
7020e9b66a core/simd: Add IS_EMULTATED so there is one place to look for potatos 2024-08-18 22:52:39 +09:00
gingerBill
f56abf3780 Add intrinsics.masked_expand_load and intrinsics.masked_compress_store 2024-08-05 14:54:09 +01:00
gingerBill
78919f8524 Fix typos 2024-08-05 14:48:55 +01:00
gingerBill
84ac56f778 Add intrinsics.simd_masked_load and intrinsics.simd_masked_store 2024-08-05 14:08:41 +01:00
gingerBill
7e701d1677 Add intrinsics.simd_gather and `intrinsics.simd_scatter 2024-08-05 13:46:24 +01:00
gingerBill
b67ed78afd add_sat -> saturating_add 2024-08-05 13:21:27 +01:00
gingerBill
90fc52c2ee Rename add_sat -> saturating_add 2024-08-05 13:19:01 +01:00
gingerBill
9a01a13914 Add simd_reduce_any and simd_reduce_all 2024-08-05 13:13:19 +01:00
Yawning Angel
69026852ce core/crypto/aes: Add Intel AES-NI support
This supports AES-NI + PCLMUL, and provides optimized key schedule, ECB,
CTR, and GCM.  Other modes are trivial to add later if required.
2024-07-16 01:29:43 +09:00
Yawning Angel
f578994fa6 core/simd/x86: Make the AES-NI intrinsics consistent with Intel 2024-07-16 01:29:43 +09:00
Yawning Angel
390cd3c30d core/simd/x86: Fix some intrinsics
- _mm_slli_si128 produced totally incorrect output
- _mm_storeu_si128 refered to a LLVM intrinsic that is missing
2024-07-16 01:29:43 +09:00
Jeroen van Rijn
7b31acd2d7 Let simd/x86 pass new transmute/cast vet. 2024-07-09 16:50:55 +02:00
Yawning Angel
f49575f1fb core/simd/x86: Add the AES-NI intrinsics 2024-06-01 22:55:42 +09:00
gingerBill
1b593fc1ca Correct core:intrinsics to base:intrinsics 2024-05-13 13:27:44 +01:00
Laytan Laats
25f1d0906d compiler: improve target features support 2024-05-02 00:59:52 +02:00
gingerBill
3e7e779abf Replace core:* to base:* where appropriate 2024-01-28 22:18:51 +00:00
Yawning Angel
8d7c37e384 core/simd/x86: Use the none calling convention for intrinsics
The LLVM intrinsics that live under `llvm.x86` are not actual functions,
so trying to invoke them as such using the platform's native C
calling convention causes incorrect types to be emitted in the IR.

Thanks to laytanl for assistance in testing.
2024-01-07 20:04:40 +09:00
Yawning Angel
9235e82451 core/simd/x86: Correct a target feature name 2024-01-07 20:04:40 +09:00
jakubtomsu
b06583133a Fix the other bit_* intrinsic calls 2023-10-22 20:59:19 +02:00
jakubtomsu
a2e6fc5909 change and_not to bit_and_not 2023-10-22 20:52:35 +02:00
gingerBill
63f755554b Rename simd bitwise operations from intrinsics.simd_and to intrinsics.simd_bit_and etc 2023-09-28 16:42:08 +01:00
Jeroen van Rijn
d5f94d73ad [sys/info] Initial version. 2022-09-01 00:43:47 +02:00
gingerBill
bb7f291f5f Remove simd_rem; Disallow simd_div for integers 2022-06-02 12:10:43 +01:00
gingerBill
4e49d24df9 Add enable_target_feature to ABM 2022-05-30 16:08:06 +01:00
gingerBill
68222cb8ab Add SSE4.2 2022-05-30 16:06:31 +01:00
gingerBill
912d29af83 Add @(require_results) to all appropriate procedures 2022-05-30 15:59:48 +01:00
gingerBill
51707032d1 Add SSE4.1 2022-05-30 15:17:02 +01:00
gingerBill
f3aefbc443 @(require_target_feature=<string>) @(enable_target_feature=<string>)
require_target_feature - required by the target micro-architecture
enable_target_feature - will be enabled for the specified procedure only
2022-05-30 14:53:12 +01:00
gingerBill
cef022539e Rename to lanes_rotate_left, lanes_rotate_right, lanes_reverse 2022-05-29 15:13:14 +01:00
gingerBill
f6dfa33697 Use single line attributes 2022-05-29 15:11:15 +01:00
gingerBill
bc3bf939e0 Add sha.odin 2022-05-29 14:56:25 +01:00
gingerBill
f5e5eac3b9 Add cmpxchg16b 2022-05-29 14:46:05 +01:00
gingerBill
0ccbea17aa Add pclmulqdq.odin 2022-05-29 13:50:54 +01:00
gingerBill
babfba5e8f Add rdtsc.odin 2022-05-29 13:48:20 +01:00
gingerBill
846f8377b2 Add fxsr.odin 2022-05-29 13:44:00 +01:00
gingerBill
77d4409549 Add adx.odin 2022-05-29 13:40:16 +01:00
gingerBill
7f3540b7f5 Add abm.odin 2022-05-29 13:36:55 +01:00
gingerBill
3ad2cde833 Add amd64 specific instructions 2022-05-29 13:34:59 +01:00
gingerBill
910799cc5f Add cpu_features for core:simd/x86 2022-05-28 15:54:41 +01:00
gingerBill
d7eaf0f87b Add intrinsics.x86_cpuid and intrinsics.x86_xgetbv 2022-05-28 15:41:11 +01:00
gingerBill
4db533ff71 Add ssse3 support 2022-05-27 23:07:33 +01:00
gingerBill
026540040d Add SSE3 support 2022-05-27 23:00:52 +01:00
gingerBill
8518d3b232 Rename to non_temporaral_* 2022-05-27 22:57:16 +01:00
gingerBill
1c1f5e2231 Complete SSE2 2022-05-27 22:56:11 +01:00
gingerBill
20c5033b38 Add pack and unpack 2022-05-27 17:07:48 +01:00
gingerBill
20fe6d102a Add load and stores and sets 2022-05-27 16:58:35 +01:00
gingerBill
4e30a64d9f Add more sse2 intrinsics 2022-05-27 16:49:52 +01:00