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New mips specgen (llvm-mc --triple=mips --mattr=+msa as the bits oracle, big-endian words, empirical masks): vector FP arithmetic/compare FADD/ FSUB/FMUL/FDIV/FMAX/FMIN/FCEQ/FCLE/FCLT/FCNE (.W/.D), dot product DOTP_S/U (.H/.W/.D), count/popcount NLOC/NLZC/PCNT (.B/.H/.W/.D), one-source FP FSQRT/FRSQRT/FRCP/FRINT/FTRUNC_S/U/FFINT_S/U (.W/.D), and bit-select BMNZ/BMZ/BSEL.V. 57 forms reusing the existing WD/WS/WT slots. Spot- checked byte-exact vs llvm-mc and decode-clean; 281 tests green.
114 lines
5.4 KiB
Lua
114 lines
5.4 KiB
Lua
#!/usr/bin/env luajit
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-- rexcode · Brendan Punsky (dotbmp@github), original author
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--
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-- Encode-form spec generator (MIPS / MSA). Expands compact per-family specs
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-- into ENCODING_TABLE entries, deriving `bits` from llvm-mc (the oracle) and
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-- `mask` empirically: assemble each form all-zero, then one variant per operand
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-- field at its max register, and mask = ~(union of the deltas). MIPS words are
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-- big-endian. Each MSA element format (.B/.H/.W/.D) is a distinct mnemonic
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-- (e.g. FADD_W / FADD_D), so the data-format suffix is part of the name.
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--
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-- Output replaces the SPECGEN:BEGIN..SPECGEN:END region of encoding_table.odin.
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--
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-- Run: luajit tablegen/specgen.lua (from mips/, or with a full path)
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local bit = require("bit")
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local LLVM = "llvm-mc --assemble --triple=mips --mattr=+msa --show-encoding"
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local DIR = (arg[0]:match("^(.*)/[^/]*$")) or "."
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local TABLE = DIR .. "/encoding_table.odin"
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local function word(line)
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local p = io.popen(string.format("printf '%%s\\n' '%s' | %s 2>/dev/null", line, LLVM))
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local out = p:read("*a"); p:close()
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local b1,b2,b3,b4 = out:match("0x(%x%x),0x(%x%x),0x(%x%x),0x(%x%x)")
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if not b1 then return nil end
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return tonumber(b1..b2..b3..b4, 16) -- big-endian: first byte is MSB
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end
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local function mask_of(base, variants)
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local x = 0
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for _, w in ipairs(variants) do x = bit.bor(x, bit.bxor(base, w)) end
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return bit.band(bit.bnot(x), 0xFFFFFFFF)
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end
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local sections, skips, n_forms = {}, {}, 0
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-- Emit one mnemonic's single-form entry from an asm builder + per-field maxes.
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-- ops/enc are the prebuilt "{.A,.B,.C,.NONE}" text. asm(vals) returns the asm
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-- (vals[i] = register number for field i); maxes[i] = max register for field i.
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local function entry(mnem, ops, enc, feat, asm, maxes)
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local zero = {}; for i=1,#maxes do zero[i]=0 end
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local b0 = word(asm(zero))
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if not b0 then skips[#skips+1]=mnem; return nil end
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local vs = {}
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for i=1,#maxes do
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local v={}; for j=1,#maxes do v[j]=0 end; v[i]=maxes[i]
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local w=word(asm(v)); if not w then skips[#skips+1]=mnem; return nil end; vs[#vs+1]=w
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end
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n_forms = n_forms + 1
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return string.format(" .%s = { {.%s, %s, %s, 0x%s, 0x%s, .%s, {}} },",
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mnem, mnem, ops, enc, bit.tohex(b0):upper(), bit.tohex(mask_of(b0,vs)):upper(), feat)
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end
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-- A vector 3-register family: Wd, Ws, Wt (each a .B/.H/.W/.D variant).
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local OPS3 = "{.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}"
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local ENC3 = "{.WD,.WS,.WT,.NONE}"
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local OPS2 = "{.MSA_VEC,.MSA_VEC,.NONE,.NONE}"
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local ENC2 = "{.WD,.WS,.NONE,.NONE}"
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-- emit a family across data-format suffixes.
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-- base = uppercase stem (FADD); low = lowercase asm stem (fadd)
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-- dfs = list of {SUFFIX, asm_token} (e.g. {"W","w"})
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-- three = 3-register (else 2-register)
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local function family(base, low, dfs, three)
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local rows = {}
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local ops = three and OPS3 or ENC3 and (three and OPS3 or OPS2)
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for _, d in ipairs(dfs) do
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local mnem = base .. "_" .. d[1]
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local function asm(v)
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if three then return string.format("%s.%s $w%d,$w%d,$w%d", low, d[2], v[1], v[2], v[3]) end
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return string.format("%s.%s $w%d,$w%d", low, d[2], v[1], v[2])
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end
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local r = entry(mnem, three and OPS3 or OPS2, three and ENC3 or ENC2, "MSA", asm, three and {31,31,31} or {31,31})
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if r then rows[#rows+1] = r end
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end
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for _, r in ipairs(rows) do sections[#sections+1] = r end
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end
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local WD = {{"W","w"},{"D","d"}} -- 3RF / 2RF data formats
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local HWD = {{"H","h"},{"W","w"},{"D","d"}} -- 3R (no byte) data formats
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local BHWD = {{"B","b"},{"H","h"},{"W","w"},{"D","d"}}
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-- ---- 3RF: vector floating-point arithmetic / compare (Wd, Ws, Wt; .W/.D) ----
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for _, b in ipairs({
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{"FADD","fadd"},{"FSUB","fsub"},{"FMUL","fmul"},{"FDIV","fdiv"},
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{"FMAX","fmax"},{"FMIN","fmin"},
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{"FCEQ","fceq"},{"FCLE","fcle"},{"FCLT","fclt"},{"FCNE","fcne"},
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}) do family(b[1], b[2], WD, true) end
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-- ---- 3R: signed/unsigned dot product (Wd, Ws, Wt; .H/.W/.D) -----------------
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for _, b in ipairs({{"DOTP_S","dotp_s"},{"DOTP_U","dotp_u"}}) do family(b[1], b[2], HWD, true) end
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-- ---- VEC: bit-select (no data format) --------------------------------------
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for _, b in ipairs({{"BMNZ_V","bmnz.v"},{"BMZ_V","bmz.v"},{"BSEL_V","bsel.v"}}) do
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local r = entry(b[1], OPS3, ENC3, "MSA", function(v) return string.format("%s $w%d,$w%d,$w%d", b[2], v[1], v[2], v[3]) end, {31,31,31})
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if r then sections[#sections+1] = r end
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end
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-- ---- 2R: count leading ones/zeros, popcount (Wd, Ws; .B/.H/.W/.D) -----------
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for _, b in ipairs({{"NLOC","nloc"},{"NLZC","nlzc"},{"PCNT","pcnt"}}) do family(b[1], b[2], BHWD, false) end
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-- ---- 2RF: vector floating-point one-source (Wd, Ws; .W/.D) ------------------
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for _, b in ipairs({
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{"FSQRT","fsqrt"},{"FRSQRT","frsqrt"},{"FRCP","frcp"},{"FRINT","frint"},
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{"FTRUNC_S","ftrunc_s"},{"FTRUNC_U","ftrunc_u"},{"FFINT_S","ffint_s"},{"FFINT_U","ffint_u"},
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}) do family(b[1], b[2], WD, false) end
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-- ---- splice into the SoT ---------------------------------------------------
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local region = " // SPECGEN:BEGIN\n" .. table.concat(sections, "\n") .. "\n // SPECGEN:END"
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local fh = assert(io.open(TABLE, "r")); local src = fh:read("*a"); fh:close()
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local new, n = src:gsub(" // SPECGEN:BEGIN.- // SPECGEN:END", (region:gsub("%%", "%%%%")))
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if n ~= 1 then io.stderr:write("FATAL: expected one SPECGEN region, found "..n.."\n"); os.exit(1) end
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local wh = assert(io.open(TABLE, "w")); wh:write(new); wh:close()
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io.write(string.format("specgen(mips): wrote %d forms\n", n_forms))
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if #skips > 0 then io.write(" skipped "..#skips.." form(s): "..table.concat(skips, " ").."\n") end
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