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a4f08f8307
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives in a per-arch tablegen/ metaprogram that flattens it and serializes committed binary blobs; the library #loads those into @(rodata) at compile time rather than compiling a table body. No arch keeps encoding_table.odin or decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin. * Two-stage, type-checked pipeline: tablegen Stage A emits human-readable generated Odin, which compiles and serializes the blobs in Stage B. * encode() goes through encoding_forms(m); decoders are unchanged apart from x86's flattened 2-D index. Decode tables are byte-identical to the old ones. * build.lua: a LuaJIT driver for the metaprograms, validations, and tests, with cross-platform gating and a clear report. * Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md trimmed to what was actually built. * Attribution headers added to all rexcode source files; the generators emit them so generated files keep them.
81 lines
2.7 KiB
Odin
81 lines
2.7 KiB
Odin
// rexcode · Brendan Punsky (dotbmp@github), original author
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package rexcode_ppc
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// =============================================================================
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// PowerPC OPERANDS
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// =============================================================================
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//
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// Kind-tagged operand, same shape as other arches. PowerPC-specific notes:
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//
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// * Memory operands cover D-form (RA + signed 16-bit displacement), DS-form
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// (RA + signed 14-bit displacement, scaled by 4), DQ-form (12-bit scaled
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// by 16), X-form (RA + RB indexed), and prefixed (34-bit signed offset).
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//
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// * REGISTER operands carry a single Register; the encoder routes by
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// register class (GPR/FPR/VR/VSR/CR/SPR).
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//
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// * IMMEDIATE i64 is wide enough for 34-bit prefixed immediates and the
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// signed branch displacements.
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//
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// * RELATIVE = label id (pre-resolution) or signed byte offset (post).
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Operand_Kind :: enum u8 {
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NONE,
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REGISTER,
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IMMEDIATE,
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MEMORY,
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RELATIVE,
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}
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// PowerPC memory operand. Covers all D / DS / DQ / X / prefixed forms.
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Memory :: struct #packed {
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base: Register, // RA — base register (R0 may be literal zero in D-form)
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index: Register, // RB for X-form indexed; NONE for D/DS/DQ-form
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disp: i64, // signed displacement (16/14/12 or 34-bit prefixed)
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}
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#assert(size_of(Memory) == 12)
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@(require_results)
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mem_d :: #force_inline proc "contextless" (base: Register, disp: i64) -> Memory {
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return Memory{base = base, index = NONE, disp = disp}
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}
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@(require_results)
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mem_x :: #force_inline proc "contextless" (base, index: Register) -> Memory {
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return Memory{base = base, index = index, disp = 0}
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}
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Operand :: struct #packed {
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using _: struct #raw_union {
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reg: Register,
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mem: Memory,
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immediate: i64,
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relative: i64, // label id (pre) or signed byte offset (post)
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},
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kind: Operand_Kind,
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size: u8, // operand size in bytes (4 = word, 8 = dword)
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_: [2]u8,
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}
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// raw_union size = max(2, 12, 8, 8) = 12; + 1 kind + 1 size + 2 pad = 16 bytes
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@(require_results)
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op_reg :: #force_inline proc "contextless" (r: Register) -> Operand {
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return Operand{reg = r, kind = .REGISTER}
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}
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@(require_results)
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op_imm :: #force_inline proc "contextless" (v: i64) -> Operand {
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return Operand{immediate = v, kind = .IMMEDIATE}
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}
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@(require_results)
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op_mem :: #force_inline proc "contextless" (m: Memory) -> Operand {
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return Operand{mem = m, kind = .MEMORY}
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}
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@(require_results)
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op_label :: #force_inline proc "contextless" (label_id: u32) -> Operand {
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return Operand{relative = i64(label_id), kind = .RELATIVE}
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}
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@(require_results)
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op_rel_offset :: #force_inline proc "contextless" (off: i64) -> Operand {
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return Operand{relative = off, kind = .RELATIVE}
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}
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