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Odin/core/rexcode/wasm/encoding_table.odin
gingerBill 4029702af0 Improve formatting of the ENCODING_TABLE
2026-06-16 14:24:48 +01:00

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// rexcode · Brendan Punsky (dotbmp@github), original author
// Ginger Bill (gingerBill@github)
package rexcode_wasm
// =============================================================================
// WebAssembly ENCODING TABLE (single source of truth)
// =============================================================================
//
// One form per mnemonic, indexed directly by the Mnemonic enum. Each entry
// records the prefix byte, the (sub-)opcode, and the immediate layout. The
// decode dispatch in decoding_tables.odin is derived from this table at
// package init, so opcode bytes are written down exactly once.
//
// The `mnemonic` field of each Encoding is left at INVALID here: the table
// index already identifies the mnemonic and the encoder never reads it back.
@(private="file") CTRL :: Encoding_Flags{control = true}
@(private="file") MEM :: Encoding_Flags{memory = true}
@(rodata)
ENCODING_TABLE := [Mnemonic]Encoding{
.INVALID = {},
// ------------------------------------------------------------------ control
.UNREACHABLE = {prefix = PREFIX_NONE, opcode = 0x00, flags = CTRL},
.NOP = {prefix = PREFIX_NONE, opcode = 0x01},
.BLOCK = {prefix = PREFIX_NONE, opcode = 0x02, imm = {.BLOCKTYPE, .NONE}, flags = CTRL},
.LOOP = {prefix = PREFIX_NONE, opcode = 0x03, imm = {.BLOCKTYPE, .NONE}, flags = CTRL},
.IF = {prefix = PREFIX_NONE, opcode = 0x04, imm = {.BLOCKTYPE, .NONE}, flags = CTRL},
.ELSE = {prefix = PREFIX_NONE, opcode = 0x05, flags = CTRL},
.END = {prefix = PREFIX_NONE, opcode = 0x0B, flags = CTRL},
.BR = {prefix = PREFIX_NONE, opcode = 0x0C, imm = {.IDX, .NONE}, flags = CTRL},
.BR_IF = {prefix = PREFIX_NONE, opcode = 0x0D, imm = {.IDX, .NONE}, flags = CTRL},
.BR_TABLE = {prefix = PREFIX_NONE, opcode = 0x0E, imm = {.BR_TABLE, .NONE}, flags = CTRL},
.RETURN = {prefix = PREFIX_NONE, opcode = 0x0F, flags = CTRL},
.CALL = {prefix = PREFIX_NONE, opcode = 0x10, imm = {.IDX, .NONE}, flags = CTRL},
.CALL_INDIRECT = {prefix = PREFIX_NONE, opcode = 0x11, imm = {.IDX, .IDX}, flags = CTRL},
// -------------------------------------------------------------- parametric
.DROP = {prefix = PREFIX_NONE, opcode = 0x1A},
.SELECT = {prefix = PREFIX_NONE, opcode = 0x1B},
// ---------------------------------------------------------------- variable
.LOCAL_GET = {prefix = PREFIX_NONE, opcode = 0x20, imm = {.IDX, .NONE}},
.LOCAL_SET = {prefix = PREFIX_NONE, opcode = 0x21, imm = {.IDX, .NONE}},
.LOCAL_TEE = {prefix = PREFIX_NONE, opcode = 0x22, imm = {.IDX, .NONE}},
.GLOBAL_GET = {prefix = PREFIX_NONE, opcode = 0x23, imm = {.IDX, .NONE}},
.GLOBAL_SET = {prefix = PREFIX_NONE, opcode = 0x24, imm = {.IDX, .NONE}},
// ------------------------------------------------------------------- memory
.I32_LOAD = {prefix = PREFIX_NONE, opcode = 0x28, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD = {prefix = PREFIX_NONE, opcode = 0x29, imm = {.MEMARG, .NONE}, flags = MEM},
.F32_LOAD = {prefix = PREFIX_NONE, opcode = 0x2A, imm = {.MEMARG, .NONE}, flags = MEM},
.F64_LOAD = {prefix = PREFIX_NONE, opcode = 0x2B, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_LOAD8_S = {prefix = PREFIX_NONE, opcode = 0x2C, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_LOAD8_U = {prefix = PREFIX_NONE, opcode = 0x2D, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_LOAD16_S = {prefix = PREFIX_NONE, opcode = 0x2E, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_LOAD16_U = {prefix = PREFIX_NONE, opcode = 0x2F, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD8_S = {prefix = PREFIX_NONE, opcode = 0x30, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD8_U = {prefix = PREFIX_NONE, opcode = 0x31, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD16_S = {prefix = PREFIX_NONE, opcode = 0x32, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD16_U = {prefix = PREFIX_NONE, opcode = 0x33, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD32_S = {prefix = PREFIX_NONE, opcode = 0x34, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_LOAD32_U = {prefix = PREFIX_NONE, opcode = 0x35, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_STORE = {prefix = PREFIX_NONE, opcode = 0x36, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_STORE = {prefix = PREFIX_NONE, opcode = 0x37, imm = {.MEMARG, .NONE}, flags = MEM},
.F32_STORE = {prefix = PREFIX_NONE, opcode = 0x38, imm = {.MEMARG, .NONE}, flags = MEM},
.F64_STORE = {prefix = PREFIX_NONE, opcode = 0x39, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_STORE8 = {prefix = PREFIX_NONE, opcode = 0x3A, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_STORE16 = {prefix = PREFIX_NONE, opcode = 0x3B, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_STORE8 = {prefix = PREFIX_NONE, opcode = 0x3C, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_STORE16 = {prefix = PREFIX_NONE, opcode = 0x3D, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_STORE32 = {prefix = PREFIX_NONE, opcode = 0x3E, imm = {.MEMARG, .NONE}, flags = MEM},
.MEMORY_SIZE = {prefix = PREFIX_NONE, opcode = 0x3F, imm = {.ZERO_BYTE, .NONE}, flags = MEM},
.MEMORY_GROW = {prefix = PREFIX_NONE, opcode = 0x40, imm = {.ZERO_BYTE, .NONE}, flags = MEM},
// ----------------------------------------------------------------- numeric
.I32_CONST = {prefix = PREFIX_NONE, opcode = 0x41, imm = {.I32, .NONE}},
.I64_CONST = {prefix = PREFIX_NONE, opcode = 0x42, imm = {.I64, .NONE}},
.F32_CONST = {prefix = PREFIX_NONE, opcode = 0x43, imm = {.F32, .NONE}},
.F64_CONST = {prefix = PREFIX_NONE, opcode = 0x44, imm = {.F64, .NONE}},
.I32_EQZ = {prefix = PREFIX_NONE, opcode = 0x45}, .I32_EQ = {prefix = PREFIX_NONE, opcode = 0x46}, .I32_NE = {prefix = PREFIX_NONE, opcode = 0x47},
.I32_LT_S = {prefix = PREFIX_NONE, opcode = 0x48}, .I32_LT_U = {prefix = PREFIX_NONE, opcode = 0x49},
.I32_GT_S = {prefix = PREFIX_NONE, opcode = 0x4A}, .I32_GT_U = {prefix = PREFIX_NONE, opcode = 0x4B},
.I32_LE_S = {prefix = PREFIX_NONE, opcode = 0x4C}, .I32_LE_U = {prefix = PREFIX_NONE, opcode = 0x4D},
.I32_GE_S = {prefix = PREFIX_NONE, opcode = 0x4E}, .I32_GE_U = {prefix = PREFIX_NONE, opcode = 0x4F},
.I64_EQZ = {prefix = PREFIX_NONE, opcode = 0x50}, .I64_EQ = {prefix = PREFIX_NONE, opcode = 0x51}, .I64_NE = {prefix = PREFIX_NONE, opcode = 0x52},
.I64_LT_S = {prefix = PREFIX_NONE, opcode = 0x53}, .I64_LT_U = {prefix = PREFIX_NONE, opcode = 0x54},
.I64_GT_S = {prefix = PREFIX_NONE, opcode = 0x55}, .I64_GT_U = {prefix = PREFIX_NONE, opcode = 0x56},
.I64_LE_S = {prefix = PREFIX_NONE, opcode = 0x57}, .I64_LE_U = {prefix = PREFIX_NONE, opcode = 0x58},
.I64_GE_S = {prefix = PREFIX_NONE, opcode = 0x59}, .I64_GE_U = {prefix = PREFIX_NONE, opcode = 0x5A},
.F32_EQ = {prefix = PREFIX_NONE, opcode = 0x5B}, .F32_NE = {prefix = PREFIX_NONE, opcode = 0x5C},
.F32_LT = {prefix = PREFIX_NONE, opcode = 0x5D}, .F32_GT = {prefix = PREFIX_NONE, opcode = 0x5E},
.F32_LE = {prefix = PREFIX_NONE, opcode = 0x5F}, .F32_GE = {prefix = PREFIX_NONE, opcode = 0x60},
.F64_EQ = {prefix = PREFIX_NONE, opcode = 0x61}, .F64_NE = {prefix = PREFIX_NONE, opcode = 0x62},
.F64_LT = {prefix = PREFIX_NONE, opcode = 0x63}, .F64_GT = {prefix = PREFIX_NONE, opcode = 0x64},
.F64_LE = {prefix = PREFIX_NONE, opcode = 0x65}, .F64_GE = {prefix = PREFIX_NONE, opcode = 0x66},
.I32_CLZ = {prefix = PREFIX_NONE, opcode = 0x67}, .I32_CTZ = {prefix = PREFIX_NONE, opcode = 0x68}, .I32_POPCNT = {prefix = PREFIX_NONE, opcode = 0x69},
.I32_ADD = {prefix = PREFIX_NONE, opcode = 0x6A}, .I32_SUB = {prefix = PREFIX_NONE, opcode = 0x6B}, .I32_MUL = {prefix = PREFIX_NONE, opcode = 0x6C},
.I32_DIV_S = {prefix = PREFIX_NONE, opcode = 0x6D}, .I32_DIV_U = {prefix = PREFIX_NONE, opcode = 0x6E},
.I32_REM_S = {prefix = PREFIX_NONE, opcode = 0x6F}, .I32_REM_U = {prefix = PREFIX_NONE, opcode = 0x70},
.I32_AND = {prefix = PREFIX_NONE, opcode = 0x71}, .I32_OR = {prefix = PREFIX_NONE, opcode = 0x72}, .I32_XOR = {prefix = PREFIX_NONE, opcode = 0x73},
.I32_SHL = {prefix = PREFIX_NONE, opcode = 0x74}, .I32_SHR_S = {prefix = PREFIX_NONE, opcode = 0x75}, .I32_SHR_U = {prefix = PREFIX_NONE, opcode = 0x76},
.I32_ROTL = {prefix = PREFIX_NONE, opcode = 0x77}, .I32_ROTR = {prefix = PREFIX_NONE, opcode = 0x78},
.I64_CLZ = {prefix = PREFIX_NONE, opcode = 0x79}, .I64_CTZ = {prefix = PREFIX_NONE, opcode = 0x7A}, .I64_POPCNT = {prefix = PREFIX_NONE, opcode = 0x7B},
.I64_ADD = {prefix = PREFIX_NONE, opcode = 0x7C}, .I64_SUB = {prefix = PREFIX_NONE, opcode = 0x7D}, .I64_MUL = {prefix = PREFIX_NONE, opcode = 0x7E},
.I64_DIV_S = {prefix = PREFIX_NONE, opcode = 0x7F}, .I64_DIV_U = {prefix = PREFIX_NONE, opcode = 0x80},
.I64_REM_S = {prefix = PREFIX_NONE, opcode = 0x81}, .I64_REM_U = {prefix = PREFIX_NONE, opcode = 0x82},
.I64_AND = {prefix = PREFIX_NONE, opcode = 0x83}, .I64_OR = {prefix = PREFIX_NONE, opcode = 0x84}, .I64_XOR = {prefix = PREFIX_NONE, opcode = 0x85},
.I64_SHL = {prefix = PREFIX_NONE, opcode = 0x86}, .I64_SHR_S = {prefix = PREFIX_NONE, opcode = 0x87}, .I64_SHR_U = {prefix = PREFIX_NONE, opcode = 0x88},
.I64_ROTL = {prefix = PREFIX_NONE, opcode = 0x89}, .I64_ROTR = {prefix = PREFIX_NONE, opcode = 0x8A},
.F32_ABS = {prefix = PREFIX_NONE, opcode = 0x8B}, .F32_NEG = {prefix = PREFIX_NONE, opcode = 0x8C}, .F32_CEIL = {prefix = PREFIX_NONE, opcode = 0x8D},
.F32_FLOOR = {prefix = PREFIX_NONE, opcode = 0x8E}, .F32_TRUNC = {prefix = PREFIX_NONE, opcode = 0x8F}, .F32_NEAREST = {prefix = PREFIX_NONE, opcode = 0x90},
.F32_SQRT = {prefix = PREFIX_NONE, opcode = 0x91}, .F32_ADD = {prefix = PREFIX_NONE, opcode = 0x92}, .F32_SUB = {prefix = PREFIX_NONE, opcode = 0x93},
.F32_MUL = {prefix = PREFIX_NONE, opcode = 0x94}, .F32_DIV = {prefix = PREFIX_NONE, opcode = 0x95}, .F32_MIN = {prefix = PREFIX_NONE, opcode = 0x96},
.F32_MAX = {prefix = PREFIX_NONE, opcode = 0x97}, .F32_COPYSIGN = {prefix = PREFIX_NONE, opcode = 0x98},
.F64_ABS = {prefix = PREFIX_NONE, opcode = 0x99}, .F64_NEG = {prefix = PREFIX_NONE, opcode = 0x9A}, .F64_CEIL = {prefix = PREFIX_NONE, opcode = 0x9B},
.F64_FLOOR = {prefix = PREFIX_NONE, opcode = 0x9C}, .F64_TRUNC = {prefix = PREFIX_NONE, opcode = 0x9D}, .F64_NEAREST = {prefix = PREFIX_NONE, opcode = 0x9E},
.F64_SQRT = {prefix = PREFIX_NONE, opcode = 0x9F}, .F64_ADD = {prefix = PREFIX_NONE, opcode = 0xA0}, .F64_SUB = {prefix = PREFIX_NONE, opcode = 0xA1},
.F64_MUL = {prefix = PREFIX_NONE, opcode = 0xA2}, .F64_DIV = {prefix = PREFIX_NONE, opcode = 0xA3}, .F64_MIN = {prefix = PREFIX_NONE, opcode = 0xA4},
.F64_MAX = {prefix = PREFIX_NONE, opcode = 0xA5}, .F64_COPYSIGN = {prefix = PREFIX_NONE, opcode = 0xA6},
.I32_WRAP_I64 = {prefix = PREFIX_NONE, opcode = 0xA7},
.I32_TRUNC_F32_S = {prefix = PREFIX_NONE, opcode = 0xA8}, .I32_TRUNC_F32_U = {prefix = PREFIX_NONE, opcode = 0xA9},
.I32_TRUNC_F64_S = {prefix = PREFIX_NONE, opcode = 0xAA}, .I32_TRUNC_F64_U = {prefix = PREFIX_NONE, opcode = 0xAB},
.I64_EXTEND_I32_S = {prefix = PREFIX_NONE, opcode = 0xAC}, .I64_EXTEND_I32_U = {prefix = PREFIX_NONE, opcode = 0xAD},
.I64_TRUNC_F32_S = {prefix = PREFIX_NONE, opcode = 0xAE}, .I64_TRUNC_F32_U = {prefix = PREFIX_NONE, opcode = 0xAF},
.I64_TRUNC_F64_S = {prefix = PREFIX_NONE, opcode = 0xB0}, .I64_TRUNC_F64_U = {prefix = PREFIX_NONE, opcode = 0xB1},
.F32_CONVERT_I32_S = {prefix = PREFIX_NONE, opcode = 0xB2}, .F32_CONVERT_I32_U = {prefix = PREFIX_NONE, opcode = 0xB3},
.F32_CONVERT_I64_S = {prefix = PREFIX_NONE, opcode = 0xB4}, .F32_CONVERT_I64_U = {prefix = PREFIX_NONE, opcode = 0xB5},
.F32_DEMOTE_F64 = {prefix = PREFIX_NONE, opcode = 0xB6},
.F64_CONVERT_I32_S = {prefix = PREFIX_NONE, opcode = 0xB7}, .F64_CONVERT_I32_U = {prefix = PREFIX_NONE, opcode = 0xB8},
.F64_CONVERT_I64_S = {prefix = PREFIX_NONE, opcode = 0xB9}, .F64_CONVERT_I64_U = {prefix = PREFIX_NONE, opcode = 0xBA},
.F64_PROMOTE_F32 = {prefix = PREFIX_NONE, opcode = 0xBB},
.I32_REINTERPRET_F32 = {prefix = PREFIX_NONE, opcode = 0xBC}, .I64_REINTERPRET_F64 = {prefix = PREFIX_NONE, opcode = 0xBD},
.F32_REINTERPRET_I32 = {prefix = PREFIX_NONE, opcode = 0xBE}, .F64_REINTERPRET_I64 = {prefix = PREFIX_NONE, opcode = 0xBF},
.I32_EXTEND8_S = {prefix = PREFIX_NONE, opcode = 0xC0}, .I32_EXTEND16_S = {prefix = PREFIX_NONE, opcode = 0xC1},
.I64_EXTEND8_S = {prefix = PREFIX_NONE, opcode = 0xC2}, .I64_EXTEND16_S = {prefix = PREFIX_NONE, opcode = 0xC3}, .I64_EXTEND32_S = {prefix = PREFIX_NONE, opcode = 0xC4},
.REF_NULL = {prefix = PREFIX_NONE, opcode = 0xD0, imm = {.REFTYPE, .NONE}},
.REF_IS_NULL = {prefix = PREFIX_NONE, opcode = 0xD1},
.REF_FUNC = {prefix = PREFIX_NONE, opcode = 0xD2, imm = {.IDX, .NONE}},
// ------------------------------------------------------- 0xFC misc prefix
.I32_TRUNC_SAT_F32_S = {prefix = PREFIX_MISC, opcode = 0}, .I32_TRUNC_SAT_F32_U = {prefix = PREFIX_MISC, opcode = 1},
.I32_TRUNC_SAT_F64_S = {prefix = PREFIX_MISC, opcode = 2}, .I32_TRUNC_SAT_F64_U = {prefix = PREFIX_MISC, opcode = 3},
.I64_TRUNC_SAT_F32_S = {prefix = PREFIX_MISC, opcode = 4}, .I64_TRUNC_SAT_F32_U = {prefix = PREFIX_MISC, opcode = 5},
.I64_TRUNC_SAT_F64_S = {prefix = PREFIX_MISC, opcode = 6}, .I64_TRUNC_SAT_F64_U = {prefix = PREFIX_MISC, opcode = 7},
.MEMORY_INIT = {prefix = PREFIX_MISC, opcode = 8, imm = {.IDX, .ZERO_BYTE}, flags = MEM},
.DATA_DROP = {prefix = PREFIX_MISC, opcode = 9, imm = {.IDX, .NONE}},
.MEMORY_COPY = {prefix = PREFIX_MISC, opcode = 10, imm = {.ZERO_BYTE, .ZERO_BYTE}, flags = MEM},
.MEMORY_FILL = {prefix = PREFIX_MISC, opcode = 11, imm = {.ZERO_BYTE, .NONE}, flags = MEM},
.TABLE_INIT = {prefix = PREFIX_MISC, opcode = 12, imm = {.IDX, .IDX}},
.ELEM_DROP = {prefix = PREFIX_MISC, opcode = 13, imm = {.IDX, .NONE}},
.TABLE_COPY = {prefix = PREFIX_MISC, opcode = 14, imm = {.IDX, .IDX}},
.TABLE_GROW = {prefix = PREFIX_MISC, opcode = 15, imm = {.IDX, .NONE}},
.TABLE_SIZE = {prefix = PREFIX_MISC, opcode = 16, imm = {.IDX, .NONE}},
.TABLE_FILL = {prefix = PREFIX_MISC, opcode = 17, imm = {.IDX, .NONE}},
// ----------------------------------------------- 0xFD SIMD (v128) prefix
.V128_LOAD = {prefix = PREFIX_SIMD, opcode = 0x00, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD8X8_S = {prefix = PREFIX_SIMD, opcode = 0x01, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD8X8_U = {prefix = PREFIX_SIMD, opcode = 0x02, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD16X4_S = {prefix = PREFIX_SIMD, opcode = 0x03, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD16X4_U = {prefix = PREFIX_SIMD, opcode = 0x04, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD32X2_S = {prefix = PREFIX_SIMD, opcode = 0x05, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD32X2_U = {prefix = PREFIX_SIMD, opcode = 0x06, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD8_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x07, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD16_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x08, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD32_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x09, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD64_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x0A, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_STORE = {prefix = PREFIX_SIMD, opcode = 0x0B, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_CONST = {prefix = PREFIX_SIMD, opcode = 0x0C, imm = {.LANES16, .NONE}},
.I8X16_SHUFFLE = {prefix = PREFIX_SIMD, opcode = 0x0D, imm = {.LANES16, .NONE}},
.I8X16_SWIZZLE = {prefix = PREFIX_SIMD, opcode = 0x0E},
.I8X16_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x0F},
.I16X8_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x10},
.I32X4_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x11},
.I64X2_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x12},
.F32X4_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x13},
.F64X2_SPLAT = {prefix = PREFIX_SIMD, opcode = 0x14},
.I8X16_EXTRACT_LANE_S = {prefix = PREFIX_SIMD, opcode = 0x15, imm = {.LANE, .NONE}},
.I8X16_EXTRACT_LANE_U = {prefix = PREFIX_SIMD, opcode = 0x16, imm = {.LANE, .NONE}},
.I8X16_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x17, imm = {.LANE, .NONE}},
.I16X8_EXTRACT_LANE_S = {prefix = PREFIX_SIMD, opcode = 0x18, imm = {.LANE, .NONE}},
.I16X8_EXTRACT_LANE_U = {prefix = PREFIX_SIMD, opcode = 0x19, imm = {.LANE, .NONE}},
.I16X8_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x1A, imm = {.LANE, .NONE}},
.I32X4_EXTRACT_LANE = {prefix = PREFIX_SIMD, opcode = 0x1B, imm = {.LANE, .NONE}},
.I32X4_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x1C, imm = {.LANE, .NONE}},
.I64X2_EXTRACT_LANE = {prefix = PREFIX_SIMD, opcode = 0x1D, imm = {.LANE, .NONE}},
.I64X2_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x1E, imm = {.LANE, .NONE}},
.F32X4_EXTRACT_LANE = {prefix = PREFIX_SIMD, opcode = 0x1F, imm = {.LANE, .NONE}},
.F32X4_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x20, imm = {.LANE, .NONE}},
.F64X2_EXTRACT_LANE = {prefix = PREFIX_SIMD, opcode = 0x21, imm = {.LANE, .NONE}},
.F64X2_REPLACE_LANE = {prefix = PREFIX_SIMD, opcode = 0x22, imm = {.LANE, .NONE}},
.I8X16_EQ = {prefix = PREFIX_SIMD, opcode = 0x23},
.I8X16_NE = {prefix = PREFIX_SIMD, opcode = 0x24},
.I8X16_LT_S = {prefix = PREFIX_SIMD, opcode = 0x25},
.I8X16_LT_U = {prefix = PREFIX_SIMD, opcode = 0x26},
.I8X16_GT_S = {prefix = PREFIX_SIMD, opcode = 0x27},
.I8X16_GT_U = {prefix = PREFIX_SIMD, opcode = 0x28},
.I8X16_LE_S = {prefix = PREFIX_SIMD, opcode = 0x29},
.I8X16_LE_U = {prefix = PREFIX_SIMD, opcode = 0x2A},
.I8X16_GE_S = {prefix = PREFIX_SIMD, opcode = 0x2B},
.I8X16_GE_U = {prefix = PREFIX_SIMD, opcode = 0x2C},
.I16X8_EQ = {prefix = PREFIX_SIMD, opcode = 0x2D},
.I16X8_NE = {prefix = PREFIX_SIMD, opcode = 0x2E},
.I16X8_LT_S = {prefix = PREFIX_SIMD, opcode = 0x2F},
.I16X8_LT_U = {prefix = PREFIX_SIMD, opcode = 0x30},
.I16X8_GT_S = {prefix = PREFIX_SIMD, opcode = 0x31},
.I16X8_GT_U = {prefix = PREFIX_SIMD, opcode = 0x32},
.I16X8_LE_S = {prefix = PREFIX_SIMD, opcode = 0x33},
.I16X8_LE_U = {prefix = PREFIX_SIMD, opcode = 0x34},
.I16X8_GE_S = {prefix = PREFIX_SIMD, opcode = 0x35},
.I16X8_GE_U = {prefix = PREFIX_SIMD, opcode = 0x36},
.I32X4_EQ = {prefix = PREFIX_SIMD, opcode = 0x37},
.I32X4_NE = {prefix = PREFIX_SIMD, opcode = 0x38},
.I32X4_LT_S = {prefix = PREFIX_SIMD, opcode = 0x39},
.I32X4_LT_U = {prefix = PREFIX_SIMD, opcode = 0x3A},
.I32X4_GT_S = {prefix = PREFIX_SIMD, opcode = 0x3B},
.I32X4_GT_U = {prefix = PREFIX_SIMD, opcode = 0x3C},
.I32X4_LE_S = {prefix = PREFIX_SIMD, opcode = 0x3D},
.I32X4_LE_U = {prefix = PREFIX_SIMD, opcode = 0x3E},
.I32X4_GE_S = {prefix = PREFIX_SIMD, opcode = 0x3F},
.I32X4_GE_U = {prefix = PREFIX_SIMD, opcode = 0x40},
.F32X4_EQ = {prefix = PREFIX_SIMD, opcode = 0x41},
.F32X4_NE = {prefix = PREFIX_SIMD, opcode = 0x42},
.F32X4_LT = {prefix = PREFIX_SIMD, opcode = 0x43},
.F32X4_GT = {prefix = PREFIX_SIMD, opcode = 0x44},
.F32X4_LE = {prefix = PREFIX_SIMD, opcode = 0x45},
.F32X4_GE = {prefix = PREFIX_SIMD, opcode = 0x46},
.F64X2_EQ = {prefix = PREFIX_SIMD, opcode = 0x47},
.F64X2_NE = {prefix = PREFIX_SIMD, opcode = 0x48},
.F64X2_LT = {prefix = PREFIX_SIMD, opcode = 0x49},
.F64X2_GT = {prefix = PREFIX_SIMD, opcode = 0x4A},
.F64X2_LE = {prefix = PREFIX_SIMD, opcode = 0x4B},
.F64X2_GE = {prefix = PREFIX_SIMD, opcode = 0x4C},
.V128_NOT = {prefix = PREFIX_SIMD, opcode = 0x4D},
.V128_AND = {prefix = PREFIX_SIMD, opcode = 0x4E},
.V128_ANDNOT = {prefix = PREFIX_SIMD, opcode = 0x4F},
.V128_OR = {prefix = PREFIX_SIMD, opcode = 0x50},
.V128_XOR = {prefix = PREFIX_SIMD, opcode = 0x51},
.V128_BITSELECT = {prefix = PREFIX_SIMD, opcode = 0x52},
.V128_ANY_TRUE = {prefix = PREFIX_SIMD, opcode = 0x53},
.V128_LOAD8_LANE = {prefix = PREFIX_SIMD, opcode = 0x54, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_LOAD16_LANE = {prefix = PREFIX_SIMD, opcode = 0x55, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_LOAD32_LANE = {prefix = PREFIX_SIMD, opcode = 0x56, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_LOAD64_LANE = {prefix = PREFIX_SIMD, opcode = 0x57, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_STORE8_LANE = {prefix = PREFIX_SIMD, opcode = 0x58, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_STORE16_LANE = {prefix = PREFIX_SIMD, opcode = 0x59, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_STORE32_LANE = {prefix = PREFIX_SIMD, opcode = 0x5A, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_STORE64_LANE = {prefix = PREFIX_SIMD, opcode = 0x5B, imm = {.MEMARG, .LANE}, flags = MEM},
.V128_LOAD32_ZERO = {prefix = PREFIX_SIMD, opcode = 0x5C, imm = {.MEMARG, .NONE}, flags = MEM},
.V128_LOAD64_ZERO = {prefix = PREFIX_SIMD, opcode = 0x5D, imm = {.MEMARG, .NONE}, flags = MEM},
.F32X4_DEMOTE_F64X2_ZERO = {prefix = PREFIX_SIMD, opcode = 0x5E},
.F64X2_PROMOTE_LOW_F32X4 = {prefix = PREFIX_SIMD, opcode = 0x5F},
.I8X16_ABS = {prefix = PREFIX_SIMD, opcode = 0x60},
.I8X16_NEG = {prefix = PREFIX_SIMD, opcode = 0x61},
.I8X16_POPCNT = {prefix = PREFIX_SIMD, opcode = 0x62},
.I8X16_ALL_TRUE = {prefix = PREFIX_SIMD, opcode = 0x63},
.I8X16_BITMASK = {prefix = PREFIX_SIMD, opcode = 0x64},
.I8X16_NARROW_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0x65},
.I8X16_NARROW_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0x66},
.F32X4_CEIL = {prefix = PREFIX_SIMD, opcode = 0x67},
.F32X4_FLOOR = {prefix = PREFIX_SIMD, opcode = 0x68},
.F32X4_TRUNC = {prefix = PREFIX_SIMD, opcode = 0x69},
.F32X4_NEAREST = {prefix = PREFIX_SIMD, opcode = 0x6A},
.I8X16_SHL = {prefix = PREFIX_SIMD, opcode = 0x6B},
.I8X16_SHR_S = {prefix = PREFIX_SIMD, opcode = 0x6C},
.I8X16_SHR_U = {prefix = PREFIX_SIMD, opcode = 0x6D},
.I8X16_ADD = {prefix = PREFIX_SIMD, opcode = 0x6E},
.I8X16_ADD_SAT_S = {prefix = PREFIX_SIMD, opcode = 0x6F},
.I8X16_ADD_SAT_U = {prefix = PREFIX_SIMD, opcode = 0x70},
.I8X16_SUB = {prefix = PREFIX_SIMD, opcode = 0x71},
.I8X16_SUB_SAT_S = {prefix = PREFIX_SIMD, opcode = 0x72},
.I8X16_SUB_SAT_U = {prefix = PREFIX_SIMD, opcode = 0x73},
.F64X2_CEIL = {prefix = PREFIX_SIMD, opcode = 0x74},
.F64X2_FLOOR = {prefix = PREFIX_SIMD, opcode = 0x75},
.I8X16_MIN_S = {prefix = PREFIX_SIMD, opcode = 0x76},
.I8X16_MIN_U = {prefix = PREFIX_SIMD, opcode = 0x77},
.I8X16_MAX_S = {prefix = PREFIX_SIMD, opcode = 0x78},
.I8X16_MAX_U = {prefix = PREFIX_SIMD, opcode = 0x79},
.F64X2_TRUNC = {prefix = PREFIX_SIMD, opcode = 0x7A},
.I8X16_AVGR_U = {prefix = PREFIX_SIMD, opcode = 0x7B},
.I16X8_EXTADD_PAIRWISE_I8X16_S = {prefix = PREFIX_SIMD, opcode = 0x7C},
.I16X8_EXTADD_PAIRWISE_I8X16_U = {prefix = PREFIX_SIMD, opcode = 0x7D},
.I32X4_EXTADD_PAIRWISE_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0x7E},
.I32X4_EXTADD_PAIRWISE_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0x7F},
.I16X8_ABS = {prefix = PREFIX_SIMD, opcode = 0x80},
.I16X8_NEG = {prefix = PREFIX_SIMD, opcode = 0x81},
.I16X8_Q15MULR_SAT_S = {prefix = PREFIX_SIMD, opcode = 0x82},
.I16X8_ALL_TRUE = {prefix = PREFIX_SIMD, opcode = 0x83},
.I16X8_BITMASK = {prefix = PREFIX_SIMD, opcode = 0x84},
.I16X8_NARROW_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0x85},
.I16X8_NARROW_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0x86},
.I16X8_EXTEND_LOW_I8X16_S = {prefix = PREFIX_SIMD, opcode = 0x87},
.I16X8_EXTEND_HIGH_I8X16_S = {prefix = PREFIX_SIMD, opcode = 0x88},
.I16X8_EXTEND_LOW_I8X16_U = {prefix = PREFIX_SIMD, opcode = 0x89},
.I16X8_EXTEND_HIGH_I8X16_U = {prefix = PREFIX_SIMD, opcode = 0x8A},
.I16X8_SHL = {prefix = PREFIX_SIMD, opcode = 0x8B},
.I16X8_SHR_S = {prefix = PREFIX_SIMD, opcode = 0x8C},
.I16X8_SHR_U = {prefix = PREFIX_SIMD, opcode = 0x8D},
.I16X8_ADD = {prefix = PREFIX_SIMD, opcode = 0x8E},
.I16X8_ADD_SAT_S = {prefix = PREFIX_SIMD, opcode = 0x8F},
.I16X8_ADD_SAT_U = {prefix = PREFIX_SIMD, opcode = 0x90},
.I16X8_SUB = {prefix = PREFIX_SIMD, opcode = 0x91},
.I16X8_SUB_SAT_S = {prefix = PREFIX_SIMD, opcode = 0x92},
.I16X8_SUB_SAT_U = {prefix = PREFIX_SIMD, opcode = 0x93},
.F64X2_NEAREST = {prefix = PREFIX_SIMD, opcode = 0x94},
.I16X8_MUL = {prefix = PREFIX_SIMD, opcode = 0x95},
.I16X8_MIN_S = {prefix = PREFIX_SIMD, opcode = 0x96},
.I16X8_MIN_U = {prefix = PREFIX_SIMD, opcode = 0x97},
.I16X8_MAX_S = {prefix = PREFIX_SIMD, opcode = 0x98},
.I16X8_MAX_U = {prefix = PREFIX_SIMD, opcode = 0x99},
.I16X8_AVGR_U = {prefix = PREFIX_SIMD, opcode = 0x9B},
.I16X8_EXTMUL_LOW_I8X16_S = {prefix = PREFIX_SIMD, opcode = 0x9C},
.I16X8_EXTMUL_HIGH_I8X16_S = {prefix = PREFIX_SIMD, opcode = 0x9D},
.I16X8_EXTMUL_LOW_I8X16_U = {prefix = PREFIX_SIMD, opcode = 0x9E},
.I16X8_EXTMUL_HIGH_I8X16_U = {prefix = PREFIX_SIMD, opcode = 0x9F},
.I32X4_ABS = {prefix = PREFIX_SIMD, opcode = 0xA0},
.I32X4_NEG = {prefix = PREFIX_SIMD, opcode = 0xA1},
.I32X4_ALL_TRUE = {prefix = PREFIX_SIMD, opcode = 0xA3},
.I32X4_BITMASK = {prefix = PREFIX_SIMD, opcode = 0xA4},
.I32X4_EXTEND_LOW_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0xA7},
.I32X4_EXTEND_HIGH_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0xA8},
.I32X4_EXTEND_LOW_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0xA9},
.I32X4_EXTEND_HIGH_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0xAA},
.I32X4_SHL = {prefix = PREFIX_SIMD, opcode = 0xAB},
.I32X4_SHR_S = {prefix = PREFIX_SIMD, opcode = 0xAC},
.I32X4_SHR_U = {prefix = PREFIX_SIMD, opcode = 0xAD},
.I32X4_ADD = {prefix = PREFIX_SIMD, opcode = 0xAE},
.I32X4_SUB = {prefix = PREFIX_SIMD, opcode = 0xB1},
.I32X4_MUL = {prefix = PREFIX_SIMD, opcode = 0xB5},
.I32X4_MIN_S = {prefix = PREFIX_SIMD, opcode = 0xB6},
.I32X4_MIN_U = {prefix = PREFIX_SIMD, opcode = 0xB7},
.I32X4_MAX_S = {prefix = PREFIX_SIMD, opcode = 0xB8},
.I32X4_MAX_U = {prefix = PREFIX_SIMD, opcode = 0xB9},
.I32X4_DOT_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0xBA},
.I32X4_EXTMUL_LOW_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0xBC},
.I32X4_EXTMUL_HIGH_I16X8_S = {prefix = PREFIX_SIMD, opcode = 0xBD},
.I32X4_EXTMUL_LOW_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0xBE},
.I32X4_EXTMUL_HIGH_I16X8_U = {prefix = PREFIX_SIMD, opcode = 0xBF},
.I64X2_ABS = {prefix = PREFIX_SIMD, opcode = 0xC0},
.I64X2_NEG = {prefix = PREFIX_SIMD, opcode = 0xC1},
.I64X2_ALL_TRUE = {prefix = PREFIX_SIMD, opcode = 0xC3},
.I64X2_BITMASK = {prefix = PREFIX_SIMD, opcode = 0xC4},
.I64X2_EXTEND_LOW_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xC7},
.I64X2_EXTEND_HIGH_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xC8},
.I64X2_EXTEND_LOW_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xC9},
.I64X2_EXTEND_HIGH_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xCA},
.I64X2_SHL = {prefix = PREFIX_SIMD, opcode = 0xCB},
.I64X2_SHR_S = {prefix = PREFIX_SIMD, opcode = 0xCC},
.I64X2_SHR_U = {prefix = PREFIX_SIMD, opcode = 0xCD},
.I64X2_ADD = {prefix = PREFIX_SIMD, opcode = 0xCE},
.I64X2_SUB = {prefix = PREFIX_SIMD, opcode = 0xD1},
.I64X2_MUL = {prefix = PREFIX_SIMD, opcode = 0xD5},
.I64X2_EQ = {prefix = PREFIX_SIMD, opcode = 0xD6},
.I64X2_NE = {prefix = PREFIX_SIMD, opcode = 0xD7},
.I64X2_LT_S = {prefix = PREFIX_SIMD, opcode = 0xD8},
.I64X2_GT_S = {prefix = PREFIX_SIMD, opcode = 0xD9},
.I64X2_LE_S = {prefix = PREFIX_SIMD, opcode = 0xDA},
.I64X2_GE_S = {prefix = PREFIX_SIMD, opcode = 0xDB},
.I64X2_EXTMUL_LOW_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xDC},
.I64X2_EXTMUL_HIGH_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xDD},
.I64X2_EXTMUL_LOW_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xDE},
.I64X2_EXTMUL_HIGH_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xDF},
.F32X4_ABS = {prefix = PREFIX_SIMD, opcode = 0xE0},
.F32X4_NEG = {prefix = PREFIX_SIMD, opcode = 0xE1},
.F32X4_SQRT = {prefix = PREFIX_SIMD, opcode = 0xE3},
.F32X4_ADD = {prefix = PREFIX_SIMD, opcode = 0xE4},
.F32X4_SUB = {prefix = PREFIX_SIMD, opcode = 0xE5},
.F32X4_MUL = {prefix = PREFIX_SIMD, opcode = 0xE6},
.F32X4_DIV = {prefix = PREFIX_SIMD, opcode = 0xE7},
.F32X4_MIN = {prefix = PREFIX_SIMD, opcode = 0xE8},
.F32X4_MAX = {prefix = PREFIX_SIMD, opcode = 0xE9},
.F32X4_PMIN = {prefix = PREFIX_SIMD, opcode = 0xEA},
.F32X4_PMAX = {prefix = PREFIX_SIMD, opcode = 0xEB},
.F64X2_ABS = {prefix = PREFIX_SIMD, opcode = 0xEC},
.F64X2_NEG = {prefix = PREFIX_SIMD, opcode = 0xED},
.F64X2_SQRT = {prefix = PREFIX_SIMD, opcode = 0xEF},
.F64X2_ADD = {prefix = PREFIX_SIMD, opcode = 0xF0},
.F64X2_SUB = {prefix = PREFIX_SIMD, opcode = 0xF1},
.F64X2_MUL = {prefix = PREFIX_SIMD, opcode = 0xF2},
.F64X2_DIV = {prefix = PREFIX_SIMD, opcode = 0xF3},
.F64X2_MIN = {prefix = PREFIX_SIMD, opcode = 0xF4},
.F64X2_MAX = {prefix = PREFIX_SIMD, opcode = 0xF5},
.F64X2_PMIN = {prefix = PREFIX_SIMD, opcode = 0xF6},
.F64X2_PMAX = {prefix = PREFIX_SIMD, opcode = 0xF7},
.I32X4_TRUNC_SAT_F32X4_S = {prefix = PREFIX_SIMD, opcode = 0xF8},
.I32X4_TRUNC_SAT_F32X4_U = {prefix = PREFIX_SIMD, opcode = 0xF9},
.F32X4_CONVERT_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xFA},
.F32X4_CONVERT_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xFB},
.I32X4_TRUNC_SAT_F64X2_S_ZERO = {prefix = PREFIX_SIMD, opcode = 0xFC},
.I32X4_TRUNC_SAT_F64X2_U_ZERO = {prefix = PREFIX_SIMD, opcode = 0xFD},
.F64X2_CONVERT_LOW_I32X4_S = {prefix = PREFIX_SIMD, opcode = 0xFE},
.F64X2_CONVERT_LOW_I32X4_U = {prefix = PREFIX_SIMD, opcode = 0xFF},
.I8X16_RELAXED_SWIZZLE = {prefix = PREFIX_SIMD, opcode = 0x100},
.I32X4_RELAXED_TRUNC_F32X4_S = {prefix = PREFIX_SIMD, opcode = 0x101},
.I32X4_RELAXED_TRUNC_F32X4_U = {prefix = PREFIX_SIMD, opcode = 0x102},
.I32X4_RELAXED_TRUNC_F64X2_S_ZERO = {prefix = PREFIX_SIMD, opcode = 0x103},
.I32X4_RELAXED_TRUNC_F64X2_U_ZERO = {prefix = PREFIX_SIMD, opcode = 0x104},
.F32X4_RELAXED_MADD = {prefix = PREFIX_SIMD, opcode = 0x105},
.F32X4_RELAXED_NMADD = {prefix = PREFIX_SIMD, opcode = 0x106},
.F64X2_RELAXED_MADD = {prefix = PREFIX_SIMD, opcode = 0x107},
.F64X2_RELAXED_NMADD = {prefix = PREFIX_SIMD, opcode = 0x108},
.I8X16_RELAXED_LANESELECT = {prefix = PREFIX_SIMD, opcode = 0x109},
.I16X8_RELAXED_LANESELECT = {prefix = PREFIX_SIMD, opcode = 0x10A},
.I32X4_RELAXED_LANESELECT = {prefix = PREFIX_SIMD, opcode = 0x10B},
.I64X2_RELAXED_LANESELECT = {prefix = PREFIX_SIMD, opcode = 0x10C},
.F32X4_RELAXED_MIN = {prefix = PREFIX_SIMD, opcode = 0x10D},
.F32X4_RELAXED_MAX = {prefix = PREFIX_SIMD, opcode = 0x10E},
.F64X2_RELAXED_MIN = {prefix = PREFIX_SIMD, opcode = 0x10F},
.F64X2_RELAXED_MAX = {prefix = PREFIX_SIMD, opcode = 0x110},
.I16X8_RELAXED_Q15MULR_S = {prefix = PREFIX_SIMD, opcode = 0x111},
.I16X8_RELAXED_DOT_I8X16_I7X16_S = {prefix = PREFIX_SIMD, opcode = 0x112},
.I32X4_RELAXED_DOT_I8X16_I7X16_ADD_S = {prefix = PREFIX_SIMD, opcode = 0x113},
// ------------------------------------------ 0xFE threads / atomics prefix
.MEMORY_ATOMIC_NOTIFY = {prefix = PREFIX_ATOM, opcode = 0x00, imm = {.MEMARG, .NONE}, flags = MEM},
.MEMORY_ATOMIC_WAIT32 = {prefix = PREFIX_ATOM, opcode = 0x01, imm = {.MEMARG, .NONE}, flags = MEM},
.MEMORY_ATOMIC_WAIT64 = {prefix = PREFIX_ATOM, opcode = 0x02, imm = {.MEMARG, .NONE}, flags = MEM},
.ATOMIC_FENCE = {prefix = PREFIX_ATOM, opcode = 0x03, imm = {.ZERO_BYTE, .NONE}},
.I32_ATOMIC_LOAD = {prefix = PREFIX_ATOM, opcode = 0x10, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_LOAD = {prefix = PREFIX_ATOM, opcode = 0x11, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_LOAD8_U = {prefix = PREFIX_ATOM, opcode = 0x12, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_LOAD16_U = {prefix = PREFIX_ATOM, opcode = 0x13, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_LOAD8_U = {prefix = PREFIX_ATOM, opcode = 0x14, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_LOAD16_U = {prefix = PREFIX_ATOM, opcode = 0x15, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_LOAD32_U = {prefix = PREFIX_ATOM, opcode = 0x16, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_STORE = {prefix = PREFIX_ATOM, opcode = 0x17, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_STORE = {prefix = PREFIX_ATOM, opcode = 0x18, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_STORE8 = {prefix = PREFIX_ATOM, opcode = 0x19, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_STORE16 = {prefix = PREFIX_ATOM, opcode = 0x1A, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_STORE8 = {prefix = PREFIX_ATOM, opcode = 0x1B, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_STORE16 = {prefix = PREFIX_ATOM, opcode = 0x1C, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_STORE32 = {prefix = PREFIX_ATOM, opcode = 0x1D, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_ADD = {prefix = PREFIX_ATOM, opcode = 0x1E, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_ADD = {prefix = PREFIX_ATOM, opcode = 0x1F, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_ADD_U = {prefix = PREFIX_ATOM, opcode = 0x20, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_ADD_U = {prefix = PREFIX_ATOM, opcode = 0x21, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_ADD_U = {prefix = PREFIX_ATOM, opcode = 0x22, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_ADD_U = {prefix = PREFIX_ATOM, opcode = 0x23, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_ADD_U = {prefix = PREFIX_ATOM, opcode = 0x24, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_SUB = {prefix = PREFIX_ATOM, opcode = 0x25, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_SUB = {prefix = PREFIX_ATOM, opcode = 0x26, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_SUB_U = {prefix = PREFIX_ATOM, opcode = 0x27, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_SUB_U = {prefix = PREFIX_ATOM, opcode = 0x28, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_SUB_U = {prefix = PREFIX_ATOM, opcode = 0x29, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_SUB_U = {prefix = PREFIX_ATOM, opcode = 0x2A, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_SUB_U = {prefix = PREFIX_ATOM, opcode = 0x2B, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_AND = {prefix = PREFIX_ATOM, opcode = 0x2C, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_AND = {prefix = PREFIX_ATOM, opcode = 0x2D, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_AND_U = {prefix = PREFIX_ATOM, opcode = 0x2E, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_AND_U = {prefix = PREFIX_ATOM, opcode = 0x2F, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_AND_U = {prefix = PREFIX_ATOM, opcode = 0x30, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_AND_U = {prefix = PREFIX_ATOM, opcode = 0x31, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_AND_U = {prefix = PREFIX_ATOM, opcode = 0x32, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_OR = {prefix = PREFIX_ATOM, opcode = 0x33, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_OR = {prefix = PREFIX_ATOM, opcode = 0x34, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_OR_U = {prefix = PREFIX_ATOM, opcode = 0x35, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_OR_U = {prefix = PREFIX_ATOM, opcode = 0x36, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_OR_U = {prefix = PREFIX_ATOM, opcode = 0x37, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_OR_U = {prefix = PREFIX_ATOM, opcode = 0x38, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_OR_U = {prefix = PREFIX_ATOM, opcode = 0x39, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_XOR = {prefix = PREFIX_ATOM, opcode = 0x3A, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_XOR = {prefix = PREFIX_ATOM, opcode = 0x3B, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_XOR_U = {prefix = PREFIX_ATOM, opcode = 0x3C, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_XOR_U = {prefix = PREFIX_ATOM, opcode = 0x3D, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_XOR_U = {prefix = PREFIX_ATOM, opcode = 0x3E, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_XOR_U = {prefix = PREFIX_ATOM, opcode = 0x3F, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_XOR_U = {prefix = PREFIX_ATOM, opcode = 0x40, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_XCHG = {prefix = PREFIX_ATOM, opcode = 0x41, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_XCHG = {prefix = PREFIX_ATOM, opcode = 0x42, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_XCHG_U = {prefix = PREFIX_ATOM, opcode = 0x43, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_XCHG_U = {prefix = PREFIX_ATOM, opcode = 0x44, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_XCHG_U = {prefix = PREFIX_ATOM, opcode = 0x45, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_XCHG_U = {prefix = PREFIX_ATOM, opcode = 0x46, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_XCHG_U = {prefix = PREFIX_ATOM, opcode = 0x47, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW_CMPXCHG = {prefix = PREFIX_ATOM, opcode = 0x48, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW_CMPXCHG = {prefix = PREFIX_ATOM, opcode = 0x49, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW8_CMPXCHG_U = {prefix = PREFIX_ATOM, opcode = 0x4A, imm = {.MEMARG, .NONE}, flags = MEM},
.I32_ATOMIC_RMW16_CMPXCHG_U = {prefix = PREFIX_ATOM, opcode = 0x4B, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW8_CMPXCHG_U = {prefix = PREFIX_ATOM, opcode = 0x4C, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW16_CMPXCHG_U = {prefix = PREFIX_ATOM, opcode = 0x4D, imm = {.MEMARG, .NONE}, flags = MEM},
.I64_ATOMIC_RMW32_CMPXCHG_U = {prefix = PREFIX_ATOM, opcode = 0x4E, imm = {.MEMARG, .NONE}, flags = MEM},
}
// Per-mnemonic encode form. Returns a pointer into the rodata table.
@(private, require_results)
encoding_form :: #force_inline proc "contextless" (m: Mnemonic) -> ^Encoding {
return &ENCODING_TABLE[m]
}
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