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a4f08f8307
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives in a per-arch tablegen/ metaprogram that flattens it and serializes committed binary blobs; the library #loads those into @(rodata) at compile time rather than compiling a table body. No arch keeps encoding_table.odin or decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin. * Two-stage, type-checked pipeline: tablegen Stage A emits human-readable generated Odin, which compiles and serializes the blobs in Stage B. * encode() goes through encoding_forms(m); decoders are unchanged apart from x86's flattened 2-D index. Decode tables are byte-identical to the old ones. * build.lua: a LuaJIT driver for the metaprograms, validations, and tests, with cross-platform gating and a clear report. * Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md trimmed to what was actually built. * Attribution headers added to all rexcode source files; the generators emit them so generated files keep them.
76 lines
2.6 KiB
Odin
76 lines
2.6 KiB
Odin
// rexcode · Brendan Punsky (dotbmp@github), original author
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package rexcode_mos65816
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// =============================================================================
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// INSTRUCTION
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// =============================================================================
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Instruction_Flags :: bit_field u8 {
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_: u8 | 8,
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}
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Instruction :: struct #packed {
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ops: [2]Operand `fmt:"v,operand_count"`, // 32 bytes (only MVN/MVP use 2; rest use 0 or 1)
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mnemonic: Mnemonic, // 2
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operand_count: u8, // 1
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flags: Instruction_Flags, // 1
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length: u8, // 1
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_: [3]u8, // 3
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}
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#assert(size_of(Instruction) == 40)
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@(require_results)
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inst_none :: #force_inline proc "contextless" (m: Mnemonic) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 0, length = 1}
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}
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@(require_results)
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inst_a :: #force_inline proc "contextless" (m: Mnemonic) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 1,
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ops = {op_reg(A), {}}}
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}
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@(require_results)
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inst_i8 :: #force_inline proc "contextless" (m: Mnemonic, v: i64) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 2,
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ops = {op_imm8(v), {}}}
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}
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@(require_results)
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inst_i16 :: #force_inline proc "contextless" (m: Mnemonic, v: i64) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 3,
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ops = {op_imm16(v), {}}}
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}
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@(require_results)
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inst_m :: #force_inline proc "contextless" (m: Mnemonic, mm: Memory) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 0,
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ops = {op_mem(mm), {}}}
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}
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@(require_results)
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inst_rel :: #force_inline proc "contextless" (m: Mnemonic, label_id: u32) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 2,
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ops = {op_label(label_id, 1), {}}}
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}
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@(require_results)
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inst_rel_long :: #force_inline proc "contextless" (m: Mnemonic, label_id: u32) -> Instruction {
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return Instruction{mnemonic = m, operand_count = 1, length = 3,
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ops = {op_label(label_id, 2), {}}}
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}
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// MVN/MVP src, dst -- caller writes "natural" order; encoder reverses to
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// the WDC-specified opcode | dst_bank | src_bank byte layout.
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@(require_results)
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inst_block_move :: #force_inline proc "contextless" (m: Mnemonic, src_bank, dst_bank: u8) -> Instruction {
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return Instruction{
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mnemonic = m, operand_count = 2, length = 3,
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ops = {
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Operand{immediate = i64(src_bank), kind = .IMMEDIATE, size = 1},
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Operand{immediate = i64(dst_bank), kind = .IMMEDIATE, size = 1},
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},
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}
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}
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