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Printing MRS/MSR operands by name made these visible: sweeping all 230 constants through encode -> decode -> print -> llvm-mc, 89 of them assembled to bytes we did not produce. TCR_EL1 encoded as 0x4282 where the architecture says 0x4102, FAR_EL1 as 0x5300 for 0x4300, the whole pointer-auth key block was off by a CRn, and so on. Anything reading one of them got a different register than it asked for. The field comments were right and only the packed values were wrong, so most of the file could be rebuilt from its own comments and checked against llvm-mc. Thirteen needed more: nine had bad comments too (RGSR/GCR/TFSR/TFSRE0, ID_MMFR4/5, and the three ICC SGI registers -- ICC_SGI*_EL1 are op1=0, not 3), and four carried a "historic collision" note instead of fields. Those were derived from the ARM ARM and agree with llvm-mc. Five of the six encodings that looked like duplicates were simply wrong values landing on each other; one real pair is left, DBGDTRRX_EL0 and DBGDTRTX_EL0, which genuinely share an encoding as the read and write views of one register. The name table prefers the read name, since MRS is the direction that has to print. All 230 now verified byte-exact against llvm-mc: 222 through MRS, and the 8 write-only ones through MSR. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_018UmHLRF11EoWwNWCJ7JGaA