mirror of
https://github.com/odin-lang/Odin.git
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6576 lines
300 KiB
Odin
6576 lines
300 KiB
Odin
package rexcode_arm32
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// =============================================================================
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// GENERATED FILE - DO NOT EDIT
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// =============================================================================
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//
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// Generated by tools/gen_decode_tables.odin from ENCODING_TABLE.
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// Regenerate with: cd arm32 && odin run tools/gen_decode_tables.odin -file
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//
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Decode_Entry :: struct #packed {
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mnemonic: Mnemonic,
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ops: [4]Operand_Type,
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enc: [4]Operand_Encoding,
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bits: u32,
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mask: u32,
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feature: Feature,
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mode: Mode,
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flags: Encoding_Flags,
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}
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#assert(size_of(Decode_Entry) == 21)
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Decode_Index :: struct #packed {
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start: u16,
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count: u16,
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}
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#assert(size_of(Decode_Index) == 4)
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DECODE_T32_SUB_BUCKETS :: 32
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@(rodata)
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DECODE_ENTRIES := [1553]Decode_Entry{
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{.MUL, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x00000090, 0x0FE000F0, .BASE, .A32, {}},
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{.AND, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00000010, 0x0FE00090, .BASE, .A32, {}},
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{.AND, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00000000, 0x0FE00010, .BASE, .A32, {}},
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{.MUL, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x00100090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.AND, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00100010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.AND, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00100000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.MLA, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x00200090, 0x0FE000F0, .BASE, .A32, {}},
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{.EOR, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00200010, 0x0FE00090, .BASE, .A32, {}},
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{.EOR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00200000, 0x0FE00010, .BASE, .A32, {}},
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{.MLA, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x00300090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.EOR, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00300010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.EOR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00300000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.UMAAL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00400090, 0x0FF000F0, .V6, .A32, {}},
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{.SUB, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00400010, 0x0FE00090, .BASE, .A32, {}},
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{.SUB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00400000, 0x0FE00010, .BASE, .A32, {}},
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{.SUB, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00500010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.SUB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00500000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.MLS, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x00600090, 0x0FF000F0, .V6T2, .A32, {}},
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{.RSB, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00600010, 0x0FE00090, .BASE, .A32, {}},
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{.RSB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00600000, 0x0FE00010, .BASE, .A32, {}},
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{.RSB, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00700010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.RSB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00700000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.UMULL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00800090, 0x0FE000F0, .BASE, .A32, {}},
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{.ADD, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00800010, 0x0FE00090, .BASE, .A32, {}},
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{.ADD, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00800000, 0x0FE00010, .BASE, .A32, {}},
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{.UMULL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00900090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.ADD, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00900010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.ADD, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00900000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.UMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00A00090, 0x0FE000F0, .BASE, .A32, {}},
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{.ADC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00A00010, 0x0FE00090, .BASE, .A32, {}},
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{.ADC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00A00000, 0x0FE00010, .BASE, .A32, {}},
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{.UMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00B00090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.ADC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00B00010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.ADC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00B00000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.SMULL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00C00090, 0x0FE000F0, .BASE, .A32, {}},
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{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00C000B0, 0x0F7000F0, .BASE, .A32, {}},
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{.LDRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00C000D0, 0x0F7000F0, .V5TE, .A32, {}},
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{.STRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00C000F0, 0x0F7000F0, .V5TE, .A32, {}},
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{.SBC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00C00010, 0x0FE00090, .BASE, .A32, {}},
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{.SBC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00C00000, 0x0FE00010, .BASE, .A32, {}},
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{.SMULL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00D00090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00D000B0, 0x0F7000F0, .BASE, .A32, {}},
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{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00D000D0, 0x0F7000F0, .BASE, .A32, {}},
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{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x00D000F0, 0x0F7000F0, .BASE, .A32, {}},
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{.SBC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00D00010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.SBC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00D00000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.SMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00E00090, 0x0FE000F0, .BASE, .A32, {}},
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{.RSC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00E00010, 0x0FE00090, .BASE, .A32, {}},
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{.RSC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00E00000, 0x0FE00010, .BASE, .A32, {}},
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{.SMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x00F00090, 0x0FF000F0, .BASE, .A32, {sets_flags=true}},
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{.RSC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00F00010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
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{.RSC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x00F00000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
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{.SETEND, {.IMM_ENDIAN, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF1010000, 0xFFFFFDFF, .V6, .A32, {deprecated=true}},
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{.MRS, {.GPR, .PSR_FIELD, .NONE, .NONE}, {.RD, .NONE, .NONE, .NONE}, 0x010F0000, 0x0FBF0FFF, .BASE, .A32, {}},
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{.CPS, {.IMM_IFLAGS, .NONE, .NONE, .NONE}, {.CPS_IFLAGS, .NONE, .NONE, .NONE}, 0xF1000000, 0xFFF1FE20, .V6, .A32, {}},
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{.HLT, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xE1000070, 0xFFF000F0, .V8, .A32, {}},
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{.SWP, {.GPR, .GPR, .GPR, .NONE}, {.RT_A32, .RM_A32, .RN_A32, .NONE}, 0x01000090, 0x0FF00FF0, .BASE, .A32, {deprecated=true}},
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{.CRC32B, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01000040, 0x0FF00FF0, .CRC32, .A32, {}},
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{.CRC32CB, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01000240, 0x0FF00FF0, .CRC32, .A32, {}},
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{.QADD, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RN_A32, .NONE}, 0x01000050, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLABB, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x01000080, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLABT, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x010000C0, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLATB, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x010000A0, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLATT, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x010000E0, 0x0FF000F0, .V5TE, .A32, {}},
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{.SETPAN, {.IMM_HINT, .NONE, .NONE, .NONE}, {.HINT_FIELD, .NONE, .NONE, .NONE}, 0xF1100000, 0xFFFFFDFF, .V8, .A32, {}},
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{.TST, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01100010, 0x0FF0F090, .BASE, .A32, {}},
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{.TST, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01100000, 0x0FF0F010, .BASE, .A32, {}},
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{.BX, {.GPR, .NONE, .NONE, .NONE}, {.RM_A32, .NONE, .NONE, .NONE}, 0x012FFF10, 0x0FFFFFF0, .BASE, .A32, {branch=true, writes_pc=true}},
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{.BLX, {.GPR, .NONE, .NONE, .NONE}, {.RM_A32, .NONE, .NONE, .NONE}, 0x012FFF30, 0x0FFFFFF0, .V5T, .A32, {branch=true, writes_pc=true}},
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{.BXJ, {.GPR, .NONE, .NONE, .NONE}, {.RM_A32, .NONE, .NONE, .NONE}, 0x012FFF20, 0x0FFFFFF0, .V5TEJ, .A32, {branch=true, writes_pc=true, deprecated=true}},
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{.MSR, {.PSR_FIELD, .GPR, .NONE, .NONE}, {.PSR_FIELD_MASK, .RM_A32, .NONE, .NONE}, 0x0120F000, 0x0FB0FFF0, .BASE, .A32, {}},
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{.SMULWB, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x012000A0, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.SMULWT, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x012000E0, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.BKPT, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xE1200070, 0xFFF000F0, .V5T, .A32, {}},
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{.CRC32H, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01200040, 0x0FF00FF0, .CRC32, .A32, {}},
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{.CRC32CH, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01200240, 0x0FF00FF0, .CRC32, .A32, {}},
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{.QSUB, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RN_A32, .NONE}, 0x01200050, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLAWB, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x01200080, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLAWT, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x012000C0, 0x0FF000F0, .V5TE, .A32, {}},
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{.TEQ, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01300010, 0x0FF0F090, .BASE, .A32, {}},
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{.TEQ, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01300000, 0x0FF0F010, .BASE, .A32, {}},
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{.HVC, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xE1400070, 0xFFF000F0, .V7VE, .A32, {}},
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{.SWPB, {.GPR, .GPR, .GPR, .NONE}, {.RT_A32, .RM_A32, .RN_A32, .NONE}, 0x01400090, 0x0FF00FF0, .BASE, .A32, {deprecated=true}},
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{.CRC32W, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01400040, 0x0FF00FF0, .CRC32, .A32, {}},
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{.CRC32CW, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01400240, 0x0FF00FF0, .CRC32, .A32, {}},
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{.QDADD, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RN_A32, .NONE}, 0x01400050, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLALBB, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x01400080, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLALBT, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x014000C0, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLALTB, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x014000A0, 0x0FF000F0, .V5TE, .A32, {}},
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{.SMLALTT, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x014000E0, 0x0FF000F0, .V5TE, .A32, {}},
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{.CMP, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01500010, 0x0FF0F090, .BASE, .A32, {}},
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{.CMP, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01500000, 0x0FF0F010, .BASE, .A32, {}},
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{.ERET, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0160006E, 0x0FFFFFFF, .V7VE, .A32, {writes_pc=true}},
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{.SMC, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x01600070, 0x0FFFFFF0, .V7, .A32, {}},
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{.CLZ, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x016F0F10, 0x0FFF0FF0, .V5T, .A32, {}},
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{.SMULBB, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x01600080, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.SMULBT, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x016000C0, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.SMULTB, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x016000A0, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.SMULTT, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x016000E0, 0x0FF0F0F0, .V5TE, .A32, {}},
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{.QDSUB, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RN_A32, .NONE}, 0x01600050, 0x0FF000F0, .V5TE, .A32, {}},
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{.CMN, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01700010, 0x0FF0F090, .BASE, .A32, {}},
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{.CMN, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_A32, .RM_A32, .NONE, .NONE}, 0x01700000, 0x0FF0F010, .BASE, .A32, {}},
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{.STL, {.GPR, .MEM, .NONE, .NONE}, {.RM_A32, .RN_A32, .NONE, .NONE}, 0x0180FC90, 0x0FF0FFF0, .V8, .A32, {}},
|
|
{.STREX, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01800F90, 0x0FF00FF0, .V6K, .A32, {}},
|
|
{.STLEX, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01800E90, 0x0FF00FF0, .V8, .A32, {}},
|
|
{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x018000B0, 0x0F700FF0, .BASE, .A32, {}},
|
|
{.LDRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x018000D0, 0x0F700FF0, .V5TE, .A32, {}},
|
|
{.STRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x018000F0, 0x0F700FF0, .V5TE, .A32, {}},
|
|
{.ORR, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01800010, 0x0FE00090, .BASE, .A32, {}},
|
|
{.ORR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01800000, 0x0FE00010, .BASE, .A32, {}},
|
|
{.LDA, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01900C9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.LDREX, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01900F9F, 0x0FF00FFF, .V6K, .A32, {}},
|
|
{.LDAEX, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01900E9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x019000B0, 0x0F700FF0, .BASE, .A32, {}},
|
|
{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x019000D0, 0x0F700FF0, .BASE, .A32, {}},
|
|
{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x019000F0, 0x0F700FF0, .BASE, .A32, {}},
|
|
{.ORR, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01900010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
|
|
{.ORR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01900000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
|
|
{.RRX, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01A00060, 0x0FFF0FF0, .BASE, .A32, {}},
|
|
{.LSL, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RS_A32, .NONE}, 0x01A00010, 0x0FFF00F0, .BASE, .A32, {}},
|
|
{.LSR, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RS_A32, .NONE}, 0x01A00030, 0x0FFF00F0, .BASE, .A32, {}},
|
|
{.ASR, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RS_A32, .NONE}, 0x01A00050, 0x0FFF00F0, .BASE, .A32, {}},
|
|
{.ROR, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RM_A32, .RS_A32, .NONE}, 0x01A00070, 0x0FFF00F0, .BASE, .A32, {}},
|
|
{.STREXD, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01A00F90, 0x0FF00FF0, .V6K, .A32, {}},
|
|
{.STLEXD, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01A00E90, 0x0FF00FF0, .V8, .A32, {}},
|
|
{.LSL, {.GPR, .GPR, .IMM5, .NONE}, {.RD, .RM_A32, .A32_IMM_SHIFT, .NONE}, 0x01A00000, 0x0FFF0070, .BASE, .A32, {}},
|
|
{.LSR, {.GPR, .GPR, .IMM5, .NONE}, {.RD, .RM_A32, .A32_IMM_SHIFT, .NONE}, 0x01A00020, 0x0FFF0070, .BASE, .A32, {}},
|
|
{.ASR, {.GPR, .GPR, .IMM5, .NONE}, {.RD, .RM_A32, .A32_IMM_SHIFT, .NONE}, 0x01A00040, 0x0FFF0070, .BASE, .A32, {}},
|
|
{.ROR, {.GPR, .GPR, .IMM5, .NONE}, {.RD, .RM_A32, .A32_IMM_SHIFT, .NONE}, 0x01A00060, 0x0FFF0070, .BASE, .A32, {}},
|
|
{.MOV, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01A00010, 0x0FEF0090, .BASE, .A32, {}},
|
|
{.MOV, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01A00000, 0x0FEF0010, .BASE, .A32, {}},
|
|
{.LDREXD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01B00F9F, 0x0FF00FFF, .V6K, .A32, {}},
|
|
{.LDAEXD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01B00E9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.MOV, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01B00010, 0x0FFF0090, .BASE, .A32, {sets_flags=true}},
|
|
{.MOV, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01B00000, 0x0FFF0010, .BASE, .A32, {sets_flags=true}},
|
|
{.STLB, {.GPR, .MEM, .NONE, .NONE}, {.RM_A32, .RN_A32, .NONE, .NONE}, 0x01C0FC90, 0x0FF0FFF0, .V8, .A32, {}},
|
|
{.STREXB, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01C00F90, 0x0FF00FF0, .V6K, .A32, {}},
|
|
{.STLEXB, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01C00E90, 0x0FF00FF0, .V8, .A32, {}},
|
|
{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01C000B0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01C000D0, 0x0F7000F0, .V5TE, .A32, {}},
|
|
{.STRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01C000F0, 0x0F7000F0, .V5TE, .A32, {}},
|
|
{.BIC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01C00010, 0x0FE00090, .BASE, .A32, {}},
|
|
{.BIC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01C00000, 0x0FE00010, .BASE, .A32, {}},
|
|
{.LDAB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01D00C9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.LDREXB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01D00F9F, 0x0FF00FFF, .V6K, .A32, {}},
|
|
{.LDAEXB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01D00E9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01D000B0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01D000D0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x01D000F0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.BIC, {.GPR, .GPR, .GPR_RSR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01D00010, 0x0FF00090, .BASE, .A32, {sets_flags=true}},
|
|
{.BIC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x01D00000, 0x0FF00010, .BASE, .A32, {sets_flags=true}},
|
|
{.STLH, {.GPR, .MEM, .NONE, .NONE}, {.RM_A32, .RN_A32, .NONE, .NONE}, 0x01E0FC90, 0x0FF0FFF0, .V8, .A32, {}},
|
|
{.STREXH, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01E00F90, 0x0FF00FF0, .V6K, .A32, {}},
|
|
{.STLEXH, {.GPR, .GPR, .MEM, .NONE}, {.RD, .RT_A32, .RN_A32, .NONE}, 0x01E00E90, 0x0FF00FF0, .V8, .A32, {}},
|
|
{.MVN, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01E00010, 0x0FEF0090, .BASE, .A32, {}},
|
|
{.MVN, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01E00000, 0x0FEF0010, .BASE, .A32, {}},
|
|
{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01E000B0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01E000D0, 0x0F7000F0, .V5TE, .A32, {}},
|
|
{.STRD, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01E000F0, 0x0F7000F0, .V5TE, .A32, {}},
|
|
{.LDAH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01F00C9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.LDREXH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01F00F9F, 0x0FF00FFF, .V6K, .A32, {}},
|
|
{.LDAEXH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .RN_A32, .NONE, .NONE}, 0x01F00E9F, 0x0FF00FFF, .V8, .A32, {}},
|
|
{.MVN, {.GPR, .GPR_RSR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01F00010, 0x0FFF0090, .BASE, .A32, {sets_flags=true}},
|
|
{.MVN, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x01F00000, 0x0FFF0010, .BASE, .A32, {sets_flags=true}},
|
|
{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01F000B0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01F000D0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x01F000F0, 0x0F7000F0, .BASE, .A32, {}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000D40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000950, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000D50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VFMA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000C50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VRHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000140, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000050, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000250, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000750, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VAND, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VTST, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCEQ, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000E40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000350, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000F40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000650, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VRECPS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000F50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF2000440, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VRSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF2000540, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF2000450, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA1C, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2000C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000D00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000910, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000D10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VFMA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000C10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000000, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000200, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VRHADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000100, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000010, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000210, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000710, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000700, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VAND, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VTST, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCEQ, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000E00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000310, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000300, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000F00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000600, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000610, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000A00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000A10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000B10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VRECPS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2000F10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2000400, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VRSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2000500, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2000410, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.AND, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02000000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100D40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100950, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100050, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100250, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100750, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VBIC, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VTST, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCEQ, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100E40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100350, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100F40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100650, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA1P, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2100C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100D00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100910, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100000, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100200, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100010, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100210, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQDMULH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100B00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100710, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100700, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VBIC, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VTST, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCEQ, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100E00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100310, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100300, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100600, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100F00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100610, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100A00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100A10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2100B10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2100400, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.AND, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02100000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200D40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200950, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200D50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VFMS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200C50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200050, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200250, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200750, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VORR, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VTST, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200350, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200650, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200F40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VRSQRTS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200F50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA1M, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2200C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200D00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200910, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200D10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VFMS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200C10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200000, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200200, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200010, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200210, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQDMULH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200B00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200710, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200700, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VORR, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VTST, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200310, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200300, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200600, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200F00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200610, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200A00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200A10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200B10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VRSQRTS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2200F10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2200400, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.EOR, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02200000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300D40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300050, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300250, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VORN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300F40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF2300440, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA1SU0, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2300C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300D00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VQADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300010, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300210, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VORN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2300F00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF2300400, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.EOR, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02300000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.SUB, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02400000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.SUB, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02500000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.RSB, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02600000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.RSB, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02700000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF2880A10, 0xFFB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800F50, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800850, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800E70, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800E50, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800050, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMVN, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800070, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMVN, {.QPR, .IMM, .NONE, .NONE}, {.VD_Q, .NONE, .NONE, .NONE}, 0xF2800870, 0xFEB80FD0, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800410, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800F10, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800E30, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800C10, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800610, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800E10, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800D10, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800210, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800A10, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800810, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800010, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2800E00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2800C00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2800800, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2800A00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800D30, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800C30, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800030, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800430, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800A30, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800630, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800230, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VMVN, {.DPR, .IMM, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0xF2800830, 0xFEB80F90, .NEON, .A32, {}},
|
|
{.VQSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800910, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VQRSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800950, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800810, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VRSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800850, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VSHLL, {.QPR, .DPR, .IMM, .NONE}, {.VD_Q, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800A10, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800050, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VSRA, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800150, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VRSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800250, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VQSHL, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800750, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800010, 0xFE800F10, .NEON, .A32, {}},
|
|
{.VSRA, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800110, 0xFE800F10, .NEON, .A32, {}},
|
|
{.VRSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800210, 0xFE800F10, .NEON, .A32, {}},
|
|
{.VQSHL, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800710, 0xFE800F10, .NEON, .A32, {}},
|
|
{.ADD, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02800000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF2900A10, 0xFFB80FD0, .NEON, .A32, {}},
|
|
{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900C00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900800, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900A00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900D00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900900, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900B00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2900840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2900040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2900440, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900A40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2900740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQRDMLAH_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2900E40, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VQRDMLSH_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2900F40, 0xFFB00F50, .V8, .A32, {}},
|
|
{.ADD, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02900000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF2A00A10, 0xFFB80FD0, .NEON, .A32, {}},
|
|
{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00C00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00800, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00A00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00D00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00900, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00B00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A008C0, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLA_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A000C0, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00440, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A004C0, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00A40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQDMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF2A00740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VFMA_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A000C0, 0xFFB00F50, .VFPV4, .A32, {}},
|
|
{.VFMS_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A004C0, 0xFFB00F50, .VFPV4, .A32, {}},
|
|
{.VQRDMLAH_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00E40, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VQRDMLSH_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00F40, 0xFFB00F50, .V8, .A32, {}},
|
|
{.ADC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02A00000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.VEXT, {.QPR, .QPR, .QPR, .IMM4}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF2B00040, 0xFFB00050, .NEON, .A32, {}},
|
|
{.VEXT, {.DPR, .DPR, .DPR, .IMM4}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2B00000, 0xFFB00010, .NEON, .A32, {}},
|
|
{.ADC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02B00000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.SBC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02C00000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.SBC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02D00000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.RSC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02E00000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.RSC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x02F00000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000D50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000950, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000040, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VHSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000240, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000050, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000250, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000750, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VABD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000740, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VEOR, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCEQ, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000E40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000350, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000340, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VACGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000E50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000640, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000650, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF3000440, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VRSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF3000540, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VM_Q, .VN_Q, .NONE}, 0xF3000450, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA256H, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3000C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000D10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000910, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000000, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VHSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000200, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000010, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000210, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000710, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VABD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000700, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VEOR, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCEQ, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000310, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000E00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000300, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VACGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000E10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000600, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000610, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000A00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMAX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000F00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000A10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3000D00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF3000400, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VRSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF3000500, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQSHL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VM_D, .VN_D, .NONE}, 0xF3000410, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.MOVW, {.GPR, .IMM16_LO_HI, .NONE, .NONE}, {.RD, .NONE, .NONE, .NONE}, 0x03000000, 0x0FF00000, .V6T2, .A32, {}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100D50, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VMLS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQRDMULH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQRDMLAH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100B50, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VQRDMLSH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100C50, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VBSL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCEQ, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGE, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100E40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.SHA256H2, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3100C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100D10, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.VMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQRDMULH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100B00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQRDMLAH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100B10, 0xFFB00F10, .V8, .A32, {}},
|
|
{.VQRDMLSH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100C10, 0xFFB00F10, .V8, .A32, {}},
|
|
{.VBSL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCEQ, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGE, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3100E00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.TST, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RN_A32, .A32_IMM_MOD, .NONE, .NONE}, 0x03100000, 0x0FF0F000, .BASE, .A32, {}},
|
|
{.NOP, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F000, 0x0FFFFFFF, .V6K, .A32, {}},
|
|
{.YIELD, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F001, 0x0FFFFFFF, .V6K, .A32, {}},
|
|
{.WFE, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F002, 0x0FFFFFFF, .V6K, .A32, {}},
|
|
{.WFI, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F003, 0x0FFFFFFF, .V6K, .A32, {}},
|
|
{.SEV, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F004, 0x0FFFFFFF, .V6K, .A32, {}},
|
|
{.SEVL, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F005, 0x0FFFFFFF, .V8, .A32, {}},
|
|
{.ESB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F010, 0x0FFFFFFF, .V8, .A32, {}},
|
|
{.PSB_CSYNC, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F011, 0x0FFFFFFF, .V8, .A32, {}},
|
|
{.TSB_CSYNC, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F012, 0x0FFFFFFF, .V8, .A32, {}},
|
|
{.CSDB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0320F014, 0x0FFFFFFF, .V8, .A32, {}},
|
|
{.DBG, {.IMM_HINT, .NONE, .NONE, .NONE}, {.HINT_FIELD, .NONE, .NONE, .NONE}, 0x0320F0F0, 0x0FFFFFF0, .V7, .A32, {}},
|
|
{.HINT, {.IMM_HINT, .NONE, .NONE, .NONE}, {.HINT_FIELD, .NONE, .NONE, .NONE}, 0x0320F000, 0x0FFFFF00, .V6K, .A32, {}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200940, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQRDMULH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200B40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQRDMLAH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200B50, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VQRDMLSH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200C50, 0xFFB00F50, .V8, .A32, {}},
|
|
{.VABD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200D40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VBIT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCEQ, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200850, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200E40, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VACGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200E50, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.SHA256SU1, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3200C40, 0xFFB00F50, .CRYPTO, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200900, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQRDMULH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200B00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VQRDMLAH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200B10, 0xFFB00F10, .V8, .A32, {}},
|
|
{.VQRDMLSH, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200C10, 0xFFB00F10, .V8, .A32, {}},
|
|
{.VABD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200D00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VBIT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCEQ, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200810, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200E00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VACGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200E10, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VPMIN, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3200F00, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.MSR, {.PSR_FIELD, .IMM_MOD, .NONE, .NONE}, {.PSR_FIELD_MASK, .A32_IMM_MOD, .NONE, .NONE}, 0x0320F000, 0x0FB0F000, .BASE, .A32, {}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3300840, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VBIF, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3300150, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VCGT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xF3300E40, 0xFFB00F50, .NEON_HALF_FP, .A32, {}},
|
|
{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3300800, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VBIF, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3300110, 0xFFB00F10, .NEON, .A32, {}},
|
|
{.VCGT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3300E00, 0xFFB00F10, .NEON_HALF_FP, .A32, {}},
|
|
{.TEQ, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RN_A32, .A32_IMM_MOD, .NONE, .NONE}, 0x03300000, 0x0FF0F000, .BASE, .A32, {}},
|
|
{.MOVT, {.GPR, .IMM16_LO_HI, .NONE, .NONE}, {.RD, .NONE, .NONE, .NONE}, 0x03400000, 0x0FF00000, .V6T2, .A32, {}},
|
|
{.CMP, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RN_A32, .A32_IMM_MOD, .NONE, .NONE}, 0x03500000, 0x0FF0F000, .BASE, .A32, {}},
|
|
{.CMN, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RN_A32, .A32_IMM_MOD, .NONE, .NONE}, 0x03700000, 0x0FF0F000, .BASE, .A32, {}},
|
|
{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3880A10, 0xFFB80FD0, .NEON, .A32, {}},
|
|
{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3800C00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3800800, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3800A00, 0xFFB00F50, .NEON, .A32, {}},
|
|
{.VQSHRUN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800810, 0xFF800FD0, .NEON, .A32, {}},
|
|
{.VQRSHRUN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800850, 0xFF800FD0, .NEON, .A32, {}},
|
|
{.VQSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800910, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VQRSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800950, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VSHLL, {.QPR, .DPR, .IMM, .NONE}, {.VD_Q, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800A10, 0xFE800FD0, .NEON, .A32, {}},
|
|
{.VSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800050, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VSRA, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800150, 0xFE800F50, .NEON, .A32, {}},
|
|
{.VRSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800250, 0xFE800F50, .NEON, .A32, {}},
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{.VSLI, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800550, 0xFE800F50, .NEON, .A32, {}},
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{.VSRI, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF3800450, 0xFE800F50, .NEON, .A32, {}},
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{.VSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800010, 0xFE800F10, .NEON, .A32, {}},
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{.VSRA, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800110, 0xFE800F10, .NEON, .A32, {}},
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{.VRSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800210, 0xFE800F10, .NEON, .A32, {}},
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{.VSLI, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800510, 0xFE800F10, .NEON, .A32, {}},
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{.VSRI, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF3800410, 0xFE800F10, .NEON, .A32, {}},
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{.ORR, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x03800000, 0x0FE00000, .BASE, .A32, {}},
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{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3900A10, 0xFFB80FD0, .NEON, .A32, {}},
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{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900C00, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900800, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900A00, 0xFFB00F50, .NEON, .A32, {}},
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{.VMUL_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900840, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLA_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900040, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLS_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900440, 0xFFB00F50, .NEON, .A32, {}},
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{.VMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900A40, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900240, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3900640, 0xFFB00F50, .NEON, .A32, {}},
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{.VQRDMLAH_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900E40, 0xFFB00F50, .V8, .A32, {}},
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{.VQRDMLSH_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900F40, 0xFFB00F50, .V8, .A32, {}},
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{.ORR, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x03900000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
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{.VMOVL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3A00A10, 0xFFB80FD0, .NEON, .A32, {}},
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{.VMULL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00C00, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLAL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00800, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLSL, {.QPR, .DPR, .DPR, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00A00, 0xFFB00F50, .NEON, .A32, {}},
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|
{.VMUL_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00840, 0xFFB00F50, .NEON, .A32, {}},
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{.VMUL_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A008C0, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLA_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00040, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLA_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A000C0, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLS_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00440, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLS_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A004C0, 0xFFB00F50, .NEON, .A32, {}},
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{.VMULL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00A40, 0xFFB00F50, .NEON, .A32, {}},
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{.VMLAL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00240, 0xFFB00F50, .NEON, .A32, {}},
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|
{.VMLSL_LANE, {.QPR, .DPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_D, .VM_D, .NONE}, 0xF3A00640, 0xFFB00F50, .NEON, .A32, {}},
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|
{.VFMA_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A000C0, 0xFFB00F50, .VFPV4, .A32, {}},
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|
{.VFMS_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A004C0, 0xFFB00F50, .VFPV4, .A32, {}},
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|
{.VQRDMLAH_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00E40, 0xFFB00F50, .V8, .A32, {}},
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|
{.VQRDMLSH_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00F40, 0xFFB00F50, .V8, .A32, {}},
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|
{.MOV, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RD, .A32_IMM_MOD, .NONE, .NONE}, 0x03A00000, 0x0FEF0000, .BASE, .A32, {}},
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{.VRECPE, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BB0440, 0xFFBF0FD0, .NEON, .A32, {}},
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|
{.VRECPE, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3BB0400, 0xFFBF0FD0, .NEON, .A32, {}},
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|
{.VRECPE, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3BB0500, 0xFFBF0FD0, .NEON, .A32, {}},
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|
{.VRECPE, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BB0540, 0xFFBF0FD0, .NEON, .A32, {}},
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|
{.VRSQRTE, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3BB0580, 0xFFBF0FD0, .NEON, .A32, {}},
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{.VRSQRTE, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BB05C0, 0xFFBF0FD0, .NEON, .A32, {}},
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{.VRSQRTE, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3BB0480, 0xFFBF0FD0, .NEON, .A32, {}},
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{.VRSQRTE, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BB04C0, 0xFFBF0FD0, .NEON, .A32, {}},
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{.SHA1H, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B902C0, 0xFFBF0FD0, .CRYPTO, .A32, {}},
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{.SHA1SU1, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BA0380, 0xFFBF0FD0, .CRYPTO, .A32, {}},
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{.SHA256SU0, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BA03C0, 0xFFBF0FD0, .CRYPTO, .A32, {}},
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{.VCVT_BF16, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B60600, 0xFFBF0FD0, .BF16, .A32, {}},
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{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B90740, 0xFFB30FD0, .NEON, .A32, {}},
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{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B90340, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B50300, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B50340, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B10340, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90700, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10300, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VABS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90300, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B903C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B50380, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B907C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90380, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B103C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90780, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B503C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VNEG, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10380, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VMVN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00580, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VMVN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B005C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B20200, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B60200, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3BA0200, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B602C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B60280, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3BA02C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B20280, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B202C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3BA0280, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVUN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B20240, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVUN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3B60240, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VQMOVUN, {.DPR, .QPR, .NONE, .NONE}, {.VD_D, .VM_Q, .NONE, .NONE}, 0xF3BA0240, 0xFFB30FD0, .NEON, .A32, {}},
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{.VPADDL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B40200, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADDL, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00240, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADDL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B80200, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADDL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00200, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADDL, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B002C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADDL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00280, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADAL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00680, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADAL, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00600, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADAL, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00640, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VPADAL, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B006C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VSHLL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3BA0300, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VSHLL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3B20300, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VSHLL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3B60300, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00440, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B40440, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B40400, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00400, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B80440, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B80400, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B40480, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B804C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B004C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00480, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B404C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLZ, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B80480, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCNT, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00500, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCNT, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00540, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV16, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00100, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV16, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00140, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV32, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00080, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV32, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B40080, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV32, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B000C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV32, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B400C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00000, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B40040, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00040, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B80000, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B80040, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VREV64, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B40000, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VTRN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B20080, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VTRN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B600C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VTRN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BA00C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VTRN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B200C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VTRN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3BA0080, 0xFFB30FD0, .NEON, .A32, {}},
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{.VTRN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B60080, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VUZP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BA0140, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VUZP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B60100, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VUZP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B60140, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VUZP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B20100, 0xFFB30FD0, .NEON, .A32, {}},
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{.VUZP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B20140, 0xFFB30FD0, .NEON, .A32, {}},
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{.VZIP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B601C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VZIP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3BA01C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VZIP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B201C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VZIP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B20180, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VZIP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B60180, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VSWP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B20000, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VSWP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B20040, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.AESE, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00300, 0xFFB30FD0, .CRYPTO, .A32, {}},
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{.AESD, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00340, 0xFFB30FD0, .CRYPTO, .A32, {}},
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{.AESMC, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B00380, 0xFFB30FD0, .CRYPTO, .A32, {}},
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{.AESIMC, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B003C0, 0xFFB30FD0, .CRYPTO, .A32, {}},
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{.VCEQ_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10100, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCEQ_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B10140, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCEQ_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90500, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCEQ_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B90540, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCGE_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B100C0, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCGE_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10080, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCGE_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B904C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCGE_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90480, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCGT_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90400, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCGT_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B90440, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCGT_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10000, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCGT_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B10040, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLE_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B905C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLE_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90580, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VCLE_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10180, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLE_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B101C0, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLT_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B10240, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLT_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B90600, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLT_Z, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xF3B90640, 0xFFB30FD0, .NEON, .A32, {}},
|
|
{.VCLT_Z, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B10200, 0xFFB30FD0, .NEON, .A32, {}},
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|
{.VTBL, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00900, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBL, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00B00, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00800, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBL, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00A00, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBX, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00B40, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBX, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00840, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBX, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00940, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VTBX, {.DPR, .DPR_LIST, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF3B00A40, 0xFFB00F70, .NEON, .A32, {}},
|
|
{.VDUP, {.QPR, .DPR_ELEM, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3B00C40, 0xFFB00FD0, .NEON, .A32, {}},
|
|
{.VDUP, {.DPR, .DPR_ELEM, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xF3B00C00, 0xFFB00FD0, .NEON, .A32, {}},
|
|
{.MOV, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RD, .A32_IMM_MOD, .NONE, .NONE}, 0x03B00000, 0x0FFF0000, .BASE, .A32, {sets_flags=true}},
|
|
{.BIC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x03C00000, 0x0FE00000, .BASE, .A32, {}},
|
|
{.BIC, {.GPR, .GPR, .IMM_MOD, .NONE}, {.RD, .RN_A32, .A32_IMM_MOD, .NONE}, 0x03D00000, 0x0FF00000, .BASE, .A32, {sets_flags=true}},
|
|
{.MVN, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RD, .A32_IMM_MOD, .NONE, .NONE}, 0x03E00000, 0x0FEF0000, .BASE, .A32, {}},
|
|
{.MVN, {.GPR, .IMM_MOD, .NONE, .NONE}, {.RD, .A32_IMM_MOD, .NONE, .NONE}, 0x03F00000, 0x0FFF0000, .BASE, .A32, {sets_flags=true}},
|
|
{.VST1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000A00, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000600, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000700, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000200, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000800, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000900, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000300, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST3, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000500, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST3, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000400, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST4, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000100, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST4, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4000000, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200600, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200A00, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200700, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200200, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200800, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200900, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD2, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200300, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD3, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200400, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD3, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200500, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD4, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200000, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VLD4, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4200100, 0xFFF00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800400, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800800, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VST1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800000, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VST2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800500, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800100, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800900, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800600, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800200, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800A00, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800700, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800B00, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800300, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VST1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800400, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.VST1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800800, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.VST1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4800000, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x04800000, 0x0F700000, .BASE, .A32, {}},
|
|
{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x04900000, 0x0F700000, .BASE, .A32, {}},
|
|
{.VLD2R, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00D0F, 0xFFB00F0F, .NEON, .A32, {}},
|
|
{.VLD3R, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00E0F, 0xFFB00F0F, .NEON, .A32, {}},
|
|
{.VLD4R, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00F0F, 0xFFB00F0F, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00800, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00400, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00000, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VLD1, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VFP_D_LIST, .RN_A32, .NONE, .NONE}, 0xF4A00C00, 0xFFB00F00, .NEON, .A32, {}},
|
|
{.VLD2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00900, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00500, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD2_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00100, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00200, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00600, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD3_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00A00, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00700, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00B00, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD4_LANE, {.DPR_LIST, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00300, 0xFFB00D00, .NEON, .A32, {}},
|
|
{.VLD1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00800, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.VLD1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00400, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.VLD1_LANE, {.DPR_ELEM, .MEM, .NONE, .NONE}, {.VD_D, .RN_A32, .NONE, .NONE}, 0xF4A00000, 0xFFB00C00, .NEON, .A32, {}},
|
|
{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x04C00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.PLI, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF4D0F000, 0xFF70F000, .V7, .A32, {}},
|
|
{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_POST_INDEX, .NONE, .NONE}, 0x04D00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.CLREX, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF57FF01F, 0xFFFFFFFF, .V6K, .A32, {}},
|
|
{.SB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF57FF070, 0xFFFFFFFF, .V8, .A32, {}},
|
|
{.DMB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF57FF050, 0xFFFFFFF0, .V7, .A32, {}},
|
|
{.DSB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF57FF040, 0xFFFFFFF0, .V7, .A32, {}},
|
|
{.ISB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF57FF060, 0xFFFFFFF0, .V7, .A32, {}},
|
|
{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0x05800000, 0x0F700000, .BASE, .A32, {}},
|
|
{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0x05900000, 0x0F700000, .BASE, .A32, {}},
|
|
{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x05A00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x05B00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0x05C00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.PLD, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF5D0F000, 0xFFF0F000, .V5T, .A32, {}},
|
|
{.PLDW, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF5D0F000, 0xFFF0F000, .V7, .A32, {}},
|
|
{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0x05D00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x05E00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_PRE_INDEX, .NONE, .NONE}, 0x05F00000, 0x0F700000, .BASE, .A32, {}},
|
|
{.SADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06100F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.QSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06200F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SHSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06300F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.USAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.USUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.USUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06500F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UQSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06600F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700F90, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700F10, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHASX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700F50, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700FF0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UHSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06700F70, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SEL, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06800FB0, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SXTB16, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x068F0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.SXTAB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06800070, 0x0FF00070, .V6, .A32, {}},
|
|
{.PKHBT, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06800010, 0x0FF00070, .V6, .A32, {}},
|
|
{.PKHTB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06800050, 0x0FF00070, .V6, .A32, {}},
|
|
{.SSAT16, {.GPR, .IMM4_SAT, .GPR, .NONE}, {.RD, .SAT_IMM5, .RM_A32, .NONE}, 0x06A00F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.SXTB, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06AF0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.SXTAB, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06A00070, 0x0FF00070, .V6, .A32, {}},
|
|
{.SSAT, {.GPR, .IMM4_SAT, .GPR_SHIFTED, .NONE}, {.RD, .SAT_IMM5, .RM_A32, .NONE}, 0x06A00010, 0x0FE00030, .V6, .A32, {}},
|
|
{.REV, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06BF0F30, 0x0FFF0FF0, .V6, .A32, {}},
|
|
{.REV16, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06BF0FB0, 0x0FFF0FF0, .V6, .A32, {}},
|
|
{.SXTH, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06BF0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.SXTAH, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06B00070, 0x0FF00070, .V6, .A32, {}},
|
|
{.UXTB16, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06CF0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.UXTAB16, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06C00070, 0x0FF00070, .V6, .A32, {}},
|
|
{.USAT16, {.GPR, .IMM4_SAT, .GPR, .NONE}, {.RD, .SAT_IMM5, .RM_A32, .NONE}, 0x06E00F30, 0x0FF00FF0, .V6, .A32, {}},
|
|
{.UXTB, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06EF0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.UXTAB, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06E00070, 0x0FF00070, .V6, .A32, {}},
|
|
{.USAT, {.GPR, .IMM4_SAT, .GPR_SHIFTED, .NONE}, {.RD, .SAT_IMM5, .RM_A32, .NONE}, 0x06E00010, 0x0FE00030, .V6, .A32, {}},
|
|
{.RBIT, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06FF0F30, 0x0FFF0FF0, .V6T2, .A32, {}},
|
|
{.REVSH, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06FF0FB0, 0x0FFF0FF0, .V6, .A32, {}},
|
|
{.UXTH, {.GPR, .GPR, .NONE, .NONE}, {.RD, .RM_A32, .NONE, .NONE}, 0x06FF0070, 0x0FFF0070, .V6, .A32, {}},
|
|
{.UXTAH, {.GPR, .GPR, .GPR, .NONE}, {.RD, .RN_A32, .RM_A32, .NONE}, 0x06F00070, 0x0FF00070, .V6, .A32, {}},
|
|
{.SMUAD, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0700F010, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMUADX, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0700F030, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMUSD, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0700F050, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMUSDX, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0700F070, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMLAD, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07000010, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLADX, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07000030, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLSD, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07000050, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLSDX, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07000070, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SDIV, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0710F010, 0x0FF0F0F0, .DIV, .A32, {}},
|
|
{.UDIV, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0730F010, 0x0FF0F0F0, .DIV, .A32, {}},
|
|
{.SMLALD, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x07400010, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLALDX, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x07400030, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLSLD, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x07400050, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMLSLDX, {.GPR, .GPR, .GPR, .GPR}, {.RDLO_A32, .RDHI_A32, .RM_A32, .RS_A32}, 0x07400070, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMMUL, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0750F010, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMMULR, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0750F030, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.SMMLA, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07500010, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMMLAR, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07500030, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMMLS, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x075000D0, 0x0FF000F0, .V6, .A32, {}},
|
|
{.SMMLSR, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x075000F0, 0x0FF000F0, .V6, .A32, {}},
|
|
{.USAD8, {.GPR, .GPR, .GPR, .NONE}, {.RN_A32, .RM_A32, .RS_A32, .NONE}, 0x0780F010, 0x0FF0F0F0, .V6, .A32, {}},
|
|
{.USADA8, {.GPR, .GPR, .GPR, .GPR}, {.RN_A32, .RM_A32, .RS_A32, .RD}, 0x07800010, 0x0FF000F0, .V6, .A32, {}},
|
|
{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x07800000, 0x0F700010, .BASE, .A32, {}},
|
|
{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x07900000, 0x0F700010, .BASE, .A32, {}},
|
|
{.SBFX, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD, .RM_A32, .BFI_LSB, .BFI_MSB}, 0x07A00050, 0x0FE00070, .V6T2, .A32, {}},
|
|
{.BFC, {.GPR, .IMM5, .IMM5_W, .NONE}, {.RD, .BFI_LSB, .BFI_MSB, .NONE}, 0x07C0001F, 0x0FE0007F, .V6T2, .A32, {}},
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{.BFI, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD, .RM_A32, .BFI_LSB, .BFI_MSB}, 0x07C00010, 0x0FE00070, .V6T2, .A32, {}},
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{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x07C00000, 0x0F700010, .BASE, .A32, {}},
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{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_A32, .MEM_REG_OFFSET, .NONE, .NONE}, 0x07D00000, 0x0F700010, .BASE, .A32, {}},
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{.UBFX, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD, .RM_A32, .BFI_LSB, .BFI_MSB}, 0x07E00050, 0x0FE00070, .V6T2, .A32, {}},
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{.UDF, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xE7F000F0, 0xFFF000F0, .BASE, .A32, {}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08000000, 0x0FD00000, .BASE, .A32, {}},
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{.RFE, {.GPR, .NONE, .NONE, .NONE}, {.RN_A32, .NONE, .NONE, .NONE}, 0xF8100A00, 0xFE10FFFF, .V6, .A32, {}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08100000, 0x0FD00000, .BASE, .A32, {}},
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{.SRS, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF84D0500, 0xFE5FFFE0, .V6, .A32, {}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08800000, 0x0FD00000, .BASE, .A32, {}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08900000, 0x0FD00000, .BASE, .A32, {}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08A00000, 0x0FD00000, .BASE, .A32, {}},
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{.POP, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0x08BD0000, 0x0FFF0000, .BASE, .A32, {}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x08B00000, 0x0FD00000, .BASE, .A32, {}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x09000000, 0x0FD00000, .BASE, .A32, {}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x09100000, 0x0FD00000, .BASE, .A32, {}},
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{.PUSH, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0x092D0000, 0x0FFF0000, .BASE, .A32, {}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x09800000, 0x0FD00000, .BASE, .A32, {}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_A32, .A32_REG_LIST, .NONE, .NONE}, 0x09900000, 0x0FD00000, .BASE, .A32, {}},
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{.BLX, {.REL24, .NONE, .NONE, .NONE}, {.BRANCH_24, .NONE, .NONE, .NONE}, 0xFA000000, 0xFE000000, .V5T, .A32, {branch=true, writes_pc=true}},
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{.B, {.REL24, .NONE, .NONE, .NONE}, {.BRANCH_24, .NONE, .NONE, .NONE}, 0x0A000000, 0x0F000000, .BASE, .A32, {branch=true, cond_branch=true, writes_pc=true}},
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{.BL, {.REL24, .NONE, .NONE, .NONE}, {.BRANCH_24, .NONE, .NONE, .NONE}, 0x0B000000, 0x0F000000, .BASE, .A32, {branch=true, cond_branch=true, writes_pc=true}},
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{.VDOT_BF16, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC000D40, 0xFFB00F50, .BF16, .A32, {}},
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{.VMMLA_BF16, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC000C40, 0xFFB00F50, .BF16, .A32, {}},
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{.VDOT_BF16, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC000D00, 0xFFB00F10, .BF16, .A32, {}},
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{.STC2, {.COPROC_NUM, .COPROC_REG, .MEM, .NONE}, {.COPROC_NUM_FIELD, .COPROC_CRN_FIELD, .MEM_IMM8_OFFSET, .NONE}, 0xFC000000, 0xFF100000, .V5T, .A32, {}},
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{.STC, {.COPROC_NUM, .COPROC_REG, .MEM, .NONE}, {.COPROC_NUM_FIELD, .COPROC_CRN_FIELD, .MEM_IMM8_OFFSET, .NONE}, 0x0C000000, 0x0F100000, .BASE, .A32, {}},
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{.LDC2, {.COPROC_NUM, .COPROC_REG, .MEM, .NONE}, {.COPROC_NUM_FIELD, .COPROC_CRN_FIELD, .MEM_IMM8_OFFSET, .NONE}, 0xFC100000, 0xFF100000, .V5T, .A32, {}},
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{.LDC, {.COPROC_NUM, .COPROC_REG, .MEM, .NONE}, {.COPROC_NUM_FIELD, .COPROC_CRN_FIELD, .MEM_IMM8_OFFSET, .NONE}, 0x0C100000, 0x0F100000, .BASE, .A32, {}},
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{.VSDOT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200D40, 0xFFB00F50, .DOT, .A32, {}},
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{.VUDOT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200D50, 0xFFB00F50, .DOT, .A32, {}},
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{.VFMAL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200850, 0xFFB00F50, .FHM, .A32, {}},
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{.VSMMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200C40, 0xFFB00F50, .V8, .A32, {}},
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{.VUMMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200C50, 0xFFB00F50, .V8, .A32, {}},
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{.VSDOT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC200D00, 0xFFB00F10, .DOT, .A32, {}},
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{.VUDOT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC200D10, 0xFFB00F10, .DOT, .A32, {}},
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{.VFMAL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC200810, 0xFFB00F10, .FHM, .A32, {}},
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{.VCMLA, {.QPR, .QPR, .QPR, .IMM}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC200840, 0xFC800F50, .FCMA, .A32, {}},
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{.VCMLA, {.DPR, .DPR, .DPR, .IMM}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC200800, 0xFC800F10, .FCMA, .A32, {}},
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{.VFMA_BF16, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC300850, 0xFFB00F50, .BF16, .A32, {}},
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{.VMOV, {.DPR, .GPR, .GPR, .NONE}, {.VM_D, .RT_A32, .RT2_A32, .NONE}, 0x0C400B10, 0x0FF00FD0, .VFPV2, .A32, {}},
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{.VMOV, {.SPR, .SPR, .GPR, .GPR}, {.VM_S, .NONE, .RT_A32, .RT2_A32}, 0x0C400A10, 0x0FF00FD0, .VFPV2, .A32, {}},
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{.MCRR2, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .GPR}, {.COPROC_NUM_FIELD, .COPROC_OPC_MCRR, .RT_A32, .RT2_A32}, 0xFC400000, 0xFFF00000, .V6, .A32, {}},
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{.MCRR, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .GPR}, {.COPROC_NUM_FIELD, .COPROC_OPC_MCRR, .RT_A32, .RT2_A32}, 0x0C400000, 0x0FF00000, .V6, .A32, {}},
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{.VMOV, {.GPR, .GPR, .DPR, .NONE}, {.RT_A32, .RT2_A32, .VM_D, .NONE}, 0x0C500B10, 0x0FF00FD0, .VFPV2, .A32, {}},
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{.VMOV, {.GPR, .GPR, .SPR, .SPR}, {.RT_A32, .RT2_A32, .VM_S, .NONE}, 0x0C500A10, 0x0FF00FD0, .VFPV2, .A32, {}},
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{.MRRC2, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .GPR}, {.COPROC_NUM_FIELD, .COPROC_OPC_MCRR, .RT_A32, .RT2_A32}, 0xFC500000, 0xFFF00000, .V6, .A32, {}},
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{.MRRC, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .GPR}, {.COPROC_NUM_FIELD, .COPROC_OPC_MCRR, .RT_A32, .RT2_A32}, 0x0C500000, 0x0FF00000, .V6, .A32, {}},
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{.VCADD, {.QPR, .QPR, .QPR, .IMM}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFC800840, 0xFE800F50, .FCMA, .A32, {}},
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{.VCADD, {.DPR, .DPR, .DPR, .IMM}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFC800800, 0xFE800F10, .FCMA, .A32, {}},
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{.VSTM, {.GPR, .DPR_LIST, .NONE, .NONE}, {.RN_A32, .VFP_D_LIST, .NONE, .NONE}, 0x0C800B00, 0x0F900F00, .VFPV2, .A32, {}},
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{.VSTM, {.GPR, .SPR_LIST, .NONE, .NONE}, {.RN_A32, .VFP_S_LIST, .NONE, .NONE}, 0x0C800A00, 0x0F900F00, .VFPV2, .A32, {}},
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{.VLDM, {.GPR, .SPR_LIST, .NONE, .NONE}, {.RN_A32, .VFP_S_LIST, .NONE, .NONE}, 0x0C900A00, 0x0F900F00, .VFPV2, .A32, {}},
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{.VLDM, {.GPR, .DPR_LIST, .NONE, .NONE}, {.RN_A32, .VFP_D_LIST, .NONE, .NONE}, 0x0C900B00, 0x0F900F00, .VFPV2, .A32, {}},
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{.VFMSL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFCA00850, 0xFFB00F50, .FHM, .A32, {}},
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{.VUSMMLA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFCA00C40, 0xFFB00F50, .V8, .A32, {}},
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{.VSUDOT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFCA00D50, 0xFFB00F50, .V8, .A32, {}},
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{.VUSDOT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFCA00D40, 0xFFB00F50, .V8, .A32, {}},
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{.VFMSL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFCA00810, 0xFFB00F10, .FHM, .A32, {}},
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{.VUSDOT, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFCA00D00, 0xFFB00F10, .V8, .A32, {}},
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{.VPOP, {.SPR_LIST, .NONE, .NONE, .NONE}, {.VFP_S_LIST, .NONE, .NONE, .NONE}, 0x0CBD0A00, 0x0FFF0F00, .VFPV2, .A32, {}},
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{.VPOP, {.DPR_LIST, .NONE, .NONE, .NONE}, {.VFP_D_LIST, .NONE, .NONE, .NONE}, 0x0CBD0B00, 0x0FFF0F00, .VFPV2, .A32, {}},
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{.VSTR, {.DPR, .MEM, .NONE, .NONE}, {.VD_D, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x0D000B00, 0x0F300F00, .VFPV2, .A32, {}},
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{.VSTR, {.SPR, .MEM, .NONE, .NONE}, {.VD_S, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x0D000A00, 0x0F300F00, .VFPV2, .A32, {}},
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{.VLDR, {.SPR, .MEM, .NONE, .NONE}, {.VD_S, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x0D100A00, 0x0F300F00, .VFPV2, .A32, {}},
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{.VLDR, {.DPR, .MEM, .NONE, .NONE}, {.VD_D, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x0D100B00, 0x0F300F00, .VFPV2, .A32, {}},
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{.VPUSH, {.DPR_LIST, .NONE, .NONE, .NONE}, {.VFP_D_LIST, .NONE, .NONE, .NONE}, 0x0D2D0B00, 0x0FFF0F00, .VFPV2, .A32, {}},
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{.VPUSH, {.SPR_LIST, .NONE, .NONE, .NONE}, {.VFP_S_LIST, .NONE, .NONE, .NONE}, 0x0D2D0A00, 0x0FFF0F00, .VFPV2, .A32, {}},
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{.VMOV, {.SPR, .GPR, .NONE, .NONE}, {.VN_S, .RT_A32, .NONE, .NONE}, 0x0E000A10, 0x0FF00F7F, .VFPV2, .A32, {}},
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{.VCMLA_LANE, {.QPR, .QPR, .DPR_ELEM, .IMM}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xFE000840, 0xFFB00F50, .FCMA, .A32, {}},
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{.VCMLA_LANE, {.DPR, .DPR, .DPR_ELEM, .IMM}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE000800, 0xFFB00F10, .FCMA, .A32, {}},
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{.VSEL, {.DPR, .DPR, .DPR, .COND}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE000B00, 0xFF800F50, .V8, .A32, {}},
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{.VSEL, {.SPR, .SPR, .SPR, .COND}, {.VD_S, .VN_S, .VM_S, .NONE}, 0xFE000A00, 0xFF800F50, .V8, .A32, {}},
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{.VMOV, {.DPR_ELEM, .GPR, .NONE, .NONE}, {.VN_D, .RT_A32, .NONE, .NONE}, 0x0E000B10, 0x0F100F1F, .NEON, .A32, {}},
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{.VMLA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E000900, 0x0FB00F50, .HALF_FP, .A32, {}},
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{.VMLS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E000940, 0x0FB00F50, .HALF_FP, .A32, {}},
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{.VMLA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E000A00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E000B00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VMLS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E000A40, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E000B40, 0x0FB00B50, .VFPV2, .A32, {}},
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{.MCR2, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .RT_A32, .COPROC_CRM_FIELD}, 0xFE000010, 0xFF100010, .V5T, .A32, {}},
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{.CDP2, {.COPROC_NUM, .IMM_COPROC_OP, .COPROC_REG, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .COPROC_CRN_FIELD, .COPROC_CRM_FIELD}, 0xFE000000, 0xFF000010, .V5T, .A32, {}},
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{.MCR, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .RT_A32, .COPROC_CRM_FIELD}, 0x0E000010, 0x0F100010, .BASE, .A32, {}},
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{.CDP, {.COPROC_NUM, .IMM_COPROC_OP, .COPROC_REG, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .COPROC_CRN_FIELD, .COPROC_CRM_FIELD}, 0x0E000000, 0x0F000010, .BASE, .A32, {}},
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{.VMOV, {.GPR, .SPR, .NONE, .NONE}, {.RT_A32, .VN_S, .NONE, .NONE}, 0x0E100A10, 0x0FF00F7F, .VFPV2, .A32, {}},
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{.VMOV, {.GPR, .DPR_ELEM, .NONE, .NONE}, {.RT_A32, .VN_D, .NONE, .NONE}, 0x0E100B10, 0x0F100F1F, .NEON, .A32, {}},
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{.VNMLA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E100B40, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VNMLA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E100A40, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VNMLS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E100B00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VNMLS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E100A00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.MRC2, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .RT_A32, .COPROC_CRM_FIELD}, 0xFE100010, 0xFF100010, .V5T, .A32, {}},
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{.MRC, {.COPROC_NUM, .IMM_COPROC_OP, .GPR, .COPROC_REG}, {.COPROC_NUM_FIELD, .COPROC_OPC1_FIELD, .RT_A32, .COPROC_CRM_FIELD}, 0x0E100010, 0x0F100010, .BASE, .A32, {}},
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{.VSDOT_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xFE200D40, 0xFFB00F50, .DOT, .A32, {}},
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{.VUDOT_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xFE200D50, 0xFFB00F50, .DOT, .A32, {}},
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{.VSDOT_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE200D00, 0xFFB00F10, .DOT, .A32, {}},
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|
{.VUDOT_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE200D10, 0xFFB00F10, .DOT, .A32, {}},
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{.VMUL, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E200900, 0x0FB00F50, .HALF_FP, .A32, {}},
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|
{.VMUL, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E200A00, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E200B00, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VNMUL, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E200A40, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VNMUL, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E200B40, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VADD, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E300900, 0x0FB00F50, .HALF_FP, .A32, {}},
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|
{.VSUB, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E300940, 0x0FB00F50, .HALF_FP, .A32, {}},
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|
{.VADD, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E300B00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VADD, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E300A00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VSUB, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E300B40, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VSUB, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E300A40, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VSUDOT_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xFE800D50, 0xFFB00F50, .V8, .A32, {}},
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{.VUSDOT_LANE, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xFE800D40, 0xFFB00F50, .V8, .A32, {}},
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|
{.VMAXNM, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE800B00, 0xFFB00B50, .V8, .A32, {}},
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|
{.VMAXNM, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0xFE800A00, 0xFFB00B50, .V8, .A32, {}},
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{.VMINNM, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE800B40, 0xFFB00B50, .V8, .A32, {}},
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{.VMINNM, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0xFE800A40, 0xFFB00B50, .V8, .A32, {}},
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{.VUSDOT_LANE, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xFE800D00, 0xFFB00F10, .V8, .A32, {}},
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|
{.VDIV, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E800900, 0x0FB00F50, .HALF_FP, .A32, {}},
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{.VDIV, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E800A00, 0x0FB00B50, .VFPV2, .A32, {}},
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{.VDIV, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E800B00, 0x0FB00B50, .VFPV2, .A32, {}},
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|
{.VFNMA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E900940, 0x0FB00F50, .HALF_FP, .A32, {}},
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{.VFNMS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E900900, 0x0FB00F50, .HALF_FP, .A32, {}},
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{.VFNMA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E900B40, 0x0FB00B50, .VFPV4, .A32, {}},
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{.VFNMA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E900A40, 0x0FB00B50, .VFPV4, .A32, {}},
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{.VFNMS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0E900B00, 0x0FB00B50, .VFPV4, .A32, {}},
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|
{.VFNMS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E900A00, 0x0FB00B50, .VFPV4, .A32, {}},
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|
{.VFMA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0EA00900, 0x0FB00F50, .HALF_FP, .A32, {}},
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|
{.VFMS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0EA00940, 0x0FB00F50, .HALF_FP, .A32, {}},
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|
{.VFMA, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0EA00B00, 0x0FB00B50, .VFPV4, .A32, {}},
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|
{.VFMA, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0EA00A00, 0x0FB00B50, .VFPV4, .A32, {}},
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|
{.VFMS, {.DPR, .DPR, .DPR, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0x0EA00B40, 0x0FB00B50, .VFPV4, .A32, {}},
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|
{.VFMS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0EA00A40, 0x0FB00B50, .VFPV4, .A32, {}},
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{.VCMP, {.SPR, .NONE, .NONE, .NONE}, {.VD_S, .NONE, .NONE, .NONE}, 0x0EB50A40, 0x0FBF0FFF, .VFPV2, .A32, {}},
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{.VCMP, {.DPR, .NONE, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0x0EB50B40, 0x0FBF0FFF, .VFPV2, .A32, {}},
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{.VCMP, {.SPR, .NONE, .NONE, .NONE}, {.VD_S, .NONE, .NONE, .NONE}, 0x0EB50940, 0x0FBF0FFF, .HALF_FP, .A32, {}},
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{.VCMPE, {.DPR, .NONE, .NONE, .NONE}, {.VD_D, .NONE, .NONE, .NONE}, 0x0EB50BC0, 0x0FBF0FFF, .VFPV2, .A32, {}},
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{.VCMPE, {.SPR, .NONE, .NONE, .NONE}, {.VD_S, .NONE, .NONE, .NONE}, 0x0EB50AC0, 0x0FBF0FFF, .VFPV2, .A32, {}},
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{.VCVTA, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBC0A40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTA, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBC0B40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBD0B40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTN, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBD0A40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTP, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBE0A40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBE0B40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTM, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBF0A40, 0xFFBF0FD0, .V8, .A32, {}},
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{.VCVTM, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBF0B40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTA, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEB80A40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTA, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEB80B40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTN, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEB90A40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTN, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEB90B40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTP, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBA0A40, 0xFFBF0FD0, .V8, .A32, {}},
|
|
{.VRINTP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBA0B40, 0xFFBF0FD0, .V8, .A32, {}},
|
|
{.VRINTM, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0xFEBB0B40, 0xFFBF0FD0, .V8, .A32, {}},
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|
{.VRINTM, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEBB0A40, 0xFFBF0FD0, .V8, .A32, {}},
|
|
{.VABS, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB00AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VABS, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB00BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VNEG, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB10B40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VNEG, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB10A40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VSQRT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB10AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VSQRT, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB10BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
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|
{.VSQRT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB109C0, 0x0FBF0FD0, .HALF_FP, .A32, {}},
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|
{.VCVT, {.SPR, .DPR, .NONE, .NONE}, {.VD_S, .VM_D, .NONE, .NONE}, 0x0EB70BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.DPR, .SPR, .NONE, .NONE}, {.VD_D, .VM_S, .NONE, .NONE}, 0x0EB70AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBD0AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .DPR, .NONE, .NONE}, {.VD_S, .VM_D, .NONE, .NONE}, 0x0EBD0BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBC0AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .DPR, .NONE, .NONE}, {.VD_S, .VM_D, .NONE, .NONE}, 0x0EBC0BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB80AC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB80A40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.DPR, .SPR, .NONE, .NONE}, {.VD_D, .VM_S, .NONE, .NONE}, 0x0EB80B40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVT, {.DPR, .SPR, .NONE, .NONE}, {.VD_D, .VM_S, .NONE, .NONE}, 0x0EB80BC0, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VCVTB, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB30A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVTB, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB20A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVTT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB30AC0, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVTT, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB20AC0, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VMOV, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB00B40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VMOV, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB00A40, 0x0FBF0FD0, .VFPV2, .A32, {}},
|
|
{.VRINTR, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB60A40, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VRINTR, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB60B40, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VRINTZ, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB60BC0, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VRINTZ, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB60AC0, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VRINTX, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB70A40, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VRINTX, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB70B40, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VJCVT, {.SPR, .DPR, .NONE, .NONE}, {.VD_S, .VM_D, .NONE, .NONE}, 0x0EB90BC0, 0x0FBF0FD0, .V8, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBA0A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBF0A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBE0A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBA0940, 0x0FBF0FD0, .HALF_FP, .A32, {}},
|
|
{.VCVT_FIXED, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EBE0B40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBE0940, 0x0FBF0FD0, .HALF_FP, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBB0A40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EBA0B40, 0x0FBF0FD0, .VFPV3, .A32, {}},
|
|
{.VCMP, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB40940, 0x0FBF0F50, .HALF_FP, .A32, {}},
|
|
{.VCMP, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB40B40, 0x0FBF0F50, .VFPV2, .A32, {}},
|
|
{.VCMP, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB40A40, 0x0FBF0F50, .VFPV2, .A32, {}},
|
|
{.VCMPE, {.DPR, .DPR, .NONE, .NONE}, {.VD_D, .VM_D, .NONE, .NONE}, 0x0EB40BC0, 0x0FBF0F50, .VFPV2, .A32, {}},
|
|
{.VCMPE, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EB40AC0, 0x0FBF0F50, .VFPV2, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBA0A40, 0x0FBF0FC0, .VFPV3, .A32, {}},
|
|
{.VCVT_FIXED, {.SPR, .SPR, .IMM, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0x0EBE0A40, 0x0FBF0FC0, .VFPV3, .A32, {}},
|
|
{.VMOV, {.SPR, .IMM8, .NONE, .NONE}, {.VD_S, .VFP_IMM8, .NONE, .NONE}, 0x0EB00A00, 0x0FB00FF0, .VFPV3, .A32, {}},
|
|
{.VMOV, {.DPR, .IMM8, .NONE, .NONE}, {.VD_D, .VFP_IMM8, .NONE, .NONE}, 0x0EB00B00, 0x0FB00FF0, .VFPV3, .A32, {}},
|
|
{.VDUP, {.DPR, .GPR, .NONE, .NONE}, {.VD_D, .RT_A32, .NONE, .NONE}, 0x0EC00B10, 0x0FF00FD0, .NEON, .A32, {}},
|
|
{.VMSR, {.GPR, .NONE, .NONE, .NONE}, {.RT_A32, .NONE, .NONE, .NONE}, 0x0EE10A10, 0x0FFF0FFF, .VFPV2, .A32, {}},
|
|
{.VDUP, {.QPR, .GPR, .NONE, .NONE}, {.VD_Q, .RT_A32, .NONE, .NONE}, 0x0EE00B10, 0x0FF00FD0, .NEON, .A32, {}},
|
|
{.VMRS, {.GPR, .NONE, .NONE, .NONE}, {.RT_A32, .NONE, .NONE, .NONE}, 0x0EF10A10, 0x0FFF0FFF, .VFPV2, .A32, {}},
|
|
{.SVC, {.IMM, .NONE, .NONE, .NONE}, {.A32_IMM24, .NONE, .NONE, .NONE}, 0x0F000000, 0x0F000000, .BASE, .A32, {}},
|
|
{.SG, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xE97FE97F, 0xFFFFFFFF, .V8M_SE, .T32, {thumb32=true}},
|
|
{.TBB, {.GPR, .GPR, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xE8D0F000, 0xFFF0FFF0, .V6T2, .T32, {branch=true, writes_pc=true, thumb32=true}},
|
|
{.TBH, {.GPR, .GPR, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xE8D0F010, 0xFFF0FFF0, .V6T2, .T32, {branch=true, writes_pc=true, thumb32=true}},
|
|
{.LDREXB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .RN_T32, .NONE, .NONE}, 0xE8D00F4F, 0xFFF00FFF, .V6T2, .T32, {thumb32=true}},
|
|
{.LDREXH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .RN_T32, .NONE, .NONE}, 0xE8D00F5F, 0xFFF00FFF, .V6T2, .T32, {thumb32=true}},
|
|
{.STREXB, {.GPR, .GPR, .MEM, .NONE}, {.RD_T32, .RT_T32, .RN_T32, .NONE}, 0xE8C00F40, 0xFFF00FF0, .V6T2, .T32, {thumb32=true}},
|
|
{.STREXH, {.GPR, .GPR, .MEM, .NONE}, {.RD_T32, .RT_T32, .RN_T32, .NONE}, 0xE8C00F50, 0xFFF00FF0, .V6T2, .T32, {thumb32=true}},
|
|
{.LDREXD, {.GPR, .GPR, .MEM, .NONE}, {.RT_T32, .RT2_T32, .RN_T32, .NONE}, 0xE8D0007F, 0xFFF000FF, .V6T2, .T32, {thumb32=true}},
|
|
{.TT, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RN_T32, .NONE, .NONE}, 0xE840F000, 0xFFF0F0C0, .V8M_SE, .T32, {thumb32=true}},
|
|
{.TTT, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RN_T32, .NONE, .NONE}, 0xE840F040, 0xFFF0F0C0, .V8M_SE, .T32, {thumb32=true}},
|
|
{.TTA, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RN_T32, .NONE, .NONE}, 0xE840F080, 0xFFF0F0C0, .V8M_SE, .T32, {thumb32=true}},
|
|
{.TTAT, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RN_T32, .NONE, .NONE}, 0xE840F0C0, 0xFFF0F0C0, .V8M_SE, .T32, {thumb32=true}},
|
|
{.LDREX, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .RN_T32, .NONE, .NONE}, 0xE8500F00, 0xFFF00F00, .V6T2, .T32, {thumb32=true}},
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{.STREXD, {.GPR, .GPR, .GPR, .MEM}, {.RD_T32, .RT_T32, .RT2_T32, .RN_T32}, 0xE8C00070, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
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{.PUSH, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0xE92D0000, 0xFFFF0000, .V6T2, .T32, {thumb32=true}},
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{.POP, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0xE8BD0000, 0xFFFF0000, .V6T2, .T32, {thumb32=true}},
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{.STREX, {.GPR, .GPR, .MEM, .NONE}, {.RD_T32, .RT_T32, .RN_T32, .NONE}, 0xE8400000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_T32, .A32_REG_LIST, .NONE, .NONE}, 0xE9100000, 0xFFD00000, .V6T2, .T32, {thumb32=true}},
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{.LDM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_T32, .A32_REG_LIST, .NONE, .NONE}, 0xE8900000, 0xFFD00000, .V6T2, .T32, {thumb32=true}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_T32, .A32_REG_LIST, .NONE, .NONE}, 0xE8800000, 0xFFD00000, .V6T2, .T32, {thumb32=true}},
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{.STM, {.GPR, .GPR_LIST, .NONE, .NONE}, {.RN_T32, .A32_REG_LIST, .NONE, .NONE}, 0xE9000000, 0xFFD00000, .V6T2, .T32, {thumb32=true}},
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{.LDRD, {.GPR, .GPR, .MEM, .NONE}, {.RT_T32, .RT2_T32, .RN_T32, .NONE}, 0xE9500000, 0xFE500000, .V6T2, .T32, {thumb32=true}},
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{.STRD, {.GPR, .GPR, .MEM, .NONE}, {.RT_T32, .RT2_T32, .RN_T32, .NONE}, 0xE9400000, 0xFE500000, .V6T2, .T32, {thumb32=true}},
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{.LSL, {.GPR, .GPR, .IMM5, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA4F0000, 0xFFEF8030, .V6T2, .T32, {thumb32=true}},
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{.LSR, {.GPR, .GPR, .IMM5, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA4F0010, 0xFFEF8030, .V6T2, .T32, {thumb32=true}},
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{.ASR, {.GPR, .GPR, .IMM5, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA4F0020, 0xFFEF8030, .V6T2, .T32, {thumb32=true}},
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{.ROR, {.GPR, .GPR, .IMM5, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA4F0030, 0xFFEF8030, .V6T2, .T32, {thumb32=true}},
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{.TST, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xEA100F00, 0xFFF08F00, .V6T2, .T32, {thumb32=true}},
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{.TEQ, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xEA900F00, 0xFFF08F00, .V6T2, .T32, {thumb32=true}},
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{.CMP, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xEBB00F00, 0xFFF08F00, .V6T2, .T32, {thumb32=true}},
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{.CMN, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RN_T32, .RM_T32, .NONE, .NONE}, 0xEB100F00, 0xFFF08F00, .V6T2, .T32, {thumb32=true}},
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{.MOV, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA5F0000, 0xFFEF8000, .V6T2, .T32, {sets_flags=true, thumb32=true}},
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{.MOV, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA4F0000, 0xFFEF8000, .V6T2, .T32, {thumb32=true}},
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{.MVN, {.GPR, .GPR_SHIFTED, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xEA6F0000, 0xFFEF8000, .V6T2, .T32, {thumb32=true}},
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{.AND, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEA100000, 0xFFE08000, .V6T2, .T32, {sets_flags=true, thumb32=true}},
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{.AND, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEA000000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.EOR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEA800000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.RSB, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEBC00000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.ADC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEB400000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.SBC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEB600000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.ORR, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEA400000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.BIC, {.GPR, .GPR, .GPR_SHIFTED, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xEA200000, 0xFFE08000, .V6T2, .T32, {thumb32=true}},
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{.VSTRH_SCATTER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xEC600E90, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VSTRW_SCATTER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xEC600F40, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VSTRD_SCATTER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xEC600FD0, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VSTRB_SCATTER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xEC600E00, 0xFEF00FD1, .MVE_INT, .T32, {thumb32=true}},
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|
{.VLDRH, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED901E80, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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{.VLDRW, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED901F00, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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|
{.VLDRD, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED901F80, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSTRH, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED801E80, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSTRW, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED801F00, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSTRD, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED801F80, 0xFFB01F80, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMOV_2GPR_Q, {.QPR_ELEM, .QPR_ELEM, .GPR, .GPR}, {.VD_Q, .VD_Q, .RT_T32, .RT2_T32}, 0xEC000F00, 0xFF900F11, .MVE_INT, .T32, {thumb32=true}},
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|
{.VLDRB, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED901E00, 0xFFB01F00, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSTRB, {.QPR, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xED801E00, 0xFFB01F00, .MVE_INT, .T32, {thumb32=true}},
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{.VCX1, {.IMM_COPROC, .SPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .VD_S, .CDE_IMM_FIELD, .NONE}, 0xEC200000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX1, {.IMM_COPROC, .DPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .VD_D, .CDE_IMM_FIELD, .NONE}, 0xEC300000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX2, {.IMM_COPROC, .SPR, .SPR, .IMM}, {.CDE_COPROC_FIELD, .VD_S, .VM_S, .CDE_IMM_FIELD}, 0xEC600000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX2, {.IMM_COPROC, .DPR, .DPR, .IMM}, {.CDE_COPROC_FIELD, .VD_D, .VM_D, .CDE_IMM_FIELD}, 0xEC700000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX3, {.IMM_COPROC, .SPR, .SPR, .SPR}, {.CDE_COPROC_FIELD, .VD_S, .VN_S, .VM_S}, 0xEC800000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX3, {.IMM_COPROC, .DPR, .DPR, .DPR}, {.CDE_COPROC_FIELD, .VD_D, .VN_D, .VM_D}, 0xEC900000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VADDLV, {.GPR, .GPR, .QPR, .NONE}, {.RD_T32, .RN_T32, .VM_Q, .NONE}, 0xEE890F00, 0xEFFF0FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VADDLVA, {.GPR, .GPR, .QPR, .NONE}, {.RD_T32, .RN_T32, .VM_Q, .NONE}, 0xEE890F20, 0xEFFF0FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMAXNMV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEEE0F00, 0xEFFF0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VMAXNMAV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEEC0F00, 0xEFFF0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VMINNMV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEEE0F80, 0xEFFF0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VMINNMAV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEEC0F80, 0xEFFF0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VQMOVNB, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xEE330E01, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQMOVNT, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xEE331E01, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQMOVUNB, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xEE310E81, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQMOVUNT, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xEE311E81, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VADDV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEF10F00, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VADDVA, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEF10F20, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMAXV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEE20F00, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMAXAV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEE00F00, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMINV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEE20F80, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMINAV, {.GPR, .QPR, .NONE, .NONE}, {.RD_T32, .VM_Q, .NONE, .NONE}, 0xEEE00F80, 0xEFF30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VDUP, {.QPR, .GPR, .NONE, .NONE}, {.VD_Q, .RT_T32, .NONE, .NONE}, 0xEE800B10, 0xFF900F5F, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLDAV, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800E01, 0xFFB11F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLDAVA, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800E21, 0xFFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VDDUP, {.QPR, .GPR, .IMM, .NONE}, {.VD_Q, .RM_T32, .CDE_IMM_FIELD, .NONE}, 0xEE011F6E, 0xEF811F7E, .MVE_INT, .T32, {thumb32=true}},
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{.VIDUP, {.QPR, .GPR, .IMM, .NONE}, {.VD_Q, .RM_T32, .CDE_IMM_FIELD, .NONE}, 0xEE010F6E, 0xEF811F7E, .MVE_INT, .T32, {thumb32=true}},
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{.VCMP, {.QPR, .QPR, .NONE, .NONE}, {.VN_Q, .VM_Q, .NONE, .NONE}, 0xEE310F00, 0xEFB10FF0, .MVE_FP, .T32, {thumb32=true}},
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|
{.VAND, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000150, 0xFFB10F51, .MVE_INT, .T32, {thumb32=true}},
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{.VBIC, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF100150, 0xFFB10F51, .MVE_INT, .T32, {thumb32=true}},
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{.VORR, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF200150, 0xFFB10F51, .MVE_INT, .T32, {thumb32=true}},
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{.VORN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF300150, 0xFFB10F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLADAVX, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB01F00, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMLADAVAX, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB01F20, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMLALDAVA, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800E20, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMLALDAVAX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801E20, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VRMLALDAVHA, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800F20, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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{.VRMLALDAVHAX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801F20, 0xEFB11F51, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSHLC, {.QPR, .GPR, .IMM5, .NONE}, {.VD_Q, .RM_T32, .A32_IMM_SHIFT, .NONE}, 0xEE000FC0, 0xFFC00FF1, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMOV_Q_R, {.QPR_ELEM, .GPR, .NONE, .NONE}, {.VD_Q, .RT_T32, .NONE, .NONE}, 0xEE000B10, 0xFF900F1F, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMOV_R_Q, {.GPR, .QPR_ELEM, .NONE, .NONE}, {.RT_T32, .VD_Q, .NONE, .NONE}, 0xEE100B10, 0xFF900F1F, .MVE_INT, .T32, {thumb32=true}},
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|
{.VADD, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE010F40, 0xEF811FF0, .MVE_INT, .T32, {thumb32=true}},
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|
{.VSUB, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE011F40, 0xEF811FF0, .MVE_INT, .T32, {thumb32=true}},
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|
{.VMUL, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE011E60, 0xEF811FF0, .MVE_INT, .T32, {thumb32=true}},
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|
{.VFMA, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE310E40, 0xEFB10F51, .MVE_FP, .T32, {thumb32=true}},
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|
{.VMLADAV, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB00F00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VMLADAVA, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB00F20, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VMLALDAV, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800E00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VMLALDAVX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801E00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VRMLALDAVH, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE800F00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VRMLALDAVHX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801F00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VMLAV, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB00F00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VMLAVA, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEEB00F20, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VCMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE300E00, 0xEFB10F51, .MVE_FP, .T32, {thumb32=true}},
|
|
{.VHCADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000F00, 0xEFB10F51, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VBRSR, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE011E60, 0xEF811F71, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000D40, 0xEFA10F51, .MVE_FP, .T32, {thumb32=true}},
|
|
{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF200D40, 0xEFA10F51, .MVE_FP, .T32, {thumb32=true}},
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{.VMLA, {.QPR, .QPR, .GPR, .NONE}, {.VD_Q, .VN_Q, .RM_T32, .NONE}, 0xEE010E40, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VFMA, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000C50, 0xEFA10F51, .MVE_FP, .T32, {thumb32=true}},
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{.VFMS, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF200C50, 0xEFA10F51, .MVE_FP, .T32, {thumb32=true}},
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{.VDWDUP, {.QPR, .GPR, .GPR, .IMM}, {.VD_Q, .RM_T32, .RN_T32, .CDE_IMM_FIELD}, 0xEE011F60, 0xEF811F70, .MVE_INT, .T32, {thumb32=true}},
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{.VIWDUP, {.QPR, .GPR, .GPR, .IMM}, {.VD_Q, .RM_T32, .RN_T32, .CDE_IMM_FIELD}, 0xEE010F60, 0xEF811F70, .MVE_INT, .T32, {thumb32=true}},
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{.VSHLLB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE800F40, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VSHLLT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE801F40, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMULLB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000E00, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMULLT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE001E00, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLALB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000E20, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLALT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE001E20, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000E10, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLT, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE001E10, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VSHRNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE800EC1, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VSHRNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE801EC1, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQSHRNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE800F40, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQSHRNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE801F40, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQRSHRNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE800F41, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQRSHRNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE801F41, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQSHRUNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE800FC0, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQSHRUNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEE801FC0, 0xEF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQDMLADH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000E00, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQDMLADHX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE001E00, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQRDMLADH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE000E01, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQRDMLADHX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEE001E01, 0xEF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000840, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000950, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000040, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VHSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000240, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VRHADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000140, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQADD, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000050, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000250, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMAX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000640, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMIN, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000650, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000440, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VRSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000540, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQSHL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xEF000450, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLDAVX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801E01, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSLDAVAX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xEE801E21, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VSHR, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEF800050, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}},
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{.VSRA, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEF800150, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}},
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{.VRSHR, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xEF800250, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}},
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{.VABAV, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xEE800F01, 0xEFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.CX2, {.IMM_COPROC, .GPR, .GPR, .IMM}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .CDE_IMM_FIELD}, 0xEE400000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX2D, {.IMM_COPROC, .GPR, .GPR, .IMM}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .CDE_IMM_FIELD}, 0xEEC00000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX3, {.IMM_COPROC, .GPR, .GPR, .GPR}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .RM_T32}, 0xEE800000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX3D, {.IMM_COPROC, .GPR, .GPR, .GPR}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .RM_T32}, 0xEEC00000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX1, {.IMM_COPROC, .GPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .RD_T32, .CDE_IMM_FIELD, .NONE}, 0xEE000000, 0xFF800000, .CDE, .T32, {thumb32=true}},
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{.CX1D, {.IMM_COPROC, .GPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .RD_T32, .CDE_IMM_FIELD, .NONE}, 0xEE800000, 0xFF800000, .CDE, .T32, {thumb32=true}},
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{.LCTP, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF00FE001, 0xFFFFFFFF, .V81M, .T32, {thumb32=true}},
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{.DLS, {.GPR, .NONE, .NONE, .NONE}, {.RN_T32, .NONE, .NONE, .NONE}, 0xF040E001, 0xFFF0FFFF, .V81M, .T32, {thumb32=true}},
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{.VCTP, {.GPR, .NONE, .NONE, .NONE}, {.RN_T32, .NONE, .NONE, .NONE}, 0xF000E801, 0xFFC0FFFF, .MVE_INT, .T32, {thumb32=true}},
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{.DLSTP, {.GPR, .NONE, .NONE, .NONE}, {.RN_T32, .NONE, .NONE, .NONE}, 0xF000E001, 0xFE80FFFF, .V81M, .T32, {thumb32=true}},
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{.LE, {.REL11, .NONE, .NONE, .NONE}, {.MVE_LOOP_IMM, .NONE, .NONE, .NONE}, 0xF00FC001, 0xFFFFF001, .V81M, .T32, {branch=true, thumb32=true}},
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{.LETP, {.REL11, .NONE, .NONE, .NONE}, {.MVE_LOOP_IMM, .NONE, .NONE, .NONE}, 0xF01FC001, 0xFFFFF001, .V81M, .T32, {branch=true, thumb32=true}},
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{.WLS, {.GPR, .REL11, .NONE, .NONE}, {.RN_T32, .MVE_LOOP_IMM, .NONE, .NONE}, 0xF040C001, 0xFFF0F001, .V81M, .T32, {branch=true, thumb32=true}},
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{.TST, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RN_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF0100F00, 0xFBF08F00, .V6T2, .T32, {thumb32=true}},
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{.TEQ, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RN_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF0900F00, 0xFBF08F00, .V6T2, .T32, {thumb32=true}},
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{.CMP, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RN_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF1B00F00, 0xFBF08F00, .V6T2, .T32, {thumb32=true}},
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{.CMN, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RN_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF1100F00, 0xFBF08F00, .V6T2, .T32, {thumb32=true}},
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{.MOV, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RD_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF04F0000, 0xFBEF8000, .V6T2, .T32, {thumb32=true}},
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{.MOV, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RD_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF05F0000, 0xFBEF8000, .V6T2, .T32, {sets_flags=true, thumb32=true}},
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{.MVN, {.GPR, .IMM_T32_MOD, .NONE, .NONE}, {.RD_T32, .T32_IMM_MOD, .NONE, .NONE}, 0xF06F0000, 0xFBEF8000, .V6T2, .T32, {thumb32=true}},
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{.WLSTP, {.GPR, .REL11, .NONE, .NONE}, {.RN_T32, .MVE_LOOP_IMM, .NONE, .NONE}, 0xF000C001, 0xFE80F001, .V81M, .T32, {branch=true, thumb32=true}},
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{.AND, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF0000000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.AND, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF0100000, 0xFBE08000, .V6T2, .T32, {sets_flags=true, thumb32=true}},
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{.EOR, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF0800000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.RSB, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF1C00000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.ADC, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF1400000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.SBC, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF1600000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.ORR, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF0400000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.BIC, {.GPR, .GPR, .IMM_T32_MOD, .NONE}, {.RD_T32, .RN_T32, .T32_IMM_MOD, .NONE}, 0xF0200000, 0xFBE08000, .V6T2, .T32, {thumb32=true}},
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{.B, {.REL24_T32, .NONE, .NONE, .NONE}, {.BRANCH_24_T32, .NONE, .NONE, .NONE}, 0xF0009000, 0xF800D000, .V6T2, .T32, {branch=true, writes_pc=true, thumb32=true}},
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{.B, {.REL20, .COND, .NONE, .NONE}, {.BRANCH_20_T32, .NONE, .NONE, .NONE}, 0xF0008000, 0xF800D000, .V6T2, .T32, {branch=true, cond_branch=true, writes_pc=true, thumb32=true}},
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{.BL, {.REL24_T32, .NONE, .NONE, .NONE}, {.BRANCH_24_T32, .NONE, .NONE, .NONE}, 0xF000D000, 0xF800D000, .THUMB, .T32, {branch=true, writes_pc=true, thumb32=true}},
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{.NOP, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8000, 0xFFFFFFFF, .V6T2, .T32, {thumb32=true}},
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{.YIELD, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8001, 0xFFFFFFFF, .V6T2, .T32, {thumb32=true}},
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{.WFE, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8002, 0xFFFFFFFF, .V6T2, .T32, {thumb32=true}},
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{.WFI, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8003, 0xFFFFFFFF, .V6T2, .T32, {thumb32=true}},
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{.SEV, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8004, 0xFFFFFFFF, .V6T2, .T32, {thumb32=true}},
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{.CLREX, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3BF8F2F, 0xFFFFFFFF, .V6K, .T32, {thumb32=true}},
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{.ESB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8010, 0xFFFFFFFF, .V8, .T32, {thumb32=true}},
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{.PSB_CSYNC, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8011, 0xFFFFFFFF, .V8, .T32, {thumb32=true}},
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{.TSB_CSYNC, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8012, 0xFFFFFFFF, .V8, .T32, {thumb32=true}},
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{.CSDB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF8014, 0xFFFFFFFF, .V8, .T32, {thumb32=true}},
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{.SB, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3BF8F70, 0xFFFFFFFF, .V8, .T32, {thumb32=true}},
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{.PAC, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF801D, 0xFFFFFFFF, .V81M, .T32, {thumb32=true}},
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{.PACBTI, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF800D, 0xFFFFFFFF, .V81M, .T32, {thumb32=true}},
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{.AUT, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF802D, 0xFFFFFFFF, .V81M, .T32, {thumb32=true}},
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{.BTI, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF3AF80F0, 0xFFFFFFFF, .V81M, .T32, {thumb32=true}},
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{.MRS, {.GPR, .PSR_FIELD, .NONE, .NONE}, {.RD_T32, .NONE, .NONE, .NONE}, 0xF3EF8000, 0xFFFFF0FF, .V6T2, .T32, {thumb32=true}},
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{.DMB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF3BF8F50, 0xFFFFFFF0, .V7, .T32, {thumb32=true}},
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{.DSB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF3BF8F40, 0xFFFFFFF0, .V7, .T32, {thumb32=true}},
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{.ISB, {.IMM_BARRIER, .NONE, .NONE, .NONE}, {.BARRIER_TYPE, .NONE, .NONE, .NONE}, 0xF3BF8F60, 0xFFFFFFF0, .V7, .T32, {thumb32=true}},
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{.MSR, {.PSR_FIELD, .GPR, .NONE, .NONE}, {.PSR_FIELD_MASK, .RN_T32, .NONE, .NONE}, 0xF3808000, 0xFFF0F0FF, .V6T2, .T32, {thumb32=true}},
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{.SSAT16, {.GPR, .IMM4_SAT, .GPR, .NONE}, {.RD_T32, .SAT_IMM5_T32, .RN_T32, .NONE}, 0xF3200000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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{.USAT16, {.GPR, .IMM4_SAT, .GPR, .NONE}, {.RD_T32, .SAT_IMM5_T32, .RN_T32, .NONE}, 0xF3A00000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.BFC, {.GPR, .IMM5, .IMM5_W, .NONE}, {.RD_T32, .BFI_LSB_T32, .BFI_MSB, .NONE}, 0xF36F0000, 0xFFFF8000, .V6T2, .T32, {thumb32=true}},
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{.BFI, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD_T32, .RN_T32, .BFI_LSB_T32, .BFI_MSB}, 0xF3600000, 0xFFF08000, .V6T2, .T32, {thumb32=true}},
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{.SBFX, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD_T32, .RN_T32, .BFI_LSB_T32, .BFI_MSB}, 0xF3400000, 0xFFF08000, .V6T2, .T32, {thumb32=true}},
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|
{.UBFX, {.GPR, .GPR, .IMM5, .IMM5_W}, {.RD_T32, .RN_T32, .BFI_LSB_T32, .BFI_MSB}, 0xF3C00000, 0xFFF08000, .V6T2, .T32, {thumb32=true}},
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|
{.SSAT, {.GPR, .IMM4_SAT, .GPR_SHIFTED, .NONE}, {.RD_T32, .SAT_IMM5_T32, .RN_T32, .NONE}, 0xF3000000, 0xFFD08020, .V6T2, .T32, {thumb32=true}},
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{.USAT, {.GPR, .IMM4_SAT, .GPR_SHIFTED, .NONE}, {.RD_T32, .SAT_IMM5_T32, .RN_T32, .NONE}, 0xF3800000, 0xFFD08020, .V6T2, .T32, {thumb32=true}},
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{.MOVW, {.GPR, .IMM16_LO_HI, .NONE, .NONE}, {.RD_T32, .NONE, .NONE, .NONE}, 0xF2400000, 0xFBF08000, .V6T2, .T32, {thumb32=true}},
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{.MOVT, {.GPR, .IMM16_LO_HI, .NONE, .NONE}, {.RD_T32, .NONE, .NONE, .NONE}, 0xF2C00000, 0xFBF08000, .V6T2, .T32, {thumb32=true}},
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{.UDF, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xF7F0A000, 0xFFF0F000, .V6T2, .T32, {thumb32=true}},
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{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8500000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8400000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8100000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8000000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8300000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF8200000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF9100000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_REG_OFFSET, .NONE, .NONE}, 0xF9300000, 0xFFF00FC0, .V6T2, .T32, {thumb32=true}},
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{.PLD, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF890F000, 0xFFF0F000, .V6T2, .T32, {thumb32=true}},
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{.PLDW, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF830F000, 0xFFF0F000, .V7, .T32, {thumb32=true}},
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{.PLI, {.MEM, .NONE, .NONE, .NONE}, {.MEM_IMM12_OFFSET, .NONE, .NONE, .NONE}, 0xF990F000, 0xFFF0F000, .V7, .T32, {thumb32=true}},
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{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_LITERAL, .NONE, .NONE}, 0xF85F0000, 0xFF7F0000, .V6T2, .T32, {thumb32=true}},
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{.LDR, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8D00000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
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|
{.STR, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8C00000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
|
|
{.LDRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8900000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
|
|
{.STRB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8800000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
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|
{.LDRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8B00000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
|
|
{.STRH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF8A00000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
|
|
{.LDRSB, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF9900000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
|
|
{.LDRSH, {.GPR, .MEM, .NONE, .NONE}, {.RT_T32, .MEM_IMM12_OFFSET, .NONE, .NONE}, 0xF9B00000, 0xFFF00000, .V6T2, .T32, {thumb32=true}},
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|
{.SXTB, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA4FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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{.SXTB16, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA2FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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{.SXTH, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA0FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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{.UXTB, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA5FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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{.UXTB16, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA3FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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|
{.UXTH, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA1FF080, 0xFFFFF0C0, .V6T2, .T32, {thumb32=true}},
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|
{.CLZ, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFAB0F080, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.RBIT, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA90F0A0, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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{.REV, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA90F080, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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{.REV16, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA90F090, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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{.REVSH, {.GPR, .GPR, .NONE, .NONE}, {.RD_T32, .RM_T32, .NONE, .NONE}, 0xFA90F0B0, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QADD, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RM_T32, .RN_T32, .NONE}, 0xFA80F080, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QSUB, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RM_T32, .RN_T32, .NONE}, 0xFA80F0A0, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QDADD, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RM_T32, .RN_T32, .NONE}, 0xFA80F090, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QDSUB, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RM_T32, .RN_T32, .NONE}, 0xFA80F0B0, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.USAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.USUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.USUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F040, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.QSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F010, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UQADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UQADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UQASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UQSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UQSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.UQSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F050, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SHADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SHADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SHASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SHSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SHSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SHSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F020, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UHADD8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA80F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UHADD16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA90F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UHASX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAA0F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.UHSAX, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAE0F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.UHSUB8, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAC0F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.UHSUB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFAD0F060, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.MUL, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFB00F000, 0xFFF0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.SDIV, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFB90F0F0, 0xFFF0F0F0, .DIV, .T32, {thumb32=true}},
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|
{.UDIV, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFBB0F0F0, 0xFFF0F0F0, .DIV, .T32, {thumb32=true}},
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|
{.AUTG, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFB50F000, 0xFFF0F0F0, .V81M, .T32, {thumb32=true}},
|
|
{.LSL, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA00F000, 0xFFE0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.LSR, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA20F000, 0xFFE0F0F0, .V6T2, .T32, {thumb32=true}},
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|
{.ASR, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA40F000, 0xFFE0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.ROR, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA60F000, 0xFFE0F0F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SXTAB, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA40F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
|
|
{.SXTAB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA20F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
|
|
{.SXTAH, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA00F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
|
|
{.UXTAB, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA50F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
|
|
{.UXTAB16, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA30F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
|
|
{.UXTAH, {.GPR, .GPR, .GPR, .NONE}, {.RD_T32, .RN_T32, .RM_T32, .NONE}, 0xFA10F080, 0xFFF0F0C0, .V6T2, .T32, {thumb32=true}},
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|
{.MLA, {.GPR, .GPR, .GPR, .GPR}, {.RD_T32, .RN_T32, .RM_T32, .RA_T32}, 0xFB000000, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.MLS, {.GPR, .GPR, .GPR, .GPR}, {.RD_T32, .RN_T32, .RM_T32, .RA_T32}, 0xFB000010, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.UMULL, {.GPR, .GPR, .GPR, .GPR}, {.RT_T32, .RD_T32, .RN_T32, .RM_T32}, 0xFBA00000, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.UMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RT_T32, .RD_T32, .RN_T32, .RM_T32}, 0xFBE00000, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SMULL, {.GPR, .GPR, .GPR, .GPR}, {.RT_T32, .RD_T32, .RN_T32, .RM_T32}, 0xFB800000, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.SMLAL, {.GPR, .GPR, .GPR, .GPR}, {.RT_T32, .RD_T32, .RN_T32, .RM_T32}, 0xFBC00000, 0xFFF000F0, .V6T2, .T32, {thumb32=true}},
|
|
{.VLD20, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E00, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VLD21, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E20, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VLD40, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E01, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VLD41, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E21, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VLD42, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E41, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
|
|
{.VLD43, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC901E61, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST20, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E00, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST21, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E20, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST40, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E01, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST41, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E21, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST42, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E41, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VST43, {.QPR_MVE_LIST, .MEM, .NONE, .NONE}, {.VD_Q, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0xFC801E61, 0xFFB01EFF, .MVE_INT, .T32, {thumb32=true}},
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{.VLDRH_GATHER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xFC900E90, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VLDRW_GATHER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xFC900F40, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VLDRD_GATHER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xFC900FD0, 0xFEF00FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VLDRB_GATHER, {.QPR, .MEM, .QPR, .NONE}, {.VD_Q, .RN_T32, .VM_Q, .NONE}, 0xFC900E00, 0xFEF00FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VCX1A, {.IMM_COPROC, .DPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .VD_D, .CDE_IMM_FIELD, .NONE}, 0xFC300000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX1A, {.IMM_COPROC, .SPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .VD_S, .CDE_IMM_FIELD, .NONE}, 0xFC200000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX2A, {.IMM_COPROC, .DPR, .DPR, .IMM}, {.CDE_COPROC_FIELD, .VD_D, .VM_D, .CDE_IMM_FIELD}, 0xFC700000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX2A, {.IMM_COPROC, .SPR, .SPR, .IMM}, {.CDE_COPROC_FIELD, .VD_S, .VM_S, .CDE_IMM_FIELD}, 0xFC600000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX3A, {.IMM_COPROC, .SPR, .SPR, .SPR}, {.CDE_COPROC_FIELD, .VD_S, .VN_S, .VM_S}, 0xFC800000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VCX3A, {.IMM_COPROC, .DPR, .DPR, .DPR}, {.CDE_COPROC_FIELD, .VD_D, .VN_D, .VM_D}, 0xFC900000, 0xFF300000, .CDE, .T32, {thumb32=true}},
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{.VPST, {.MVE_VPT_MASK, .NONE, .NONE, .NONE}, {.MVE_VPT_MASK_FIELD, .NONE, .NONE, .NONE}, 0xFE710F4D, 0xFFFFFFFF, .MVE_INT, .T32, {thumb32=true}},
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{.VPNOT, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0xFE310F4D, 0xFFFFFFFF, .MVE_INT, .T32, {thumb32=true}},
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{.VRINTA, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA0540, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VRINTN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA0440, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VRINTP, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA07C0, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VRINTM, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA06C0, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VRINTZ, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA05C0, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VRINTX, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFBA04C0, 0xFFBB0FD1, .MVE_FP, .T32, {thumb32=true}},
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{.VMOVX, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEB00A40, 0xFFBF0FD0, .HALF_FP, .T32, {thumb32=true}},
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{.VINS, {.SPR, .SPR, .NONE, .NONE}, {.VD_S, .VM_S, .NONE, .NONE}, 0xFEB00AC0, 0xFFBF0FD0, .HALF_FP, .T32, {thumb32=true}},
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{.VMOVNB, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFE310E81, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VMOVNT, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFE311E81, 0xFFB31FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB90740, 0xFFBB0F51, .MVE_FP, .T32, {thumb32=true}},
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{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB907C0, 0xFFBB0F51, .MVE_FP, .T32, {thumb32=true}},
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{.VQABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB00740, 0xFFB30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB007C0, 0xFFB30FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VPSEL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFE010F01, 0xFFB10FF1, .MVE_INT, .T32, {thumb32=true}},
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{.VABS, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB10340, 0xFFB30F51, .MVE_INT, .T32, {thumb32=true}},
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{.VNEG, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB103C0, 0xFFB30F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMVN, {.QPR, .QPR, .NONE, .NONE}, {.VD_Q, .VM_Q, .NONE, .NONE}, 0xFFB005C0, 0xFFB30F51, .MVE_INT, .T32, {thumb32=true}},
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{.VEOR, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFF000150, 0xFFB10F51, .MVE_INT, .T32, {thumb32=true}},
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{.VMUL, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFF000D50, 0xFFA10F51, .MVE_FP, .T32, {thumb32=true}},
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{.VCMP, {.QPR, .QPR, .NONE, .NONE}, {.VN_Q, .VM_Q, .NONE, .NONE}, 0xFE010F00, 0xFE818FF0, .MVE_INT, .T32, {thumb32=true}},
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{.VRSHRNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xFE800EC1, 0xFF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VRSHRNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xFE801EC1, 0xFF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQRSHRUNB, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xFE800FC0, 0xFF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQRSHRUNT, {.QPR, .QPR, .IMM5, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xFE801FC0, 0xFF801FD1, .MVE_INT, .T32, {thumb32=true}},
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{.VQDMLSDH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFE000E00, 0xFF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQDMLSDHX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFE001E00, 0xFF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQRDMLSDH, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFE000E01, 0xFF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VQRDMLSDHX, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFE001E01, 0xFF811F51, .MVE_INT, .T32, {thumb32=true}},
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{.VSUB, {.QPR, .QPR, .QPR, .NONE}, {.VD_Q, .VN_Q, .VM_Q, .NONE}, 0xFF000840, 0xFF810F51, .MVE_INT, .T32, {thumb32=true}},
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{.VPT, {.MVE_VPT_MASK, .COND, .QPR, .QPR}, {.MVE_VPT_MASK_FIELD, .NONE, .VN_Q, .VM_Q}, 0xFE010F00, 0xFE018FF0, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSDAV, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xFEB00E01, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSDAVA, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xFEB00E21, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSDAVX, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xFEB01E01, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VMLSDAVAX, {.GPR, .QPR, .QPR, .NONE}, {.RD_T32, .VN_Q, .VM_Q, .NONE}, 0xFEB01E21, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VRMLSLDAVH, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xFE800E01, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VRMLSLDAVHA, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xFE800E21, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VRMLSLDAVHX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xFE801E01, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.VRMLSLDAVHAX, {.GPR, .GPR, .QPR, .QPR}, {.RD_T32, .RN_T32, .VN_Q, .VM_Q}, 0xFE801E21, 0xFFB11051, .MVE_INT, .T32, {thumb32=true}},
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{.CX2A, {.IMM_COPROC, .GPR, .GPR, .IMM}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .CDE_IMM_FIELD}, 0xFE400000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX2DA, {.IMM_COPROC, .GPR, .GPR, .IMM}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .CDE_IMM_FIELD}, 0xFEC00000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX3A, {.IMM_COPROC, .GPR, .GPR, .GPR}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .RM_T32}, 0xFE800000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX3DA, {.IMM_COPROC, .GPR, .GPR, .GPR}, {.CDE_COPROC_FIELD, .RD_T32, .RN_T32, .RM_T32}, 0xFEC00000, 0xFFC00000, .CDE, .T32, {thumb32=true}},
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{.CX1A, {.IMM_COPROC, .GPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .RD_T32, .CDE_IMM_FIELD, .NONE}, 0xFE000000, 0xFF800000, .CDE, .T32, {thumb32=true}},
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{.CX1DA, {.IMM_COPROC, .GPR, .IMM, .NONE}, {.CDE_COPROC_FIELD, .RD_T32, .CDE_IMM_FIELD, .NONE}, 0xFE800000, 0xFF800000, .CDE, .T32, {thumb32=true}},
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{.LSL, {.GPR_LOW, .GPR_LOW, .IMM5, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00000000, 0x0000F800, .THUMB, .T32, {}},
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{.LSR, {.GPR_LOW, .GPR_LOW, .IMM5, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00000800, 0x0000F800, .THUMB, .T32, {}},
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{.ASR, {.GPR_LOW, .GPR_LOW, .IMM5, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00001000, 0x0000F800, .THUMB, .T32, {}},
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{.SUB, {.GPR_LOW, .GPR_LOW, .GPR_LOW, .NONE}, {.RD_T16_LO, .RN_T16_LO, .RM_T16_LO, .NONE}, 0x00001A00, 0x0000FE00, .THUMB, .T32, {}},
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{.ADD, {.GPR_LOW, .GPR_LOW, .GPR_LOW, .NONE}, {.RD_T16_LO, .RN_T16_LO, .RM_T16_LO, .NONE}, 0x00001800, 0x0000FE00, .THUMB, .T32, {}},
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{.SUB, {.GPR_LOW, .GPR_LOW, .IMM3, .NONE}, {.RD_T16_LO, .RN_T16_LO, .NONE, .NONE}, 0x00001E00, 0x0000FE00, .THUMB, .T32, {}},
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{.ADD, {.GPR_LOW, .GPR_LOW, .IMM3, .NONE}, {.RD_T16_LO, .RN_T16_LO, .NONE, .NONE}, 0x00001C00, 0x0000FE00, .THUMB, .T32, {}},
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{.MOV, {.GPR_LOW, .IMM8, .NONE, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x00002000, 0x0000F800, .THUMB, .T32, {}},
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{.CMP, {.GPR_LOW, .IMM8, .NONE, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x00002800, 0x0000F800, .THUMB, .T32, {}},
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{.ADD, {.GPR_LOW, .IMM8, .NONE, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x00003000, 0x0000F800, .THUMB, .T32, {}},
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{.SUB, {.GPR_LOW, .IMM8, .NONE, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x00003800, 0x0000F800, .THUMB, .T32, {}},
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{.AND, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004000, 0x0000FFC0, .THUMB, .T32, {}},
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{.EOR, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004040, 0x0000FFC0, .THUMB, .T32, {}},
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{.ADC, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004140, 0x0000FFC0, .THUMB, .T32, {}},
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{.SBC, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004180, 0x0000FFC0, .THUMB, .T32, {}},
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{.TST, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RN_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004200, 0x0000FFC0, .THUMB, .T32, {}},
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{.CMP, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RN_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004280, 0x0000FFC0, .THUMB, .T32, {}},
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{.CMN, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RN_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x000042C0, 0x0000FFC0, .THUMB, .T32, {}},
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{.ORR, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004300, 0x0000FFC0, .THUMB, .T32, {}},
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{.BIC, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004380, 0x0000FFC0, .THUMB, .T32, {}},
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{.MVN, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x000043C0, 0x0000FFC0, .THUMB, .T32, {}},
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{.LSL, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004080, 0x0000FFC0, .THUMB, .T32, {}},
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{.LSR, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x000040C0, 0x0000FFC0, .THUMB, .T32, {}},
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{.ASR, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004100, 0x0000FFC0, .THUMB, .T32, {}},
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{.ROR, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x000041C0, 0x0000FFC0, .THUMB, .T32, {}},
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{.NEG, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004240, 0x0000FFC0, .THUMB, .T32, {}},
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|
{.MUL, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x00004340, 0x0000FFC0, .THUMB, .T32, {}},
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|
{.BX, {.GPR, .NONE, .NONE, .NONE}, {.RM_T16_HI, .NONE, .NONE, .NONE}, 0x00004700, 0x0000FF87, .THUMB, .T32, {branch=true, writes_pc=true}},
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|
{.BLX, {.GPR, .NONE, .NONE, .NONE}, {.RM_T16_HI, .NONE, .NONE, .NONE}, 0x00004780, 0x0000FF87, .V5T, .T32, {branch=true, writes_pc=true}},
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|
{.BXNS, {.GPR, .NONE, .NONE, .NONE}, {.RM_T16_HI, .NONE, .NONE, .NONE}, 0x00004704, 0x0000FF87, .V8M_SE, .T32, {branch=true}},
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{.BLXNS, {.GPR, .NONE, .NONE, .NONE}, {.RM_T16_HI, .NONE, .NONE, .NONE}, 0x00004784, 0x0000FF87, .V8M_SE, .T32, {branch=true}},
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{.ADD, {.GPR, .GPR, .NONE, .NONE}, {.RD_T16_HI, .RM_T16_HI, .NONE, .NONE}, 0x00004400, 0x0000FF00, .THUMB, .T32, {}},
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|
{.CMP, {.GPR, .GPR, .NONE, .NONE}, {.RD_T16_HI, .RM_T16_HI, .NONE, .NONE}, 0x00004500, 0x0000FF00, .THUMB, .T32, {}},
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|
{.MOV, {.GPR, .GPR, .NONE, .NONE}, {.RD_T16_HI, .RM_T16_HI, .NONE, .NONE}, 0x00004600, 0x0000FF00, .THUMB, .T32, {}},
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{.LDR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_HI, .MEM_LITERAL, .NONE, .NONE}, 0x00004800, 0x0000F800, .THUMB, .T32, {}},
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|
{.STR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005000, 0x0000FE00, .THUMB, .T32, {}},
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|
{.STRH, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005200, 0x0000FE00, .THUMB, .T32, {}},
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|
{.STRB, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005400, 0x0000FE00, .THUMB, .T32, {}},
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|
{.LDRSB, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005600, 0x0000FE00, .THUMB, .T32, {}},
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|
{.LDR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005800, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.LDRH, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005A00, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.LDRB, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005C00, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.LDRSH, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_REG_OFFSET, .NONE, .NONE}, 0x00005E00, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.STR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00006000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.LDR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00006800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.STRB, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00007000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.LDRB, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00007800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.STRH, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00008000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.LDRH, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_LO, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00008800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.STR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_HI, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00009000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.LDR, {.GPR_LOW, .MEM, .NONE, .NONE}, {.RD_T16_HI, .MEM_IMM8_OFFSET, .NONE, .NONE}, 0x00009800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.ADR, {.GPR_LOW, .REL8, .NONE, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x0000A000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.ADD, {.GPR_LOW, .GPR, .IMM8, .NONE}, {.RD_T16_HI, .NONE, .NONE, .NONE}, 0x0000A800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.SXTB, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000B240, 0x0000FFC0, .V6, .T32, {}},
|
|
{.SXTH, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000B200, 0x0000FFC0, .V6, .T32, {}},
|
|
{.UXTB, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000B2C0, 0x0000FFC0, .V6, .T32, {}},
|
|
{.UXTH, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000B280, 0x0000FFC0, .V6, .T32, {}},
|
|
{.SUB, {.GPR, .IMM8, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000B080, 0x0000FF80, .THUMB, .T32, {}},
|
|
{.ADD, {.GPR, .IMM8, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000B000, 0x0000FF80, .THUMB, .T32, {}},
|
|
{.CBZ, {.GPR_LOW, .REL8, .NONE, .NONE}, {.RD_T16_LO, .BRANCH_CBZ, .NONE, .NONE}, 0x0000B100, 0x0000FD00, .V6T2, .T32, {branch=true, cond_branch=true, writes_pc=true}},
|
|
{.SETPAN, {.IMM_HINT, .NONE, .NONE, .NONE}, {.HINT_FIELD, .NONE, .NONE, .NONE}, 0x0000B610, 0x0000FFF7, .V8, .T32, {}},
|
|
{.PUSH, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0x0000B400, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.REV, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000BA00, 0x0000FFC0, .V6, .T32, {}},
|
|
{.REV16, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000BA40, 0x0000FFC0, .V6, .T32, {}},
|
|
{.REVSH, {.GPR_LOW, .GPR_LOW, .NONE, .NONE}, {.RD_T16_LO, .RM_T16_LO, .NONE, .NONE}, 0x0000BAC0, 0x0000FFC0, .V6, .T32, {}},
|
|
{.CBNZ, {.GPR_LOW, .REL8, .NONE, .NONE}, {.RD_T16_LO, .BRANCH_CBZ, .NONE, .NONE}, 0x0000B900, 0x0000FD00, .V6T2, .T32, {branch=true, cond_branch=true, writes_pc=true}},
|
|
{.NOP, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BF00, 0x0000FFFF, .V6T2, .T32, {}},
|
|
{.YIELD, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BF10, 0x0000FFFF, .V6T2, .T32, {}},
|
|
{.WFE, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BF20, 0x0000FFFF, .V6T2, .T32, {}},
|
|
{.WFI, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BF30, 0x0000FFFF, .V6T2, .T32, {}},
|
|
{.SEV, {.NONE, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BF40, 0x0000FFFF, .V6T2, .T32, {}},
|
|
{.BKPT, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000BE00, 0x0000FF00, .V5T, .T32, {}},
|
|
{.IT, {.COND, .IMM4, .NONE, .NONE}, {.NONE, .IT_MASK, .NONE, .NONE}, 0x0000BF00, 0x0000FF00, .V6T2, .T32, {}},
|
|
{.POP, {.GPR_LIST, .NONE, .NONE, .NONE}, {.A32_REG_LIST, .NONE, .NONE, .NONE}, 0x0000BC00, 0x0000FE00, .THUMB, .T32, {}},
|
|
{.STM, {.GPR_LOW, .GPR_LIST, .NONE, .NONE}, {.RD_T16_HI, .A32_REG_LIST, .NONE, .NONE}, 0x0000C000, 0x0000F800, .THUMB, .T32, {}},
|
|
{.LDM, {.GPR_LOW, .GPR_LIST, .NONE, .NONE}, {.RD_T16_HI, .A32_REG_LIST, .NONE, .NONE}, 0x0000C800, 0x0000F800, .THUMB, .T32, {}},
|
|
{.B, {.REL8, .COND, .NONE, .NONE}, {.BRANCH_8_T16, .NONE, .NONE, .NONE}, 0x0000D000, 0x0000F000, .THUMB, .T32, {branch=true, cond_branch=true, writes_pc=true}},
|
|
{.SVC, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000DF00, 0x0000FF00, .THUMB, .T32, {}},
|
|
{.UDF, {.IMM, .NONE, .NONE, .NONE}, {.NONE, .NONE, .NONE, .NONE}, 0x0000DE00, 0x0000FF00, .THUMB, .T32, {}},
|
|
{.B, {.REL11, .NONE, .NONE, .NONE}, {.BRANCH_11_T16, .NONE, .NONE, .NONE}, 0x0000E000, 0x0000F800, .THUMB, .T32, {branch=true, writes_pc=true}},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_FORM_IDX := [1553]u16{
|
|
0, 2, 1, 1, 5, 4, 0, 2, 1, 1, 5, 4, 0, 2, 1, 5,
|
|
4, 0, 2, 1, 5, 4, 0, 2, 1, 1, 5, 4, 0, 2, 1, 1,
|
|
5, 4, 0, 2, 2, 2, 2, 1, 1, 2, 2, 2, 5, 4, 0, 2,
|
|
1, 1, 5, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 2,
|
|
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 2, 1, 0, 0, 0, 3, 3, 3, 2, 1, 0, 0,
|
|
0, 3, 3, 3, 5, 4, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
|
0, 2, 1, 0, 0, 5, 4, 0, 0, 0, 0, 0, 0, 2, 1, 0,
|
|
0, 0, 0, 0, 0, 5, 4, 0, 0, 0, 2, 1, 1, 1, 1, 0,
|
|
0, 0, 5, 4, 1, 1, 1, 14, 9, 8, 6, 10, 4, 3, 3, 1,
|
|
4, 4, 3, 3, 1, 3, 7, 3, 3, 9, 3, 3, 1, 4, 1, 1,
|
|
0, 5, 13, 5, 9, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
6, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 4,
|
|
9, 7, 4, 4, 5, 5, 2, 4, 4, 1, 4, 9, 4, 4, 11, 4,
|
|
4, 0, 6, 3, 6, 4, 1, 1, 1, 1, 0, 1, 1, 0, 1, 8,
|
|
1, 1, 1, 10, 1, 1, 1, 1, 1, 3, 11, 14, 10, 8, 10, 4,
|
|
5, 5, 6, 6, 3, 5, 5, 1, 5, 5, 5, 5, 5, 9, 1, 0,
|
|
7, 13, 7, 5, 9, 3, 2, 2, 2, 2, 1, 2, 2, 0, 2, 2,
|
|
2, 2, 8, 2, 2, 2, 2, 0, 2, 0, 12, 4, 7, 7, 1, 11,
|
|
5, 0, 8, 3, 3, 3, 0, 10, 3, 3, 0, 3, 0, 3, 0, 24,
|
|
22, 25, 23, 21, 10, 11, 12, 19, 20, 16, 13, 18, 17, 11, 15, 14,
|
|
10, 6, 0, 0, 0, 9, 8, 2, 4, 7, 5, 3, 6, 0, 0, 0,
|
|
0, 0, 1, 1, 1, 5, 0, 0, 0, 4, 0, 1, 1, 1, 1, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 2, 2,
|
|
2, 2, 1, 1, 1, 1, 4, 1, 4, 1, 4, 1, 1, 1, 1, 1,
|
|
1, 0, 0, 1, 1, 0, 1, 0, 3, 0, 3, 0, 3, 9, 14, 12,
|
|
6, 7, 7, 9, 9, 7, 7, 1, 3, 9, 7, 7, 1, 7, 7, 7,
|
|
3, 3, 0, 5, 13, 11, 3, 6, 6, 8, 8, 6, 6, 0, 0, 6,
|
|
8, 6, 0, 6, 6, 3, 4, 3, 3, 6, 2, 2, 0, 10, 4, 7,
|
|
2, 2, 2, 1, 4, 11, 0, 6, 3, 4, 0, 0, 0, 0, 1, 10,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 8, 3,
|
|
3, 3, 9, 1, 5, 9, 1, 0, 7, 5, 1, 1, 1, 8, 0, 2,
|
|
8, 0, 4, 0, 12, 1, 11, 8, 0, 10, 0, 0, 0, 0, 3, 3,
|
|
3, 3, 0, 0, 1, 1, 1, 3, 3, 3, 1, 1, 2, 2, 2, 0,
|
|
0, 0, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3, 5,
|
|
5, 5, 5, 3, 5, 3, 5, 3, 5, 3, 3, 3, 1, 1, 3, 3,
|
|
0, 1, 0, 2, 3, 2, 3, 0, 1, 0, 0, 0, 0, 9, 7, 3,
|
|
6, 5, 8, 2, 4, 7, 3, 9, 4, 5, 8, 6, 2, 0, 1, 0,
|
|
1, 2, 4, 1, 5, 0, 3, 2, 0, 1, 2, 1, 3, 2, 0, 5,
|
|
4, 2, 0, 1, 3, 4, 2, 3, 3, 4, 1, 0, 5, 2, 1, 5,
|
|
3, 0, 4, 2, 0, 1, 0, 1, 0, 1, 2, 3, 0, 4, 3, 2,
|
|
5, 1, 0, 4, 5, 3, 2, 1, 4, 1, 3, 0, 2, 3, 4, 2,
|
|
0, 1, 0, 1, 0, 0, 0, 0, 0, 1, 2, 3, 1, 0, 3, 2,
|
|
2, 3, 0, 1, 3, 2, 0, 1, 1, 2, 3, 0, 1, 3, 0, 2,
|
|
3, 0, 1, 2, 3, 2, 3, 0, 3, 0, 3, 1, 2, 0, 3, 0,
|
|
1, 2, 1, 0, 1, 0, 2, 1, 0, 3, 0, 1, 2, 0, 1, 0,
|
|
1, 5, 6, 4, 1, 0, 2, 1, 0, 2, 1, 2, 0, 1, 2, 0,
|
|
2, 2, 0, 0, 0, 7, 6, 5, 4, 2, 1, 0, 0, 1, 2, 1,
|
|
2, 0, 2, 1, 0, 2, 0, 2, 0, 0, 0, 0, 0, 0, 0, 1,
|
|
1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 0, 0, 0, 3, 3, 0,
|
|
0, 3, 0, 3, 0, 0, 0, 1, 0, 1, 4, 4, 0, 2, 2, 1,
|
|
0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0,
|
|
0, 1, 0, 0, 7, 9, 0, 0, 6, 8, 0, 0, 1, 0, 1, 0,
|
|
0, 1, 1, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0,
|
|
4, 1, 0, 1, 0, 27, 2, 2, 0, 1, 0, 1, 0, 0, 0, 0,
|
|
5, 26, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 2, 0, 1, 0,
|
|
1, 2, 2, 1, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 2, 0,
|
|
1, 2, 2, 1, 0, 1, 0, 2, 2, 1, 0, 1, 0, 2, 3, 5,
|
|
3, 2, 0, 1, 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
|
|
1, 0, 0, 1, 1, 0, 0, 1, 2, 1, 0, 2, 4, 3, 5, 6,
|
|
7, 9, 8, 1, 0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0,
|
|
2, 1, 0, 9, 6, 8, 3, 7, 4, 1, 0, 1, 0, 5, 4, 2,
|
|
3, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0,
|
|
0, 0, 1, 1, 2, 2, 1, 7, 6, 6, 7, 4, 4, 4, 4, 4,
|
|
3, 5, 4, 7, 5, 11, 10, 8, 10, 9, 8, 7, 8, 8, 8, 8,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
|
1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 4, 0, 0, 0, 0, 7, 2, 2, 2, 2, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 17, 17, 17, 6, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 16, 16, 11, 5, 5, 0, 0, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
15, 15, 8, 8, 2, 10, 10, 12, 12, 8, 4, 6, 0, 0, 4, 4,
|
|
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4,
|
|
3, 6, 4, 8, 9, 7, 0, 7, 8, 7, 6, 7, 7, 7, 7, 4,
|
|
3, 1, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
|
|
0, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
|
2, 9, 8, 7, 7, 7, 7, 6, 6, 1, 1, 1, 10, 8, 7, 6,
|
|
6, 6, 6, 5, 5, 2, 1, 2, 2, 1, 2, 1, 1, 2, 2, 2,
|
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
|
|
1, 1, 1, 1, 1, 1, 1, 1, 3, 1, 1, 0, 5, 5, 5, 4,
|
|
1, 1, 1, 1, 1, 1, 2, 1, 2, 2, 2, 2, 0, 0, 0, 0,
|
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
|
0, 1, 0, 0, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 11, 11,
|
|
0, 0, 0, 10, 10, 12, 2, 16, 6, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
|
0, 2, 2, 2, 6, 6, 7, 7, 6, 3, 8, 8, 6, 6, 6, 6,
|
|
3, 4, 3, 6, 6, 6, 3, 3, 3, 2, 0, 2, 1, 2, 0, 0,
|
|
9, 5, 7, 4, 4, 4, 4, 4, 5, 4, 4, 4, 5, 6, 5, 5,
|
|
5, 5, 6, 7, 0, 10, 1, 1, 1, 1, 9, 11, 0, 1, 1, 1,
|
|
1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, 5, 5, 1, 1, 1,
|
|
2,
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_BUCKET_LIST := [5141]u16{
|
|
0, 1, 2, 3, 0, 4, 1, 5, 2, 6, 7, 8, 9, 6, 10, 7,
|
|
11, 8, 12, 35, 36, 37, 13, 14, 41, 42, 43, 15, 13, 16, 14, 17,
|
|
18, 19, 20, 21, 18, 19, 22, 23, 24, 25, 22, 26, 23, 27, 24, 28,
|
|
29, 30, 31, 28, 32, 33, 29, 30, 34, 35, 36, 37, 38, 39, 40, 34,
|
|
41, 42, 43, 44, 38, 45, 39, 46, 47, 48, 49, 46, 50, 47, 51, 48,
|
|
52, 53, 54, 55, 56, 57, 58, 105, 106, 107, 59, 60, 61, 62, 63, 64,
|
|
113, 114, 115, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
|
|
78, 79, 80, 53, 81, 82, 83, 84, 85, 86, 87, 88, 89, 138, 139, 140,
|
|
90, 91, 146, 147, 148, 92, 93, 94, 70, 95, 96, 97, 98, 99, 156, 157,
|
|
158, 100, 101, 164, 165, 166, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
|
|
112, 113, 114, 115, 116, 108, 117, 109, 118, 119, 120, 121, 122, 123, 124, 125,
|
|
126, 127, 128, 129, 130, 131, 132, 133, 129, 134, 130, 135, 136, 137, 138, 139,
|
|
140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 141, 142, 151, 152, 153,
|
|
154, 155, 156, 157, 158, 159, 160, 161, 162, 154, 163, 155, 164, 165, 166, 167,
|
|
168, 169, 171, 170, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
|
|
184, 186, 185, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199,
|
|
200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 212, 211, 213, 214, 215,
|
|
216, 217, 218, 219, 220, 221, 223, 222, 224, 225, 226, 227, 228, 229, 230, 231,
|
|
232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 243, 242, 244, 245, 246, 247,
|
|
248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 259, 258, 260, 261, 262, 263,
|
|
264, 265, 221, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278,
|
|
279, 280, 281, 282, 283, 285, 284, 286, 287, 288, 289, 290, 291, 292, 293, 294,
|
|
295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 307, 306, 308, 309, 310,
|
|
311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326,
|
|
327, 328, 329, 313, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178,
|
|
179, 180, 181, 182, 183, 184, 186, 185, 187, 188, 189, 190, 191, 192, 194, 193,
|
|
195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210,
|
|
211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 330, 222, 223, 224, 225, 226,
|
|
227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242,
|
|
243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 259,
|
|
258, 260, 261, 262, 263, 264, 331, 330, 266, 267, 268, 269, 270, 271, 272, 273,
|
|
274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
|
|
290, 291, 292, 293, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305,
|
|
306, 307, 308, 309, 310, 311, 312, 332, 314, 315, 316, 317, 318, 319, 320, 321,
|
|
322, 323, 324, 325, 326, 327, 328, 333, 332, 334, 335, 339, 337, 338, 336, 340,
|
|
341, 349, 342, 348, 343, 350, 352, 344, 345, 346, 351, 347, 354, 353, 355, 356,
|
|
360, 358, 361, 362, 363, 359, 364, 357, 365, 548, 366, 549, 367, 368, 369, 550,
|
|
370, 551, 552, 371, 372, 553, 554, 555, 373, 374, 556, 375, 557, 376, 558, 559,
|
|
560, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391,
|
|
392, 393, 394, 395, 396, 548, 365, 549, 366, 367, 368, 369, 550, 551, 370, 552,
|
|
371, 372, 553, 554, 555, 373, 556, 374, 557, 375, 376, 558, 559, 560, 377, 397,
|
|
378, 398, 399, 400, 401, 402, 403, 404, 405, 406, 408, 407, 409, 410, 411, 412,
|
|
413, 414, 415, 416, 417, 418, 419, 420, 548, 365, 549, 366, 367, 368, 550, 369,
|
|
370, 551, 552, 371, 372, 553, 554, 555, 373, 374, 556, 375, 557, 558, 376, 559,
|
|
560, 377, 421, 548, 365, 366, 549, 367, 368, 550, 369, 551, 370, 552, 371, 372,
|
|
553, 554, 555, 373, 556, 374, 557, 375, 376, 558, 559, 560, 377, 422, 423, 424,
|
|
421, 334, 338, 337, 336, 339, 335, 341, 340, 352, 351, 350, 349, 348, 347, 346,
|
|
345, 344, 342, 343, 354, 353, 355, 356, 364, 363, 361, 360, 359, 362, 357, 358,
|
|
548, 365, 549, 366, 367, 368, 369, 550, 370, 551, 552, 371, 553, 372, 554, 555,
|
|
373, 556, 374, 375, 557, 558, 376, 559, 560, 377, 425, 379, 380, 381, 382, 383,
|
|
384, 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 548, 365, 366,
|
|
549, 367, 368, 369, 550, 370, 551, 552, 371, 553, 372, 554, 555, 373, 556, 374,
|
|
557, 375, 376, 558, 559, 560, 377, 426, 425, 398, 399, 400, 401, 402, 403, 404,
|
|
406, 405, 408, 407, 409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420,
|
|
365, 548, 366, 549, 367, 368, 369, 550, 551, 370, 552, 371, 553, 372, 554, 555,
|
|
373, 374, 556, 557, 375, 558, 376, 559, 560, 377, 427, 548, 365, 366, 549, 367,
|
|
368, 369, 550, 551, 370, 552, 371, 553, 372, 554, 555, 373, 556, 374, 557, 375,
|
|
376, 558, 559, 560, 377, 422, 423, 428, 427, 429, 430, 431, 432, 433, 434, 435,
|
|
436, 437, 438, 439, 440, 442, 441, 443, 444, 445, 446, 447, 448, 449, 450, 451,
|
|
453, 452, 454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467,
|
|
468, 470, 469, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 483,
|
|
484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 497, 498, 499,
|
|
500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512, 513, 514, 515,
|
|
516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 530, 531,
|
|
532, 533, 534, 535, 536, 537, 538, 429, 430, 431, 432, 433, 434, 435, 436, 437,
|
|
438, 439, 440, 442, 441, 443, 444, 445, 446, 447, 448, 449, 450, 451, 453, 452,
|
|
454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 468, 470,
|
|
469, 471, 472, 473, 474, 475, 539, 477, 478, 479, 480, 481, 482, 483, 484, 485,
|
|
486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 540, 509, 510, 511, 512, 513,
|
|
514, 515, 516, 517, 518, 519, 520, 521, 522, 523, 524, 525, 526, 527, 528, 529,
|
|
530, 531, 532, 533, 534, 535, 536, 537, 541, 542, 338, 339, 335, 336, 337, 341,
|
|
340, 352, 351, 350, 348, 347, 349, 346, 343, 344, 345, 342, 543, 544, 545, 362,
|
|
363, 364, 361, 360, 359, 357, 358, 546, 547, 365, 548, 366, 549, 367, 368, 369,
|
|
550, 551, 370, 552, 371, 553, 372, 554, 555, 373, 374, 556, 375, 557, 558, 376,
|
|
559, 560, 377, 561, 562, 563, 564, 565, 566, 567, 568, 569, 570, 571, 572, 573,
|
|
546, 547, 365, 548, 366, 549, 367, 368, 369, 550, 551, 370, 552, 371, 372, 553,
|
|
554, 555, 373, 374, 556, 375, 557, 376, 558, 559, 560, 377, 574, 561, 575, 576,
|
|
577, 578, 579, 580, 582, 581, 584, 583, 585, 586, 587, 588, 589, 590, 591, 546,
|
|
547, 548, 365, 549, 366, 367, 368, 369, 550, 370, 551, 371, 552, 372, 553, 554,
|
|
555, 373, 374, 556, 375, 557, 376, 558, 559, 560, 377, 592, 593, 594, 595, 596,
|
|
600, 597, 598, 599, 601, 602, 603, 604, 605, 610, 611, 608, 609, 606, 607, 612,
|
|
613, 618, 619, 615, 620, 614, 616, 617, 622, 621, 623, 624, 625, 627, 629, 626,
|
|
628, 631, 630, 633, 634, 632, 637, 636, 638, 640, 639, 635, 642, 644, 641, 643,
|
|
645, 646, 647, 653, 651, 652, 649, 650, 648, 658, 654, 657, 659, 656, 655, 661,
|
|
660, 662, 663, 666, 664, 667, 665, 671, 673, 672, 670, 668, 669, 676, 675, 677,
|
|
674, 679, 678, 682, 683, 684, 680, 681, 686, 688, 689, 687, 685, 690, 691, 692,
|
|
693, 694, 695, 699, 697, 698, 696, 700, 703, 702, 701, 706, 707, 705, 704, 710,
|
|
708, 711, 709, 713, 715, 712, 714, 717, 718, 719, 716, 723, 721, 720, 722, 725,
|
|
724, 546, 547, 548, 365, 366, 549, 367, 368, 369, 550, 370, 551, 371, 552, 372,
|
|
553, 554, 555, 373, 374, 556, 375, 557, 376, 558, 559, 560, 377, 726, 592, 542,
|
|
339, 337, 338, 336, 335, 340, 341, 352, 351, 350, 348, 347, 346, 344, 343, 342,
|
|
345, 349, 543, 544, 545, 363, 362, 361, 358, 359, 360, 364, 357, 546, 547, 548,
|
|
365, 366, 549, 367, 368, 369, 550, 370, 551, 371, 552, 372, 553, 554, 555, 373,
|
|
374, 556, 375, 557, 376, 558, 559, 560, 377, 727, 562, 563, 564, 565, 566, 567,
|
|
568, 569, 570, 571, 572, 573, 546, 547, 548, 365, 366, 549, 367, 368, 369, 550,
|
|
370, 551, 371, 552, 372, 553, 554, 555, 373, 374, 556, 375, 557, 376, 558, 559,
|
|
560, 377, 728, 727, 575, 576, 577, 578, 579, 580, 582, 581, 583, 584, 585, 586,
|
|
587, 588, 589, 590, 591, 546, 547, 365, 548, 366, 549, 367, 368, 369, 550, 370,
|
|
551, 371, 552, 372, 553, 554, 555, 373, 374, 556, 375, 557, 376, 558, 559, 560,
|
|
377, 729, 596, 595, 594, 593, 600, 599, 597, 598, 601, 602, 603, 604, 605, 606,
|
|
607, 612, 610, 611, 609, 608, 620, 618, 615, 616, 617, 619, 613, 614, 621, 622,
|
|
625, 623, 624, 631, 628, 629, 630, 626, 627, 634, 633, 632, 638, 639, 637, 636,
|
|
635, 640, 644, 641, 642, 643, 647, 646, 645, 651, 652, 650, 649, 648, 653, 658,
|
|
659, 656, 657, 655, 654, 660, 661, 662, 663, 667, 665, 664, 666, 672, 673, 671,
|
|
670, 668, 669, 679, 677, 678, 676, 675, 674, 680, 681, 682, 684, 683, 687, 688,
|
|
689, 685, 686, 690, 691, 692, 693, 694, 695, 697, 696, 699, 698, 700, 703, 701,
|
|
702, 706, 705, 707, 704, 711, 710, 708, 709, 713, 712, 714, 715, 716, 718, 717,
|
|
719, 723, 720, 721, 722, 724, 725, 546, 547, 365, 548, 366, 549, 367, 368, 369,
|
|
550, 370, 551, 371, 552, 372, 553, 554, 555, 373, 374, 556, 375, 557, 376, 558,
|
|
559, 560, 377, 730, 729, 731, 732, 733, 734, 735, 736, 737, 738, 739, 740, 741,
|
|
768, 769, 743, 745, 742, 744, 746, 747, 748, 749, 750, 751, 752, 789, 790, 791,
|
|
754, 753, 755, 756, 757, 758, 760, 759, 761, 764, 763, 762, 767, 765, 766, 768,
|
|
769, 770, 771, 772, 773, 776, 775, 774, 779, 778, 777, 780, 782, 781, 784, 783,
|
|
785, 787, 788, 786, 755, 753, 754, 758, 756, 757, 761, 760, 759, 762, 763, 764,
|
|
766, 767, 765, 789, 790, 791, 770, 771, 772, 776, 774, 773, 775, 779, 777, 778,
|
|
782, 781, 780, 783, 784, 785, 787, 786, 788, 797, 798, 799, 800, 801, 804, 805,
|
|
792, 793, 794, 795, 796, 806, 797, 798, 799, 800, 801, 802, 803, 804, 805, 806,
|
|
807, 808, 809, 810, 811, 812, 813, 814, 815, 816, 817, 818, 819, 820, 821, 822,
|
|
823, 824, 825, 826, 827, 828, 829, 830, 831, 832, 833, 834, 835, 836, 837, 838,
|
|
839, 840, 841, 842, 843, 844, 845, 846, 847, 848, 849, 850, 851, 852, 853, 854,
|
|
855, 851, 856, 857, 858, 859, 860, 861, 862, 863, 864, 865, 861, 866, 867, 868,
|
|
869, 870, 871, 872, 873, 888, 874, 889, 875, 876, 877, 878, 879, 893, 880, 881,
|
|
882, 883, 884, 885, 894, 886, 887, 888, 889, 890, 890, 891, 892, 893, 891, 892,
|
|
894, 895, 896, 895, 897, 898, 899, 897, 898, 899, 900, 898, 900, 898, 901, 903,
|
|
898, 902, 905, 903, 901, 898, 904, 905, 902, 900, 898, 900, 898, 906, 898, 907,
|
|
908, 906, 898, 907, 900, 898, 900, 898, 909, 898, 910, 909, 898, 910, 900, 898,
|
|
900, 898, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912,
|
|
911, 912, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912, 911, 912,
|
|
911, 912, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913,
|
|
911, 913, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913, 911, 913,
|
|
911, 913, 914, 915, 916, 929, 930, 917, 918, 929, 930, 919, 920, 921, 922, 923,
|
|
924, 925, 926, 927, 928, 929, 930, 917, 918, 931, 929, 930, 919, 920, 914, 915,
|
|
916, 932, 933, 929, 934, 930, 917, 935, 918, 936, 937, 929, 938, 930, 919, 939,
|
|
920, 921, 922, 923, 924, 925, 926, 927, 928, 929, 930, 917, 918, 931, 929, 930,
|
|
919, 920, 940, 941, 943, 942, 917, 918, 940, 941, 945, 944, 919, 920, 946, 947,
|
|
948, 949, 950, 951, 940, 941, 942, 943, 917, 918, 953, 952, 940, 941, 944, 945,
|
|
919, 920, 940, 941, 943, 942, 917, 918, 940, 941, 945, 944, 919, 920, 946, 947,
|
|
948, 949, 950, 951, 940, 941, 942, 943, 917, 918, 940, 941, 944, 945, 919, 920,
|
|
929, 930, 955, 954, 929, 930, 956, 957, 959, 958, 929, 930, 929, 930, 929, 930,
|
|
954, 955, 929, 930, 957, 956, 929, 930, 929, 930, 940, 941, 955, 954, 940, 941,
|
|
957, 956, 940, 941, 940, 941, 940, 941, 954, 955, 940, 941, 957, 956, 940, 941,
|
|
940, 941, 960, 961, 962, 963, 964, 965, 966, 967, 929, 969, 968, 970, 971, 930,
|
|
972, 973, 974, 975, 976, 964, 963, 977, 929, 978, 979, 980, 981, 930, 982, 973,
|
|
983, 975, 984, 985, 986, 987, 964, 963, 965, 988, 929, 989, 990, 992, 991, 930,
|
|
972, 973, 974, 975, 963, 964, 977, 993, 994, 929, 996, 995, 998, 997, 930, 982,
|
|
973, 983, 975, 961, 962, 964, 963, 965, 966, 967, 929, 968, 969, 970, 971, 930,
|
|
972, 973, 974, 975, 964, 963, 977, 929, 979, 978, 981, 980, 930, 982, 973, 983,
|
|
975, 984, 985, 986, 987, 963, 964, 965, 988, 929, 989, 990, 991, 992, 930, 972,
|
|
973, 974, 975, 964, 963, 977, 993, 994, 929, 996, 995, 998, 997, 930, 982, 973,
|
|
983, 975, 999, 1000, 1002, 1001, 1003, 1004, 1005, 965, 1006, 1007, 1008, 972, 973, 974,
|
|
975, 977, 1009, 1010, 1012, 1011, 1014, 1013, 982, 973, 983, 975, 965, 1015, 1016, 1018,
|
|
1017, 1019, 1020, 972, 973, 974, 975, 1022, 1023, 1021, 1024, 1025, 1027, 1026, 1029, 1028,
|
|
1031, 1030, 1032, 1033, 1034, 1035, 1037, 1036, 1038, 1039, 1040, 1041, 1043, 1042, 1044, 1045,
|
|
1046, 1047, 1048, 1058, 1055, 1051, 1049, 1052, 1050, 1056, 1053, 1057, 1054, 1059, 1060, 1061,
|
|
1062, 1064, 1063, 1065, 1066, 1067, 1068, 1069, 1070, 1071, 1074, 1075, 1079, 1073, 1077, 1072,
|
|
1078, 1076, 1080, 1082, 1081, 1083, 1084, 1085, 1086, 1088, 1087, 977, 982, 973, 983, 975,
|
|
999, 1000, 1001, 1002, 1004, 1003, 1005, 1089, 965, 1006, 1007, 1008, 972, 973, 974, 975,
|
|
977, 1009, 1010, 1012, 1011, 1014, 1013, 982, 973, 983, 975, 1090, 1091, 965, 1015, 1016,
|
|
1017, 1018, 1020, 1019, 972, 973, 974, 975, 1092, 1023, 1022, 1021, 1025, 1024, 1027, 1026,
|
|
1028, 1029, 1030, 1031, 1033, 1032, 1035, 1034, 1036, 1037, 1039, 1038, 1040, 1041, 1043, 1042,
|
|
1045, 1044, 1047, 1048, 1046, 1050, 1049, 1057, 1056, 1054, 1051, 1052, 1053, 1055, 1058, 1060,
|
|
1059, 1061, 1062, 1063, 1064, 1066, 1065, 1067, 1068, 1069, 1070, 1071, 1073, 1078, 1072, 1077,
|
|
1079, 1076, 1074, 1075, 1081, 1080, 1082, 1083, 1084, 1086, 1085, 1087, 1088, 977, 982, 973,
|
|
983, 975, 929, 930, 1093, 929, 930, 1093, 929, 930, 1093, 929, 930, 1093, 929, 930,
|
|
1093, 929, 930, 1093, 929, 930, 1093, 929, 930, 1093, 1093, 1093, 1093, 1093, 1093, 1093,
|
|
1093, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105, 1106, 1107,
|
|
1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123,
|
|
1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139,
|
|
1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155,
|
|
1156, 1157, 1158, 1159, 1160, 1161, 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171,
|
|
1172, 1173, 1174, 1175, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187,
|
|
1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203,
|
|
1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219,
|
|
1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235,
|
|
1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251,
|
|
1252, 1253, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266, 1267,
|
|
1268, 1269, 1270, 1272, 1271, 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281, 1282, 1283,
|
|
1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299,
|
|
1300, 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311, 1279, 1280, 1281, 1263,
|
|
1264, 1265, 1266, 1268, 1267, 1269, 1272, 1271, 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280,
|
|
1281, 1312, 1310, 1311, 1279, 1280, 1281, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321,
|
|
1322, 1323, 1324, 1325, 1326, 1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337,
|
|
1338, 1339, 1340, 1341, 1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353,
|
|
1354, 1355, 1356, 1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369,
|
|
1370, 1371, 1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385,
|
|
1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401,
|
|
1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416, 1417,
|
|
1418, 1419, 1420, 1421, 1423, 1422, 1425, 1424, 1426, 1427, 1155, 1156, 1157, 1158, 1159, 1160,
|
|
1428, 1429, 1430, 1431, 1432, 1433, 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1165,
|
|
1166, 1167, 1168, 1169, 1170, 1443, 1444, 1445, 1174, 1175, 1176, 1446, 1181, 1182, 1183, 1184,
|
|
1185, 1186, 1190, 1191, 1447, 1192, 1193, 1448, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201,
|
|
1202, 1203, 1204, 1449, 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1205, 1457, 1206, 1207, 1208,
|
|
1209, 1458, 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223,
|
|
1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239,
|
|
1240, 1241, 1242, 1243, 1459, 1460, 1461, 1462, 1463, 1464, 1465, 1466, 1246, 1247, 1248, 1249,
|
|
1467, 1468, 1469, 1470, 1471, 1472, 1473, 1473, 1474, 1474, 1475, 1475, 1476, 1477, 1478, 1479,
|
|
1480, 1480, 1481, 1481, 1482, 1482, 1483, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491,
|
|
1492, 1493, 1494, 1495, 1496, 1497, 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507,
|
|
1507, 1508, 1509, 1510, 1511, 1512, 1513, 1514, 1515, 1516, 1516, 1517, 1517, 1518, 1518, 1519,
|
|
1519, 1520, 1520, 1521, 1521, 1522, 1522, 1523, 1523, 1524, 1524, 1525, 1525, 1526, 1527, 1528,
|
|
1529, 1530, 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544,
|
|
1545, 1546, 1547, 1547, 1548, 1548, 1549, 1549, 1549, 1550, 1551, 1549, 1552, 1552, 1102, 1103,
|
|
1104, 1105, 1110, 1116, 1106, 1115, 1116, 1115, 1113, 1112, 1113, 1109, 1112, 1099, 1100, 1107,
|
|
1116, 1095, 1096, 1097, 1098, 1101, 1115, 1116, 1115, 1114, 1111, 1108, 1114, 1111, 1116, 1115,
|
|
1116, 1094, 1115, 1116, 1115, 1116, 1115, 1129, 1128, 1121, 1129, 1128, 1135, 1135, 1117, 1118,
|
|
1119, 1120, 1126, 1125, 1134, 1117, 1118, 1119, 1120, 1125, 1126, 1134, 1127, 1127, 1130, 1122,
|
|
1130, 1124, 1132, 1132, 1133, 1133, 1123, 1131, 1131, 1146, 1153, 1154, 1146, 1149, 1151, 1150,
|
|
1152, 1146, 1153, 1154, 1136, 1137, 1138, 1139, 1146, 1149, 1151, 1150, 1152, 1153, 1154, 1149,
|
|
1151, 1150, 1152, 1153, 1154, 1149, 1151, 1150, 1152, 1136, 1137, 1138, 1139, 1143, 1144, 1145,
|
|
1148, 1140, 1141, 1142, 1147, 1143, 1144, 1145, 1148, 1140, 1141, 1142, 1147, 1174, 1175, 1187,
|
|
1188, 1190, 1191, 1192, 1203, 1204, 1207, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228,
|
|
1229, 1230, 1231, 1254, 1174, 1175, 1187, 1189, 1190, 1191, 1192, 1204, 1207, 1210, 1211, 1214,
|
|
1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1254, 1174, 1175, 1187, 1188, 1190, 1191,
|
|
1192, 1204, 1207, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1254,
|
|
1161, 1162, 1163, 1164, 1174, 1175, 1176, 1187, 1189, 1190, 1191, 1192, 1193, 1202, 1204, 1207,
|
|
1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1254, 1174, 1175, 1188,
|
|
1190, 1191, 1192, 1203, 1204, 1207, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229,
|
|
1230, 1231, 1250, 1254, 1174, 1175, 1189, 1190, 1191, 1192, 1204, 1207, 1210, 1211, 1214, 1215,
|
|
1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1250, 1254, 1174, 1175, 1188, 1190, 1191, 1192,
|
|
1204, 1207, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1250, 1254,
|
|
1161, 1162, 1163, 1164, 1174, 1175, 1176, 1189, 1190, 1191, 1192, 1193, 1202, 1204, 1207, 1210,
|
|
1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1250, 1254, 1155, 1156, 1171,
|
|
1172, 1173, 1183, 1184, 1185, 1186, 1196, 1197, 1198, 1199, 1212, 1213, 1220, 1221, 1222, 1223,
|
|
1224, 1225, 1226, 1227, 1244, 1245, 1249, 1252, 1255, 1212, 1213, 1220, 1221, 1222, 1223, 1224,
|
|
1225, 1226, 1227, 1252, 1255, 1171, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227,
|
|
1252, 1255, 1181, 1182, 1194, 1195, 1200, 1201, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225,
|
|
1226, 1227, 1252, 1255, 1171, 1172, 1173, 1183, 1184, 1185, 1186, 1196, 1197, 1198, 1199, 1212,
|
|
1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1244, 1245, 1249, 1251, 1253, 1255, 1212,
|
|
1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1251, 1253, 1255, 1157, 1158, 1159, 1160,
|
|
1167, 1168, 1169, 1170, 1171, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1251,
|
|
1253, 1255, 1165, 1166, 1181, 1182, 1194, 1195, 1200, 1201, 1212, 1213, 1220, 1221, 1222, 1223,
|
|
1224, 1225, 1226, 1227, 1251, 1253, 1255, 1177, 1205, 1208, 1232, 1233, 1234, 1235, 1236, 1237,
|
|
1238, 1239, 1240, 1241, 1242, 1243, 1178, 1205, 1208, 1232, 1233, 1234, 1235, 1236, 1237, 1238,
|
|
1239, 1240, 1241, 1242, 1243, 1179, 1206, 1209, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239,
|
|
1240, 1241, 1242, 1243, 1180, 1206, 1209, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240,
|
|
1241, 1242, 1243, 1177, 1205, 1208, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241,
|
|
1242, 1243, 1178, 1205, 1208, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242,
|
|
1243, 1179, 1206, 1209, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243,
|
|
1180, 1206, 1209, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1246,
|
|
1247, 1248, 1246, 1247, 1248, 1246, 1247, 1248, 1246, 1247, 1248, 1246, 1247, 1248, 1246, 1247,
|
|
1248, 1246, 1247, 1248, 1246, 1247, 1248, 1256, 1258, 1259, 1260, 1270, 1272, 1271, 1280, 1279,
|
|
1281, 1258, 1259, 1261, 1263, 1270, 1272, 1271, 1280, 1279, 1281, 1258, 1259, 1270, 1278, 1280,
|
|
1279, 1281, 1258, 1259, 1270, 1278, 1279, 1280, 1281, 1257, 1259, 1262, 1268, 1267, 1270, 1277,
|
|
1279, 1280, 1281, 1259, 1268, 1267, 1270, 1277, 1279, 1280, 1281, 1259, 1269, 1270, 1280, 1279,
|
|
1281, 1259, 1269, 1270, 1280, 1279, 1281, 1273, 1280, 1279, 1281, 1264, 1273, 1280, 1279, 1281,
|
|
1280, 1279, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1280,
|
|
1279, 1281, 1259, 1270, 1279, 1280, 1281, 1259, 1266, 1270, 1280, 1279, 1281, 1259, 1270, 1280,
|
|
1279, 1281, 1259, 1270, 1279, 1280, 1281, 1259, 1270, 1275, 1279, 1280, 1281, 1259, 1270, 1275,
|
|
1280, 1279, 1281, 1259, 1270, 1276, 1280, 1279, 1281, 1259, 1270, 1276, 1279, 1280, 1281, 1280,
|
|
1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1265, 1280, 1279, 1281, 1274, 1279, 1280, 1281,
|
|
1274, 1279, 1280, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280, 1281,
|
|
1279, 1280, 1281, 1280, 1279, 1281, 1310, 1279, 1280, 1281, 1279, 1280, 1281, 1279, 1280, 1281,
|
|
1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1311,
|
|
1280, 1279, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1308, 1280, 1279, 1281,
|
|
1279, 1280, 1281, 1302, 1308, 1280, 1279, 1281, 1280, 1279, 1281, 1306, 1280, 1279, 1281, 1280,
|
|
1279, 1281, 1304, 1305, 1279, 1280, 1281, 1280, 1279, 1281, 1301, 1309, 1280, 1279, 1281, 1279,
|
|
1280, 1281, 1282, 1283, 1284, 1285, 1286, 1288, 1289, 1290, 1291, 1293, 1294, 1295, 1296, 1303,
|
|
1309, 1279, 1280, 1281, 1287, 1292, 1298, 1299, 1300, 1279, 1280, 1281, 1307, 1280, 1279, 1281,
|
|
1279, 1280, 1281, 1297, 1280, 1279, 1281, 1280, 1279, 1281, 1272, 1271, 1280, 1279, 1281, 1263,
|
|
1272, 1271, 1280, 1279, 1281, 1278, 1279, 1280, 1281, 1278, 1280, 1279, 1281, 1267, 1268, 1277,
|
|
1280, 1279, 1281, 1267, 1268, 1277, 1280, 1279, 1281, 1269, 1280, 1279, 1281, 1269, 1280, 1279,
|
|
1281, 1273, 1280, 1279, 1281, 1264, 1273, 1280, 1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281,
|
|
1280, 1279, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1266,
|
|
1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1275, 1280, 1279, 1281, 1275, 1280, 1279,
|
|
1281, 1276, 1280, 1279, 1281, 1276, 1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279,
|
|
1280, 1281, 1265, 1280, 1279, 1281, 1274, 1279, 1280, 1281, 1274, 1279, 1280, 1281, 1279, 1280,
|
|
1281, 1279, 1280, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1279, 1280, 1281,
|
|
1310, 1280, 1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281,
|
|
1280, 1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1311, 1280, 1279, 1281, 1280, 1279, 1281,
|
|
1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1280,
|
|
1279, 1281, 1280, 1279, 1281, 1280, 1279, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280,
|
|
1281, 1279, 1280, 1281, 1279, 1280, 1281, 1279, 1280, 1281, 1280, 1279, 1281, 1279, 1280, 1281,
|
|
1280, 1279, 1281, 1312, 1279, 1280, 1281, 1316, 1315, 1318, 1317, 1322, 1314, 1313, 1324, 1328,
|
|
1321, 1327, 1330, 1329, 1326, 1324, 1325, 1319, 1320, 1323, 1331, 1332, 1335, 1388, 1394, 1338,
|
|
1388, 1397, 1334, 1389, 1393, 1337, 1389, 1396, 1333, 1390, 1392, 1336, 1390, 1395, 1391, 1391,
|
|
1344, 1345, 1346, 1347, 1348, 1354, 1360, 1366, 1372, 1378, 1340, 1341, 1342, 1343, 1349, 1355,
|
|
1361, 1367, 1373, 1379, 1350, 1356, 1362, 1368, 1374, 1380, 1339, 1352, 1358, 1364, 1370, 1376,
|
|
1382, 1353, 1359, 1365, 1371, 1377, 1383, 1351, 1357, 1363, 1369, 1375, 1381, 1384, 1398, 1399,
|
|
1387, 1402, 1385, 1400, 1386, 1403, 1401, 1424, 1425, 1421, 1423, 1420, 1422, 1424, 1425, 1421,
|
|
1423, 1420, 1422, 1410, 1411, 1412, 1413, 1414, 1415, 1424, 1404, 1405, 1406, 1407, 1408, 1409,
|
|
1416, 1417, 1418, 1419, 1425, 1421, 1423, 1420, 1422, 1410, 1411, 1412, 1413, 1414, 1415, 1424,
|
|
1404, 1405, 1406, 1407, 1408, 1409, 1425, 1421, 1423, 1420, 1422, 1416, 1417, 1418, 1419, 1442,
|
|
1174, 1175, 1190, 1191, 1192, 1448, 1203, 1204, 1453, 1454, 1455, 1456, 1207, 1458, 1210, 1211,
|
|
1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1471, 1174, 1175, 1190, 1191, 1192,
|
|
1448, 1204, 1453, 1454, 1455, 1456, 1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219,
|
|
1228, 1229, 1230, 1231, 1471, 1174, 1175, 1190, 1191, 1192, 1448, 1204, 1453, 1454, 1455, 1456,
|
|
1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1471, 1427,
|
|
1436, 1437, 1174, 1175, 1176, 1190, 1191, 1192, 1193, 1448, 1202, 1204, 1453, 1454, 1455, 1456,
|
|
1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1471, 1442,
|
|
1174, 1175, 1190, 1191, 1192, 1448, 1203, 1204, 1453, 1454, 1455, 1456, 1207, 1458, 1210, 1211,
|
|
1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231, 1467, 1471, 1174, 1175, 1190, 1191,
|
|
1192, 1448, 1204, 1453, 1454, 1455, 1456, 1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218,
|
|
1219, 1228, 1229, 1230, 1231, 1467, 1471, 1174, 1175, 1190, 1191, 1192, 1448, 1204, 1453, 1454,
|
|
1455, 1456, 1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230, 1231,
|
|
1467, 1471, 1426, 1436, 1437, 1174, 1175, 1176, 1190, 1191, 1192, 1193, 1448, 1202, 1204, 1453,
|
|
1454, 1455, 1456, 1207, 1458, 1210, 1211, 1214, 1215, 1216, 1217, 1218, 1219, 1228, 1229, 1230,
|
|
1231, 1467, 1471, 1155, 1156, 1183, 1184, 1185, 1186, 1196, 1197, 1198, 1199, 1449, 1450, 1451,
|
|
1452, 1458, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1463, 1464, 1465, 1466,
|
|
1249, 1469, 1472, 1449, 1450, 1451, 1452, 1458, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225,
|
|
1226, 1227, 1469, 1472, 1449, 1450, 1451, 1452, 1458, 1212, 1213, 1220, 1221, 1222, 1223, 1224,
|
|
1225, 1226, 1227, 1469, 1472, 1434, 1435, 1181, 1182, 1194, 1195, 1200, 1201, 1449, 1450, 1451,
|
|
1452, 1458, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1459, 1460, 1461, 1462,
|
|
1469, 1472, 1183, 1184, 1185, 1186, 1196, 1197, 1198, 1199, 1449, 1450, 1451, 1452, 1458, 1212,
|
|
1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1463, 1464, 1465, 1466, 1249, 1468, 1470,
|
|
1472, 1449, 1450, 1451, 1452, 1458, 1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227,
|
|
1468, 1470, 1472, 1157, 1158, 1159, 1160, 1167, 1168, 1169, 1170, 1449, 1450, 1451, 1452, 1458,
|
|
1212, 1213, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1468, 1470, 1472, 1434, 1435, 1165,
|
|
1166, 1181, 1182, 1194, 1195, 1200, 1201, 1449, 1450, 1451, 1452, 1458, 1212, 1213, 1220, 1221,
|
|
1222, 1223, 1224, 1225, 1226, 1227, 1459, 1460, 1461, 1462, 1468, 1470, 1472, 1446, 1447, 1448,
|
|
1205, 1457, 1208, 1458, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243,
|
|
1447, 1448, 1205, 1457, 1208, 1458, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241,
|
|
1242, 1243, 1448, 1457, 1206, 1209, 1458, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240,
|
|
1241, 1242, 1243, 1448, 1457, 1206, 1209, 1458, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239,
|
|
1240, 1241, 1242, 1243, 1446, 1447, 1448, 1205, 1457, 1208, 1458, 1232, 1233, 1234, 1235, 1236,
|
|
1237, 1238, 1239, 1240, 1241, 1242, 1243, 1447, 1448, 1205, 1457, 1208, 1458, 1232, 1233, 1234,
|
|
1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1448, 1457, 1206, 1209, 1458, 1232, 1233,
|
|
1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1448, 1457, 1206, 1209, 1458, 1232,
|
|
1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1458, 1246, 1247, 1248, 1458,
|
|
1246, 1247, 1248, 1458, 1246, 1247, 1248, 1428, 1429, 1430, 1431, 1432, 1433, 1438, 1439, 1440,
|
|
1441, 1443, 1444, 1445, 1458, 1246, 1247, 1248, 1458, 1246, 1247, 1248, 1458, 1246, 1247, 1248,
|
|
1458, 1246, 1247, 1248, 1428, 1429, 1430, 1431, 1432, 1433, 1438, 1439, 1440, 1441, 1443, 1444,
|
|
1445, 1458, 1246, 1247, 1248,
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_A32 := [256]Decode_Index{
|
|
/* 00 */ {0, 3},
|
|
/* 01 */ {3, 6},
|
|
/* 02 */ {9, 3},
|
|
/* 03 */ {12, 6},
|
|
/* 04 */ {18, 6},
|
|
/* 05 */ {24, 7},
|
|
/* 06 */ {31, 3},
|
|
/* 07 */ {34, 4},
|
|
/* 08 */ {38, 3},
|
|
/* 09 */ {41, 6},
|
|
/* 0A */ {47, 3},
|
|
/* 0B */ {50, 6},
|
|
/* 0C */ {56, 6},
|
|
/* 0D */ {62, 9},
|
|
/* 0E */ {71, 3},
|
|
/* 0F */ {74, 6},
|
|
/* 10 */ {80, 15},
|
|
/* 11 */ {95, 6},
|
|
/* 12 */ {101, 12},
|
|
/* 13 */ {113, 2},
|
|
/* 14 */ {115, 13},
|
|
/* 15 */ {128, 5},
|
|
/* 16 */ {133, 12},
|
|
/* 17 */ {145, 5},
|
|
/* 18 */ {150, 8},
|
|
/* 19 */ {158, 10},
|
|
/* 1A */ {168, 13},
|
|
/* 1B */ {181, 6},
|
|
/* 1C */ {187, 8},
|
|
/* 1D */ {195, 10},
|
|
/* 1E */ {205, 8},
|
|
/* 1F */ {213, 10},
|
|
/* 20 */ {223, 55},
|
|
/* 21 */ {278, 45},
|
|
/* 22 */ {323, 48},
|
|
/* 23 */ {371, 17},
|
|
/* 24 */ {388, 55},
|
|
/* 25 */ {443, 45},
|
|
/* 26 */ {488, 48},
|
|
/* 27 */ {536, 17},
|
|
/* 28 */ {553, 58},
|
|
/* 29 */ {611, 46},
|
|
/* 2A */ {657, 50},
|
|
/* 2B */ {707, 30},
|
|
/* 2C */ {737, 58},
|
|
/* 2D */ {795, 46},
|
|
/* 2E */ {841, 50},
|
|
/* 2F */ {891, 30},
|
|
/* 30 */ {921, 48},
|
|
/* 31 */ {969, 20},
|
|
/* 32 */ {989, 35},
|
|
/* 33 */ {1024, 7},
|
|
/* 34 */ {1031, 48},
|
|
/* 35 */ {1079, 20},
|
|
/* 36 */ {1099, 23},
|
|
/* 37 */ {1122, 7},
|
|
/* 38 */ {1129, 59},
|
|
/* 39 */ {1188, 42},
|
|
/* 3A */ {1230, 46},
|
|
/* 3B */ {1276, 163},
|
|
/* 3C */ {1439, 59},
|
|
/* 3D */ {1498, 42},
|
|
/* 3E */ {1540, 46},
|
|
/* 3F */ {1586, 163},
|
|
/* 40 */ {1749, 12},
|
|
/* 41 */ {1761, 1},
|
|
/* 42 */ {1762, 11},
|
|
/* 43 */ {0, 0},
|
|
/* 44 */ {1773, 1},
|
|
/* 45 */ {1774, 2},
|
|
/* 46 */ {0, 0},
|
|
/* 47 */ {0, 0},
|
|
/* 48 */ {1776, 16},
|
|
/* 49 */ {1792, 1},
|
|
/* 4A */ {1793, 19},
|
|
/* 4B */ {0, 0},
|
|
/* 4C */ {1812, 16},
|
|
/* 4D */ {1828, 2},
|
|
/* 4E */ {1830, 19},
|
|
/* 4F */ {0, 0},
|
|
/* 50 */ {1849, 1},
|
|
/* 51 */ {1850, 1},
|
|
/* 52 */ {1851, 1},
|
|
/* 53 */ {1852, 1},
|
|
/* 54 */ {1853, 1},
|
|
/* 55 */ {1854, 1},
|
|
/* 56 */ {1855, 1},
|
|
/* 57 */ {1856, 6},
|
|
/* 58 */ {1862, 1},
|
|
/* 59 */ {1863, 1},
|
|
/* 5A */ {1864, 1},
|
|
/* 5B */ {1865, 1},
|
|
/* 5C */ {1866, 1},
|
|
/* 5D */ {1867, 3},
|
|
/* 5E */ {1870, 1},
|
|
/* 5F */ {1871, 1},
|
|
/* 60 */ {0, 0},
|
|
/* 61 */ {1872, 6},
|
|
/* 62 */ {1878, 6},
|
|
/* 63 */ {1884, 6},
|
|
/* 64 */ {0, 0},
|
|
/* 65 */ {1890, 6},
|
|
/* 66 */ {1896, 6},
|
|
/* 67 */ {1902, 6},
|
|
/* 68 */ {1908, 5},
|
|
/* 69 */ {0, 0},
|
|
/* 6A */ {1913, 4},
|
|
/* 6B */ {1917, 5},
|
|
/* 6C */ {1922, 2},
|
|
/* 6D */ {0, 0},
|
|
/* 6E */ {1924, 4},
|
|
/* 6F */ {1928, 5},
|
|
/* 70 */ {1933, 9},
|
|
/* 71 */ {1942, 2},
|
|
/* 72 */ {0, 0},
|
|
/* 73 */ {1944, 1},
|
|
/* 74 */ {1945, 5},
|
|
/* 75 */ {1950, 7},
|
|
/* 76 */ {0, 0},
|
|
/* 77 */ {0, 0},
|
|
/* 78 */ {1957, 3},
|
|
/* 79 */ {1960, 1},
|
|
/* 7A */ {1961, 1},
|
|
/* 7B */ {1962, 1},
|
|
/* 7C */ {1963, 3},
|
|
/* 7D */ {1966, 3},
|
|
/* 7E */ {1969, 1},
|
|
/* 7F */ {1970, 2},
|
|
/* 80 */ {1972, 1},
|
|
/* 81 */ {1973, 2},
|
|
/* 82 */ {1975, 1},
|
|
/* 83 */ {1976, 2},
|
|
/* 84 */ {1978, 1},
|
|
/* 85 */ {1979, 1},
|
|
/* 86 */ {1980, 1},
|
|
/* 87 */ {1981, 1},
|
|
/* 88 */ {1982, 2},
|
|
/* 89 */ {1984, 3},
|
|
/* 8A */ {1987, 2},
|
|
/* 8B */ {1989, 4},
|
|
/* 8C */ {1993, 1},
|
|
/* 8D */ {1994, 1},
|
|
/* 8E */ {1995, 1},
|
|
/* 8F */ {1996, 1},
|
|
/* 90 */ {1997, 1},
|
|
/* 91 */ {1998, 2},
|
|
/* 92 */ {2000, 2},
|
|
/* 93 */ {2002, 2},
|
|
/* 94 */ {2004, 1},
|
|
/* 95 */ {2005, 1},
|
|
/* 96 */ {2006, 1},
|
|
/* 97 */ {2007, 1},
|
|
/* 98 */ {2008, 1},
|
|
/* 99 */ {2009, 2},
|
|
/* 9A */ {2011, 1},
|
|
/* 9B */ {2012, 2},
|
|
/* 9C */ {2014, 1},
|
|
/* 9D */ {2015, 1},
|
|
/* 9E */ {2016, 1},
|
|
/* 9F */ {2017, 1},
|
|
/* A0 */ {2018, 2},
|
|
/* A1 */ {2020, 2},
|
|
/* A2 */ {2022, 2},
|
|
/* A3 */ {2024, 2},
|
|
/* A4 */ {2026, 2},
|
|
/* A5 */ {2028, 2},
|
|
/* A6 */ {2030, 2},
|
|
/* A7 */ {2032, 2},
|
|
/* A8 */ {2034, 2},
|
|
/* A9 */ {2036, 2},
|
|
/* AA */ {2038, 2},
|
|
/* AB */ {2040, 2},
|
|
/* AC */ {2042, 2},
|
|
/* AD */ {2044, 2},
|
|
/* AE */ {2046, 2},
|
|
/* AF */ {2048, 2},
|
|
/* B0 */ {2050, 2},
|
|
/* B1 */ {2052, 2},
|
|
/* B2 */ {2054, 2},
|
|
/* B3 */ {2056, 2},
|
|
/* B4 */ {2058, 2},
|
|
/* B5 */ {2060, 2},
|
|
/* B6 */ {2062, 2},
|
|
/* B7 */ {2064, 2},
|
|
/* B8 */ {2066, 2},
|
|
/* B9 */ {2068, 2},
|
|
/* BA */ {2070, 2},
|
|
/* BB */ {2072, 2},
|
|
/* BC */ {2074, 2},
|
|
/* BD */ {2076, 2},
|
|
/* BE */ {2078, 2},
|
|
/* BF */ {2080, 2},
|
|
/* C0 */ {2082, 7},
|
|
/* C1 */ {2089, 4},
|
|
/* C2 */ {2093, 12},
|
|
/* C3 */ {2105, 5},
|
|
/* C4 */ {2110, 11},
|
|
/* C5 */ {2121, 8},
|
|
/* C6 */ {2129, 12},
|
|
/* C7 */ {2141, 5},
|
|
/* C8 */ {2146, 6},
|
|
/* C9 */ {2152, 6},
|
|
/* CA */ {2158, 12},
|
|
/* CB */ {2170, 8},
|
|
/* CC */ {2178, 6},
|
|
/* CD */ {2184, 6},
|
|
/* CE */ {2190, 12},
|
|
/* CF */ {2202, 6},
|
|
/* D0 */ {2208, 4},
|
|
/* D1 */ {2212, 4},
|
|
/* D2 */ {2216, 4},
|
|
/* D3 */ {2220, 2},
|
|
/* D4 */ {2222, 4},
|
|
/* D5 */ {2226, 4},
|
|
/* D6 */ {2230, 2},
|
|
/* D7 */ {2232, 2},
|
|
/* D8 */ {2234, 4},
|
|
/* D9 */ {2238, 4},
|
|
/* DA */ {2242, 2},
|
|
/* DB */ {2244, 2},
|
|
/* DC */ {2246, 4},
|
|
/* DD */ {2250, 4},
|
|
/* DE */ {2254, 2},
|
|
/* DF */ {2256, 2},
|
|
/* E0 */ {2258, 18},
|
|
/* E1 */ {2276, 14},
|
|
/* E2 */ {2290, 18},
|
|
/* E3 */ {2308, 15},
|
|
/* E4 */ {2323, 17},
|
|
/* E5 */ {2340, 13},
|
|
/* E6 */ {2353, 18},
|
|
/* E7 */ {2371, 15},
|
|
/* E8 */ {2386, 15},
|
|
/* E9 */ {2401, 11},
|
|
/* EA */ {2412, 11},
|
|
/* EB */ {2423, 73},
|
|
/* EC */ {2496, 16},
|
|
/* ED */ {2512, 11},
|
|
/* EE */ {2523, 13},
|
|
/* EF */ {2536, 74},
|
|
/* F0 */ {2610, 3},
|
|
/* F1 */ {2613, 3},
|
|
/* F2 */ {2616, 3},
|
|
/* F3 */ {2619, 3},
|
|
/* F4 */ {2622, 3},
|
|
/* F5 */ {2625, 3},
|
|
/* F6 */ {2628, 3},
|
|
/* F7 */ {2631, 3},
|
|
/* F8 */ {2634, 1},
|
|
/* F9 */ {2635, 1},
|
|
/* FA */ {2636, 1},
|
|
/* FB */ {2637, 1},
|
|
/* FC */ {2638, 1},
|
|
/* FD */ {2639, 1},
|
|
/* FE */ {2640, 1},
|
|
/* FF */ {2641, 1},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_T32 := [128]Decode_Index{
|
|
/* 00 */ {0, 0},
|
|
/* 01 */ {0, 0},
|
|
/* 02 */ {0, 0},
|
|
/* 03 */ {0, 0},
|
|
/* 04 */ {0, 0},
|
|
/* 05 */ {0, 0},
|
|
/* 06 */ {0, 0},
|
|
/* 07 */ {0, 0},
|
|
/* 08 */ {0, 0},
|
|
/* 09 */ {0, 0},
|
|
/* 0A */ {0, 0},
|
|
/* 0B */ {0, 0},
|
|
/* 0C */ {0, 0},
|
|
/* 0D */ {0, 0},
|
|
/* 0E */ {0, 0},
|
|
/* 0F */ {0, 0},
|
|
/* 10 */ {0, 0},
|
|
/* 11 */ {0, 0},
|
|
/* 12 */ {0, 0},
|
|
/* 13 */ {0, 0},
|
|
/* 14 */ {0, 0},
|
|
/* 15 */ {0, 0},
|
|
/* 16 */ {0, 0},
|
|
/* 17 */ {0, 0},
|
|
/* 18 */ {0, 0},
|
|
/* 19 */ {0, 0},
|
|
/* 1A */ {0, 0},
|
|
/* 1B */ {0, 0},
|
|
/* 1C */ {0, 0},
|
|
/* 1D */ {0, 0},
|
|
/* 1E */ {0, 0},
|
|
/* 1F */ {0, 0},
|
|
/* 20 */ {0, 0},
|
|
/* 21 */ {0, 0},
|
|
/* 22 */ {0, 0},
|
|
/* 23 */ {0, 0},
|
|
/* 24 */ {0, 0},
|
|
/* 25 */ {0, 0},
|
|
/* 26 */ {0, 0},
|
|
/* 27 */ {0, 0},
|
|
/* 28 */ {0, 0},
|
|
/* 29 */ {0, 0},
|
|
/* 2A */ {0, 0},
|
|
/* 2B */ {0, 0},
|
|
/* 2C */ {0, 0},
|
|
/* 2D */ {0, 0},
|
|
/* 2E */ {0, 0},
|
|
/* 2F */ {0, 0},
|
|
/* 30 */ {0, 0},
|
|
/* 31 */ {0, 0},
|
|
/* 32 */ {0, 0},
|
|
/* 33 */ {0, 0},
|
|
/* 34 */ {0, 0},
|
|
/* 35 */ {0, 0},
|
|
/* 36 */ {0, 0},
|
|
/* 37 */ {0, 0},
|
|
/* 38 */ {0, 0},
|
|
/* 39 */ {0, 0},
|
|
/* 3A */ {0, 0},
|
|
/* 3B */ {0, 0},
|
|
/* 3C */ {0, 0},
|
|
/* 3D */ {0, 0},
|
|
/* 3E */ {0, 0},
|
|
/* 3F */ {0, 0},
|
|
/* 40 */ {0, 0},
|
|
/* 41 */ {0, 0},
|
|
/* 42 */ {0, 0},
|
|
/* 43 */ {0, 0},
|
|
/* 44 */ {0, 0},
|
|
/* 45 */ {0, 0},
|
|
/* 46 */ {0, 0},
|
|
/* 47 */ {0, 0},
|
|
/* 48 */ {0, 0},
|
|
/* 49 */ {0, 0},
|
|
/* 4A */ {0, 0},
|
|
/* 4B */ {0, 0},
|
|
/* 4C */ {0, 0},
|
|
/* 4D */ {0, 0},
|
|
/* 4E */ {0, 0},
|
|
/* 4F */ {0, 0},
|
|
/* 50 */ {0, 0},
|
|
/* 51 */ {0, 0},
|
|
/* 52 */ {0, 0},
|
|
/* 53 */ {0, 0},
|
|
/* 54 */ {0, 0},
|
|
/* 55 */ {0, 0},
|
|
/* 56 */ {0, 0},
|
|
/* 57 */ {0, 0},
|
|
/* 58 */ {0, 0},
|
|
/* 59 */ {0, 0},
|
|
/* 5A */ {0, 0},
|
|
/* 5B */ {0, 0},
|
|
/* 5C */ {0, 0},
|
|
/* 5D */ {0, 0},
|
|
/* 5E */ {0, 0},
|
|
/* 5F */ {0, 0},
|
|
/* 60 */ {0, 0},
|
|
/* 61 */ {0, 0},
|
|
/* 62 */ {0, 0},
|
|
/* 63 */ {0, 0},
|
|
/* 64 */ {0, 0},
|
|
/* 65 */ {0, 0},
|
|
/* 66 */ {0, 0},
|
|
/* 67 */ {0, 0},
|
|
/* 68 */ {0, 0},
|
|
/* 69 */ {0, 0},
|
|
/* 6A */ {0, 0},
|
|
/* 6B */ {0, 0},
|
|
/* 6C */ {0, 0},
|
|
/* 6D */ {0, 0},
|
|
/* 6E */ {0, 0},
|
|
/* 6F */ {0, 0},
|
|
/* 70 */ {0, 0},
|
|
/* 71 */ {0, 0},
|
|
/* 72 */ {0, 0},
|
|
/* 73 */ {0, 0},
|
|
/* 74 */ {2642, 23},
|
|
/* 75 */ {2665, 19},
|
|
/* 76 */ {2684, 19},
|
|
/* 77 */ {2703, 101},
|
|
/* 78 */ {2804, 26},
|
|
/* 79 */ {2830, 33},
|
|
/* 7A */ {2863, 18},
|
|
/* 7B */ {2881, 6},
|
|
/* 7C */ {2887, 20},
|
|
/* 7D */ {2907, 71},
|
|
/* 7E */ {2978, 22},
|
|
/* 7F */ {3000, 126},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_T16 := [64]Decode_Index{
|
|
/* 00 */ {3126, 1},
|
|
/* 01 */ {3127, 1},
|
|
/* 02 */ {3128, 1},
|
|
/* 03 */ {3129, 1},
|
|
/* 04 */ {3130, 1},
|
|
/* 05 */ {3131, 1},
|
|
/* 06 */ {3132, 2},
|
|
/* 07 */ {3134, 2},
|
|
/* 08 */ {3136, 1},
|
|
/* 09 */ {3137, 1},
|
|
/* 0A */ {3138, 1},
|
|
/* 0B */ {3139, 1},
|
|
/* 0C */ {3140, 1},
|
|
/* 0D */ {3141, 1},
|
|
/* 0E */ {3142, 1},
|
|
/* 0F */ {3143, 1},
|
|
/* 10 */ {3144, 16},
|
|
/* 11 */ {3160, 7},
|
|
/* 12 */ {3167, 1},
|
|
/* 13 */ {3168, 1},
|
|
/* 14 */ {3169, 2},
|
|
/* 15 */ {3171, 2},
|
|
/* 16 */ {3173, 2},
|
|
/* 17 */ {3175, 2},
|
|
/* 18 */ {3177, 1},
|
|
/* 19 */ {3178, 1},
|
|
/* 1A */ {3179, 1},
|
|
/* 1B */ {3180, 1},
|
|
/* 1C */ {3181, 1},
|
|
/* 1D */ {3182, 1},
|
|
/* 1E */ {3183, 1},
|
|
/* 1F */ {3184, 1},
|
|
/* 20 */ {3185, 1},
|
|
/* 21 */ {3186, 1},
|
|
/* 22 */ {3187, 1},
|
|
/* 23 */ {3188, 1},
|
|
/* 24 */ {3189, 1},
|
|
/* 25 */ {3190, 1},
|
|
/* 26 */ {3191, 1},
|
|
/* 27 */ {3192, 1},
|
|
/* 28 */ {3193, 1},
|
|
/* 29 */ {3194, 1},
|
|
/* 2A */ {3195, 1},
|
|
/* 2B */ {3196, 1},
|
|
/* 2C */ {3197, 7},
|
|
/* 2D */ {3204, 2},
|
|
/* 2E */ {3206, 4},
|
|
/* 2F */ {3210, 8},
|
|
/* 30 */ {3218, 1},
|
|
/* 31 */ {3219, 1},
|
|
/* 32 */ {3220, 1},
|
|
/* 33 */ {3221, 1},
|
|
/* 34 */ {3222, 1},
|
|
/* 35 */ {3223, 1},
|
|
/* 36 */ {3224, 1},
|
|
/* 37 */ {3225, 3},
|
|
/* 38 */ {3228, 1},
|
|
/* 39 */ {3229, 1},
|
|
/* 3A */ {0, 0},
|
|
/* 3B */ {0, 0},
|
|
/* 3C */ {0, 0},
|
|
/* 3D */ {0, 0},
|
|
/* 3E */ {0, 0},
|
|
/* 3F */ {0, 0},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_T32_SUB := [4096]Decode_Index{
|
|
/* 00 */ {0, 0},
|
|
/* 01 */ {0, 0},
|
|
/* 02 */ {0, 0},
|
|
/* 03 */ {0, 0},
|
|
/* 04 */ {0, 0},
|
|
/* 05 */ {0, 0},
|
|
/* 06 */ {0, 0},
|
|
/* 07 */ {0, 0},
|
|
/* 08 */ {0, 0},
|
|
/* 09 */ {0, 0},
|
|
/* 0A */ {0, 0},
|
|
/* 0B */ {0, 0},
|
|
/* 0C */ {0, 0},
|
|
/* 0D */ {0, 0},
|
|
/* 0E */ {0, 0},
|
|
/* 0F */ {0, 0},
|
|
/* 10 */ {0, 0},
|
|
/* 11 */ {0, 0},
|
|
/* 12 */ {0, 0},
|
|
/* 13 */ {0, 0},
|
|
/* 14 */ {0, 0},
|
|
/* 15 */ {0, 0},
|
|
/* 16 */ {0, 0},
|
|
/* 17 */ {0, 0},
|
|
/* 18 */ {0, 0},
|
|
/* 19 */ {0, 0},
|
|
/* 1A */ {0, 0},
|
|
/* 1B */ {0, 0},
|
|
/* 1C */ {0, 0},
|
|
/* 1D */ {0, 0},
|
|
/* 1E */ {0, 0},
|
|
/* 1F */ {0, 0},
|
|
/* 20 */ {0, 0},
|
|
/* 21 */ {0, 0},
|
|
/* 22 */ {0, 0},
|
|
/* 23 */ {0, 0},
|
|
/* 24 */ {0, 0},
|
|
/* 25 */ {0, 0},
|
|
/* 26 */ {0, 0},
|
|
/* 27 */ {0, 0},
|
|
/* 28 */ {0, 0},
|
|
/* 29 */ {0, 0},
|
|
/* 2A */ {0, 0},
|
|
/* 2B */ {0, 0},
|
|
/* 2C */ {0, 0},
|
|
/* 2D */ {0, 0},
|
|
/* 2E */ {0, 0},
|
|
/* 2F */ {0, 0},
|
|
/* 30 */ {0, 0},
|
|
/* 31 */ {0, 0},
|
|
/* 32 */ {0, 0},
|
|
/* 33 */ {0, 0},
|
|
/* 34 */ {0, 0},
|
|
/* 35 */ {0, 0},
|
|
/* 36 */ {0, 0},
|
|
/* 37 */ {0, 0},
|
|
/* 38 */ {0, 0},
|
|
/* 39 */ {0, 0},
|
|
/* 3A */ {0, 0},
|
|
/* 3B */ {0, 0},
|
|
/* 3C */ {0, 0},
|
|
/* 3D */ {0, 0},
|
|
/* 3E */ {0, 0},
|
|
/* 3F */ {0, 0},
|
|
/* 40 */ {0, 0},
|
|
/* 41 */ {0, 0},
|
|
/* 42 */ {0, 0},
|
|
/* 43 */ {0, 0},
|
|
/* 44 */ {0, 0},
|
|
/* 45 */ {0, 0},
|
|
/* 46 */ {0, 0},
|
|
/* 47 */ {0, 0},
|
|
/* 48 */ {0, 0},
|
|
/* 49 */ {0, 0},
|
|
/* 4A */ {0, 0},
|
|
/* 4B */ {0, 0},
|
|
/* 4C */ {0, 0},
|
|
/* 4D */ {0, 0},
|
|
/* 4E */ {0, 0},
|
|
/* 4F */ {0, 0},
|
|
/* 50 */ {0, 0},
|
|
/* 51 */ {0, 0},
|
|
/* 52 */ {0, 0},
|
|
/* 53 */ {0, 0},
|
|
/* 54 */ {0, 0},
|
|
/* 55 */ {0, 0},
|
|
/* 56 */ {0, 0},
|
|
/* 57 */ {0, 0},
|
|
/* 58 */ {0, 0},
|
|
/* 59 */ {0, 0},
|
|
/* 5A */ {0, 0},
|
|
/* 5B */ {0, 0},
|
|
/* 5C */ {0, 0},
|
|
/* 5D */ {0, 0},
|
|
/* 5E */ {0, 0},
|
|
/* 5F */ {0, 0},
|
|
/* 60 */ {0, 0},
|
|
/* 61 */ {0, 0},
|
|
/* 62 */ {0, 0},
|
|
/* 63 */ {0, 0},
|
|
/* 64 */ {0, 0},
|
|
/* 65 */ {0, 0},
|
|
/* 66 */ {0, 0},
|
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/* 231 */ {0, 0},
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/* 236 */ {0, 0},
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/* 23E */ {0, 0},
|
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/* 23F */ {0, 0},
|
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/* 240 */ {0, 0},
|
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/* 241 */ {0, 0},
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/* 242 */ {0, 0},
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/* 243 */ {0, 0},
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/* 244 */ {0, 0},
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/* 245 */ {0, 0},
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/* 246 */ {0, 0},
|
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/* 247 */ {0, 0},
|
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/* 248 */ {0, 0},
|
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/* 249 */ {0, 0},
|
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/* 24A */ {0, 0},
|
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/* 24B */ {0, 0},
|
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/* 24C */ {0, 0},
|
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/* 24D */ {0, 0},
|
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/* 24E */ {0, 0},
|
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/* 24F */ {0, 0},
|
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/* 250 */ {0, 0},
|
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/* 251 */ {0, 0},
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/* 252 */ {0, 0},
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/* 253 */ {0, 0},
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/* 254 */ {0, 0},
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/* 255 */ {0, 0},
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/* 256 */ {0, 0},
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/* 257 */ {0, 0},
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/* 258 */ {0, 0},
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/* 259 */ {0, 0},
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/* 25A */ {0, 0},
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/* 25B */ {0, 0},
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/* 25C */ {0, 0},
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/* 25D */ {0, 0},
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/* 25E */ {0, 0},
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/* 25F */ {0, 0},
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/* 260 */ {0, 0},
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/* 261 */ {0, 0},
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/* 262 */ {0, 0},
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/* 263 */ {0, 0},
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/* 264 */ {0, 0},
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/* 265 */ {0, 0},
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/* 266 */ {0, 0},
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/* 267 */ {0, 0},
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/* 268 */ {0, 0},
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/* 269 */ {0, 0},
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/* 26A */ {0, 0},
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/* 26B */ {0, 0},
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/* 26C */ {0, 0},
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/* 26D */ {0, 0},
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/* 26E */ {0, 0},
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/* 26F */ {0, 0},
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/* 270 */ {0, 0},
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/* 271 */ {0, 0},
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/* 272 */ {0, 0},
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/* 273 */ {0, 0},
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/* 274 */ {0, 0},
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/* 275 */ {0, 0},
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/* 276 */ {0, 0},
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/* 277 */ {0, 0},
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/* 278 */ {0, 0},
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/* 279 */ {0, 0},
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/* 27A */ {0, 0},
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/* 27B */ {0, 0},
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/* 27C */ {0, 0},
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/* 27D */ {0, 0},
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/* 27E */ {0, 0},
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/* 27F */ {0, 0},
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/* 280 */ {0, 0},
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/* 281 */ {0, 0},
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/* 282 */ {0, 0},
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/* 283 */ {0, 0},
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/* 284 */ {0, 0},
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/* 285 */ {0, 0},
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/* 286 */ {0, 0},
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/* 287 */ {0, 0},
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/* 288 */ {0, 0},
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/* 289 */ {0, 0},
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/* 28A */ {0, 0},
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/* 28B */ {0, 0},
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/* 28C */ {0, 0},
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/* 28D */ {0, 0},
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/* 28E */ {0, 0},
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/* 28F */ {0, 0},
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/* 290 */ {0, 0},
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/* 291 */ {0, 0},
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/* 292 */ {0, 0},
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/* 293 */ {0, 0},
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/* 294 */ {0, 0},
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/* 295 */ {0, 0},
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/* 296 */ {0, 0},
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/* 297 */ {0, 0},
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/* 298 */ {0, 0},
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/* 299 */ {0, 0},
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/* 29A */ {0, 0},
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/* 29B */ {0, 0},
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/* 29C */ {0, 0},
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/* 29D */ {0, 0},
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/* 29E */ {0, 0},
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/* 29F */ {0, 0},
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/* 2A0 */ {0, 0},
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/* 2A1 */ {0, 0},
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/* 2A2 */ {0, 0},
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/* 2A3 */ {0, 0},
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/* 2A4 */ {0, 0},
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/* 2A5 */ {0, 0},
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/* 2A6 */ {0, 0},
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/* 2A7 */ {0, 0},
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/* 2A8 */ {0, 0},
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/* 2A9 */ {0, 0},
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/* 2AA */ {0, 0},
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/* 2AB */ {0, 0},
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/* 2AC */ {0, 0},
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/* 2AD */ {0, 0},
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/* 2AE */ {0, 0},
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/* 2AF */ {0, 0},
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/* 2B0 */ {0, 0},
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/* 2B1 */ {0, 0},
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/* 2B2 */ {0, 0},
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/* 2B3 */ {0, 0},
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/* 2B4 */ {0, 0},
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/* 2B6 */ {0, 0},
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/* 2B7 */ {0, 0},
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/* 2B8 */ {0, 0},
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/* 2B9 */ {0, 0},
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/* 2BA */ {0, 0},
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/* 2BB */ {0, 0},
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/* 2BC */ {0, 0},
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/* 2BD */ {0, 0},
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/* 2BE */ {0, 0},
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/* 2BF */ {0, 0},
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/* 2C0 */ {0, 0},
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/* 2C1 */ {0, 0},
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/* 2C2 */ {0, 0},
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/* 2C3 */ {0, 0},
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/* 2C4 */ {0, 0},
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/* 2C5 */ {0, 0},
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/* 2C6 */ {0, 0},
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/* 2C7 */ {0, 0},
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/* 2C8 */ {0, 0},
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/* 2C9 */ {0, 0},
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/* 2CA */ {0, 0},
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/* 2CB */ {0, 0},
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/* 2CC */ {0, 0},
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/* 2CD */ {0, 0},
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/* 2CE */ {0, 0},
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/* 2CF */ {0, 0},
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/* 2D0 */ {0, 0},
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/* 2D1 */ {0, 0},
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/* 2D2 */ {0, 0},
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/* 2D3 */ {0, 0},
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/* 2D4 */ {0, 0},
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/* 2D5 */ {0, 0},
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/* 2D6 */ {0, 0},
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/* 2D7 */ {0, 0},
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/* 2D8 */ {0, 0},
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/* 2D9 */ {0, 0},
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/* 2DA */ {0, 0},
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/* 2DB */ {0, 0},
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/* 2DC */ {0, 0},
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/* 2DD */ {0, 0},
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/* 2DE */ {0, 0},
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/* 2DF */ {0, 0},
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/* 2E0 */ {0, 0},
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/* 2E1 */ {0, 0},
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/* 2E2 */ {0, 0},
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/* 2E3 */ {0, 0},
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/* 2E4 */ {0, 0},
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/* 2E5 */ {0, 0},
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/* 2E6 */ {0, 0},
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/* 2E7 */ {0, 0},
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/* 2E8 */ {0, 0},
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/* 2E9 */ {0, 0},
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/* 2EA */ {0, 0},
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/* 2EB */ {0, 0},
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/* 2EC */ {0, 0},
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/* 2ED */ {0, 0},
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/* 2EE */ {0, 0},
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/* 2EF */ {0, 0},
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/* 2F0 */ {0, 0},
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/* 2F1 */ {0, 0},
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/* 2F2 */ {0, 0},
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/* 2F3 */ {0, 0},
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/* 2F4 */ {0, 0},
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/* 2F5 */ {0, 0},
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/* 2F6 */ {0, 0},
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/* 2F7 */ {0, 0},
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/* 2F8 */ {0, 0},
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/* 2F9 */ {0, 0},
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/* 2FA */ {0, 0},
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/* 2FB */ {0, 0},
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/* 2FC */ {0, 0},
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/* 2FD */ {0, 0},
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/* 2FE */ {0, 0},
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/* 2FF */ {0, 0},
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/* 300 */ {0, 0},
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/* 301 */ {0, 0},
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/* 302 */ {0, 0},
|
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/* 303 */ {0, 0},
|
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/* 304 */ {0, 0},
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/* 305 */ {0, 0},
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/* 306 */ {0, 0},
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/* 307 */ {0, 0},
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/* 308 */ {0, 0},
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/* 309 */ {0, 0},
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/* 30A */ {0, 0},
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/* 30B */ {0, 0},
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/* 30C */ {0, 0},
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/* 30D */ {0, 0},
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/* 30E */ {0, 0},
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/* 30F */ {0, 0},
|
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/* 310 */ {0, 0},
|
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/* 311 */ {0, 0},
|
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/* 312 */ {0, 0},
|
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/* 313 */ {0, 0},
|
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/* 314 */ {0, 0},
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/* 315 */ {0, 0},
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/* 316 */ {0, 0},
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/* 317 */ {0, 0},
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/* 318 */ {0, 0},
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/* 319 */ {0, 0},
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/* 31A */ {0, 0},
|
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/* 31B */ {0, 0},
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/* 31C */ {0, 0},
|
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/* 31D */ {0, 0},
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/* 31E */ {0, 0},
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/* 31F */ {0, 0},
|
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/* 320 */ {0, 0},
|
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/* 321 */ {0, 0},
|
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/* 322 */ {0, 0},
|
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/* 323 */ {0, 0},
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/* 324 */ {0, 0},
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/* 325 */ {0, 0},
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/* 326 */ {0, 0},
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/* 327 */ {0, 0},
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/* 328 */ {0, 0},
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/* 329 */ {0, 0},
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/* 32A */ {0, 0},
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/* 32B */ {0, 0},
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/* 32C */ {0, 0},
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/* 32D */ {0, 0},
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/* 32E */ {0, 0},
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/* 32F */ {0, 0},
|
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/* 330 */ {0, 0},
|
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/* 331 */ {0, 0},
|
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/* 332 */ {0, 0},
|
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/* 333 */ {0, 0},
|
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/* 334 */ {0, 0},
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/* 335 */ {0, 0},
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/* 336 */ {0, 0},
|
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/* 337 */ {0, 0},
|
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/* 338 */ {0, 0},
|
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/* 339 */ {0, 0},
|
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/* 33A */ {0, 0},
|
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/* 33B */ {0, 0},
|
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/* 33C */ {0, 0},
|
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/* 33D */ {0, 0},
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/* 33E */ {0, 0},
|
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/* 33F */ {0, 0},
|
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/* 340 */ {0, 0},
|
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/* 341 */ {0, 0},
|
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/* 342 */ {0, 0},
|
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/* 343 */ {0, 0},
|
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/* 344 */ {0, 0},
|
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/* 345 */ {0, 0},
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/* 346 */ {0, 0},
|
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/* 347 */ {0, 0},
|
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/* 348 */ {0, 0},
|
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/* 349 */ {0, 0},
|
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/* 34A */ {0, 0},
|
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/* 34B */ {0, 0},
|
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/* 34C */ {0, 0},
|
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/* 34D */ {0, 0},
|
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/* 34E */ {0, 0},
|
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/* 34F */ {0, 0},
|
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/* 350 */ {0, 0},
|
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/* 351 */ {0, 0},
|
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/* 352 */ {0, 0},
|
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/* 353 */ {0, 0},
|
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/* 354 */ {0, 0},
|
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/* 355 */ {0, 0},
|
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/* 356 */ {0, 0},
|
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/* 357 */ {0, 0},
|
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/* 358 */ {0, 0},
|
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/* 359 */ {0, 0},
|
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/* 35A */ {0, 0},
|
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/* 35B */ {0, 0},
|
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/* 35C */ {0, 0},
|
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/* 35D */ {0, 0},
|
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/* 35E */ {0, 0},
|
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/* 35F */ {0, 0},
|
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/* 360 */ {0, 0},
|
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/* 361 */ {0, 0},
|
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/* 362 */ {0, 0},
|
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/* 363 */ {0, 0},
|
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/* 364 */ {0, 0},
|
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/* 365 */ {0, 0},
|
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/* 366 */ {0, 0},
|
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/* 367 */ {0, 0},
|
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/* 368 */ {0, 0},
|
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/* 369 */ {0, 0},
|
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/* 36A */ {0, 0},
|
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/* 36B */ {0, 0},
|
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/* 36C */ {0, 0},
|
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/* 36D */ {0, 0},
|
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/* 36E */ {0, 0},
|
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/* 36F */ {0, 0},
|
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/* 370 */ {0, 0},
|
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/* 371 */ {0, 0},
|
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/* 372 */ {0, 0},
|
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/* 373 */ {0, 0},
|
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/* 374 */ {0, 0},
|
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/* 375 */ {0, 0},
|
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/* 376 */ {0, 0},
|
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/* 377 */ {0, 0},
|
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/* 378 */ {0, 0},
|
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/* 379 */ {0, 0},
|
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/* 37A */ {0, 0},
|
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/* 37B */ {0, 0},
|
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/* 37C */ {0, 0},
|
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/* 37D */ {0, 0},
|
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/* 37E */ {0, 0},
|
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/* 37F */ {0, 0},
|
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/* 380 */ {0, 0},
|
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/* 381 */ {0, 0},
|
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/* 382 */ {0, 0},
|
|
/* 383 */ {0, 0},
|
|
/* 384 */ {0, 0},
|
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/* 385 */ {0, 0},
|
|
/* 386 */ {0, 0},
|
|
/* 387 */ {0, 0},
|
|
/* 388 */ {0, 0},
|
|
/* 389 */ {0, 0},
|
|
/* 38A */ {0, 0},
|
|
/* 38B */ {0, 0},
|
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/* 38C */ {0, 0},
|
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/* 38D */ {0, 0},
|
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/* 38E */ {0, 0},
|
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/* 38F */ {0, 0},
|
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/* 390 */ {0, 0},
|
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/* 391 */ {0, 0},
|
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/* 392 */ {0, 0},
|
|
/* 393 */ {0, 0},
|
|
/* 394 */ {0, 0},
|
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/* 395 */ {0, 0},
|
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/* 396 */ {0, 0},
|
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/* 397 */ {0, 0},
|
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/* 398 */ {0, 0},
|
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/* 399 */ {0, 0},
|
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/* 39A */ {0, 0},
|
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/* 39B */ {0, 0},
|
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/* 39C */ {0, 0},
|
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/* 39D */ {0, 0},
|
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/* 39E */ {0, 0},
|
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/* 39F */ {0, 0},
|
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/* 3A0 */ {0, 0},
|
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/* 3A1 */ {0, 0},
|
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/* 3A2 */ {0, 0},
|
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/* 3A3 */ {0, 0},
|
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/* 3A4 */ {0, 0},
|
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/* 3A5 */ {0, 0},
|
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/* 3A6 */ {0, 0},
|
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/* 3A7 */ {0, 0},
|
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/* 3A8 */ {0, 0},
|
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/* 3A9 */ {0, 0},
|
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/* 3AA */ {0, 0},
|
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/* 3AB */ {0, 0},
|
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/* 3AC */ {0, 0},
|
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/* 3AD */ {0, 0},
|
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/* 3AE */ {0, 0},
|
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/* 3AF */ {0, 0},
|
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/* 3B0 */ {0, 0},
|
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/* 3B1 */ {0, 0},
|
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/* 3B2 */ {0, 0},
|
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/* 3B3 */ {0, 0},
|
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/* 3B4 */ {0, 0},
|
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/* 3B5 */ {0, 0},
|
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/* 3B6 */ {0, 0},
|
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/* 3B7 */ {0, 0},
|
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/* 3B8 */ {0, 0},
|
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/* 3B9 */ {0, 0},
|
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/* 3BA */ {0, 0},
|
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/* 3BB */ {0, 0},
|
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/* 3BC */ {0, 0},
|
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/* 3BD */ {0, 0},
|
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/* 3BE */ {0, 0},
|
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/* 3BF */ {0, 0},
|
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/* 3C0 */ {0, 0},
|
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/* 3C1 */ {0, 0},
|
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/* 3C2 */ {0, 0},
|
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/* 3C3 */ {0, 0},
|
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/* 3C4 */ {0, 0},
|
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/* 3C5 */ {0, 0},
|
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/* 3C6 */ {0, 0},
|
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/* 3C7 */ {0, 0},
|
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/* 3C8 */ {0, 0},
|
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/* 3C9 */ {0, 0},
|
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/* 3CA */ {0, 0},
|
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/* 3CB */ {0, 0},
|
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/* 3CC */ {0, 0},
|
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/* 3CD */ {0, 0},
|
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/* 3CE */ {0, 0},
|
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/* 3CF */ {0, 0},
|
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/* 3D0 */ {0, 0},
|
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/* 3D1 */ {0, 0},
|
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/* 3D2 */ {0, 0},
|
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/* 3D3 */ {0, 0},
|
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/* 3D4 */ {0, 0},
|
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/* 3D5 */ {0, 0},
|
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/* 3D6 */ {0, 0},
|
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/* 3D7 */ {0, 0},
|
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/* 3D8 */ {0, 0},
|
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/* 3D9 */ {0, 0},
|
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/* 3DA */ {0, 0},
|
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/* 3DB */ {0, 0},
|
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/* 3DC */ {0, 0},
|
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/* 3DD */ {0, 0},
|
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/* 3DE */ {0, 0},
|
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/* 3DF */ {0, 0},
|
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/* 3E0 */ {0, 0},
|
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/* 3E1 */ {0, 0},
|
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/* 3E2 */ {0, 0},
|
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/* 3E3 */ {0, 0},
|
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/* 3E4 */ {0, 0},
|
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/* 3E5 */ {0, 0},
|
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/* 3E6 */ {0, 0},
|
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/* 3E7 */ {0, 0},
|
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/* 3E8 */ {0, 0},
|
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/* 3E9 */ {0, 0},
|
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/* 3EA */ {0, 0},
|
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/* 3EB */ {0, 0},
|
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/* 3EC */ {0, 0},
|
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/* 3ED */ {0, 0},
|
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/* 3EE */ {0, 0},
|
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/* 3EF */ {0, 0},
|
|
/* 3F0 */ {0, 0},
|
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/* 3F1 */ {0, 0},
|
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/* 3F2 */ {0, 0},
|
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/* 3F3 */ {0, 0},
|
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/* 3F4 */ {0, 0},
|
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/* 3F5 */ {0, 0},
|
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/* 3F6 */ {0, 0},
|
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/* 3F7 */ {0, 0},
|
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/* 3F8 */ {0, 0},
|
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/* 3F9 */ {0, 0},
|
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/* 3FA */ {0, 0},
|
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/* 3FB */ {0, 0},
|
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/* 3FC */ {0, 0},
|
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/* 3FD */ {0, 0},
|
|
/* 3FE */ {0, 0},
|
|
/* 3FF */ {0, 0},
|
|
/* 400 */ {0, 0},
|
|
/* 401 */ {0, 0},
|
|
/* 402 */ {0, 0},
|
|
/* 403 */ {0, 0},
|
|
/* 404 */ {0, 0},
|
|
/* 405 */ {0, 0},
|
|
/* 406 */ {0, 0},
|
|
/* 407 */ {0, 0},
|
|
/* 408 */ {0, 0},
|
|
/* 409 */ {0, 0},
|
|
/* 40A */ {0, 0},
|
|
/* 40B */ {0, 0},
|
|
/* 40C */ {0, 0},
|
|
/* 40D */ {0, 0},
|
|
/* 40E */ {0, 0},
|
|
/* 40F */ {0, 0},
|
|
/* 410 */ {0, 0},
|
|
/* 411 */ {0, 0},
|
|
/* 412 */ {0, 0},
|
|
/* 413 */ {0, 0},
|
|
/* 414 */ {0, 0},
|
|
/* 415 */ {0, 0},
|
|
/* 416 */ {0, 0},
|
|
/* 417 */ {0, 0},
|
|
/* 418 */ {0, 0},
|
|
/* 419 */ {0, 0},
|
|
/* 41A */ {0, 0},
|
|
/* 41B */ {0, 0},
|
|
/* 41C */ {0, 0},
|
|
/* 41D */ {0, 0},
|
|
/* 41E */ {0, 0},
|
|
/* 41F */ {0, 0},
|
|
/* 420 */ {0, 0},
|
|
/* 421 */ {0, 0},
|
|
/* 422 */ {0, 0},
|
|
/* 423 */ {0, 0},
|
|
/* 424 */ {0, 0},
|
|
/* 425 */ {0, 0},
|
|
/* 426 */ {0, 0},
|
|
/* 427 */ {0, 0},
|
|
/* 428 */ {0, 0},
|
|
/* 429 */ {0, 0},
|
|
/* 42A */ {0, 0},
|
|
/* 42B */ {0, 0},
|
|
/* 42C */ {0, 0},
|
|
/* 42D */ {0, 0},
|
|
/* 42E */ {0, 0},
|
|
/* 42F */ {0, 0},
|
|
/* 430 */ {0, 0},
|
|
/* 431 */ {0, 0},
|
|
/* 432 */ {0, 0},
|
|
/* 433 */ {0, 0},
|
|
/* 434 */ {0, 0},
|
|
/* 435 */ {0, 0},
|
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/* 5FD */ {0, 0},
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/* 5FE */ {0, 0},
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/* 5FF */ {0, 0},
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/* 600 */ {0, 0},
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/* 601 */ {0, 0},
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/* 607 */ {0, 0},
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/* 608 */ {0, 0},
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/* 60F */ {0, 0},
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/* 610 */ {0, 0},
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/* 611 */ {0, 0},
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/* 612 */ {0, 0},
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/* 613 */ {0, 0},
|
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/* 614 */ {0, 0},
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|
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/* 616 */ {0, 0},
|
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/* 617 */ {0, 0},
|
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/* 618 */ {0, 0},
|
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/* 619 */ {0, 0},
|
|
/* 61A */ {0, 0},
|
|
/* 61B */ {0, 0},
|
|
/* 61C */ {0, 0},
|
|
/* 61D */ {0, 0},
|
|
/* 61E */ {0, 0},
|
|
/* 61F */ {0, 0},
|
|
/* 620 */ {0, 0},
|
|
/* 621 */ {0, 0},
|
|
/* 622 */ {0, 0},
|
|
/* 623 */ {0, 0},
|
|
/* 624 */ {0, 0},
|
|
/* 625 */ {0, 0},
|
|
/* 626 */ {0, 0},
|
|
/* 627 */ {0, 0},
|
|
/* 628 */ {0, 0},
|
|
/* 629 */ {0, 0},
|
|
/* 62A */ {0, 0},
|
|
/* 62B */ {0, 0},
|
|
/* 62C */ {0, 0},
|
|
/* 62D */ {0, 0},
|
|
/* 62E */ {0, 0},
|
|
/* 62F */ {0, 0},
|
|
/* 630 */ {0, 0},
|
|
/* 631 */ {0, 0},
|
|
/* 632 */ {0, 0},
|
|
/* 633 */ {0, 0},
|
|
/* 634 */ {0, 0},
|
|
/* 635 */ {0, 0},
|
|
/* 636 */ {0, 0},
|
|
/* 637 */ {0, 0},
|
|
/* 638 */ {0, 0},
|
|
/* 639 */ {0, 0},
|
|
/* 63A */ {0, 0},
|
|
/* 63B */ {0, 0},
|
|
/* 63C */ {0, 0},
|
|
/* 63D */ {0, 0},
|
|
/* 63E */ {0, 0},
|
|
/* 63F */ {0, 0},
|
|
/* 640 */ {0, 0},
|
|
/* 641 */ {0, 0},
|
|
/* 642 */ {0, 0},
|
|
/* 643 */ {0, 0},
|
|
/* 644 */ {0, 0},
|
|
/* 645 */ {0, 0},
|
|
/* 646 */ {0, 0},
|
|
/* 647 */ {0, 0},
|
|
/* 648 */ {0, 0},
|
|
/* 649 */ {0, 0},
|
|
/* 64A */ {0, 0},
|
|
/* 64B */ {0, 0},
|
|
/* 64C */ {0, 0},
|
|
/* 64D */ {0, 0},
|
|
/* 64E */ {0, 0},
|
|
/* 64F */ {0, 0},
|
|
/* 650 */ {0, 0},
|
|
/* 651 */ {0, 0},
|
|
/* 652 */ {0, 0},
|
|
/* 653 */ {0, 0},
|
|
/* 654 */ {0, 0},
|
|
/* 655 */ {0, 0},
|
|
/* 656 */ {0, 0},
|
|
/* 657 */ {0, 0},
|
|
/* 658 */ {0, 0},
|
|
/* 659 */ {0, 0},
|
|
/* 65A */ {0, 0},
|
|
/* 65B */ {0, 0},
|
|
/* 65C */ {0, 0},
|
|
/* 65D */ {0, 0},
|
|
/* 65E */ {0, 0},
|
|
/* 65F */ {0, 0},
|
|
/* 660 */ {0, 0},
|
|
/* 661 */ {0, 0},
|
|
/* 662 */ {0, 0},
|
|
/* 663 */ {0, 0},
|
|
/* 664 */ {0, 0},
|
|
/* 665 */ {0, 0},
|
|
/* 666 */ {0, 0},
|
|
/* 667 */ {0, 0},
|
|
/* 668 */ {0, 0},
|
|
/* 669 */ {0, 0},
|
|
/* 66A */ {0, 0},
|
|
/* 66B */ {0, 0},
|
|
/* 66C */ {0, 0},
|
|
/* 66D */ {0, 0},
|
|
/* 66E */ {0, 0},
|
|
/* 66F */ {0, 0},
|
|
/* 670 */ {0, 0},
|
|
/* 671 */ {0, 0},
|
|
/* 672 */ {0, 0},
|
|
/* 673 */ {0, 0},
|
|
/* 674 */ {0, 0},
|
|
/* 675 */ {0, 0},
|
|
/* 676 */ {0, 0},
|
|
/* 677 */ {0, 0},
|
|
/* 678 */ {0, 0},
|
|
/* 679 */ {0, 0},
|
|
/* 67A */ {0, 0},
|
|
/* 67B */ {0, 0},
|
|
/* 67C */ {0, 0},
|
|
/* 67D */ {0, 0},
|
|
/* 67E */ {0, 0},
|
|
/* 67F */ {0, 0},
|
|
/* 680 */ {0, 0},
|
|
/* 681 */ {0, 0},
|
|
/* 682 */ {0, 0},
|
|
/* 683 */ {0, 0},
|
|
/* 684 */ {0, 0},
|
|
/* 685 */ {0, 0},
|
|
/* 686 */ {0, 0},
|
|
/* 687 */ {0, 0},
|
|
/* 688 */ {0, 0},
|
|
/* 689 */ {0, 0},
|
|
/* 68A */ {0, 0},
|
|
/* 68B */ {0, 0},
|
|
/* 68C */ {0, 0},
|
|
/* 68D */ {0, 0},
|
|
/* 68E */ {0, 0},
|
|
/* 68F */ {0, 0},
|
|
/* 690 */ {0, 0},
|
|
/* 691 */ {0, 0},
|
|
/* 692 */ {0, 0},
|
|
/* 693 */ {0, 0},
|
|
/* 694 */ {0, 0},
|
|
/* 695 */ {0, 0},
|
|
/* 696 */ {0, 0},
|
|
/* 697 */ {0, 0},
|
|
/* 698 */ {0, 0},
|
|
/* 699 */ {0, 0},
|
|
/* 69A */ {0, 0},
|
|
/* 69B */ {0, 0},
|
|
/* 69C */ {0, 0},
|
|
/* 69D */ {0, 0},
|
|
/* 69E */ {0, 0},
|
|
/* 69F */ {0, 0},
|
|
/* 6A0 */ {0, 0},
|
|
/* 6A1 */ {0, 0},
|
|
/* 6A2 */ {0, 0},
|
|
/* 6A3 */ {0, 0},
|
|
/* 6A4 */ {0, 0},
|
|
/* 6A5 */ {0, 0},
|
|
/* 6A6 */ {0, 0},
|
|
/* 6A7 */ {0, 0},
|
|
/* 6A8 */ {0, 0},
|
|
/* 6A9 */ {0, 0},
|
|
/* 6AA */ {0, 0},
|
|
/* 6AB */ {0, 0},
|
|
/* 6AC */ {0, 0},
|
|
/* 6AD */ {0, 0},
|
|
/* 6AE */ {0, 0},
|
|
/* 6AF */ {0, 0},
|
|
/* 6B0 */ {0, 0},
|
|
/* 6B1 */ {0, 0},
|
|
/* 6B2 */ {0, 0},
|
|
/* 6B3 */ {0, 0},
|
|
/* 6B4 */ {0, 0},
|
|
/* 6B5 */ {0, 0},
|
|
/* 6B6 */ {0, 0},
|
|
/* 6B7 */ {0, 0},
|
|
/* 6B8 */ {0, 0},
|
|
/* 6B9 */ {0, 0},
|
|
/* 6BA */ {0, 0},
|
|
/* 6BB */ {0, 0},
|
|
/* 6BC */ {0, 0},
|
|
/* 6BD */ {0, 0},
|
|
/* 6BE */ {0, 0},
|
|
/* 6BF */ {0, 0},
|
|
/* 6C0 */ {0, 0},
|
|
/* 6C1 */ {0, 0},
|
|
/* 6C2 */ {0, 0},
|
|
/* 6C3 */ {0, 0},
|
|
/* 6C4 */ {0, 0},
|
|
/* 6C5 */ {0, 0},
|
|
/* 6C6 */ {0, 0},
|
|
/* 6C7 */ {0, 0},
|
|
/* 6C8 */ {0, 0},
|
|
/* 6C9 */ {0, 0},
|
|
/* 6CA */ {0, 0},
|
|
/* 6CB */ {0, 0},
|
|
/* 6CC */ {0, 0},
|
|
/* 6CD */ {0, 0},
|
|
/* 6CE */ {0, 0},
|
|
/* 6CF */ {0, 0},
|
|
/* 6D0 */ {0, 0},
|
|
/* 6D1 */ {0, 0},
|
|
/* 6D2 */ {0, 0},
|
|
/* 6D3 */ {0, 0},
|
|
/* 6D4 */ {0, 0},
|
|
/* 6D5 */ {0, 0},
|
|
/* 6D6 */ {0, 0},
|
|
/* 6D7 */ {0, 0},
|
|
/* 6D8 */ {0, 0},
|
|
/* 6D9 */ {0, 0},
|
|
/* 6DA */ {0, 0},
|
|
/* 6DB */ {0, 0},
|
|
/* 6DC */ {0, 0},
|
|
/* 6DD */ {0, 0},
|
|
/* 6DE */ {0, 0},
|
|
/* 6DF */ {0, 0},
|
|
/* 6E0 */ {0, 0},
|
|
/* 6E1 */ {0, 0},
|
|
/* 6E2 */ {0, 0},
|
|
/* 6E3 */ {0, 0},
|
|
/* 6E4 */ {0, 0},
|
|
/* 6E5 */ {0, 0},
|
|
/* 6E6 */ {0, 0},
|
|
/* 6E7 */ {0, 0},
|
|
/* 6E8 */ {0, 0},
|
|
/* 6E9 */ {0, 0},
|
|
/* 6EA */ {0, 0},
|
|
/* 6EB */ {0, 0},
|
|
/* 6EC */ {0, 0},
|
|
/* 6ED */ {0, 0},
|
|
/* 6EE */ {0, 0},
|
|
/* 6EF */ {0, 0},
|
|
/* 6F0 */ {0, 0},
|
|
/* 6F1 */ {0, 0},
|
|
/* 6F2 */ {0, 0},
|
|
/* 6F3 */ {0, 0},
|
|
/* 6F4 */ {0, 0},
|
|
/* 6F5 */ {0, 0},
|
|
/* 6F6 */ {0, 0},
|
|
/* 6F7 */ {0, 0},
|
|
/* 6F8 */ {0, 0},
|
|
/* 6F9 */ {0, 0},
|
|
/* 6FA */ {0, 0},
|
|
/* 6FB */ {0, 0},
|
|
/* 6FC */ {0, 0},
|
|
/* 6FD */ {0, 0},
|
|
/* 6FE */ {0, 0},
|
|
/* 6FF */ {0, 0},
|
|
/* 700 */ {0, 0},
|
|
/* 701 */ {0, 0},
|
|
/* 702 */ {0, 0},
|
|
/* 703 */ {0, 0},
|
|
/* 704 */ {0, 0},
|
|
/* 705 */ {0, 0},
|
|
/* 706 */ {0, 0},
|
|
/* 707 */ {0, 0},
|
|
/* 708 */ {0, 0},
|
|
/* 709 */ {0, 0},
|
|
/* 70A */ {0, 0},
|
|
/* 70B */ {0, 0},
|
|
/* 70C */ {0, 0},
|
|
/* 70D */ {0, 0},
|
|
/* 70E */ {0, 0},
|
|
/* 70F */ {0, 0},
|
|
/* 710 */ {0, 0},
|
|
/* 711 */ {0, 0},
|
|
/* 712 */ {0, 0},
|
|
/* 713 */ {0, 0},
|
|
/* 714 */ {0, 0},
|
|
/* 715 */ {0, 0},
|
|
/* 716 */ {0, 0},
|
|
/* 717 */ {0, 0},
|
|
/* 718 */ {0, 0},
|
|
/* 719 */ {0, 0},
|
|
/* 71A */ {0, 0},
|
|
/* 71B */ {0, 0},
|
|
/* 71C */ {0, 0},
|
|
/* 71D */ {0, 0},
|
|
/* 71E */ {0, 0},
|
|
/* 71F */ {0, 0},
|
|
/* 720 */ {0, 0},
|
|
/* 721 */ {0, 0},
|
|
/* 722 */ {0, 0},
|
|
/* 723 */ {0, 0},
|
|
/* 724 */ {0, 0},
|
|
/* 725 */ {0, 0},
|
|
/* 726 */ {0, 0},
|
|
/* 727 */ {0, 0},
|
|
/* 728 */ {0, 0},
|
|
/* 729 */ {0, 0},
|
|
/* 72A */ {0, 0},
|
|
/* 72B */ {0, 0},
|
|
/* 72C */ {0, 0},
|
|
/* 72D */ {0, 0},
|
|
/* 72E */ {0, 0},
|
|
/* 72F */ {0, 0},
|
|
/* 730 */ {0, 0},
|
|
/* 731 */ {0, 0},
|
|
/* 732 */ {0, 0},
|
|
/* 733 */ {0, 0},
|
|
/* 734 */ {0, 0},
|
|
/* 735 */ {0, 0},
|
|
/* 736 */ {0, 0},
|
|
/* 737 */ {0, 0},
|
|
/* 738 */ {0, 0},
|
|
/* 739 */ {0, 0},
|
|
/* 73A */ {0, 0},
|
|
/* 73B */ {0, 0},
|
|
/* 73C */ {0, 0},
|
|
/* 73D */ {0, 0},
|
|
/* 73E */ {0, 0},
|
|
/* 73F */ {0, 0},
|
|
/* 740 */ {0, 0},
|
|
/* 741 */ {0, 0},
|
|
/* 742 */ {0, 0},
|
|
/* 743 */ {0, 0},
|
|
/* 744 */ {0, 0},
|
|
/* 745 */ {0, 0},
|
|
/* 746 */ {0, 0},
|
|
/* 747 */ {0, 0},
|
|
/* 748 */ {0, 0},
|
|
/* 749 */ {0, 0},
|
|
/* 74A */ {0, 0},
|
|
/* 74B */ {0, 0},
|
|
/* 74C */ {0, 0},
|
|
/* 74D */ {0, 0},
|
|
/* 74E */ {0, 0},
|
|
/* 74F */ {0, 0},
|
|
/* 750 */ {0, 0},
|
|
/* 751 */ {0, 0},
|
|
/* 752 */ {0, 0},
|
|
/* 753 */ {0, 0},
|
|
/* 754 */ {0, 0},
|
|
/* 755 */ {0, 0},
|
|
/* 756 */ {0, 0},
|
|
/* 757 */ {0, 0},
|
|
/* 758 */ {0, 0},
|
|
/* 759 */ {0, 0},
|
|
/* 75A */ {0, 0},
|
|
/* 75B */ {0, 0},
|
|
/* 75C */ {0, 0},
|
|
/* 75D */ {0, 0},
|
|
/* 75E */ {0, 0},
|
|
/* 75F */ {0, 0},
|
|
/* 760 */ {0, 0},
|
|
/* 761 */ {0, 0},
|
|
/* 762 */ {0, 0},
|
|
/* 763 */ {0, 0},
|
|
/* 764 */ {0, 0},
|
|
/* 765 */ {0, 0},
|
|
/* 766 */ {0, 0},
|
|
/* 767 */ {0, 0},
|
|
/* 768 */ {0, 0},
|
|
/* 769 */ {0, 0},
|
|
/* 76A */ {0, 0},
|
|
/* 76B */ {0, 0},
|
|
/* 76C */ {0, 0},
|
|
/* 76D */ {0, 0},
|
|
/* 76E */ {0, 0},
|
|
/* 76F */ {0, 0},
|
|
/* 770 */ {0, 0},
|
|
/* 771 */ {0, 0},
|
|
/* 772 */ {0, 0},
|
|
/* 773 */ {0, 0},
|
|
/* 774 */ {0, 0},
|
|
/* 775 */ {0, 0},
|
|
/* 776 */ {0, 0},
|
|
/* 777 */ {0, 0},
|
|
/* 778 */ {0, 0},
|
|
/* 779 */ {0, 0},
|
|
/* 77A */ {0, 0},
|
|
/* 77B */ {0, 0},
|
|
/* 77C */ {0, 0},
|
|
/* 77D */ {0, 0},
|
|
/* 77E */ {0, 0},
|
|
/* 77F */ {0, 0},
|
|
/* 780 */ {0, 0},
|
|
/* 781 */ {0, 0},
|
|
/* 782 */ {0, 0},
|
|
/* 783 */ {0, 0},
|
|
/* 784 */ {0, 0},
|
|
/* 785 */ {0, 0},
|
|
/* 786 */ {0, 0},
|
|
/* 787 */ {0, 0},
|
|
/* 788 */ {0, 0},
|
|
/* 789 */ {0, 0},
|
|
/* 78A */ {0, 0},
|
|
/* 78B */ {0, 0},
|
|
/* 78C */ {0, 0},
|
|
/* 78D */ {0, 0},
|
|
/* 78E */ {0, 0},
|
|
/* 78F */ {0, 0},
|
|
/* 790 */ {0, 0},
|
|
/* 791 */ {0, 0},
|
|
/* 792 */ {0, 0},
|
|
/* 793 */ {0, 0},
|
|
/* 794 */ {0, 0},
|
|
/* 795 */ {0, 0},
|
|
/* 796 */ {0, 0},
|
|
/* 797 */ {0, 0},
|
|
/* 798 */ {0, 0},
|
|
/* 799 */ {0, 0},
|
|
/* 79A */ {0, 0},
|
|
/* 79B */ {0, 0},
|
|
/* 79C */ {0, 0},
|
|
/* 79D */ {0, 0},
|
|
/* 79E */ {0, 0},
|
|
/* 79F */ {0, 0},
|
|
/* 7A0 */ {0, 0},
|
|
/* 7A1 */ {0, 0},
|
|
/* 7A2 */ {0, 0},
|
|
/* 7A3 */ {0, 0},
|
|
/* 7A4 */ {0, 0},
|
|
/* 7A5 */ {0, 0},
|
|
/* 7A6 */ {0, 0},
|
|
/* 7A7 */ {0, 0},
|
|
/* 7A8 */ {0, 0},
|
|
/* 7A9 */ {0, 0},
|
|
/* 7AA */ {0, 0},
|
|
/* 7AB */ {0, 0},
|
|
/* 7AC */ {0, 0},
|
|
/* 7AD */ {0, 0},
|
|
/* 7AE */ {0, 0},
|
|
/* 7AF */ {0, 0},
|
|
/* 7B0 */ {0, 0},
|
|
/* 7B1 */ {0, 0},
|
|
/* 7B2 */ {0, 0},
|
|
/* 7B3 */ {0, 0},
|
|
/* 7B4 */ {0, 0},
|
|
/* 7B5 */ {0, 0},
|
|
/* 7B6 */ {0, 0},
|
|
/* 7B7 */ {0, 0},
|
|
/* 7B8 */ {0, 0},
|
|
/* 7B9 */ {0, 0},
|
|
/* 7BA */ {0, 0},
|
|
/* 7BB */ {0, 0},
|
|
/* 7BC */ {0, 0},
|
|
/* 7BD */ {0, 0},
|
|
/* 7BE */ {0, 0},
|
|
/* 7BF */ {0, 0},
|
|
/* 7C0 */ {0, 0},
|
|
/* 7C1 */ {0, 0},
|
|
/* 7C2 */ {0, 0},
|
|
/* 7C3 */ {0, 0},
|
|
/* 7C4 */ {0, 0},
|
|
/* 7C5 */ {0, 0},
|
|
/* 7C6 */ {0, 0},
|
|
/* 7C7 */ {0, 0},
|
|
/* 7C8 */ {0, 0},
|
|
/* 7C9 */ {0, 0},
|
|
/* 7CA */ {0, 0},
|
|
/* 7CB */ {0, 0},
|
|
/* 7CC */ {0, 0},
|
|
/* 7CD */ {0, 0},
|
|
/* 7CE */ {0, 0},
|
|
/* 7CF */ {0, 0},
|
|
/* 7D0 */ {0, 0},
|
|
/* 7D1 */ {0, 0},
|
|
/* 7D2 */ {0, 0},
|
|
/* 7D3 */ {0, 0},
|
|
/* 7D4 */ {0, 0},
|
|
/* 7D5 */ {0, 0},
|
|
/* 7D6 */ {0, 0},
|
|
/* 7D7 */ {0, 0},
|
|
/* 7D8 */ {0, 0},
|
|
/* 7D9 */ {0, 0},
|
|
/* 7DA */ {0, 0},
|
|
/* 7DB */ {0, 0},
|
|
/* 7DC */ {0, 0},
|
|
/* 7DD */ {0, 0},
|
|
/* 7DE */ {0, 0},
|
|
/* 7DF */ {0, 0},
|
|
/* 7E0 */ {0, 0},
|
|
/* 7E1 */ {0, 0},
|
|
/* 7E2 */ {0, 0},
|
|
/* 7E3 */ {0, 0},
|
|
/* 7E4 */ {0, 0},
|
|
/* 7E5 */ {0, 0},
|
|
/* 7E6 */ {0, 0},
|
|
/* 7E7 */ {0, 0},
|
|
/* 7E8 */ {0, 0},
|
|
/* 7E9 */ {0, 0},
|
|
/* 7EA */ {0, 0},
|
|
/* 7EB */ {0, 0},
|
|
/* 7EC */ {0, 0},
|
|
/* 7ED */ {0, 0},
|
|
/* 7EE */ {0, 0},
|
|
/* 7EF */ {0, 0},
|
|
/* 7F0 */ {0, 0},
|
|
/* 7F1 */ {0, 0},
|
|
/* 7F2 */ {0, 0},
|
|
/* 7F3 */ {0, 0},
|
|
/* 7F4 */ {0, 0},
|
|
/* 7F5 */ {0, 0},
|
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/* 7F6 */ {0, 0},
|
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/* 7F7 */ {0, 0},
|
|
/* 7F8 */ {0, 0},
|
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/* 7F9 */ {0, 0},
|
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/* 7FA */ {0, 0},
|
|
/* 7FB */ {0, 0},
|
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/* 7FC */ {0, 0},
|
|
/* 7FD */ {0, 0},
|
|
/* 7FE */ {0, 0},
|
|
/* 7FF */ {0, 0},
|
|
/* 800 */ {0, 0},
|
|
/* 801 */ {0, 0},
|
|
/* 802 */ {0, 0},
|
|
/* 803 */ {0, 0},
|
|
/* 804 */ {0, 0},
|
|
/* 805 */ {0, 0},
|
|
/* 806 */ {0, 0},
|
|
/* 807 */ {0, 0},
|
|
/* 808 */ {0, 0},
|
|
/* 809 */ {0, 0},
|
|
/* 80A */ {0, 0},
|
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/* 80B */ {0, 0},
|
|
/* 80C */ {0, 0},
|
|
/* 80D */ {0, 0},
|
|
/* 80E */ {0, 0},
|
|
/* 80F */ {0, 0},
|
|
/* 810 */ {0, 0},
|
|
/* 811 */ {0, 0},
|
|
/* 812 */ {0, 0},
|
|
/* 813 */ {0, 0},
|
|
/* 814 */ {0, 0},
|
|
/* 815 */ {0, 0},
|
|
/* 816 */ {0, 0},
|
|
/* 817 */ {0, 0},
|
|
/* 818 */ {0, 0},
|
|
/* 819 */ {0, 0},
|
|
/* 81A */ {0, 0},
|
|
/* 81B */ {0, 0},
|
|
/* 81C */ {0, 0},
|
|
/* 81D */ {0, 0},
|
|
/* 81E */ {0, 0},
|
|
/* 81F */ {0, 0},
|
|
/* 820 */ {0, 0},
|
|
/* 821 */ {0, 0},
|
|
/* 822 */ {0, 0},
|
|
/* 823 */ {0, 0},
|
|
/* 824 */ {0, 0},
|
|
/* 825 */ {0, 0},
|
|
/* 826 */ {0, 0},
|
|
/* 827 */ {0, 0},
|
|
/* 828 */ {0, 0},
|
|
/* 829 */ {0, 0},
|
|
/* 82A */ {0, 0},
|
|
/* 82B */ {0, 0},
|
|
/* 82C */ {0, 0},
|
|
/* 82D */ {0, 0},
|
|
/* 82E */ {0, 0},
|
|
/* 82F */ {0, 0},
|
|
/* 830 */ {0, 0},
|
|
/* 831 */ {0, 0},
|
|
/* 832 */ {0, 0},
|
|
/* 833 */ {0, 0},
|
|
/* 834 */ {0, 0},
|
|
/* 835 */ {0, 0},
|
|
/* 836 */ {0, 0},
|
|
/* 837 */ {0, 0},
|
|
/* 838 */ {0, 0},
|
|
/* 839 */ {0, 0},
|
|
/* 83A */ {0, 0},
|
|
/* 83B */ {0, 0},
|
|
/* 83C */ {0, 0},
|
|
/* 83D */ {0, 0},
|
|
/* 83E */ {0, 0},
|
|
/* 83F */ {0, 0},
|
|
/* 840 */ {0, 0},
|
|
/* 841 */ {0, 0},
|
|
/* 842 */ {0, 0},
|
|
/* 843 */ {0, 0},
|
|
/* 844 */ {0, 0},
|
|
/* 845 */ {0, 0},
|
|
/* 846 */ {0, 0},
|
|
/* 847 */ {0, 0},
|
|
/* 848 */ {0, 0},
|
|
/* 849 */ {0, 0},
|
|
/* 84A */ {0, 0},
|
|
/* 84B */ {0, 0},
|
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/* 84C */ {0, 0},
|
|
/* 84D */ {0, 0},
|
|
/* 84E */ {0, 0},
|
|
/* 84F */ {0, 0},
|
|
/* 850 */ {0, 0},
|
|
/* 851 */ {0, 0},
|
|
/* 852 */ {0, 0},
|
|
/* 853 */ {0, 0},
|
|
/* 854 */ {0, 0},
|
|
/* 855 */ {0, 0},
|
|
/* 856 */ {0, 0},
|
|
/* 857 */ {0, 0},
|
|
/* 858 */ {0, 0},
|
|
/* 859 */ {0, 0},
|
|
/* 85A */ {0, 0},
|
|
/* 85B */ {0, 0},
|
|
/* 85C */ {0, 0},
|
|
/* 85D */ {0, 0},
|
|
/* 85E */ {0, 0},
|
|
/* 85F */ {0, 0},
|
|
/* 860 */ {0, 0},
|
|
/* 861 */ {0, 0},
|
|
/* 862 */ {0, 0},
|
|
/* 863 */ {0, 0},
|
|
/* 864 */ {0, 0},
|
|
/* 865 */ {0, 0},
|
|
/* 866 */ {0, 0},
|
|
/* 867 */ {0, 0},
|
|
/* 868 */ {0, 0},
|
|
/* 869 */ {0, 0},
|
|
/* 86A */ {0, 0},
|
|
/* 86B */ {0, 0},
|
|
/* 86C */ {0, 0},
|
|
/* 86D */ {0, 0},
|
|
/* 86E */ {0, 0},
|
|
/* 86F */ {0, 0},
|
|
/* 870 */ {0, 0},
|
|
/* 871 */ {0, 0},
|
|
/* 872 */ {0, 0},
|
|
/* 873 */ {0, 0},
|
|
/* 874 */ {0, 0},
|
|
/* 875 */ {0, 0},
|
|
/* 876 */ {0, 0},
|
|
/* 877 */ {0, 0},
|
|
/* 878 */ {0, 0},
|
|
/* 879 */ {0, 0},
|
|
/* 87A */ {0, 0},
|
|
/* 87B */ {0, 0},
|
|
/* 87C */ {0, 0},
|
|
/* 87D */ {0, 0},
|
|
/* 87E */ {0, 0},
|
|
/* 87F */ {0, 0},
|
|
/* 880 */ {0, 0},
|
|
/* 881 */ {0, 0},
|
|
/* 882 */ {0, 0},
|
|
/* 883 */ {0, 0},
|
|
/* 884 */ {0, 0},
|
|
/* 885 */ {0, 0},
|
|
/* 886 */ {0, 0},
|
|
/* 887 */ {0, 0},
|
|
/* 888 */ {0, 0},
|
|
/* 889 */ {0, 0},
|
|
/* 88A */ {0, 0},
|
|
/* 88B */ {0, 0},
|
|
/* 88C */ {0, 0},
|
|
/* 88D */ {0, 0},
|
|
/* 88E */ {0, 0},
|
|
/* 88F */ {0, 0},
|
|
/* 890 */ {0, 0},
|
|
/* 891 */ {0, 0},
|
|
/* 892 */ {0, 0},
|
|
/* 893 */ {0, 0},
|
|
/* 894 */ {0, 0},
|
|
/* 895 */ {0, 0},
|
|
/* 896 */ {0, 0},
|
|
/* 897 */ {0, 0},
|
|
/* 898 */ {0, 0},
|
|
/* 899 */ {0, 0},
|
|
/* 89A */ {0, 0},
|
|
/* 89B */ {0, 0},
|
|
/* 89C */ {0, 0},
|
|
/* 89D */ {0, 0},
|
|
/* 89E */ {0, 0},
|
|
/* 89F */ {0, 0},
|
|
/* 8A0 */ {0, 0},
|
|
/* 8A1 */ {0, 0},
|
|
/* 8A2 */ {0, 0},
|
|
/* 8A3 */ {0, 0},
|
|
/* 8A4 */ {0, 0},
|
|
/* 8A5 */ {0, 0},
|
|
/* 8A6 */ {0, 0},
|
|
/* 8A7 */ {0, 0},
|
|
/* 8A8 */ {0, 0},
|
|
/* 8A9 */ {0, 0},
|
|
/* 8AA */ {0, 0},
|
|
/* 8AB */ {0, 0},
|
|
/* 8AC */ {0, 0},
|
|
/* 8AD */ {0, 0},
|
|
/* 8AE */ {0, 0},
|
|
/* 8AF */ {0, 0},
|
|
/* 8B0 */ {0, 0},
|
|
/* 8B1 */ {0, 0},
|
|
/* 8B2 */ {0, 0},
|
|
/* 8B3 */ {0, 0},
|
|
/* 8B4 */ {0, 0},
|
|
/* 8B5 */ {0, 0},
|
|
/* 8B6 */ {0, 0},
|
|
/* 8B7 */ {0, 0},
|
|
/* 8B8 */ {0, 0},
|
|
/* 8B9 */ {0, 0},
|
|
/* 8BA */ {0, 0},
|
|
/* 8BB */ {0, 0},
|
|
/* 8BC */ {0, 0},
|
|
/* 8BD */ {0, 0},
|
|
/* 8BE */ {0, 0},
|
|
/* 8BF */ {0, 0},
|
|
/* 8C0 */ {0, 0},
|
|
/* 8C1 */ {0, 0},
|
|
/* 8C2 */ {0, 0},
|
|
/* 8C3 */ {0, 0},
|
|
/* 8C4 */ {0, 0},
|
|
/* 8C5 */ {0, 0},
|
|
/* 8C6 */ {0, 0},
|
|
/* 8C7 */ {0, 0},
|
|
/* 8C8 */ {0, 0},
|
|
/* 8C9 */ {0, 0},
|
|
/* 8CA */ {0, 0},
|
|
/* 8CB */ {0, 0},
|
|
/* 8CC */ {0, 0},
|
|
/* 8CD */ {0, 0},
|
|
/* 8CE */ {0, 0},
|
|
/* 8CF */ {0, 0},
|
|
/* 8D0 */ {0, 0},
|
|
/* 8D1 */ {0, 0},
|
|
/* 8D2 */ {0, 0},
|
|
/* 8D3 */ {0, 0},
|
|
/* 8D4 */ {0, 0},
|
|
/* 8D5 */ {0, 0},
|
|
/* 8D6 */ {0, 0},
|
|
/* 8D7 */ {0, 0},
|
|
/* 8D8 */ {0, 0},
|
|
/* 8D9 */ {0, 0},
|
|
/* 8DA */ {0, 0},
|
|
/* 8DB */ {0, 0},
|
|
/* 8DC */ {0, 0},
|
|
/* 8DD */ {0, 0},
|
|
/* 8DE */ {0, 0},
|
|
/* 8DF */ {0, 0},
|
|
/* 8E0 */ {0, 0},
|
|
/* 8E1 */ {0, 0},
|
|
/* 8E2 */ {0, 0},
|
|
/* 8E3 */ {0, 0},
|
|
/* 8E4 */ {0, 0},
|
|
/* 8E5 */ {0, 0},
|
|
/* 8E6 */ {0, 0},
|
|
/* 8E7 */ {0, 0},
|
|
/* 8E8 */ {0, 0},
|
|
/* 8E9 */ {0, 0},
|
|
/* 8EA */ {0, 0},
|
|
/* 8EB */ {0, 0},
|
|
/* 8EC */ {0, 0},
|
|
/* 8ED */ {0, 0},
|
|
/* 8EE */ {0, 0},
|
|
/* 8EF */ {0, 0},
|
|
/* 8F0 */ {0, 0},
|
|
/* 8F1 */ {0, 0},
|
|
/* 8F2 */ {0, 0},
|
|
/* 8F3 */ {0, 0},
|
|
/* 8F4 */ {0, 0},
|
|
/* 8F5 */ {0, 0},
|
|
/* 8F6 */ {0, 0},
|
|
/* 8F7 */ {0, 0},
|
|
/* 8F8 */ {0, 0},
|
|
/* 8F9 */ {0, 0},
|
|
/* 8FA */ {0, 0},
|
|
/* 8FB */ {0, 0},
|
|
/* 8FC */ {0, 0},
|
|
/* 8FD */ {0, 0},
|
|
/* 8FE */ {0, 0},
|
|
/* 8FF */ {0, 0},
|
|
/* 900 */ {0, 0},
|
|
/* 901 */ {0, 0},
|
|
/* 902 */ {0, 0},
|
|
/* 903 */ {0, 0},
|
|
/* 904 */ {0, 0},
|
|
/* 905 */ {0, 0},
|
|
/* 906 */ {0, 0},
|
|
/* 907 */ {0, 0},
|
|
/* 908 */ {0, 0},
|
|
/* 909 */ {0, 0},
|
|
/* 90A */ {0, 0},
|
|
/* 90B */ {0, 0},
|
|
/* 90C */ {0, 0},
|
|
/* 90D */ {0, 0},
|
|
/* 90E */ {0, 0},
|
|
/* 90F */ {0, 0},
|
|
/* 910 */ {0, 0},
|
|
/* 911 */ {0, 0},
|
|
/* 912 */ {0, 0},
|
|
/* 913 */ {0, 0},
|
|
/* 914 */ {0, 0},
|
|
/* 915 */ {0, 0},
|
|
/* 916 */ {0, 0},
|
|
/* 917 */ {0, 0},
|
|
/* 918 */ {0, 0},
|
|
/* 919 */ {0, 0},
|
|
/* 91A */ {0, 0},
|
|
/* 91B */ {0, 0},
|
|
/* 91C */ {0, 0},
|
|
/* 91D */ {0, 0},
|
|
/* 91E */ {0, 0},
|
|
/* 91F */ {0, 0},
|
|
/* 920 */ {0, 0},
|
|
/* 921 */ {0, 0},
|
|
/* 922 */ {0, 0},
|
|
/* 923 */ {0, 0},
|
|
/* 924 */ {0, 0},
|
|
/* 925 */ {0, 0},
|
|
/* 926 */ {0, 0},
|
|
/* 927 */ {0, 0},
|
|
/* 928 */ {0, 0},
|
|
/* 929 */ {0, 0},
|
|
/* 92A */ {0, 0},
|
|
/* 92B */ {0, 0},
|
|
/* 92C */ {0, 0},
|
|
/* 92D */ {0, 0},
|
|
/* 92E */ {0, 0},
|
|
/* 92F */ {0, 0},
|
|
/* 930 */ {0, 0},
|
|
/* 931 */ {0, 0},
|
|
/* 932 */ {0, 0},
|
|
/* 933 */ {0, 0},
|
|
/* 934 */ {0, 0},
|
|
/* 935 */ {0, 0},
|
|
/* 936 */ {0, 0},
|
|
/* 937 */ {0, 0},
|
|
/* 938 */ {0, 0},
|
|
/* 939 */ {0, 0},
|
|
/* 93A */ {0, 0},
|
|
/* 93B */ {0, 0},
|
|
/* 93C */ {0, 0},
|
|
/* 93D */ {0, 0},
|
|
/* 93E */ {0, 0},
|
|
/* 93F */ {0, 0},
|
|
/* 940 */ {0, 0},
|
|
/* 941 */ {0, 0},
|
|
/* 942 */ {0, 0},
|
|
/* 943 */ {0, 0},
|
|
/* 944 */ {0, 0},
|
|
/* 945 */ {0, 0},
|
|
/* 946 */ {0, 0},
|
|
/* 947 */ {0, 0},
|
|
/* 948 */ {0, 0},
|
|
/* 949 */ {0, 0},
|
|
/* 94A */ {0, 0},
|
|
/* 94B */ {0, 0},
|
|
/* 94C */ {0, 0},
|
|
/* 94D */ {0, 0},
|
|
/* 94E */ {0, 0},
|
|
/* 94F */ {0, 0},
|
|
/* 950 */ {0, 0},
|
|
/* 951 */ {0, 0},
|
|
/* 952 */ {0, 0},
|
|
/* 953 */ {0, 0},
|
|
/* 954 */ {0, 0},
|
|
/* 955 */ {0, 0},
|
|
/* 956 */ {0, 0},
|
|
/* 957 */ {0, 0},
|
|
/* 958 */ {0, 0},
|
|
/* 959 */ {0, 0},
|
|
/* 95A */ {0, 0},
|
|
/* 95B */ {0, 0},
|
|
/* 95C */ {0, 0},
|
|
/* 95D */ {0, 0},
|
|
/* 95E */ {0, 0},
|
|
/* 95F */ {0, 0},
|
|
/* 960 */ {0, 0},
|
|
/* 961 */ {0, 0},
|
|
/* 962 */ {0, 0},
|
|
/* 963 */ {0, 0},
|
|
/* 964 */ {0, 0},
|
|
/* 965 */ {0, 0},
|
|
/* 966 */ {0, 0},
|
|
/* 967 */ {0, 0},
|
|
/* 968 */ {0, 0},
|
|
/* 969 */ {0, 0},
|
|
/* 96A */ {0, 0},
|
|
/* 96B */ {0, 0},
|
|
/* 96C */ {0, 0},
|
|
/* 96D */ {0, 0},
|
|
/* 96E */ {0, 0},
|
|
/* 96F */ {0, 0},
|
|
/* 970 */ {0, 0},
|
|
/* 971 */ {0, 0},
|
|
/* 972 */ {0, 0},
|
|
/* 973 */ {0, 0},
|
|
/* 974 */ {0, 0},
|
|
/* 975 */ {0, 0},
|
|
/* 976 */ {0, 0},
|
|
/* 977 */ {0, 0},
|
|
/* 978 */ {0, 0},
|
|
/* 979 */ {0, 0},
|
|
/* 97A */ {0, 0},
|
|
/* 97B */ {0, 0},
|
|
/* 97C */ {0, 0},
|
|
/* 97D */ {0, 0},
|
|
/* 97E */ {0, 0},
|
|
/* 97F */ {0, 0},
|
|
/* 980 */ {0, 0},
|
|
/* 981 */ {0, 0},
|
|
/* 982 */ {0, 0},
|
|
/* 983 */ {0, 0},
|
|
/* 984 */ {0, 0},
|
|
/* 985 */ {0, 0},
|
|
/* 986 */ {0, 0},
|
|
/* 987 */ {0, 0},
|
|
/* 988 */ {0, 0},
|
|
/* 989 */ {0, 0},
|
|
/* 98A */ {0, 0},
|
|
/* 98B */ {0, 0},
|
|
/* 98C */ {0, 0},
|
|
/* 98D */ {0, 0},
|
|
/* 98E */ {0, 0},
|
|
/* 98F */ {0, 0},
|
|
/* 990 */ {0, 0},
|
|
/* 991 */ {0, 0},
|
|
/* 992 */ {0, 0},
|
|
/* 993 */ {0, 0},
|
|
/* 994 */ {0, 0},
|
|
/* 995 */ {0, 0},
|
|
/* 996 */ {0, 0},
|
|
/* 997 */ {0, 0},
|
|
/* 998 */ {0, 0},
|
|
/* 999 */ {0, 0},
|
|
/* 99A */ {0, 0},
|
|
/* 99B */ {0, 0},
|
|
/* 99C */ {0, 0},
|
|
/* 99D */ {0, 0},
|
|
/* 99E */ {0, 0},
|
|
/* 99F */ {0, 0},
|
|
/* 9A0 */ {0, 0},
|
|
/* 9A1 */ {0, 0},
|
|
/* 9A2 */ {0, 0},
|
|
/* 9A3 */ {0, 0},
|
|
/* 9A4 */ {0, 0},
|
|
/* 9A5 */ {0, 0},
|
|
/* 9A6 */ {0, 0},
|
|
/* 9A7 */ {0, 0},
|
|
/* 9A8 */ {0, 0},
|
|
/* 9A9 */ {0, 0},
|
|
/* 9AA */ {0, 0},
|
|
/* 9AB */ {0, 0},
|
|
/* 9AC */ {0, 0},
|
|
/* 9AD */ {0, 0},
|
|
/* 9AE */ {0, 0},
|
|
/* 9AF */ {0, 0},
|
|
/* 9B0 */ {0, 0},
|
|
/* 9B1 */ {0, 0},
|
|
/* 9B2 */ {0, 0},
|
|
/* 9B3 */ {0, 0},
|
|
/* 9B4 */ {0, 0},
|
|
/* 9B5 */ {0, 0},
|
|
/* 9B6 */ {0, 0},
|
|
/* 9B7 */ {0, 0},
|
|
/* 9B8 */ {0, 0},
|
|
/* 9B9 */ {0, 0},
|
|
/* 9BA */ {0, 0},
|
|
/* 9BB */ {0, 0},
|
|
/* 9BC */ {0, 0},
|
|
/* 9BD */ {0, 0},
|
|
/* 9BE */ {0, 0},
|
|
/* 9BF */ {0, 0},
|
|
/* 9C0 */ {0, 0},
|
|
/* 9C1 */ {0, 0},
|
|
/* 9C2 */ {0, 0},
|
|
/* 9C3 */ {0, 0},
|
|
/* 9C4 */ {0, 0},
|
|
/* 9C5 */ {0, 0},
|
|
/* 9C6 */ {0, 0},
|
|
/* 9C7 */ {0, 0},
|
|
/* 9C8 */ {0, 0},
|
|
/* 9C9 */ {0, 0},
|
|
/* 9CA */ {0, 0},
|
|
/* 9CB */ {0, 0},
|
|
/* 9CC */ {0, 0},
|
|
/* 9CD */ {0, 0},
|
|
/* 9CE */ {0, 0},
|
|
/* 9CF */ {0, 0},
|
|
/* 9D0 */ {0, 0},
|
|
/* 9D1 */ {0, 0},
|
|
/* 9D2 */ {0, 0},
|
|
/* 9D3 */ {0, 0},
|
|
/* 9D4 */ {0, 0},
|
|
/* 9D5 */ {0, 0},
|
|
/* 9D6 */ {0, 0},
|
|
/* 9D7 */ {0, 0},
|
|
/* 9D8 */ {0, 0},
|
|
/* 9D9 */ {0, 0},
|
|
/* 9DA */ {0, 0},
|
|
/* 9DB */ {0, 0},
|
|
/* 9DC */ {0, 0},
|
|
/* 9DD */ {0, 0},
|
|
/* 9DE */ {0, 0},
|
|
/* 9DF */ {0, 0},
|
|
/* 9E0 */ {0, 0},
|
|
/* 9E1 */ {0, 0},
|
|
/* 9E2 */ {0, 0},
|
|
/* 9E3 */ {0, 0},
|
|
/* 9E4 */ {0, 0},
|
|
/* 9E5 */ {0, 0},
|
|
/* 9E6 */ {0, 0},
|
|
/* 9E7 */ {0, 0},
|
|
/* 9E8 */ {0, 0},
|
|
/* 9E9 */ {0, 0},
|
|
/* 9EA */ {0, 0},
|
|
/* 9EB */ {0, 0},
|
|
/* 9EC */ {0, 0},
|
|
/* 9ED */ {0, 0},
|
|
/* 9EE */ {0, 0},
|
|
/* 9EF */ {0, 0},
|
|
/* 9F0 */ {0, 0},
|
|
/* 9F1 */ {0, 0},
|
|
/* 9F2 */ {0, 0},
|
|
/* 9F3 */ {0, 0},
|
|
/* 9F4 */ {0, 0},
|
|
/* 9F5 */ {0, 0},
|
|
/* 9F6 */ {0, 0},
|
|
/* 9F7 */ {0, 0},
|
|
/* 9F8 */ {0, 0},
|
|
/* 9F9 */ {0, 0},
|
|
/* 9FA */ {0, 0},
|
|
/* 9FB */ {0, 0},
|
|
/* 9FC */ {0, 0},
|
|
/* 9FD */ {0, 0},
|
|
/* 9FE */ {0, 0},
|
|
/* 9FF */ {0, 0},
|
|
/* A00 */ {0, 0},
|
|
/* A01 */ {0, 0},
|
|
/* A02 */ {0, 0},
|
|
/* A03 */ {0, 0},
|
|
/* A04 */ {0, 0},
|
|
/* A05 */ {0, 0},
|
|
/* A06 */ {0, 0},
|
|
/* A07 */ {0, 0},
|
|
/* A08 */ {0, 0},
|
|
/* A09 */ {0, 0},
|
|
/* A0A */ {0, 0},
|
|
/* A0B */ {0, 0},
|
|
/* A0C */ {0, 0},
|
|
/* A0D */ {0, 0},
|
|
/* A0E */ {0, 0},
|
|
/* A0F */ {0, 0},
|
|
/* A10 */ {0, 0},
|
|
/* A11 */ {0, 0},
|
|
/* A12 */ {0, 0},
|
|
/* A13 */ {0, 0},
|
|
/* A14 */ {0, 0},
|
|
/* A15 */ {0, 0},
|
|
/* A16 */ {0, 0},
|
|
/* A17 */ {0, 0},
|
|
/* A18 */ {0, 0},
|
|
/* A19 */ {0, 0},
|
|
/* A1A */ {0, 0},
|
|
/* A1B */ {0, 0},
|
|
/* A1C */ {0, 0},
|
|
/* A1D */ {0, 0},
|
|
/* A1E */ {0, 0},
|
|
/* A1F */ {0, 0},
|
|
/* A20 */ {0, 0},
|
|
/* A21 */ {0, 0},
|
|
/* A22 */ {0, 0},
|
|
/* A23 */ {0, 0},
|
|
/* A24 */ {0, 0},
|
|
/* A25 */ {0, 0},
|
|
/* A26 */ {0, 0},
|
|
/* A27 */ {0, 0},
|
|
/* A28 */ {0, 0},
|
|
/* A29 */ {0, 0},
|
|
/* A2A */ {0, 0},
|
|
/* A2B */ {0, 0},
|
|
/* A2C */ {0, 0},
|
|
/* A2D */ {0, 0},
|
|
/* A2E */ {0, 0},
|
|
/* A2F */ {0, 0},
|
|
/* A30 */ {0, 0},
|
|
/* A31 */ {0, 0},
|
|
/* A32 */ {0, 0},
|
|
/* A33 */ {0, 0},
|
|
/* A34 */ {0, 0},
|
|
/* A35 */ {0, 0},
|
|
/* A36 */ {0, 0},
|
|
/* A37 */ {0, 0},
|
|
/* A38 */ {0, 0},
|
|
/* A39 */ {0, 0},
|
|
/* A3A */ {0, 0},
|
|
/* A3B */ {0, 0},
|
|
/* A3C */ {0, 0},
|
|
/* A3D */ {0, 0},
|
|
/* A3E */ {0, 0},
|
|
/* A3F */ {0, 0},
|
|
/* A40 */ {0, 0},
|
|
/* A41 */ {0, 0},
|
|
/* A42 */ {0, 0},
|
|
/* A43 */ {0, 0},
|
|
/* A44 */ {0, 0},
|
|
/* A45 */ {0, 0},
|
|
/* A46 */ {0, 0},
|
|
/* A47 */ {0, 0},
|
|
/* A48 */ {0, 0},
|
|
/* A49 */ {0, 0},
|
|
/* A4A */ {0, 0},
|
|
/* A4B */ {0, 0},
|
|
/* A4C */ {0, 0},
|
|
/* A4D */ {0, 0},
|
|
/* A4E */ {0, 0},
|
|
/* A4F */ {0, 0},
|
|
/* A50 */ {0, 0},
|
|
/* A51 */ {0, 0},
|
|
/* A52 */ {0, 0},
|
|
/* A53 */ {0, 0},
|
|
/* A54 */ {0, 0},
|
|
/* A55 */ {0, 0},
|
|
/* A56 */ {0, 0},
|
|
/* A57 */ {0, 0},
|
|
/* A58 */ {0, 0},
|
|
/* A59 */ {0, 0},
|
|
/* A5A */ {0, 0},
|
|
/* A5B */ {0, 0},
|
|
/* A5C */ {0, 0},
|
|
/* A5D */ {0, 0},
|
|
/* A5E */ {0, 0},
|
|
/* A5F */ {0, 0},
|
|
/* A60 */ {0, 0},
|
|
/* A61 */ {0, 0},
|
|
/* A62 */ {0, 0},
|
|
/* A63 */ {0, 0},
|
|
/* A64 */ {0, 0},
|
|
/* A65 */ {0, 0},
|
|
/* A66 */ {0, 0},
|
|
/* A67 */ {0, 0},
|
|
/* A68 */ {0, 0},
|
|
/* A69 */ {0, 0},
|
|
/* A6A */ {0, 0},
|
|
/* A6B */ {0, 0},
|
|
/* A6C */ {0, 0},
|
|
/* A6D */ {0, 0},
|
|
/* A6E */ {0, 0},
|
|
/* A6F */ {0, 0},
|
|
/* A70 */ {0, 0},
|
|
/* A71 */ {0, 0},
|
|
/* A72 */ {0, 0},
|
|
/* A73 */ {0, 0},
|
|
/* A74 */ {0, 0},
|
|
/* A75 */ {0, 0},
|
|
/* A76 */ {0, 0},
|
|
/* A77 */ {0, 0},
|
|
/* A78 */ {0, 0},
|
|
/* A79 */ {0, 0},
|
|
/* A7A */ {0, 0},
|
|
/* A7B */ {0, 0},
|
|
/* A7C */ {0, 0},
|
|
/* A7D */ {0, 0},
|
|
/* A7E */ {0, 0},
|
|
/* A7F */ {0, 0},
|
|
/* A80 */ {0, 0},
|
|
/* A81 */ {0, 0},
|
|
/* A82 */ {0, 0},
|
|
/* A83 */ {0, 0},
|
|
/* A84 */ {0, 0},
|
|
/* A85 */ {0, 0},
|
|
/* A86 */ {0, 0},
|
|
/* A87 */ {0, 0},
|
|
/* A88 */ {0, 0},
|
|
/* A89 */ {0, 0},
|
|
/* A8A */ {0, 0},
|
|
/* A8B */ {0, 0},
|
|
/* A8C */ {0, 0},
|
|
/* A8D */ {0, 0},
|
|
/* A8E */ {0, 0},
|
|
/* A8F */ {0, 0},
|
|
/* A90 */ {0, 0},
|
|
/* A91 */ {0, 0},
|
|
/* A92 */ {0, 0},
|
|
/* A93 */ {0, 0},
|
|
/* A94 */ {0, 0},
|
|
/* A95 */ {0, 0},
|
|
/* A96 */ {0, 0},
|
|
/* A97 */ {0, 0},
|
|
/* A98 */ {0, 0},
|
|
/* A99 */ {0, 0},
|
|
/* A9A */ {0, 0},
|
|
/* A9B */ {0, 0},
|
|
/* A9C */ {0, 0},
|
|
/* A9D */ {0, 0},
|
|
/* A9E */ {0, 0},
|
|
/* A9F */ {0, 0},
|
|
/* AA0 */ {0, 0},
|
|
/* AA1 */ {0, 0},
|
|
/* AA2 */ {0, 0},
|
|
/* AA3 */ {0, 0},
|
|
/* AA4 */ {0, 0},
|
|
/* AA5 */ {0, 0},
|
|
/* AA6 */ {0, 0},
|
|
/* AA7 */ {0, 0},
|
|
/* AA8 */ {0, 0},
|
|
/* AA9 */ {0, 0},
|
|
/* AAA */ {0, 0},
|
|
/* AAB */ {0, 0},
|
|
/* AAC */ {0, 0},
|
|
/* AAD */ {0, 0},
|
|
/* AAE */ {0, 0},
|
|
/* AAF */ {0, 0},
|
|
/* AB0 */ {0, 0},
|
|
/* AB1 */ {0, 0},
|
|
/* AB2 */ {0, 0},
|
|
/* AB3 */ {0, 0},
|
|
/* AB4 */ {0, 0},
|
|
/* AB5 */ {0, 0},
|
|
/* AB6 */ {0, 0},
|
|
/* AB7 */ {0, 0},
|
|
/* AB8 */ {0, 0},
|
|
/* AB9 */ {0, 0},
|
|
/* ABA */ {0, 0},
|
|
/* ABB */ {0, 0},
|
|
/* ABC */ {0, 0},
|
|
/* ABD */ {0, 0},
|
|
/* ABE */ {0, 0},
|
|
/* ABF */ {0, 0},
|
|
/* AC0 */ {0, 0},
|
|
/* AC1 */ {0, 0},
|
|
/* AC2 */ {0, 0},
|
|
/* AC3 */ {0, 0},
|
|
/* AC4 */ {0, 0},
|
|
/* AC5 */ {0, 0},
|
|
/* AC6 */ {0, 0},
|
|
/* AC7 */ {0, 0},
|
|
/* AC8 */ {0, 0},
|
|
/* AC9 */ {0, 0},
|
|
/* ACA */ {0, 0},
|
|
/* ACB */ {0, 0},
|
|
/* ACC */ {0, 0},
|
|
/* ACD */ {0, 0},
|
|
/* ACE */ {0, 0},
|
|
/* ACF */ {0, 0},
|
|
/* AD0 */ {0, 0},
|
|
/* AD1 */ {0, 0},
|
|
/* AD2 */ {0, 0},
|
|
/* AD3 */ {0, 0},
|
|
/* AD4 */ {0, 0},
|
|
/* AD5 */ {0, 0},
|
|
/* AD6 */ {0, 0},
|
|
/* AD7 */ {0, 0},
|
|
/* AD8 */ {0, 0},
|
|
/* AD9 */ {0, 0},
|
|
/* ADA */ {0, 0},
|
|
/* ADB */ {0, 0},
|
|
/* ADC */ {0, 0},
|
|
/* ADD */ {0, 0},
|
|
/* ADE */ {0, 0},
|
|
/* ADF */ {0, 0},
|
|
/* AE0 */ {0, 0},
|
|
/* AE1 */ {0, 0},
|
|
/* AE2 */ {0, 0},
|
|
/* AE3 */ {0, 0},
|
|
/* AE4 */ {0, 0},
|
|
/* AE5 */ {0, 0},
|
|
/* AE6 */ {0, 0},
|
|
/* AE7 */ {0, 0},
|
|
/* AE8 */ {0, 0},
|
|
/* AE9 */ {0, 0},
|
|
/* AEA */ {0, 0},
|
|
/* AEB */ {0, 0},
|
|
/* AEC */ {0, 0},
|
|
/* AED */ {0, 0},
|
|
/* AEE */ {0, 0},
|
|
/* AEF */ {0, 0},
|
|
/* AF0 */ {0, 0},
|
|
/* AF1 */ {0, 0},
|
|
/* AF2 */ {0, 0},
|
|
/* AF3 */ {0, 0},
|
|
/* AF4 */ {0, 0},
|
|
/* AF5 */ {0, 0},
|
|
/* AF6 */ {0, 0},
|
|
/* AF7 */ {0, 0},
|
|
/* AF8 */ {0, 0},
|
|
/* AF9 */ {0, 0},
|
|
/* AFA */ {0, 0},
|
|
/* AFB */ {0, 0},
|
|
/* AFC */ {0, 0},
|
|
/* AFD */ {0, 0},
|
|
/* AFE */ {0, 0},
|
|
/* AFF */ {0, 0},
|
|
/* B00 */ {0, 0},
|
|
/* B01 */ {0, 0},
|
|
/* B02 */ {0, 0},
|
|
/* B03 */ {0, 0},
|
|
/* B04 */ {0, 0},
|
|
/* B05 */ {0, 0},
|
|
/* B06 */ {0, 0},
|
|
/* B07 */ {0, 0},
|
|
/* B08 */ {0, 0},
|
|
/* B09 */ {0, 0},
|
|
/* B0A */ {0, 0},
|
|
/* B0B */ {0, 0},
|
|
/* B0C */ {0, 0},
|
|
/* B0D */ {0, 0},
|
|
/* B0E */ {0, 0},
|
|
/* B0F */ {0, 0},
|
|
/* B10 */ {0, 0},
|
|
/* B11 */ {0, 0},
|
|
/* B12 */ {0, 0},
|
|
/* B13 */ {0, 0},
|
|
/* B14 */ {0, 0},
|
|
/* B15 */ {0, 0},
|
|
/* B16 */ {0, 0},
|
|
/* B17 */ {0, 0},
|
|
/* B18 */ {0, 0},
|
|
/* B19 */ {0, 0},
|
|
/* B1A */ {0, 0},
|
|
/* B1B */ {0, 0},
|
|
/* B1C */ {0, 0},
|
|
/* B1D */ {0, 0},
|
|
/* B1E */ {0, 0},
|
|
/* B1F */ {0, 0},
|
|
/* B20 */ {0, 0},
|
|
/* B21 */ {0, 0},
|
|
/* B22 */ {0, 0},
|
|
/* B23 */ {0, 0},
|
|
/* B24 */ {0, 0},
|
|
/* B25 */ {0, 0},
|
|
/* B26 */ {0, 0},
|
|
/* B27 */ {0, 0},
|
|
/* B28 */ {0, 0},
|
|
/* B29 */ {0, 0},
|
|
/* B2A */ {0, 0},
|
|
/* B2B */ {0, 0},
|
|
/* B2C */ {0, 0},
|
|
/* B2D */ {0, 0},
|
|
/* B2E */ {0, 0},
|
|
/* B2F */ {0, 0},
|
|
/* B30 */ {0, 0},
|
|
/* B31 */ {0, 0},
|
|
/* B32 */ {0, 0},
|
|
/* B33 */ {0, 0},
|
|
/* B34 */ {0, 0},
|
|
/* B35 */ {0, 0},
|
|
/* B36 */ {0, 0},
|
|
/* B37 */ {0, 0},
|
|
/* B38 */ {0, 0},
|
|
/* B39 */ {0, 0},
|
|
/* B3A */ {0, 0},
|
|
/* B3B */ {0, 0},
|
|
/* B3C */ {0, 0},
|
|
/* B3D */ {0, 0},
|
|
/* B3E */ {0, 0},
|
|
/* B3F */ {0, 0},
|
|
/* B40 */ {0, 0},
|
|
/* B41 */ {0, 0},
|
|
/* B42 */ {0, 0},
|
|
/* B43 */ {0, 0},
|
|
/* B44 */ {0, 0},
|
|
/* B45 */ {0, 0},
|
|
/* B46 */ {0, 0},
|
|
/* B47 */ {0, 0},
|
|
/* B48 */ {0, 0},
|
|
/* B49 */ {0, 0},
|
|
/* B4A */ {0, 0},
|
|
/* B4B */ {0, 0},
|
|
/* B4C */ {0, 0},
|
|
/* B4D */ {0, 0},
|
|
/* B4E */ {0, 0},
|
|
/* B4F */ {0, 0},
|
|
/* B50 */ {0, 0},
|
|
/* B51 */ {0, 0},
|
|
/* B52 */ {0, 0},
|
|
/* B53 */ {0, 0},
|
|
/* B54 */ {0, 0},
|
|
/* B55 */ {0, 0},
|
|
/* B56 */ {0, 0},
|
|
/* B57 */ {0, 0},
|
|
/* B58 */ {0, 0},
|
|
/* B59 */ {0, 0},
|
|
/* B5A */ {0, 0},
|
|
/* B5B */ {0, 0},
|
|
/* B5C */ {0, 0},
|
|
/* B5D */ {0, 0},
|
|
/* B5E */ {0, 0},
|
|
/* B5F */ {0, 0},
|
|
/* B60 */ {0, 0},
|
|
/* B61 */ {0, 0},
|
|
/* B62 */ {0, 0},
|
|
/* B63 */ {0, 0},
|
|
/* B64 */ {0, 0},
|
|
/* B65 */ {0, 0},
|
|
/* B66 */ {0, 0},
|
|
/* B67 */ {0, 0},
|
|
/* B68 */ {0, 0},
|
|
/* B69 */ {0, 0},
|
|
/* B6A */ {0, 0},
|
|
/* B6B */ {0, 0},
|
|
/* B6C */ {0, 0},
|
|
/* B6D */ {0, 0},
|
|
/* B6E */ {0, 0},
|
|
/* B6F */ {0, 0},
|
|
/* B70 */ {0, 0},
|
|
/* B71 */ {0, 0},
|
|
/* B72 */ {0, 0},
|
|
/* B73 */ {0, 0},
|
|
/* B74 */ {0, 0},
|
|
/* B75 */ {0, 0},
|
|
/* B76 */ {0, 0},
|
|
/* B77 */ {0, 0},
|
|
/* B78 */ {0, 0},
|
|
/* B79 */ {0, 0},
|
|
/* B7A */ {0, 0},
|
|
/* B7B */ {0, 0},
|
|
/* B7C */ {0, 0},
|
|
/* B7D */ {0, 0},
|
|
/* B7E */ {0, 0},
|
|
/* B7F */ {0, 0},
|
|
/* B80 */ {0, 0},
|
|
/* B81 */ {0, 0},
|
|
/* B82 */ {0, 0},
|
|
/* B83 */ {0, 0},
|
|
/* B84 */ {0, 0},
|
|
/* B85 */ {0, 0},
|
|
/* B86 */ {0, 0},
|
|
/* B87 */ {0, 0},
|
|
/* B88 */ {0, 0},
|
|
/* B89 */ {0, 0},
|
|
/* B8A */ {0, 0},
|
|
/* B8B */ {0, 0},
|
|
/* B8C */ {0, 0},
|
|
/* B8D */ {0, 0},
|
|
/* B8E */ {0, 0},
|
|
/* B8F */ {0, 0},
|
|
/* B90 */ {0, 0},
|
|
/* B91 */ {0, 0},
|
|
/* B92 */ {0, 0},
|
|
/* B93 */ {0, 0},
|
|
/* B94 */ {0, 0},
|
|
/* B95 */ {0, 0},
|
|
/* B96 */ {0, 0},
|
|
/* B97 */ {0, 0},
|
|
/* B98 */ {0, 0},
|
|
/* B99 */ {0, 0},
|
|
/* B9A */ {0, 0},
|
|
/* B9B */ {0, 0},
|
|
/* B9C */ {0, 0},
|
|
/* B9D */ {0, 0},
|
|
/* B9E */ {0, 0},
|
|
/* B9F */ {0, 0},
|
|
/* BA0 */ {0, 0},
|
|
/* BA1 */ {0, 0},
|
|
/* BA2 */ {0, 0},
|
|
/* BA3 */ {0, 0},
|
|
/* BA4 */ {0, 0},
|
|
/* BA5 */ {0, 0},
|
|
/* BA6 */ {0, 0},
|
|
/* BA7 */ {0, 0},
|
|
/* BA8 */ {0, 0},
|
|
/* BA9 */ {0, 0},
|
|
/* BAA */ {0, 0},
|
|
/* BAB */ {0, 0},
|
|
/* BAC */ {0, 0},
|
|
/* BAD */ {0, 0},
|
|
/* BAE */ {0, 0},
|
|
/* BAF */ {0, 0},
|
|
/* BB0 */ {0, 0},
|
|
/* BB1 */ {0, 0},
|
|
/* BB2 */ {0, 0},
|
|
/* BB3 */ {0, 0},
|
|
/* BB4 */ {0, 0},
|
|
/* BB5 */ {0, 0},
|
|
/* BB6 */ {0, 0},
|
|
/* BB7 */ {0, 0},
|
|
/* BB8 */ {0, 0},
|
|
/* BB9 */ {0, 0},
|
|
/* BBA */ {0, 0},
|
|
/* BBB */ {0, 0},
|
|
/* BBC */ {0, 0},
|
|
/* BBD */ {0, 0},
|
|
/* BBE */ {0, 0},
|
|
/* BBF */ {0, 0},
|
|
/* BC0 */ {0, 0},
|
|
/* BC1 */ {0, 0},
|
|
/* BC2 */ {0, 0},
|
|
/* BC3 */ {0, 0},
|
|
/* BC4 */ {0, 0},
|
|
/* BC5 */ {0, 0},
|
|
/* BC6 */ {0, 0},
|
|
/* BC7 */ {0, 0},
|
|
/* BC8 */ {0, 0},
|
|
/* BC9 */ {0, 0},
|
|
/* BCA */ {0, 0},
|
|
/* BCB */ {0, 0},
|
|
/* BCC */ {0, 0},
|
|
/* BCD */ {0, 0},
|
|
/* BCE */ {0, 0},
|
|
/* BCF */ {0, 0},
|
|
/* BD0 */ {0, 0},
|
|
/* BD1 */ {0, 0},
|
|
/* BD2 */ {0, 0},
|
|
/* BD3 */ {0, 0},
|
|
/* BD4 */ {0, 0},
|
|
/* BD5 */ {0, 0},
|
|
/* BD6 */ {0, 0},
|
|
/* BD7 */ {0, 0},
|
|
/* BD8 */ {0, 0},
|
|
/* BD9 */ {0, 0},
|
|
/* BDA */ {0, 0},
|
|
/* BDB */ {0, 0},
|
|
/* BDC */ {0, 0},
|
|
/* BDD */ {0, 0},
|
|
/* BDE */ {0, 0},
|
|
/* BDF */ {0, 0},
|
|
/* BE0 */ {0, 0},
|
|
/* BE1 */ {0, 0},
|
|
/* BE2 */ {0, 0},
|
|
/* BE3 */ {0, 0},
|
|
/* BE4 */ {0, 0},
|
|
/* BE5 */ {0, 0},
|
|
/* BE6 */ {0, 0},
|
|
/* BE7 */ {0, 0},
|
|
/* BE8 */ {0, 0},
|
|
/* BE9 */ {0, 0},
|
|
/* BEA */ {0, 0},
|
|
/* BEB */ {0, 0},
|
|
/* BEC */ {0, 0},
|
|
/* BED */ {0, 0},
|
|
/* BEE */ {0, 0},
|
|
/* BEF */ {0, 0},
|
|
/* BF0 */ {0, 0},
|
|
/* BF1 */ {0, 0},
|
|
/* BF2 */ {0, 0},
|
|
/* BF3 */ {0, 0},
|
|
/* BF4 */ {0, 0},
|
|
/* BF5 */ {0, 0},
|
|
/* BF6 */ {0, 0},
|
|
/* BF7 */ {0, 0},
|
|
/* BF8 */ {0, 0},
|
|
/* BF9 */ {0, 0},
|
|
/* BFA */ {0, 0},
|
|
/* BFB */ {0, 0},
|
|
/* BFC */ {0, 0},
|
|
/* BFD */ {0, 0},
|
|
/* BFE */ {0, 0},
|
|
/* BFF */ {0, 0},
|
|
/* C00 */ {0, 0},
|
|
/* C01 */ {0, 0},
|
|
/* C02 */ {0, 0},
|
|
/* C03 */ {0, 0},
|
|
/* C04 */ {0, 0},
|
|
/* C05 */ {0, 0},
|
|
/* C06 */ {0, 0},
|
|
/* C07 */ {0, 0},
|
|
/* C08 */ {0, 0},
|
|
/* C09 */ {0, 0},
|
|
/* C0A */ {0, 0},
|
|
/* C0B */ {0, 0},
|
|
/* C0C */ {0, 0},
|
|
/* C0D */ {0, 0},
|
|
/* C0E */ {0, 0},
|
|
/* C0F */ {0, 0},
|
|
/* C10 */ {0, 0},
|
|
/* C11 */ {0, 0},
|
|
/* C12 */ {0, 0},
|
|
/* C13 */ {0, 0},
|
|
/* C14 */ {0, 0},
|
|
/* C15 */ {0, 0},
|
|
/* C16 */ {0, 0},
|
|
/* C17 */ {0, 0},
|
|
/* C18 */ {0, 0},
|
|
/* C19 */ {0, 0},
|
|
/* C1A */ {0, 0},
|
|
/* C1B */ {0, 0},
|
|
/* C1C */ {0, 0},
|
|
/* C1D */ {0, 0},
|
|
/* C1E */ {0, 0},
|
|
/* C1F */ {0, 0},
|
|
/* C20 */ {0, 0},
|
|
/* C21 */ {0, 0},
|
|
/* C22 */ {0, 0},
|
|
/* C23 */ {0, 0},
|
|
/* C24 */ {0, 0},
|
|
/* C25 */ {0, 0},
|
|
/* C26 */ {0, 0},
|
|
/* C27 */ {0, 0},
|
|
/* C28 */ {0, 0},
|
|
/* C29 */ {0, 0},
|
|
/* C2A */ {0, 0},
|
|
/* C2B */ {0, 0},
|
|
/* C2C */ {0, 0},
|
|
/* C2D */ {0, 0},
|
|
/* C2E */ {0, 0},
|
|
/* C2F */ {0, 0},
|
|
/* C30 */ {0, 0},
|
|
/* C31 */ {0, 0},
|
|
/* C32 */ {0, 0},
|
|
/* C33 */ {0, 0},
|
|
/* C34 */ {0, 0},
|
|
/* C35 */ {0, 0},
|
|
/* C36 */ {0, 0},
|
|
/* C37 */ {0, 0},
|
|
/* C38 */ {0, 0},
|
|
/* C39 */ {0, 0},
|
|
/* C3A */ {0, 0},
|
|
/* C3B */ {0, 0},
|
|
/* C3C */ {0, 0},
|
|
/* C3D */ {0, 0},
|
|
/* C3E */ {0, 0},
|
|
/* C3F */ {0, 0},
|
|
/* C40 */ {0, 0},
|
|
/* C41 */ {0, 0},
|
|
/* C42 */ {0, 0},
|
|
/* C43 */ {0, 0},
|
|
/* C44 */ {0, 0},
|
|
/* C45 */ {0, 0},
|
|
/* C46 */ {0, 0},
|
|
/* C47 */ {0, 0},
|
|
/* C48 */ {0, 0},
|
|
/* C49 */ {0, 0},
|
|
/* C4A */ {0, 0},
|
|
/* C4B */ {0, 0},
|
|
/* C4C */ {0, 0},
|
|
/* C4D */ {0, 0},
|
|
/* C4E */ {0, 0},
|
|
/* C4F */ {0, 0},
|
|
/* C50 */ {0, 0},
|
|
/* C51 */ {0, 0},
|
|
/* C52 */ {0, 0},
|
|
/* C53 */ {0, 0},
|
|
/* C54 */ {0, 0},
|
|
/* C55 */ {0, 0},
|
|
/* C56 */ {0, 0},
|
|
/* C57 */ {0, 0},
|
|
/* C58 */ {0, 0},
|
|
/* C59 */ {0, 0},
|
|
/* C5A */ {0, 0},
|
|
/* C5B */ {0, 0},
|
|
/* C5C */ {0, 0},
|
|
/* C5D */ {0, 0},
|
|
/* C5E */ {0, 0},
|
|
/* C5F */ {0, 0},
|
|
/* C60 */ {0, 0},
|
|
/* C61 */ {0, 0},
|
|
/* C62 */ {0, 0},
|
|
/* C63 */ {0, 0},
|
|
/* C64 */ {0, 0},
|
|
/* C65 */ {0, 0},
|
|
/* C66 */ {0, 0},
|
|
/* C67 */ {0, 0},
|
|
/* C68 */ {0, 0},
|
|
/* C69 */ {0, 0},
|
|
/* C6A */ {0, 0},
|
|
/* C6B */ {0, 0},
|
|
/* C6C */ {0, 0},
|
|
/* C6D */ {0, 0},
|
|
/* C6E */ {0, 0},
|
|
/* C6F */ {0, 0},
|
|
/* C70 */ {0, 0},
|
|
/* C71 */ {0, 0},
|
|
/* C72 */ {0, 0},
|
|
/* C73 */ {0, 0},
|
|
/* C74 */ {0, 0},
|
|
/* C75 */ {0, 0},
|
|
/* C76 */ {0, 0},
|
|
/* C77 */ {0, 0},
|
|
/* C78 */ {0, 0},
|
|
/* C79 */ {0, 0},
|
|
/* C7A */ {0, 0},
|
|
/* C7B */ {0, 0},
|
|
/* C7C */ {0, 0},
|
|
/* C7D */ {0, 0},
|
|
/* C7E */ {0, 0},
|
|
/* C7F */ {0, 0},
|
|
/* C80 */ {0, 0},
|
|
/* C81 */ {0, 0},
|
|
/* C82 */ {0, 0},
|
|
/* C83 */ {0, 0},
|
|
/* C84 */ {0, 0},
|
|
/* C85 */ {0, 0},
|
|
/* C86 */ {0, 0},
|
|
/* C87 */ {0, 0},
|
|
/* C88 */ {0, 0},
|
|
/* C89 */ {0, 0},
|
|
/* C8A */ {0, 0},
|
|
/* C8B */ {0, 0},
|
|
/* C8C */ {0, 0},
|
|
/* C8D */ {0, 0},
|
|
/* C8E */ {0, 0},
|
|
/* C8F */ {0, 0},
|
|
/* C90 */ {0, 0},
|
|
/* C91 */ {0, 0},
|
|
/* C92 */ {0, 0},
|
|
/* C93 */ {0, 0},
|
|
/* C94 */ {0, 0},
|
|
/* C95 */ {0, 0},
|
|
/* C96 */ {0, 0},
|
|
/* C97 */ {0, 0},
|
|
/* C98 */ {0, 0},
|
|
/* C99 */ {0, 0},
|
|
/* C9A */ {0, 0},
|
|
/* C9B */ {0, 0},
|
|
/* C9C */ {0, 0},
|
|
/* C9D */ {0, 0},
|
|
/* C9E */ {0, 0},
|
|
/* C9F */ {0, 0},
|
|
/* CA0 */ {0, 0},
|
|
/* CA1 */ {0, 0},
|
|
/* CA2 */ {0, 0},
|
|
/* CA3 */ {0, 0},
|
|
/* CA4 */ {0, 0},
|
|
/* CA5 */ {0, 0},
|
|
/* CA6 */ {0, 0},
|
|
/* CA7 */ {0, 0},
|
|
/* CA8 */ {0, 0},
|
|
/* CA9 */ {0, 0},
|
|
/* CAA */ {0, 0},
|
|
/* CAB */ {0, 0},
|
|
/* CAC */ {0, 0},
|
|
/* CAD */ {0, 0},
|
|
/* CAE */ {0, 0},
|
|
/* CAF */ {0, 0},
|
|
/* CB0 */ {0, 0},
|
|
/* CB1 */ {0, 0},
|
|
/* CB2 */ {0, 0},
|
|
/* CB3 */ {0, 0},
|
|
/* CB4 */ {0, 0},
|
|
/* CB5 */ {0, 0},
|
|
/* CB6 */ {0, 0},
|
|
/* CB7 */ {0, 0},
|
|
/* CB8 */ {0, 0},
|
|
/* CB9 */ {0, 0},
|
|
/* CBA */ {0, 0},
|
|
/* CBB */ {0, 0},
|
|
/* CBC */ {0, 0},
|
|
/* CBD */ {0, 0},
|
|
/* CBE */ {0, 0},
|
|
/* CBF */ {0, 0},
|
|
/* CC0 */ {0, 0},
|
|
/* CC1 */ {0, 0},
|
|
/* CC2 */ {0, 0},
|
|
/* CC3 */ {0, 0},
|
|
/* CC4 */ {0, 0},
|
|
/* CC5 */ {0, 0},
|
|
/* CC6 */ {0, 0},
|
|
/* CC7 */ {0, 0},
|
|
/* CC8 */ {0, 0},
|
|
/* CC9 */ {0, 0},
|
|
/* CCA */ {0, 0},
|
|
/* CCB */ {0, 0},
|
|
/* CCC */ {0, 0},
|
|
/* CCD */ {0, 0},
|
|
/* CCE */ {0, 0},
|
|
/* CCF */ {0, 0},
|
|
/* CD0 */ {0, 0},
|
|
/* CD1 */ {0, 0},
|
|
/* CD2 */ {0, 0},
|
|
/* CD3 */ {0, 0},
|
|
/* CD4 */ {0, 0},
|
|
/* CD5 */ {0, 0},
|
|
/* CD6 */ {0, 0},
|
|
/* CD7 */ {0, 0},
|
|
/* CD8 */ {0, 0},
|
|
/* CD9 */ {0, 0},
|
|
/* CDA */ {0, 0},
|
|
/* CDB */ {0, 0},
|
|
/* CDC */ {0, 0},
|
|
/* CDD */ {0, 0},
|
|
/* CDE */ {0, 0},
|
|
/* CDF */ {0, 0},
|
|
/* CE0 */ {0, 0},
|
|
/* CE1 */ {0, 0},
|
|
/* CE2 */ {0, 0},
|
|
/* CE3 */ {0, 0},
|
|
/* CE4 */ {0, 0},
|
|
/* CE5 */ {0, 0},
|
|
/* CE6 */ {0, 0},
|
|
/* CE7 */ {0, 0},
|
|
/* CE8 */ {0, 0},
|
|
/* CE9 */ {0, 0},
|
|
/* CEA */ {0, 0},
|
|
/* CEB */ {0, 0},
|
|
/* CEC */ {0, 0},
|
|
/* CED */ {0, 0},
|
|
/* CEE */ {0, 0},
|
|
/* CEF */ {0, 0},
|
|
/* CF0 */ {0, 0},
|
|
/* CF1 */ {0, 0},
|
|
/* CF2 */ {0, 0},
|
|
/* CF3 */ {0, 0},
|
|
/* CF4 */ {0, 0},
|
|
/* CF5 */ {0, 0},
|
|
/* CF6 */ {0, 0},
|
|
/* CF7 */ {0, 0},
|
|
/* CF8 */ {0, 0},
|
|
/* CF9 */ {0, 0},
|
|
/* CFA */ {0, 0},
|
|
/* CFB */ {0, 0},
|
|
/* CFC */ {0, 0},
|
|
/* CFD */ {0, 0},
|
|
/* CFE */ {0, 0},
|
|
/* CFF */ {0, 0},
|
|
/* D00 */ {0, 0},
|
|
/* D01 */ {0, 0},
|
|
/* D02 */ {0, 0},
|
|
/* D03 */ {0, 0},
|
|
/* D04 */ {0, 0},
|
|
/* D05 */ {0, 0},
|
|
/* D06 */ {0, 0},
|
|
/* D07 */ {0, 0},
|
|
/* D08 */ {0, 0},
|
|
/* D09 */ {0, 0},
|
|
/* D0A */ {0, 0},
|
|
/* D0B */ {0, 0},
|
|
/* D0C */ {0, 0},
|
|
/* D0D */ {0, 0},
|
|
/* D0E */ {0, 0},
|
|
/* D0F */ {0, 0},
|
|
/* D10 */ {0, 0},
|
|
/* D11 */ {0, 0},
|
|
/* D12 */ {0, 0},
|
|
/* D13 */ {0, 0},
|
|
/* D14 */ {0, 0},
|
|
/* D15 */ {0, 0},
|
|
/* D16 */ {0, 0},
|
|
/* D17 */ {0, 0},
|
|
/* D18 */ {0, 0},
|
|
/* D19 */ {0, 0},
|
|
/* D1A */ {0, 0},
|
|
/* D1B */ {0, 0},
|
|
/* D1C */ {0, 0},
|
|
/* D1D */ {0, 0},
|
|
/* D1E */ {0, 0},
|
|
/* D1F */ {0, 0},
|
|
/* D20 */ {0, 0},
|
|
/* D21 */ {0, 0},
|
|
/* D22 */ {0, 0},
|
|
/* D23 */ {0, 0},
|
|
/* D24 */ {0, 0},
|
|
/* D25 */ {0, 0},
|
|
/* D26 */ {0, 0},
|
|
/* D27 */ {0, 0},
|
|
/* D28 */ {0, 0},
|
|
/* D29 */ {0, 0},
|
|
/* D2A */ {0, 0},
|
|
/* D2B */ {0, 0},
|
|
/* D2C */ {0, 0},
|
|
/* D2D */ {0, 0},
|
|
/* D2E */ {0, 0},
|
|
/* D2F */ {0, 0},
|
|
/* D30 */ {0, 0},
|
|
/* D31 */ {0, 0},
|
|
/* D32 */ {0, 0},
|
|
/* D33 */ {0, 0},
|
|
/* D34 */ {0, 0},
|
|
/* D35 */ {0, 0},
|
|
/* D36 */ {0, 0},
|
|
/* D37 */ {0, 0},
|
|
/* D38 */ {0, 0},
|
|
/* D39 */ {0, 0},
|
|
/* D3A */ {0, 0},
|
|
/* D3B */ {0, 0},
|
|
/* D3C */ {0, 0},
|
|
/* D3D */ {0, 0},
|
|
/* D3E */ {0, 0},
|
|
/* D3F */ {0, 0},
|
|
/* D40 */ {0, 0},
|
|
/* D41 */ {0, 0},
|
|
/* D42 */ {0, 0},
|
|
/* D43 */ {0, 0},
|
|
/* D44 */ {0, 0},
|
|
/* D45 */ {0, 0},
|
|
/* D46 */ {0, 0},
|
|
/* D47 */ {0, 0},
|
|
/* D48 */ {0, 0},
|
|
/* D49 */ {0, 0},
|
|
/* D4A */ {0, 0},
|
|
/* D4B */ {0, 0},
|
|
/* D4C */ {0, 0},
|
|
/* D4D */ {0, 0},
|
|
/* D4E */ {0, 0},
|
|
/* D4F */ {0, 0},
|
|
/* D50 */ {0, 0},
|
|
/* D51 */ {0, 0},
|
|
/* D52 */ {0, 0},
|
|
/* D53 */ {0, 0},
|
|
/* D54 */ {0, 0},
|
|
/* D55 */ {0, 0},
|
|
/* D56 */ {0, 0},
|
|
/* D57 */ {0, 0},
|
|
/* D58 */ {0, 0},
|
|
/* D59 */ {0, 0},
|
|
/* D5A */ {0, 0},
|
|
/* D5B */ {0, 0},
|
|
/* D5C */ {0, 0},
|
|
/* D5D */ {0, 0},
|
|
/* D5E */ {0, 0},
|
|
/* D5F */ {0, 0},
|
|
/* D60 */ {0, 0},
|
|
/* D61 */ {0, 0},
|
|
/* D62 */ {0, 0},
|
|
/* D63 */ {0, 0},
|
|
/* D64 */ {0, 0},
|
|
/* D65 */ {0, 0},
|
|
/* D66 */ {0, 0},
|
|
/* D67 */ {0, 0},
|
|
/* D68 */ {0, 0},
|
|
/* D69 */ {0, 0},
|
|
/* D6A */ {0, 0},
|
|
/* D6B */ {0, 0},
|
|
/* D6C */ {0, 0},
|
|
/* D6D */ {0, 0},
|
|
/* D6E */ {0, 0},
|
|
/* D6F */ {0, 0},
|
|
/* D70 */ {0, 0},
|
|
/* D71 */ {0, 0},
|
|
/* D72 */ {0, 0},
|
|
/* D73 */ {0, 0},
|
|
/* D74 */ {0, 0},
|
|
/* D75 */ {0, 0},
|
|
/* D76 */ {0, 0},
|
|
/* D77 */ {0, 0},
|
|
/* D78 */ {0, 0},
|
|
/* D79 */ {0, 0},
|
|
/* D7A */ {0, 0},
|
|
/* D7B */ {0, 0},
|
|
/* D7C */ {0, 0},
|
|
/* D7D */ {0, 0},
|
|
/* D7E */ {0, 0},
|
|
/* D7F */ {0, 0},
|
|
/* D80 */ {0, 0},
|
|
/* D81 */ {0, 0},
|
|
/* D82 */ {0, 0},
|
|
/* D83 */ {0, 0},
|
|
/* D84 */ {0, 0},
|
|
/* D85 */ {0, 0},
|
|
/* D86 */ {0, 0},
|
|
/* D87 */ {0, 0},
|
|
/* D88 */ {0, 0},
|
|
/* D89 */ {0, 0},
|
|
/* D8A */ {0, 0},
|
|
/* D8B */ {0, 0},
|
|
/* D8C */ {0, 0},
|
|
/* D8D */ {0, 0},
|
|
/* D8E */ {0, 0},
|
|
/* D8F */ {0, 0},
|
|
/* D90 */ {0, 0},
|
|
/* D91 */ {0, 0},
|
|
/* D92 */ {0, 0},
|
|
/* D93 */ {0, 0},
|
|
/* D94 */ {0, 0},
|
|
/* D95 */ {0, 0},
|
|
/* D96 */ {0, 0},
|
|
/* D97 */ {0, 0},
|
|
/* D98 */ {0, 0},
|
|
/* D99 */ {0, 0},
|
|
/* D9A */ {0, 0},
|
|
/* D9B */ {0, 0},
|
|
/* D9C */ {0, 0},
|
|
/* D9D */ {0, 0},
|
|
/* D9E */ {0, 0},
|
|
/* D9F */ {0, 0},
|
|
/* DA0 */ {0, 0},
|
|
/* DA1 */ {0, 0},
|
|
/* DA2 */ {0, 0},
|
|
/* DA3 */ {0, 0},
|
|
/* DA4 */ {0, 0},
|
|
/* DA5 */ {0, 0},
|
|
/* DA6 */ {0, 0},
|
|
/* DA7 */ {0, 0},
|
|
/* DA8 */ {0, 0},
|
|
/* DA9 */ {0, 0},
|
|
/* DAA */ {0, 0},
|
|
/* DAB */ {0, 0},
|
|
/* DAC */ {0, 0},
|
|
/* DAD */ {0, 0},
|
|
/* DAE */ {0, 0},
|
|
/* DAF */ {0, 0},
|
|
/* DB0 */ {0, 0},
|
|
/* DB1 */ {0, 0},
|
|
/* DB2 */ {0, 0},
|
|
/* DB3 */ {0, 0},
|
|
/* DB4 */ {0, 0},
|
|
/* DB5 */ {0, 0},
|
|
/* DB6 */ {0, 0},
|
|
/* DB7 */ {0, 0},
|
|
/* DB8 */ {0, 0},
|
|
/* DB9 */ {0, 0},
|
|
/* DBA */ {0, 0},
|
|
/* DBB */ {0, 0},
|
|
/* DBC */ {0, 0},
|
|
/* DBD */ {0, 0},
|
|
/* DBE */ {0, 0},
|
|
/* DBF */ {0, 0},
|
|
/* DC0 */ {0, 0},
|
|
/* DC1 */ {0, 0},
|
|
/* DC2 */ {0, 0},
|
|
/* DC3 */ {0, 0},
|
|
/* DC4 */ {0, 0},
|
|
/* DC5 */ {0, 0},
|
|
/* DC6 */ {0, 0},
|
|
/* DC7 */ {0, 0},
|
|
/* DC8 */ {0, 0},
|
|
/* DC9 */ {0, 0},
|
|
/* DCA */ {0, 0},
|
|
/* DCB */ {0, 0},
|
|
/* DCC */ {0, 0},
|
|
/* DCD */ {0, 0},
|
|
/* DCE */ {0, 0},
|
|
/* DCF */ {0, 0},
|
|
/* DD0 */ {0, 0},
|
|
/* DD1 */ {0, 0},
|
|
/* DD2 */ {0, 0},
|
|
/* DD3 */ {0, 0},
|
|
/* DD4 */ {0, 0},
|
|
/* DD5 */ {0, 0},
|
|
/* DD6 */ {0, 0},
|
|
/* DD7 */ {0, 0},
|
|
/* DD8 */ {0, 0},
|
|
/* DD9 */ {0, 0},
|
|
/* DDA */ {0, 0},
|
|
/* DDB */ {0, 0},
|
|
/* DDC */ {0, 0},
|
|
/* DDD */ {0, 0},
|
|
/* DDE */ {0, 0},
|
|
/* DDF */ {0, 0},
|
|
/* DE0 */ {0, 0},
|
|
/* DE1 */ {0, 0},
|
|
/* DE2 */ {0, 0},
|
|
/* DE3 */ {0, 0},
|
|
/* DE4 */ {0, 0},
|
|
/* DE5 */ {0, 0},
|
|
/* DE6 */ {0, 0},
|
|
/* DE7 */ {0, 0},
|
|
/* DE8 */ {0, 0},
|
|
/* DE9 */ {0, 0},
|
|
/* DEA */ {0, 0},
|
|
/* DEB */ {0, 0},
|
|
/* DEC */ {0, 0},
|
|
/* DED */ {0, 0},
|
|
/* DEE */ {0, 0},
|
|
/* DEF */ {0, 0},
|
|
/* DF0 */ {0, 0},
|
|
/* DF1 */ {0, 0},
|
|
/* DF2 */ {0, 0},
|
|
/* DF3 */ {0, 0},
|
|
/* DF4 */ {0, 0},
|
|
/* DF5 */ {0, 0},
|
|
/* DF6 */ {0, 0},
|
|
/* DF7 */ {0, 0},
|
|
/* DF8 */ {0, 0},
|
|
/* DF9 */ {0, 0},
|
|
/* DFA */ {0, 0},
|
|
/* DFB */ {0, 0},
|
|
/* DFC */ {0, 0},
|
|
/* DFD */ {0, 0},
|
|
/* DFE */ {0, 0},
|
|
/* DFF */ {0, 0},
|
|
/* E00 */ {0, 0},
|
|
/* E01 */ {0, 0},
|
|
/* E02 */ {0, 0},
|
|
/* E03 */ {0, 0},
|
|
/* E04 */ {0, 0},
|
|
/* E05 */ {0, 0},
|
|
/* E06 */ {0, 0},
|
|
/* E07 */ {0, 0},
|
|
/* E08 */ {0, 0},
|
|
/* E09 */ {0, 0},
|
|
/* E0A */ {0, 0},
|
|
/* E0B */ {0, 0},
|
|
/* E0C */ {0, 0},
|
|
/* E0D */ {0, 0},
|
|
/* E0E */ {0, 0},
|
|
/* E0F */ {0, 0},
|
|
/* E10 */ {0, 0},
|
|
/* E11 */ {0, 0},
|
|
/* E12 */ {0, 0},
|
|
/* E13 */ {0, 0},
|
|
/* E14 */ {0, 0},
|
|
/* E15 */ {0, 0},
|
|
/* E16 */ {0, 0},
|
|
/* E17 */ {0, 0},
|
|
/* E18 */ {0, 0},
|
|
/* E19 */ {0, 0},
|
|
/* E1A */ {0, 0},
|
|
/* E1B */ {0, 0},
|
|
/* E1C */ {0, 0},
|
|
/* E1D */ {0, 0},
|
|
/* E1E */ {0, 0},
|
|
/* E1F */ {0, 0},
|
|
/* E20 */ {0, 0},
|
|
/* E21 */ {0, 0},
|
|
/* E22 */ {0, 0},
|
|
/* E23 */ {0, 0},
|
|
/* E24 */ {0, 0},
|
|
/* E25 */ {0, 0},
|
|
/* E26 */ {0, 0},
|
|
/* E27 */ {0, 0},
|
|
/* E28 */ {0, 0},
|
|
/* E29 */ {0, 0},
|
|
/* E2A */ {0, 0},
|
|
/* E2B */ {0, 0},
|
|
/* E2C */ {0, 0},
|
|
/* E2D */ {0, 0},
|
|
/* E2E */ {0, 0},
|
|
/* E2F */ {0, 0},
|
|
/* E30 */ {0, 0},
|
|
/* E31 */ {0, 0},
|
|
/* E32 */ {0, 0},
|
|
/* E33 */ {0, 0},
|
|
/* E34 */ {0, 0},
|
|
/* E35 */ {0, 0},
|
|
/* E36 */ {0, 0},
|
|
/* E37 */ {0, 0},
|
|
/* E38 */ {0, 0},
|
|
/* E39 */ {0, 0},
|
|
/* E3A */ {0, 0},
|
|
/* E3B */ {0, 0},
|
|
/* E3C */ {0, 0},
|
|
/* E3D */ {0, 0},
|
|
/* E3E */ {0, 0},
|
|
/* E3F */ {0, 0},
|
|
/* E40 */ {0, 0},
|
|
/* E41 */ {0, 0},
|
|
/* E42 */ {0, 0},
|
|
/* E43 */ {0, 0},
|
|
/* E44 */ {0, 0},
|
|
/* E45 */ {0, 0},
|
|
/* E46 */ {0, 0},
|
|
/* E47 */ {0, 0},
|
|
/* E48 */ {0, 0},
|
|
/* E49 */ {0, 0},
|
|
/* E4A */ {0, 0},
|
|
/* E4B */ {0, 0},
|
|
/* E4C */ {0, 0},
|
|
/* E4D */ {0, 0},
|
|
/* E4E */ {0, 0},
|
|
/* E4F */ {0, 0},
|
|
/* E50 */ {0, 0},
|
|
/* E51 */ {0, 0},
|
|
/* E52 */ {0, 0},
|
|
/* E53 */ {0, 0},
|
|
/* E54 */ {0, 0},
|
|
/* E55 */ {0, 0},
|
|
/* E56 */ {0, 0},
|
|
/* E57 */ {0, 0},
|
|
/* E58 */ {0, 0},
|
|
/* E59 */ {0, 0},
|
|
/* E5A */ {0, 0},
|
|
/* E5B */ {0, 0},
|
|
/* E5C */ {0, 0},
|
|
/* E5D */ {0, 0},
|
|
/* E5E */ {0, 0},
|
|
/* E5F */ {0, 0},
|
|
/* E60 */ {0, 0},
|
|
/* E61 */ {0, 0},
|
|
/* E62 */ {0, 0},
|
|
/* E63 */ {0, 0},
|
|
/* E64 */ {0, 0},
|
|
/* E65 */ {0, 0},
|
|
/* E66 */ {0, 0},
|
|
/* E67 */ {0, 0},
|
|
/* E68 */ {0, 0},
|
|
/* E69 */ {0, 0},
|
|
/* E6A */ {0, 0},
|
|
/* E6B */ {0, 0},
|
|
/* E6C */ {0, 0},
|
|
/* E6D */ {0, 0},
|
|
/* E6E */ {0, 0},
|
|
/* E6F */ {0, 0},
|
|
/* E70 */ {0, 0},
|
|
/* E71 */ {0, 0},
|
|
/* E72 */ {0, 0},
|
|
/* E73 */ {0, 0},
|
|
/* E74 */ {0, 0},
|
|
/* E75 */ {0, 0},
|
|
/* E76 */ {0, 0},
|
|
/* E77 */ {0, 0},
|
|
/* E78 */ {0, 0},
|
|
/* E79 */ {0, 0},
|
|
/* E7A */ {0, 0},
|
|
/* E7B */ {0, 0},
|
|
/* E7C */ {0, 0},
|
|
/* E7D */ {0, 0},
|
|
/* E7E */ {0, 0},
|
|
/* E7F */ {0, 0},
|
|
/* E80 */ {0, 0},
|
|
/* E81 */ {0, 0},
|
|
/* E82 */ {0, 0},
|
|
/* E83 */ {0, 0},
|
|
/* E84 */ {3230, 6},
|
|
/* E85 */ {3236, 2},
|
|
/* E86 */ {3238, 1},
|
|
/* E87 */ {3239, 1},
|
|
/* E88 */ {3240, 1},
|
|
/* E89 */ {3241, 1},
|
|
/* E8A */ {3242, 1},
|
|
/* E8B */ {3243, 2},
|
|
/* E8C */ {3245, 4},
|
|
/* E8D */ {3249, 6},
|
|
/* E8E */ {3255, 1},
|
|
/* E8F */ {3256, 1},
|
|
/* E90 */ {3257, 1},
|
|
/* E91 */ {3258, 1},
|
|
/* E92 */ {3259, 2},
|
|
/* E93 */ {3261, 1},
|
|
/* E94 */ {3262, 1},
|
|
/* E95 */ {3263, 1},
|
|
/* E96 */ {3264, 1},
|
|
/* E97 */ {3265, 2},
|
|
/* E98 */ {0, 0},
|
|
/* E99 */ {0, 0},
|
|
/* E9A */ {0, 0},
|
|
/* E9B */ {0, 0},
|
|
/* E9C */ {3267, 1},
|
|
/* E9D */ {3268, 1},
|
|
/* E9E */ {3269, 1},
|
|
/* E9F */ {3270, 1},
|
|
/* EA0 */ {3271, 2},
|
|
/* EA1 */ {3273, 3},
|
|
/* EA2 */ {3276, 1},
|
|
/* EA3 */ {3277, 1},
|
|
/* EA4 */ {3278, 7},
|
|
/* EA5 */ {3285, 7},
|
|
/* EA6 */ {3292, 1},
|
|
/* EA7 */ {3293, 1},
|
|
/* EA8 */ {3294, 1},
|
|
/* EA9 */ {3295, 2},
|
|
/* EAA */ {0, 0},
|
|
/* EAB */ {0, 0},
|
|
/* EAC */ {0, 0},
|
|
/* EAD */ {0, 0},
|
|
/* EAE */ {0, 0},
|
|
/* EAF */ {0, 0},
|
|
/* EB0 */ {0, 0},
|
|
/* EB1 */ {3297, 1},
|
|
/* EB2 */ {0, 0},
|
|
/* EB3 */ {0, 0},
|
|
/* EB4 */ {3298, 1},
|
|
/* EB5 */ {3299, 1},
|
|
/* EB6 */ {3300, 1},
|
|
/* EB7 */ {3301, 1},
|
|
/* EB8 */ {0, 0},
|
|
/* EB9 */ {0, 0},
|
|
/* EBA */ {0, 0},
|
|
/* EBB */ {3302, 1},
|
|
/* EBC */ {3303, 1},
|
|
/* EBD */ {3304, 1},
|
|
/* EBE */ {0, 0},
|
|
/* EBF */ {0, 0},
|
|
/* EC0 */ {3305, 2},
|
|
/* EC1 */ {3307, 1},
|
|
/* EC2 */ {3308, 3},
|
|
/* EC3 */ {3311, 2},
|
|
/* EC4 */ {3313, 2},
|
|
/* EC5 */ {3315, 1},
|
|
/* EC6 */ {3316, 7},
|
|
/* EC7 */ {3323, 2},
|
|
/* EC8 */ {3325, 1},
|
|
/* EC9 */ {3326, 1},
|
|
/* ECA */ {3327, 2},
|
|
/* ECB */ {3329, 2},
|
|
/* ECC */ {3331, 1},
|
|
/* ECD */ {3332, 1},
|
|
/* ECE */ {3333, 2},
|
|
/* ECF */ {3335, 2},
|
|
/* ED0 */ {0, 0},
|
|
/* ED1 */ {0, 0},
|
|
/* ED2 */ {0, 0},
|
|
/* ED3 */ {0, 0},
|
|
/* ED4 */ {0, 0},
|
|
/* ED5 */ {0, 0},
|
|
/* ED6 */ {3337, 4},
|
|
/* ED7 */ {0, 0},
|
|
/* ED8 */ {3341, 4},
|
|
/* ED9 */ {3345, 4},
|
|
/* EDA */ {0, 0},
|
|
/* EDB */ {0, 0},
|
|
/* EDC */ {3349, 4},
|
|
/* EDD */ {3353, 4},
|
|
/* EDE */ {0, 0},
|
|
/* EDF */ {0, 0},
|
|
/* EE0 */ {3357, 23},
|
|
/* EE1 */ {3380, 22},
|
|
/* EE2 */ {3402, 22},
|
|
/* EE3 */ {3424, 29},
|
|
/* EE4 */ {3453, 23},
|
|
/* EE5 */ {3476, 22},
|
|
/* EE6 */ {3498, 22},
|
|
/* EE7 */ {3520, 29},
|
|
/* EE8 */ {3549, 28},
|
|
/* EE9 */ {3577, 12},
|
|
/* EEA */ {3589, 13},
|
|
/* EEB */ {3602, 18},
|
|
/* EEC */ {3620, 27},
|
|
/* EED */ {3647, 13},
|
|
/* EEE */ {3660, 22},
|
|
/* EEF */ {3682, 21},
|
|
/* EF0 */ {3703, 15},
|
|
/* EF1 */ {3718, 15},
|
|
/* EF2 */ {3733, 15},
|
|
/* EF3 */ {3748, 15},
|
|
/* EF4 */ {3763, 15},
|
|
/* EF5 */ {3778, 15},
|
|
/* EF6 */ {3793, 15},
|
|
/* EF7 */ {3808, 15},
|
|
/* EF8 */ {3823, 3},
|
|
/* EF9 */ {3826, 3},
|
|
/* EFA */ {3829, 3},
|
|
/* EFB */ {3832, 3},
|
|
/* EFC */ {3835, 3},
|
|
/* EFD */ {3838, 3},
|
|
/* EFE */ {3841, 3},
|
|
/* EFF */ {3844, 3},
|
|
/* F00 */ {3847, 10},
|
|
/* F01 */ {3857, 10},
|
|
/* F02 */ {3867, 7},
|
|
/* F03 */ {3874, 7},
|
|
/* F04 */ {3881, 10},
|
|
/* F05 */ {3891, 8},
|
|
/* F06 */ {3899, 6},
|
|
/* F07 */ {3905, 6},
|
|
/* F08 */ {3911, 4},
|
|
/* F09 */ {3915, 5},
|
|
/* F0A */ {3920, 3},
|
|
/* F0B */ {3923, 3},
|
|
/* F0C */ {3926, 3},
|
|
/* F0D */ {3929, 3},
|
|
/* F0E */ {3932, 3},
|
|
/* F0F */ {3935, 3},
|
|
/* F10 */ {3938, 5},
|
|
/* F11 */ {3943, 6},
|
|
/* F12 */ {3949, 5},
|
|
/* F13 */ {3954, 5},
|
|
/* F14 */ {3959, 6},
|
|
/* F15 */ {3965, 6},
|
|
/* F16 */ {3971, 6},
|
|
/* F17 */ {3977, 6},
|
|
/* F18 */ {3983, 3},
|
|
/* F19 */ {3986, 3},
|
|
/* F1A */ {3989, 3},
|
|
/* F1B */ {3992, 4},
|
|
/* F1C */ {3996, 4},
|
|
/* F1D */ {4000, 4},
|
|
/* F1E */ {4004, 3},
|
|
/* F1F */ {4007, 3},
|
|
/* F20 */ {4010, 3},
|
|
/* F21 */ {4013, 3},
|
|
/* F22 */ {4016, 3},
|
|
/* F23 */ {4019, 3},
|
|
/* F24 */ {4022, 4},
|
|
/* F25 */ {4026, 3},
|
|
/* F26 */ {4029, 3},
|
|
/* F27 */ {4032, 3},
|
|
/* F28 */ {4035, 3},
|
|
/* F29 */ {4038, 3},
|
|
/* F2A */ {4041, 3},
|
|
/* F2B */ {4044, 3},
|
|
/* F2C */ {4047, 4},
|
|
/* F2D */ {4051, 3},
|
|
/* F2E */ {4054, 3},
|
|
/* F2F */ {4057, 3},
|
|
/* F30 */ {4060, 4},
|
|
/* F31 */ {4064, 3},
|
|
/* F32 */ {4067, 5},
|
|
/* F33 */ {4072, 3},
|
|
/* F34 */ {4075, 4},
|
|
/* F35 */ {4079, 3},
|
|
/* F36 */ {4082, 5},
|
|
/* F37 */ {4087, 3},
|
|
/* F38 */ {4090, 5},
|
|
/* F39 */ {4095, 3},
|
|
/* F3A */ {4098, 18},
|
|
/* F3B */ {4116, 8},
|
|
/* F3C */ {4124, 4},
|
|
/* F3D */ {4128, 3},
|
|
/* F3E */ {4131, 4},
|
|
/* F3F */ {4135, 3},
|
|
/* F40 */ {4138, 5},
|
|
/* F41 */ {4143, 6},
|
|
/* F42 */ {4149, 4},
|
|
/* F43 */ {4153, 4},
|
|
/* F44 */ {4157, 6},
|
|
/* F45 */ {4163, 6},
|
|
/* F46 */ {4169, 4},
|
|
/* F47 */ {4173, 4},
|
|
/* F48 */ {4177, 4},
|
|
/* F49 */ {4181, 5},
|
|
/* F4A */ {4186, 3},
|
|
/* F4B */ {4189, 3},
|
|
/* F4C */ {4192, 3},
|
|
/* F4D */ {4195, 3},
|
|
/* F4E */ {4198, 3},
|
|
/* F4F */ {4201, 3},
|
|
/* F50 */ {4204, 3},
|
|
/* F51 */ {4207, 4},
|
|
/* F52 */ {4211, 3},
|
|
/* F53 */ {4214, 3},
|
|
/* F54 */ {4217, 4},
|
|
/* F55 */ {4221, 4},
|
|
/* F56 */ {4225, 4},
|
|
/* F57 */ {4229, 4},
|
|
/* F58 */ {4233, 3},
|
|
/* F59 */ {4236, 3},
|
|
/* F5A */ {4239, 3},
|
|
/* F5B */ {4242, 4},
|
|
/* F5C */ {4246, 4},
|
|
/* F5D */ {4250, 4},
|
|
/* F5E */ {4254, 3},
|
|
/* F5F */ {4257, 3},
|
|
/* F60 */ {4260, 3},
|
|
/* F61 */ {4263, 3},
|
|
/* F62 */ {4266, 3},
|
|
/* F63 */ {4269, 3},
|
|
/* F64 */ {4272, 4},
|
|
/* F65 */ {4276, 3},
|
|
/* F66 */ {4279, 3},
|
|
/* F67 */ {4282, 3},
|
|
/* F68 */ {4285, 3},
|
|
/* F69 */ {4288, 3},
|
|
/* F6A */ {4291, 3},
|
|
/* F6B */ {4294, 3},
|
|
/* F6C */ {4297, 4},
|
|
/* F6D */ {4301, 3},
|
|
/* F6E */ {4304, 3},
|
|
/* F6F */ {4307, 3},
|
|
/* F70 */ {4310, 3},
|
|
/* F71 */ {4313, 3},
|
|
/* F72 */ {4316, 3},
|
|
/* F73 */ {4319, 3},
|
|
/* F74 */ {4322, 3},
|
|
/* F75 */ {4325, 3},
|
|
/* F76 */ {4328, 3},
|
|
/* F77 */ {4331, 3},
|
|
/* F78 */ {4334, 3},
|
|
/* F79 */ {4337, 3},
|
|
/* F7A */ {4340, 3},
|
|
/* F7B */ {4343, 3},
|
|
/* F7C */ {4346, 3},
|
|
/* F7D */ {4349, 3},
|
|
/* F7E */ {4352, 3},
|
|
/* F7F */ {4355, 4},
|
|
/* F80 */ {4359, 1},
|
|
/* F81 */ {4360, 1},
|
|
/* F82 */ {4361, 1},
|
|
/* F83 */ {4362, 2},
|
|
/* F84 */ {4364, 1},
|
|
/* F85 */ {4365, 2},
|
|
/* F86 */ {0, 0},
|
|
/* F87 */ {0, 0},
|
|
/* F88 */ {4367, 1},
|
|
/* F89 */ {4368, 2},
|
|
/* F8A */ {4370, 1},
|
|
/* F8B */ {4371, 1},
|
|
/* F8C */ {4372, 1},
|
|
/* F8D */ {4373, 2},
|
|
/* F8E */ {0, 0},
|
|
/* F8F */ {0, 0},
|
|
/* F90 */ {0, 0},
|
|
/* F91 */ {4375, 1},
|
|
/* F92 */ {0, 0},
|
|
/* F93 */ {4376, 1},
|
|
/* F94 */ {0, 0},
|
|
/* F95 */ {0, 0},
|
|
/* F96 */ {0, 0},
|
|
/* F97 */ {0, 0},
|
|
/* F98 */ {0, 0},
|
|
/* F99 */ {4377, 2},
|
|
/* F9A */ {0, 0},
|
|
/* F9B */ {4379, 1},
|
|
/* F9C */ {0, 0},
|
|
/* F9D */ {0, 0},
|
|
/* F9E */ {0, 0},
|
|
/* F9F */ {0, 0},
|
|
/* FA0 */ {4380, 3},
|
|
/* FA1 */ {4383, 3},
|
|
/* FA2 */ {4386, 3},
|
|
/* FA3 */ {4389, 3},
|
|
/* FA4 */ {4392, 3},
|
|
/* FA5 */ {4395, 3},
|
|
/* FA6 */ {4398, 1},
|
|
/* FA7 */ {4399, 1},
|
|
/* FA8 */ {4400, 10},
|
|
/* FA9 */ {4410, 10},
|
|
/* FAA */ {4420, 6},
|
|
/* FAB */ {4426, 1},
|
|
/* FAC */ {4427, 6},
|
|
/* FAD */ {4433, 6},
|
|
/* FAE */ {4439, 6},
|
|
/* FAF */ {0, 0},
|
|
/* FB0 */ {4445, 3},
|
|
/* FB1 */ {0, 0},
|
|
/* FB2 */ {0, 0},
|
|
/* FB3 */ {0, 0},
|
|
/* FB4 */ {0, 0},
|
|
/* FB5 */ {4448, 1},
|
|
/* FB6 */ {0, 0},
|
|
/* FB7 */ {0, 0},
|
|
/* FB8 */ {4449, 1},
|
|
/* FB9 */ {4450, 1},
|
|
/* FBA */ {4451, 1},
|
|
/* FBB */ {4452, 1},
|
|
/* FBC */ {4453, 1},
|
|
/* FBD */ {0, 0},
|
|
/* FBE */ {4454, 1},
|
|
/* FBF */ {0, 0},
|
|
/* FC0 */ {4455, 1},
|
|
/* FC1 */ {4456, 1},
|
|
/* FC2 */ {4457, 2},
|
|
/* FC3 */ {4459, 2},
|
|
/* FC4 */ {4461, 1},
|
|
/* FC5 */ {4462, 1},
|
|
/* FC6 */ {4463, 2},
|
|
/* FC7 */ {4465, 2},
|
|
/* FC8 */ {4467, 7},
|
|
/* FC9 */ {4474, 11},
|
|
/* FCA */ {4485, 2},
|
|
/* FCB */ {4487, 2},
|
|
/* FCC */ {4489, 7},
|
|
/* FCD */ {4496, 7},
|
|
/* FCE */ {4503, 2},
|
|
/* FCF */ {4505, 2},
|
|
/* FD0 */ {0, 0},
|
|
/* FD1 */ {0, 0},
|
|
/* FD2 */ {0, 0},
|
|
/* FD3 */ {0, 0},
|
|
/* FD4 */ {0, 0},
|
|
/* FD5 */ {0, 0},
|
|
/* FD6 */ {0, 0},
|
|
/* FD7 */ {0, 0},
|
|
/* FD8 */ {0, 0},
|
|
/* FD9 */ {4507, 4},
|
|
/* FDA */ {0, 0},
|
|
/* FDB */ {0, 0},
|
|
/* FDC */ {0, 0},
|
|
/* FDD */ {0, 0},
|
|
/* FDE */ {0, 0},
|
|
/* FDF */ {0, 0},
|
|
/* FE0 */ {4511, 28},
|
|
/* FE1 */ {4539, 26},
|
|
/* FE2 */ {4565, 26},
|
|
/* FE3 */ {4591, 32},
|
|
/* FE4 */ {4623, 29},
|
|
/* FE5 */ {4652, 27},
|
|
/* FE6 */ {4679, 27},
|
|
/* FE7 */ {4706, 33},
|
|
/* FE8 */ {4739, 32},
|
|
/* FE9 */ {4771, 17},
|
|
/* FEA */ {4788, 17},
|
|
/* FEB */ {4805, 29},
|
|
/* FEC */ {4834, 31},
|
|
/* FED */ {4865, 18},
|
|
/* FEE */ {4883, 26},
|
|
/* FEF */ {4909, 32},
|
|
/* FF0 */ {4941, 19},
|
|
/* FF1 */ {4960, 18},
|
|
/* FF2 */ {4978, 17},
|
|
/* FF3 */ {4995, 17},
|
|
/* FF4 */ {5012, 19},
|
|
/* FF5 */ {5031, 18},
|
|
/* FF6 */ {5049, 17},
|
|
/* FF7 */ {5066, 17},
|
|
/* FF8 */ {5083, 4},
|
|
/* FF9 */ {5087, 4},
|
|
/* FFA */ {5091, 4},
|
|
/* FFB */ {5095, 17},
|
|
/* FFC */ {5112, 4},
|
|
/* FFD */ {5116, 4},
|
|
/* FFE */ {5120, 4},
|
|
/* FFF */ {5124, 17},
|
|
}
|
|
|