mirror of
https://github.com/odin-lang/Odin.git
synced 2026-06-20 09:02:32 +00:00
1047 lines
88 KiB
Odin
1047 lines
88 KiB
Odin
package rexcode_mips
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// =============================================================================
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// GENERATED FILE - DO NOT EDIT
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// =============================================================================
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//
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// Generated by tools/gen_decode_tables.odin from ENCODING_TABLE.
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// Regenerate with: cd mips && odin run tools/gen_decode_tables.odin -file
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//
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Decode_Entry :: struct #packed {
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mnemonic: Mnemonic, // 2
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ops: [4]Operand_Type, // 4
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enc: [4]Operand_Encoding, // 4
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bits: u32, // 4
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mask: u32, // 4
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feature: Feature, // 1
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flags: Encoding_Flags, // 1
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}
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#assert(size_of(Decode_Entry) == 20)
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Decode_Index :: struct #packed {
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start: u16,
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count: u16,
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}
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#assert(size_of(Decode_Index) == 4)
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@(rodata)
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DECODE_ENTRIES := [783]Decode_Entry{
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{ .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} },
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{ .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} },
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{ .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} },
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{ .PAUSE, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000140, 0xFFFFFFFF, .MIPS32_R2, {} },
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{ .SLL, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x00000000, 0xFFE0003F, .MIPS_I, {} },
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{ .MOVF, {.GPR,.GPR,.FCC,.NONE}, {.RD,.RS,.FCC_BC,.NONE}, 0x00000001, 0xFC03073F, .MIPS_IV, {} },
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{ .MOVT, {.GPR,.GPR,.FCC,.NONE}, {.RD,.RS,.FCC_BC,.NONE}, 0x00010001, 0xFC03073F, .MIPS_IV, {} },
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{ .SRL, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x00000002, 0xFFE0003F, .MIPS_I, {} },
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{ .ROTR, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x00200002, 0xFFE0003F, .MIPS32_R2, {} },
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{ .SRA, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x00000003, 0xFFE0003F, .MIPS_I, {} },
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{ .SLLV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000004, 0xFC0007FF, .MIPS_I, {} },
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{ .LSA, {.GPR,.GPR,.GPR,.IMM5}, {.RD,.RS,.RT,.IMM_5}, 0x00000005, 0xFC00071F, .MIPS32_R6, {} },
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{ .SRLV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000006, 0xFC0007FF, .MIPS_I, {} },
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{ .ROTRV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000046, 0xFC0007FF, .MIPS32_R2, {} },
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{ .SRAV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000007, 0xFC0007FF, .MIPS_I, {} },
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{ .JR, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x00000008, 0xFC1FFFFF, .MIPS_I, {delay_slot=true} },
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{ .JALR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x00000009, 0xFC1F07FF, .MIPS_I, {delay_slot=true} },
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{ .MOVZ, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000000A, 0xFC0007FF, .MIPS_IV, {} },
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{ .MOVN, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000000B, 0xFC0007FF, .MIPS_IV, {} },
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{ .SYSCALL, {.IMM20,.NONE,.NONE,.NONE}, {.IMM_20,.NONE,.NONE,.NONE}, 0x0000000C, 0xFC00003F, .MIPS_I, {} },
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{ .BREAK, {.IMM20,.NONE,.NONE,.NONE}, {.IMM_20,.NONE,.NONE,.NONE}, 0x0000000D, 0xFC00003F, .MIPS_I, {} },
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{ .SYNC, {.IMM5,.NONE,.NONE,.NONE}, {.IMM_5,.NONE,.NONE,.NONE}, 0x0000000F, 0xFFFFF83F, .MIPS_II, {} },
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{ .MFHI, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x00000010, 0xFFFF07FF, .MIPS_I, {} },
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{ .MTHI, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x00000011, 0xFC1FFFFF, .MIPS_I, {} },
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{ .MFLO, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x00000012, 0xFFFF07FF, .MIPS_I, {} },
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{ .MTLO, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x00000013, 0xFC1FFFFF, .MIPS_I, {} },
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{ .DSLLV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000014, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .DLSA, {.GPR,.GPR,.GPR,.IMM5}, {.RD,.RS,.RT,.IMM_5}, 0x00000015, 0xFC00071F, .MIPS64_R6, {only_64=true} },
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{ .DSRLV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000016, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .DROTRV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000056, 0xFC0007FF, .MIPS64_R2, {only_64=true} },
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{ .DSRAV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x00000017, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .MULT, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000018, 0xFC00FFFF, .MIPS_I, {writes_hilo=true} },
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{ .MUH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000D8, 0xFC0007FF, .MIPS32_R6, {} },
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{ .MULTU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000019, 0xFC00FFFF, .MIPS_I, {writes_hilo=true} },
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{ .MULU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000099, 0xFC0007FF, .MIPS32_R6, {} },
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{ .MUHU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000D9, 0xFC0007FF, .MIPS32_R6, {} },
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{ .DIV, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001A, 0xFC00FFFF, .MIPS_I, {writes_hilo=true} },
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{ .MOD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DA, 0xFC0007FF, .MIPS32_R6, {} },
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{ .DIVU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001B, 0xFC00FFFF, .MIPS_I, {writes_hilo=true} },
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{ .MODU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DB, 0xFC0007FF, .MIPS32_R6, {} },
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{ .DMULT, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001C, 0xFC00FFFF, .MIPS_III, {only_64=true, writes_hilo=true} },
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{ .DMUL_R6, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000009C, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DMUH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DC, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DMULTU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001D, 0xFC00FFFF, .MIPS_III, {only_64=true, writes_hilo=true} },
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{ .DMULU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000009D, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DMUHU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DD, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DDIV, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001E, 0xFC00FFFF, .MIPS_III, {only_64=true, writes_hilo=true} },
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{ .DDIV_R6, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000009E, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DMOD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DE, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DDIVU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x0000001F, 0xFC00FFFF, .MIPS_III, {only_64=true, writes_hilo=true} },
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{ .DDIVU_R6, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000009F, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .DMODU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x000000DF, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .ADD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000020, 0xFC0007FF, .MIPS_I, {} },
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{ .ADDU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000021, 0xFC0007FF, .MIPS_I, {} },
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{ .SUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000022, 0xFC0007FF, .MIPS_I, {} },
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{ .SUBU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000023, 0xFC0007FF, .MIPS_I, {} },
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{ .AND, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000024, 0xFC0007FF, .MIPS_I, {} },
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{ .OR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000025, 0xFC0007FF, .MIPS_I, {} },
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{ .XOR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000026, 0xFC0007FF, .MIPS_I, {} },
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{ .NOR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000027, 0xFC0007FF, .MIPS_I, {} },
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{ .MFSA, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x00000028, 0xFFFF07FF, .MMI_PS2, {} },
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{ .MTSA, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x00000029, 0xFC1FFFFF, .MMI_PS2, {} },
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{ .SLT, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002A, 0xFC0007FF, .MIPS_I, {} },
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{ .SLTU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002B, 0xFC0007FF, .MIPS_I, {} },
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{ .DADD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002C, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .DADDU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002D, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .DSUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002E, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .DSUBU, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x0000002F, 0xFC0007FF, .MIPS_III, {only_64=true} },
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{ .TGE, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000030, 0xFC00FFFF, .MIPS_II, {} },
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{ .TGEU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000031, 0xFC00FFFF, .MIPS_II, {} },
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{ .TLT, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000032, 0xFC00FFFF, .MIPS_II, {} },
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{ .TLTU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000033, 0xFC00FFFF, .MIPS_II, {} },
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{ .TEQ, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000034, 0xFC00FFFF, .MIPS_II, {} },
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{ .SELEQZ, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000035, 0xFC0007FF, .MIPS32_R6, {} },
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{ .TNE, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x00000036, 0xFC00FFFF, .MIPS_II, {} },
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{ .SELNEZ, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x00000037, 0xFC0007FF, .MIPS32_R6, {} },
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{ .DSLL, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x00000038, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .DSRL, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0000003A, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .DROTR, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0020003A, 0xFFE0003F, .MIPS64_R2, {only_64=true} },
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{ .DSRA, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0000003B, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .DSLL32, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0000003C, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .DSRL32, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0000003E, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .DROTR32, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0020003E, 0xFFE0003F, .MIPS64_R2, {only_64=true} },
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{ .DSRA32, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x0000003F, 0xFFE0003F, .MIPS_III, {only_64=true} },
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{ .BLTZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04000000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .BGEZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04010000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .BLTZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04020000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
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{ .BGEZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04030000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
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{ .DAHI, {.GPR,.IMM16U,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x04060000, 0xFC1F0000, .MIPS64_R6, {only_64=true} },
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{ .TGEI, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x04080000, 0xFC1F0000, .MIPS_II, {} },
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{ .TGEIU, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x04090000, 0xFC1F0000, .MIPS_II, {} },
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{ .TLTI, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x040A0000, 0xFC1F0000, .MIPS_II, {} },
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{ .TLTIU, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x040B0000, 0xFC1F0000, .MIPS_II, {} },
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{ .TEQI, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x040C0000, 0xFC1F0000, .MIPS_II, {} },
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{ .TNEI, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x040E0000, 0xFC1F0000, .MIPS_II, {} },
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{ .BLTZAL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04100000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .BGEZAL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04110000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .BLTZALL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04120000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
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{ .BGEZALL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04130000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
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{ .SIGRIE, {.IMM16U,.NONE,.NONE,.NONE}, {.IMM_16,.NONE,.NONE,.NONE}, 0x04170000, 0xFFFF0000, .MIPS32_R6, {} },
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{ .MTSAB, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x04180000, 0xFC1F0000, .MMI_PS2, {} },
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{ .MTSAH, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x04190000, 0xFC1F0000, .MMI_PS2, {} },
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|
{ .BPOSGE32, {.REL16,.NONE,.NONE,.NONE}, {.BRANCH_16,.NONE,.NONE,.NONE}, 0x041C0000, 0xFFFF0000, .DSP_R1, {delay_slot=true} },
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{ .DATI, {.GPR,.IMM16U,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0x041E0000, 0xFC1F0000, .MIPS64_R6, {only_64=true} },
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|
{ .J, {.REL_J26,.NONE,.NONE,.NONE}, {.IMM_26,.NONE,.NONE,.NONE}, 0x08000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
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|
{ .JAL, {.REL_J26,.NONE,.NONE,.NONE}, {.IMM_26,.NONE,.NONE,.NONE}, 0x0C000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
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|
{ .BEQ, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x10000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
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|
{ .BNE, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x14000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
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{ .BLEZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x18000000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .BGTZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x1C000000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
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{ .ADDI, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x20000000, 0xFC000000, .MIPS_I, {} },
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{ .ADDIU, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x24000000, 0xFC000000, .MIPS_I, {} },
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{ .SLTI, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x28000000, 0xFC000000, .MIPS_I, {} },
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{ .SLTIU, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x2C000000, 0xFC000000, .MIPS_I, {} },
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{ .ANDI, {.GPR,.GPR,.IMM16U,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x30000000, 0xFC000000, .MIPS_I, {} },
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{ .ORI, {.GPR,.GPR,.IMM16U,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x34000000, 0xFC000000, .MIPS_I, {} },
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{ .XORI, {.GPR,.GPR,.IMM16U,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x38000000, 0xFC000000, .MIPS_I, {} },
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{ .LUI, {.GPR,.IMM16U,.NONE,.NONE}, {.RT,.IMM_16,.NONE,.NONE}, 0x3C000000, 0xFFE00000, .MIPS_I, {} },
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{ .AUI, {.GPR,.GPR,.IMM16U,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x3C000000, 0xFC000000, .MIPS32_R6, {} },
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{ .ERET, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000018, 0xFFFFFFFF, .MIPS_II, {} },
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{ .DERET, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x4200001F, 0xFFFFFFFF, .MIPS32_R1, {} },
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{ .TLBP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000008, 0xFFFFFFFF, .COP0, {} },
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|
{ .TLBR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000001, 0xFFFFFFFF, .COP0, {} },
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|
{ .TLBWI, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000002, 0xFFFFFFFF, .COP0, {} },
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{ .TLBWR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000006, 0xFFFFFFFF, .COP0, {} },
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|
{ .MFC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40000000, 0xFFE007F8, .COP0, {} },
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|
{ .MTC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40800000, 0xFFE007F8, .COP0, {} },
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{ .POR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000489, 0xFC0007FF, .MMI_PS2, {} },
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{ .PXOR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700004C9, 0xFC0007FF, .MMI_PS2, {} },
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{ .PNOR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700004C9, 0xFC0007FF, .MMI_PS2, {} },
|
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{ .PMULTW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000309, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PMULTH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000709, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PMADDW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000009, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PMADDH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000409, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PMSUBW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000109, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PMSUBH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000509, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PHMADH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000449, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PHMSBH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000549, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
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{ .PCPYLD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000389, 0xFC0007FF, .MMI_PS2, {} },
|
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{ .PINTH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000289, 0xFC0007FF, .MMI_PS2, {} },
|
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{ .MFHI1, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000010, 0xFFFF07FF, .MMI_PS2, {} },
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{ .MTHI1, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x70000011, 0xFC1FFFFF, .MMI_PS2, {} },
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{ .MFLO1, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000012, 0xFFFF07FF, .MMI_PS2, {} },
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{ .MTLO1, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x70000013, 0xFC1FFFFF, .MMI_PS2, {} },
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{ .MULT1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000018, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
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{ .MULTU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000019, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
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{ .DIV1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7000001A, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
|
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{ .DIVU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7000001B, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
|
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{ .CLZ, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000020, 0xFC1F07FF, .MIPS32_R1, {} },
|
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{ .MADD1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000020, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
|
|
{ .CLO, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000021, 0xFC1F07FF, .MIPS32_R1, {} },
|
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{ .MADDU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000021, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
|
|
{ .DCLZ, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000024, 0xFC1F07FF, .MIPS64_R1, {only_64=true} },
|
|
{ .DCLO, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000025, 0xFC1F07FF, .MIPS64_R1, {only_64=true} },
|
|
{ .PABSH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x70000168, 0xFC1F07FF, .MMI_PS2, {} },
|
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{ .PABSW, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x70000068, 0xFC1F07FF, .MMI_PS2, {} },
|
|
{ .PADDUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000628, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PADDUH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000528, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PADDUW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000428, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PSUBUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000668, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PSUBUH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000568, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PSUBUW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000468, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .QFSRV, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700006E8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PCEQB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700002A8, 0xFC0007FF, .MMI_PS2, {} },
|
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{ .PCEQH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700001A8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PCEQW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700000A8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PEXTUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700006A8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PEXTUH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700005A8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PEXTUW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700004A8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PMINH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700001E8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PMINW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700000E8, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PMTHI, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x70000229, 0xFC1FFFFF, .MMI_PS2, {} },
|
|
{ .PMTLO, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x70000269, 0xFC1FFFFF, .MMI_PS2, {} },
|
|
{ .PDIVUW, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000369, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
|
|
{ .PSRAVW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x700000E9, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PMULTUW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000329, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
|
{ .PMADDUW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000029, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
|
|
{ .PCPYUD, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700003A9, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PINTOH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x700002A9, 0xFC0007FF, .MMI_PS2, {} },
|
|
{ .PMFHL_LW, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000030, 0xFFFF07FF, .MMI_PS2, {} },
|
|
{ .PMFHL_UW, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000070, 0xFFFF07FF, .MMI_PS2, {} },
|
|
{ .PMFHL_LH, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x700000F0, 0xFFFF07FF, .MMI_PS2, {} },
|
|
{ .PMFHL_SH, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000130, 0xFFFF07FF, .MMI_PS2, {} },
|
|
{ .PMFHL_SLW, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x700000B0, 0xFFFF07FF, .MMI_PS2, {} },
|
|
{ .PMTHL_LW, {.GPR,.NONE,.NONE,.NONE}, {.RS,.NONE,.NONE,.NONE}, 0x70000031, 0xFC1FFFFF, .MMI_PS2, {} },
|
|
{ .PSLLH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x70000034, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .PSRLH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x70000036, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .PSRAH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x70000037, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .PSLLW, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7000003C, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .PSRLW, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7000003E, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .PSRAW, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7000003F, 0xFFE0003F, .MMI_PS2, {} },
|
|
{ .SDBBP, {.IMM20,.NONE,.NONE,.NONE}, {.IMM_20,.NONE,.NONE,.NONE}, 0x7000003F, 0xFC00003F, .MIPS32_R1, {} },
|
|
{ .DAUI, {.GPR,.GPR,.IMM16U,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x74000000, 0xFC000000, .MIPS64_R6, {only_64=true} },
|
|
{ .ADDV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800000E, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDV_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820000E, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDV_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7840000E, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDV_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7860000E, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7880000E, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBV_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78A0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBV_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78C0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBV_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78E0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79000010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79200010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79400010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79600010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79800010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79A00010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79C00010, 0xFFE0003F, .MSA, {} },
|
|
{ .ADDS_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79E00010, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78000011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78200011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78400011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78600011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78800011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78A00011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78C00011, 0xFFE0003F, .MSA, {} },
|
|
{ .SUBS_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78E00011, 0xFFE0003F, .MSA, {} },
|
|
{ .MULV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78000012, 0xFFE0003F, .MSA, {} },
|
|
{ .MULV_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78200012, 0xFFE0003F, .MSA, {} },
|
|
{ .MULV_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78400012, 0xFFE0003F, .MSA, {} },
|
|
{ .MULV_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78600012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A000012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A200012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A400012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A600012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A800012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AA00012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AC00012, 0xFFE0003F, .MSA, {} },
|
|
{ .DIV_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AE00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7B000012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7B200012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7B400012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7B600012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7B800012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7BA00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7BC00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MOD_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7BE00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MADDV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78800012, 0xFFE0003F, .MSA, {} },
|
|
{ .MADDV_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78A00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MADDV_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78C00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MADDV_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78E00012, 0xFFE0003F, .MSA, {} },
|
|
{ .MSUBV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79000012, 0xFFE0003F, .MSA, {} },
|
|
{ .MSUBV_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79200012, 0xFFE0003F, .MSA, {} },
|
|
{ .MSUBV_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79400012, 0xFFE0003F, .MSA, {} },
|
|
{ .MSUBV_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79600012, 0xFFE0003F, .MSA, {} },
|
|
{ .AND_V, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800001E, 0xFFE0003F, .MSA, {} },
|
|
{ .OR_V, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820001E, 0xFFE0003F, .MSA, {} },
|
|
{ .NOR_V, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7840001E, 0xFFE0003F, .MSA, {} },
|
|
{ .XOR_V, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7860001E, 0xFFE0003F, .MSA, {} },
|
|
{ .CEQ_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CEQ_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CEQ_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7840000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CEQ_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7860000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7900000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7920000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7940000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7960000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7980000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79A0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79C0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLT_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79E0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A00000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A20000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A40000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A60000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A80000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AA0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AC0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .CLE_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AE0000F, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A00000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A20000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A40000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A60000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7A80000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AA0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AC0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MIN_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7AE0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_S_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7900000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_S_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7920000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_S_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7940000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_S_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7960000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_U_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7980000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_U_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79A0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_U_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79C0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .MAX_U_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x79E0000E, 0xFFE0003F, .MSA, {} },
|
|
{ .SLL_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SLL_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SLL_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7840000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SLL_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7860000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRL_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7900000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRL_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7920000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRL_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7940000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRL_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7960000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRA_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7880000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRA_H, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78A0000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRA_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78C0000D, 0xFFE0003F, .MSA, {} },
|
|
{ .SRA_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x78E0000D, 0xFFE0003F, .MSA, {} },
|
|
{ .LDI_B, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B000007, 0xFFE0003F, .MSA, {} },
|
|
{ .LDI_H, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B200007, 0xFFE0003F, .MSA, {} },
|
|
{ .LDI_W, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B400007, 0xFFE0003F, .MSA, {} },
|
|
{ .LDI_D, {.MSA_VEC,.IMM5,.NONE,.NONE}, {.WD,.MSA_I5,.NONE,.NONE}, 0x7B600007, 0xFFE0003F, .MSA, {} },
|
|
{ .LD_B, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_B,.NONE,.NONE}, 0x78000020, 0xFC00003F, .MSA, {} },
|
|
{ .LD_H, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_H,.NONE,.NONE}, 0x78000021, 0xFC00003F, .MSA, {} },
|
|
{ .LD_W, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_W,.NONE,.NONE}, 0x78000022, 0xFC00003F, .MSA, {} },
|
|
{ .LD_D, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_D,.NONE,.NONE}, 0x78000023, 0xFC00003F, .MSA, {} },
|
|
{ .ST_B, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_B,.NONE,.NONE}, 0x78000024, 0xFC00003F, .MSA, {} },
|
|
{ .ST_H, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_H,.NONE,.NONE}, 0x78000025, 0xFC00003F, .MSA, {} },
|
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{ .ST_W, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_W,.NONE,.NONE}, 0x78000026, 0xFC00003F, .MSA, {} },
|
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{ .ST_D, {.MSA_VEC,.MEM,.NONE,.NONE}, {.WD,.MSA_OFFSET_BASE_D,.NONE,.NONE}, 0x78000027, 0xFC00003F, .MSA, {} },
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{ .LQ, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x78000000, 0xFC000000, .MMI_PS2, {} },
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{ .EXT, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000000, 0xFC00003F, .MIPS32_R2, {} },
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{ .SQ, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x7C000000, 0xFC000000, .MMI_PS2, {} },
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{ .DEXTM, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000001, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .DEXTU, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000002, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .DEXT, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000003, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .INS, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000004, 0xFC00003F, .MIPS32_R2, {} },
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{ .DINSM, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000005, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .DINSU, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000006, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .DINS, {.GPR,.GPR,.IMM5,.IMM5}, {.RT,.RS,.SHAMT,.RD}, 0x7C000007, 0xFC00003F, .MIPS64_R2, {only_64=true} },
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{ .LBUX, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C00018A, 0xFC0007FF, .DSP_R1, {} },
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{ .LHX, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C00010A, 0xFC0007FF, .DSP_R1, {} },
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{ .LWX, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C00000A, 0xFC0007FF, .DSP_R1, {} },
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{ .INSV, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00000C, 0xFC00FFFF, .DSP_R1, {} },
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{ .CRC32B, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00000F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32H, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00004F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32W, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00020F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32D, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00030F, 0xFC00F8FF, .MIPS64_R6, {only_64=true} },
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{ .CRC32CB, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00010F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32CH, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00014F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32CW, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00024F, 0xFC00F8FF, .MIPS32_R6, {} },
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{ .CRC32CD, {.GPR,.GPR,.NONE,.NONE}, {.RT,.RS,.NONE,.NONE}, 0x7C00034F, 0xFC00F8FF, .MIPS64_R6, {only_64=true} },
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{ .ADDQ_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000290, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDQ_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000390, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDQ_S_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000590, 0xFC0007FF, .DSP_R1, {} },
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{ .SUBQ_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0002D0, 0xFC0007FF, .DSP_R1, {} },
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{ .SUBQ_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0003D0, 0xFC0007FF, .DSP_R1, {} },
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{ .SUBQ_S_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0005D0, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDU_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000010, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDU_S_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000110, 0xFC0007FF, .DSP_R1, {} },
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{ .SUBU_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000050, 0xFC0007FF, .DSP_R1, {} },
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{ .SUBU_S_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000150, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDSC, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000410, 0xFC0007FF, .DSP_R1, {} },
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{ .ADDWC, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000450, 0xFC0007FF, .DSP_R1, {} },
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{ .PRECEQ_W_PHL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000312, 0xFFE007FF, .DSP_R1, {} },
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{ .PRECEQ_W_PHR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000352, 0xFFE007FF, .DSP_R1, {} },
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{ .PRECEQU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000112, 0xFFE007FF, .DSP_R1, {} },
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{ .PRECEQU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000152, 0xFFE007FF, .DSP_R1, {} },
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{ .PRECEU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000712, 0xFFE007FF, .DSP_R1, {} },
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{ .PRECEU_PH_QBR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000752, 0xFFE007FF, .DSP_R1, {} },
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{ .BITREV, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0006D2, 0xFFE007FF, .DSP_R2, {} },
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{ .ABSQ_S_PH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000252, 0xFFE007FF, .DSP_R1, {} },
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{ .ABSQ_S_W, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000452, 0xFFE007FF, .DSP_R1, {} },
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{ .SHLL_QB, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000013, 0xFFE0073F, .DSP_R1, {} },
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{ .SHLL_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000213, 0xFFE0073F, .DSP_R1, {} },
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{ .SHLL_S_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000313, 0xFFE0073F, .DSP_R1, {} },
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{ .SHLL_S_W, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000513, 0xFFE0073F, .DSP_R1, {} },
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{ .SHRL_QB, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000053, 0xFFE0073F, .DSP_R1, {} },
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{ .SHRA_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000253, 0xFFE0073F, .DSP_R1, {} },
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{ .SHRA_R_W, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000553, 0xFFE0073F, .DSP_R1, {} },
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{ .SHLLV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000093, 0xFC0007FF, .DSP_R1, {} },
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{ .SHRLV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0000D3, 0xFC0007FF, .DSP_R1, {} },
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{ .WSBH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0000A0, 0xFFE007FF, .MIPS32_R2, {} },
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{ .SEB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000420, 0xFFE007FF, .MIPS32_R2, {} },
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{ .SEH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000620, 0xFFE007FF, .MIPS32_R2, {} },
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{ .BITSWAP, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000020, 0xFFE007FF, .MIPS32_R6, {} },
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{ .ALIGN, {.GPR,.GPR,.GPR,.IMM5}, {.RD,.RS,.RT,.IMM_5}, 0x7C000220, 0xFC0007FF, .MIPS32_R6, {} },
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{ .DBITSWAP, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000024, 0xFFE007FF, .MIPS64_R6, {only_64=true} },
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{ .DALIGN, {.GPR,.GPR,.GPR,.IMM5}, {.RD,.RS,.RT,.IMM_5}, 0x7C000224, 0xFC0007FF, .MIPS64_R6, {only_64=true} },
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{ .MULSAQ_S_W_PH, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0001B0, 0xFC0007FF, .DSP_R1, {} },
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{ .DPAQ_S_W_PH, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000130, 0xFC0007FF, .DSP_R1, {} },
|
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{ .DPSQ_S_W_PH, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000170, 0xFC0007FF, .DSP_R1, {} },
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{ .DPAQ_SA_L_W, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000330, 0xFC0007FF, .DSP_R1, {} },
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{ .DPSQ_SA_L_W, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000370, 0xFC0007FF, .DSP_R1, {} },
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{ .DPAU_H_QBL, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0000F0, 0xFC0007FF, .DSP_R1, {} },
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{ .DPAU_H_QBR, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0001F0, 0xFC0007FF, .DSP_R1, {} },
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{ .DPSU_H_QBL, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0002F0, 0xFC0007FF, .DSP_R1, {} },
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{ .DPSU_H_QBR, {.IMM5,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0003F0, 0xFC0007FF, .DSP_R1, {} },
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{ .WRDSP, {.GPR,.IMM5,.NONE,.NONE}, {.RS,.RD,.NONE,.NONE}, 0x7C0004F8, 0xFC00FFFF, .DSP_R1, {} },
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{ .RDDSP, {.GPR,.IMM5,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x7C0004B8, 0xFC1F07FF, .DSP_R1, {} },
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{ .EXTRV_W, {.GPR,.IMM5,.GPR,.NONE}, {.RT,.RD,.RS,.NONE}, 0x7C000078, 0xFC0007FF, .DSP_R1, {} },
|
|
{ .EXTPV, {.GPR,.IMM5,.GPR,.NONE}, {.RT,.RD,.RS,.NONE}, 0x7C0000F8, 0xFC0007FF, .DSP_R1, {} },
|
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{ .EXTR_W, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C000038, 0xFC00073F, .DSP_R1, {} },
|
|
{ .EXTR_R_W, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C000138, 0xFC00073F, .DSP_R1, {} },
|
|
{ .EXTR_RS_W, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0001B8, 0xFC00073F, .DSP_R1, {} },
|
|
{ .EXTR_S_H, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0003B8, 0xFC00073F, .DSP_R1, {} },
|
|
{ .EXTP, {.GPR,.IMM5,.IMM5,.NONE}, {.RT,.RS,.RD,.NONE}, 0x7C0000B8, 0xFC00073F, .DSP_R1, {} },
|
|
{ .LB, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x80000000, 0xFC000000, .MIPS_I, {} },
|
|
{ .LH, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x84000000, 0xFC000000, .MIPS_I, {} },
|
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{ .LWL, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x88000000, 0xFC000000, .MIPS_I, {} },
|
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{ .LW, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x8C000000, 0xFC000000, .MIPS_I, {} },
|
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{ .LBU, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x90000000, 0xFC000000, .MIPS_I, {} },
|
|
{ .LHU, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x94000000, 0xFC000000, .MIPS_I, {} },
|
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{ .LWR, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x98000000, 0xFC000000, .MIPS_I, {} },
|
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{ .LWU, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x9C000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
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{ .SB, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xA0000000, 0xFC000000, .MIPS_I, {} },
|
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{ .SH, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xA4000000, 0xFC000000, .MIPS_I, {} },
|
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{ .SWL, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xA8000000, 0xFC000000, .MIPS_I, {} },
|
|
{ .SW, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xAC000000, 0xFC000000, .MIPS_I, {} },
|
|
{ .SDL, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xB0000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
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{ .SDR, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xB4000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
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{ .SWR, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xB8000000, 0xFC000000, .MIPS_I, {} },
|
|
{ .CACHE, {.IMM5,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xBC000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .LL, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xC0000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .LWC1, {.FPR_S,.MEM,.NONE,.NONE}, {.FT,.OFFSET_BASE,.NONE,.NONE}, 0xC4000000, 0xFC000000, .FPU, {} },
|
|
{ .BC, {.REL26,.NONE,.NONE,.NONE}, {.IMM_26,.NONE,.NONE,.NONE}, 0xC8000000, 0xFC000000, .MIPS32_R6, {compact=true} },
|
|
{ .LWC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xC8000000, 0xFC000000, .GTE_PS1, {} },
|
|
{ .LV_S, {.VFPU_S,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xC8000000, 0xFC000000, .VFPU_PSP, {} },
|
|
{ .PREF, {.IMM5,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xCC000000, 0xFC000000, .MIPS_IV, {} },
|
|
{ .VMOV_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0000000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VMOV_P, {.VFPU_P,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0000080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VMOV_T, {.VFPU_T,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0008000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VMOV_Q, {.VFPU_Q,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0008080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VABS_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0010000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VABS_P, {.VFPU_P,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0010080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VABS_T, {.VFPU_T,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0018000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VABS_Q, {.VFPU_Q,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0018080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNEG_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0020000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNEG_P, {.VFPU_P,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0020080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNEG_T, {.VFPU_T,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0028000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNEG_Q, {.VFPU_Q,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0028080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VSQRT_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0160000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRCP_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0100000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRCP_P, {.VFPU_P,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0100080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRCP_T, {.VFPU_T,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0108000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRCP_Q, {.VFPU_Q,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0108080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRSQ_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0110000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRSQ_P, {.VFPU_P,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0110080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRSQ_T, {.VFPU_T,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0118000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VRSQ_Q, {.VFPU_Q,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0118080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VAVG_P, {.VFPU_S,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0470080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VAVG_T, {.VFPU_S,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0478000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VAVG_Q, {.VFPU_S,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0478080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VFAD_P, {.VFPU_S,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0460080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VFAD_T, {.VFPU_S,.VFPU_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0468000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VFAD_Q, {.VFPU_S,.VFPU_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0468080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VSIN_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0120000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VCOS_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0130000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VEXP2_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0140000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VLOG2_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0150000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VASIN_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0170000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNRCP_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0180000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VNSIN_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD01A0000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VREXP2_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD01C0000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VSGN_S, {.VFPU_S,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD04A0000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VF2H_P, {.VFPU_S,.VFPU_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0320080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VH2F_S, {.VFPU_P,.VFPU_S,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xD0330000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VI2F_S, {.VFPU_S,.VFPU_S,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2800000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VI2F_P, {.VFPU_P,.VFPU_P,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2800080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VI2F_T, {.VFPU_T,.VFPU_T,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2808000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VI2F_Q, {.VFPU_Q,.VFPU_Q,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2808080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IN_S, {.VFPU_S,.VFPU_S,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2000000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IN_P, {.VFPU_P,.VFPU_P,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2000080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IN_T, {.VFPU_T,.VFPU_T,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2008000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IN_Q, {.VFPU_Q,.VFPU_Q,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2008080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IZ_S, {.VFPU_S,.VFPU_S,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2200000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IZ_P, {.VFPU_P,.VFPU_P,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2200080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IZ_T, {.VFPU_T,.VFPU_T,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2208000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IZ_Q, {.VFPU_Q,.VFPU_Q,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2208080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IU_S, {.VFPU_S,.VFPU_S,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2400000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IU_P, {.VFPU_P,.VFPU_P,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2400080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IU_T, {.VFPU_T,.VFPU_T,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2408000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2IU_Q, {.VFPU_Q,.VFPU_Q,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2408080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2ID_S, {.VFPU_S,.VFPU_S,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2600000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2ID_P, {.VFPU_P,.VFPU_P,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2600080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2ID_T, {.VFPU_T,.VFPU_T,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2608000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VF2ID_Q, {.VFPU_Q,.VFPU_Q,.IMM5,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_CONST,.NONE}, 0xD2608080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VCST_S, {.VFPU_S,.IMM5,.NONE,.NONE}, {.VFPU_VD,.VFPU_CONST,.NONE,.NONE}, 0xD0600000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VCST_P, {.VFPU_P,.IMM5,.NONE,.NONE}, {.VFPU_VD,.VFPU_CONST,.NONE,.NONE}, 0xD0600080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VCST_T, {.VFPU_T,.IMM5,.NONE,.NONE}, {.VFPU_VD,.VFPU_CONST,.NONE,.NONE}, 0xD0608000, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .VCST_Q, {.VFPU_Q,.IMM5,.NONE,.NONE}, {.VFPU_VD,.VFPU_CONST,.NONE,.NONE}, 0xD0608080, 0xFFE08080, .VFPU_PSP, {} },
|
|
{ .LLD, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xD0000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
|
{ .LVL_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xD4000002, 0xFC000002, .VFPU_PSP, {} },
|
|
{ .LVR_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xD4000000, 0xFC000002, .VFPU_PSP, {} },
|
|
{ .LDC1, {.FPR_D,.MEM,.NONE,.NONE}, {.FT,.OFFSET_BASE,.NONE,.NONE}, 0xD4000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .JIC, {.GPR,.IMM16S,.NONE,.NONE}, {.RT,.IMM_16,.NONE,.NONE}, 0xD8000000, 0xFFE00000, .MIPS32_R6, {compact=true} },
|
|
{ .BEQZC, {.GPR,.REL21,.NONE,.NONE}, {.RS,.BRANCH_21,.NONE,.NONE}, 0xD8000000, 0xFC000000, .MIPS32_R6, {compact=true} },
|
|
{ .LDC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xD8000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .LQC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xD8000000, 0xFC000000, .VU_PS2, {} },
|
|
{ .LV_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xD8000000, 0xFC000000, .VFPU_PSP, {} },
|
|
{ .VPFXS, {.IMM20,.NONE,.NONE,.NONE}, {.VFPU_PFX,.NONE,.NONE,.NONE}, 0xDC000000, 0xFFF00000, .VFPU_PSP, {} },
|
|
{ .VPFXT, {.IMM20,.NONE,.NONE,.NONE}, {.VFPU_PFX,.NONE,.NONE,.NONE}, 0xDD000000, 0xFFF00000, .VFPU_PSP, {} },
|
|
{ .VPFXD, {.IMM20,.NONE,.NONE,.NONE}, {.VFPU_PFX,.NONE,.NONE,.NONE}, 0xDE000000, 0xFFF00000, .VFPU_PSP, {} },
|
|
{ .VIIM_S, {.VFPU_S,.IMM16S,.NONE,.NONE}, {.RT,.IMM_16,.NONE,.NONE}, 0xDF000000, 0xFF800000, .VFPU_PSP, {} },
|
|
{ .VFIM_S, {.VFPU_S,.IMM16S,.NONE,.NONE}, {.RT,.IMM_16,.NONE,.NONE}, 0xDF800000, 0xFF800000, .VFPU_PSP, {} },
|
|
{ .LD, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xDC000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
|
{ .SC, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xE0000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .SWC1, {.FPR_S,.MEM,.NONE,.NONE}, {.FT,.OFFSET_BASE,.NONE,.NONE}, 0xE4000000, 0xFC000000, .FPU, {} },
|
|
{ .BALC, {.REL26,.NONE,.NONE,.NONE}, {.IMM_26,.NONE,.NONE,.NONE}, 0xE8000000, 0xFC000000, .MIPS32_R6, {compact=true} },
|
|
{ .SWC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xE8000000, 0xFC000000, .GTE_PS1, {} },
|
|
{ .SV_S, {.VFPU_S,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xE8000000, 0xFC000000, .VFPU_PSP, {} },
|
|
{ .AUIPC, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0xEC1E0000, 0xFC1F0000, .MIPS32_R6, {} },
|
|
{ .ALUIPC, {.GPR,.IMM16S,.NONE,.NONE}, {.RS,.IMM_16,.NONE,.NONE}, 0xEC1F0000, 0xFC1F0000, .MIPS32_R6, {} },
|
|
{ .VMIDT_P, {.VFPU_M_P,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3830080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMIDT_T, {.VFPU_M_T,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3838000, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMIDT_Q, {.VFPU_M_Q,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3838080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMZERO_P, {.VFPU_M_P,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3860080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMZERO_T, {.VFPU_M_T,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3868000, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMZERO_Q, {.VFPU_M_Q,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3868080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMONE_P, {.VFPU_M_P,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3870080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMONE_T, {.VFPU_M_T,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3878000, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMONE_Q, {.VFPU_M_Q,.NONE,.NONE,.NONE}, {.VFPU_VD,.NONE,.NONE,.NONE}, 0xF3878080, 0xFFFFFF80, .VFPU_PSP, {} },
|
|
{ .VMMOV_P, {.VFPU_M_P,.VFPU_M_P,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xF3800080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VMMOV_T, {.VFPU_M_T,.VFPU_M_T,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xF3808000, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VMMOV_Q, {.VFPU_M_Q,.VFPU_M_Q,.NONE,.NONE}, {.VFPU_VD,.VFPU_VS,.NONE,.NONE}, 0xF3808080, 0xFFFF8080, .VFPU_PSP, {} },
|
|
{ .VCRSP_T, {.VFPU_T,.VFPU_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF2818000, 0xFF818080, .VFPU_PSP, {} },
|
|
{ .VMMUL_P, {.VFPU_M_P,.VFPU_M_P,.VFPU_M_P,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0000080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VMMUL_T, {.VFPU_M_T,.VFPU_M_T,.VFPU_M_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0008000, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VMMUL_Q, {.VFPU_M_Q,.VFPU_M_Q,.VFPU_M_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0008080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VTFM2_P, {.VFPU_P,.VFPU_M_P,.VFPU_P,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0800080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VTFM3_T, {.VFPU_T,.VFPU_M_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0808000, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VTFM4_Q, {.VFPU_Q,.VFPU_M_Q,.VFPU_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0808080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VHTFM2_P, {.VFPU_P,.VFPU_M_P,.VFPU_P,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF0800000, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VHTFM3_T, {.VFPU_T,.VFPU_M_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF1008000, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VHTFM4_Q, {.VFPU_Q,.VFPU_M_Q,.VFPU_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF1008080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VMSCL_P, {.VFPU_M_P,.VFPU_M_P,.VFPU_S,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF2000080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VMSCL_T, {.VFPU_M_T,.VFPU_M_T,.VFPU_S,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF2008000, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VMSCL_Q, {.VFPU_M_Q,.VFPU_M_Q,.VFPU_S,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF2008080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .VQMUL_Q, {.VFPU_Q,.VFPU_Q,.VFPU_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0xF2808080, 0xFF808080, .VFPU_PSP, {} },
|
|
{ .SCD, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xF0000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
|
{ .SVL_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xF4000002, 0xFC000002, .VFPU_PSP, {} },
|
|
{ .SVR_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xF4000000, 0xFC000002, .VFPU_PSP, {} },
|
|
{ .SDC1, {.FPR_D,.MEM,.NONE,.NONE}, {.FT,.OFFSET_BASE,.NONE,.NONE}, 0xF4000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .JIALC, {.GPR,.IMM16S,.NONE,.NONE}, {.RT,.IMM_16,.NONE,.NONE}, 0xF8000000, 0xFFE00000, .MIPS32_R6, {compact=true} },
|
|
{ .BNEZC, {.GPR,.REL21,.NONE,.NONE}, {.RS,.BRANCH_21,.NONE,.NONE}, 0xF8000000, 0xFC000000, .MIPS32_R6, {compact=true} },
|
|
{ .SDC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xF8000000, 0xFC000000, .MIPS_II, {} },
|
|
{ .SQC2, {.CP2_REG,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xF8000000, 0xFC000000, .VU_PS2, {} },
|
|
{ .SV_Q, {.VFPU_Q,.MEM,.NONE,.NONE}, {.VFPU_VT_MEM,.VFPU_OFFSET_BASE,.NONE,.NONE}, 0xF8000000, 0xFC000000, .VFPU_PSP, {} },
|
|
{ .VFLUSH, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0xFFFF040D, 0xFFFFFFFF, .VFPU_PSP, {} },
|
|
{ .VSYNC, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0xFFFF0320, 0xFFFFFFFF, .VFPU_PSP, {} },
|
|
{ .VNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0xFFFF0000, 0xFFFFFFFF, .VFPU_PSP, {} },
|
|
{ .SD, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0xFC000000, 0xFC000000, .MIPS_III, {only_64=true} },
|
|
}
|
|
@(rodata)
|
|
DECODE_INDEX_PRIMARY := [64]Decode_Index{
|
|
0x00 = {0, 84},
|
|
0x01 = {84, 20},
|
|
0x02 = {104, 1},
|
|
0x03 = {105, 1},
|
|
0x04 = {106, 1},
|
|
0x05 = {107, 1},
|
|
0x06 = {108, 1},
|
|
0x07 = {109, 1},
|
|
0x08 = {110, 1},
|
|
0x09 = {111, 1},
|
|
0x0A = {112, 1},
|
|
0x0B = {113, 1},
|
|
0x0C = {114, 1},
|
|
0x0D = {115, 1},
|
|
0x0E = {116, 1},
|
|
0x0F = {117, 2},
|
|
0x10 = {119, 13},
|
|
0x11 = {132, 114},
|
|
0x12 = {246, 36},
|
|
0x13 = {282, 5},
|
|
0x14 = {287, 1},
|
|
0x15 = {288, 1},
|
|
0x16 = {289, 1},
|
|
0x17 = {290, 1},
|
|
0x18 = {291, 13},
|
|
0x19 = {304, 15},
|
|
0x1A = {319, 1},
|
|
0x1B = {320, 13},
|
|
0x1C = {333, 109},
|
|
0x1D = {442, 1},
|
|
0x1E = {443, 117},
|
|
0x1F = {560, 78},
|
|
0x20 = {638, 1},
|
|
0x21 = {639, 1},
|
|
0x22 = {640, 1},
|
|
0x23 = {641, 1},
|
|
0x24 = {642, 1},
|
|
0x25 = {643, 1},
|
|
0x26 = {644, 1},
|
|
0x27 = {645, 1},
|
|
0x28 = {646, 1},
|
|
0x29 = {647, 1},
|
|
0x2A = {648, 1},
|
|
0x2B = {649, 1},
|
|
0x2C = {650, 1},
|
|
0x2D = {651, 1},
|
|
0x2E = {652, 1},
|
|
0x2F = {653, 1},
|
|
0x30 = {654, 1},
|
|
0x31 = {655, 1},
|
|
0x32 = {656, 3},
|
|
0x33 = {659, 1},
|
|
0x34 = {660, 63},
|
|
0x35 = {723, 3},
|
|
0x36 = {726, 5},
|
|
0x37 = {731, 6},
|
|
0x38 = {737, 1},
|
|
0x39 = {738, 1},
|
|
0x3A = {739, 3},
|
|
0x3B = {742, 2},
|
|
0x3C = {744, 27},
|
|
0x3D = {771, 3},
|
|
0x3E = {774, 5},
|
|
0x3F = {779, 4},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_SPECIAL := [64]Decode_Index{
|
|
0x00 = {0, 5},
|
|
0x01 = {5, 2},
|
|
0x02 = {7, 2},
|
|
0x03 = {9, 1},
|
|
0x04 = {10, 1},
|
|
0x05 = {11, 1},
|
|
0x06 = {12, 2},
|
|
0x07 = {14, 1},
|
|
0x08 = {15, 1},
|
|
0x09 = {16, 1},
|
|
0x0A = {17, 1},
|
|
0x0B = {18, 1},
|
|
0x0C = {19, 1},
|
|
0x0D = {20, 1},
|
|
0x0F = {21, 1},
|
|
0x10 = {22, 1},
|
|
0x11 = {23, 1},
|
|
0x12 = {24, 1},
|
|
0x13 = {25, 1},
|
|
0x14 = {26, 1},
|
|
0x15 = {27, 1},
|
|
0x16 = {28, 2},
|
|
0x17 = {30, 1},
|
|
0x18 = {31, 2},
|
|
0x19 = {33, 3},
|
|
0x1A = {36, 2},
|
|
0x1B = {38, 2},
|
|
0x1C = {40, 3},
|
|
0x1D = {43, 3},
|
|
0x1E = {46, 3},
|
|
0x1F = {49, 3},
|
|
0x20 = {52, 1},
|
|
0x21 = {53, 1},
|
|
0x22 = {54, 1},
|
|
0x23 = {55, 1},
|
|
0x24 = {56, 1},
|
|
0x25 = {57, 1},
|
|
0x26 = {58, 1},
|
|
0x27 = {59, 1},
|
|
0x28 = {60, 1},
|
|
0x29 = {61, 1},
|
|
0x2A = {62, 1},
|
|
0x2B = {63, 1},
|
|
0x2C = {64, 1},
|
|
0x2D = {65, 1},
|
|
0x2E = {66, 1},
|
|
0x2F = {67, 1},
|
|
0x30 = {68, 1},
|
|
0x31 = {69, 1},
|
|
0x32 = {70, 1},
|
|
0x33 = {71, 1},
|
|
0x34 = {72, 1},
|
|
0x35 = {73, 1},
|
|
0x36 = {74, 1},
|
|
0x37 = {75, 1},
|
|
0x38 = {76, 1},
|
|
0x3A = {77, 2},
|
|
0x3B = {79, 1},
|
|
0x3C = {80, 1},
|
|
0x3E = {81, 2},
|
|
0x3F = {83, 1},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_REGIMM := [32]Decode_Index{
|
|
0x00 = {84, 1},
|
|
0x01 = {85, 1},
|
|
0x02 = {86, 1},
|
|
0x03 = {87, 1},
|
|
0x06 = {88, 1},
|
|
0x08 = {89, 1},
|
|
0x09 = {90, 1},
|
|
0x0A = {91, 1},
|
|
0x0B = {92, 1},
|
|
0x0C = {93, 1},
|
|
0x0E = {94, 1},
|
|
0x10 = {95, 1},
|
|
0x11 = {96, 1},
|
|
0x12 = {97, 1},
|
|
0x13 = {98, 1},
|
|
0x17 = {99, 1},
|
|
0x18 = {100, 1},
|
|
0x19 = {101, 1},
|
|
0x1C = {102, 1},
|
|
0x1E = {103, 1},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_COP1 := [32]Decode_Index{
|
|
0x00 = {132, 1},
|
|
0x01 = {133, 1},
|
|
0x02 = {134, 1},
|
|
0x03 = {135, 1},
|
|
0x04 = {136, 1},
|
|
0x05 = {137, 1},
|
|
0x06 = {138, 1},
|
|
0x07 = {139, 1},
|
|
0x08 = {140, 4},
|
|
0x09 = {144, 1},
|
|
0x0D = {145, 1},
|
|
0x10 = {146, 37},
|
|
0x11 = {183, 37},
|
|
0x14 = {220, 2},
|
|
0x15 = {222, 2},
|
|
0x16 = {224, 22},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_SPECIAL2 := [64]Decode_Index{
|
|
0x00 = {333, 1},
|
|
0x01 = {334, 1},
|
|
0x02 = {335, 1},
|
|
0x04 = {336, 2},
|
|
0x05 = {338, 1},
|
|
0x08 = {339, 25},
|
|
0x09 = {364, 26},
|
|
0x10 = {390, 1},
|
|
0x11 = {391, 1},
|
|
0x12 = {392, 1},
|
|
0x13 = {393, 1},
|
|
0x18 = {394, 1},
|
|
0x19 = {395, 1},
|
|
0x1A = {396, 1},
|
|
0x1B = {397, 1},
|
|
0x20 = {398, 2},
|
|
0x21 = {400, 2},
|
|
0x24 = {402, 1},
|
|
0x25 = {403, 1},
|
|
0x28 = {404, 17},
|
|
0x29 = {421, 8},
|
|
0x30 = {429, 5},
|
|
0x31 = {434, 1},
|
|
0x34 = {435, 1},
|
|
0x36 = {436, 1},
|
|
0x37 = {437, 1},
|
|
0x3C = {438, 1},
|
|
0x3E = {439, 1},
|
|
0x3F = {440, 2},
|
|
}
|
|
|
|
@(rodata)
|
|
DECODE_INDEX_SPECIAL3 := [64]Decode_Index{
|
|
0x00 = {560, 2},
|
|
0x01 = {562, 1},
|
|
0x02 = {563, 1},
|
|
0x03 = {564, 1},
|
|
0x04 = {565, 1},
|
|
0x05 = {566, 1},
|
|
0x06 = {567, 1},
|
|
0x07 = {568, 1},
|
|
0x0A = {569, 3},
|
|
0x0C = {572, 1},
|
|
0x0F = {573, 8},
|
|
0x10 = {581, 12},
|
|
0x12 = {593, 9},
|
|
0x13 = {602, 9},
|
|
0x20 = {611, 5},
|
|
0x24 = {616, 4},
|
|
0x30 = {620, 9},
|
|
0x38 = {629, 9},
|
|
}
|
|
|