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Move all ten ISA packages (x86, arm32, arm64, mips, riscv, ppc, ppc_vle, rsp, mos6502, mos65816) from core/rexcode/<arch> to core/rexcode/isa/<arch>, so the import pattern is now `import "core:rexcode/isa/x86"`. The shared core stays at core:rexcode/isa. Mechanical: relative `import "../isa"` / "../../isa" -> absolute "core:rexcode/isa" (the only path that survives the move; the "../" and "../.." self/generated imports move with their packages). build.lua now builds paths as <root>/isa/<name>; stale `cd <arch>` hints in the verify tools and the doc.odin paths updated. WASM stays at core/rexcode/wasm for now -- it is an IR, not an ISA, and will move under the forthcoming core:rexcode/ir once that layer lands. All 10 arches gen/builders/check/test green; import core:rexcode/isa/x86 verified working; wasm still compiles.
37 lines
1.3 KiB
Odin
37 lines
1.3 KiB
Odin
// rexcode · Brendan Punsky (dotbmp@github), original author
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package rexcode_ppc
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// =============================================================================
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// PowerPC RELOCATIONS
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// =============================================================================
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//
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// PowerPC has two PC-relative branch forms in the base ISA:
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//
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// * I-form b/bl/ba/bla: 24-bit signed << 2 (±32MB)
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// * B-form bc/bca/bcl/bcla: 14-bit signed << 2 (±32KB) with BO/BI fixed
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//
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// Power ISA 3.1 prefixed PC-relative loads/stores extend the displacement
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// to 34 bits via the prefix word's R=1 form, but those are normally encoded
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// via the prefixed-immediate path, not via relocations.
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//
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// PC for PowerPC is the address of the current instruction (not pc+8 like
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// ARM). The resolver subtracts the current offset.
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Relocation_Type :: enum u8 {
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NONE = 0,
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BRANCH_I_24, // I-form: LI (24-bit signed << 2 at bits 2..25 LSB)
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BRANCH_B_14, // B-form: BD (14-bit signed << 2 at bits 2..15 LSB)
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PREFIXED_34, // Power ISA 3.1: 34-bit signed at IMM18(prefix)||D(suffix)
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}
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Relocation :: struct #packed {
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offset: u32, // byte offset into code buffer
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label_id: u32,
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addend: i32,
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type: Relocation_Type,
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size: u8, // 4 (base) or 8 (prefixed)
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inst_idx: u16,
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}
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#assert(size_of(Relocation) == 16)
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