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a4f08f8307
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives in a per-arch tablegen/ metaprogram that flattens it and serializes committed binary blobs; the library #loads those into @(rodata) at compile time rather than compiling a table body. No arch keeps encoding_table.odin or decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin. * Two-stage, type-checked pipeline: tablegen Stage A emits human-readable generated Odin, which compiles and serializes the blobs in Stage B. * encode() goes through encoding_forms(m); decoders are unchanged apart from x86's flattened 2-D index. Decode tables are byte-identical to the old ones. * build.lua: a LuaJIT driver for the metaprograms, validations, and tests, with cross-platform gating and a clear report. * Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md trimmed to what was actually built. * Attribution headers added to all rexcode source files; the generators emit them so generated files keep them.
47 lines
1.4 KiB
Odin
47 lines
1.4 KiB
Odin
// rexcode · Brendan Punsky (dotbmp@github), original author
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package rexcode_arm64
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// =============================================================================
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// AArch64 RELOCATIONS
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// =============================================================================
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//
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// Per the cross-arch design (§2.4): each arch owns its own enum + struct.
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// AArch64 has several PC-relative immediate widths plus the unusual
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// ADR/ADRP pair where ADRP carries the page-aligned high bits and ADD
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// (or LDR/STR) carries the low 12. PAC, GOT, and TLS relocations are
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// follow-up work.
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Relocation_Type :: enum u8 {
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NONE = 0,
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// PC-relative branches
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B26, // 26-bit signed offset (×4) -- B / BL
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B_COND19, // 19-bit signed offset (×4) -- B.cond, CBZ/CBNZ
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TBZ14, // 14-bit signed offset (×4) -- TBZ / TBNZ
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// PC-relative addressing
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ADR_PCREL21, // ±1MB signed offset -- ADR
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ADRP_PCREL21, // ±4GB signed offset on 4K page boundary -- ADRP
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PCREL_LO12_I, // low 12 of (sym - page_of(ADRP)) -- ADD/LDR/STR after ADRP
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PCREL_LO12_S, // S-form variant if needed for store-pair-style ops
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// Load-literal (PC-relative 19-bit signed, scaled by 4)
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LDR_LITERAL19,
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// Absolute (filled by linker)
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ABS64,
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ABS32,
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ABS16,
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}
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Relocation :: struct #packed {
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offset: u32,
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label_id: u32,
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addend: i32,
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type: Relocation_Type,
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size: u8,
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inst_idx: u16,
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}
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#assert(size_of(Relocation) == 16)
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