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a4f08f8307
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives in a per-arch tablegen/ metaprogram that flattens it and serializes committed binary blobs; the library #loads those into @(rodata) at compile time rather than compiling a table body. No arch keeps encoding_table.odin or decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin. * Two-stage, type-checked pipeline: tablegen Stage A emits human-readable generated Odin, which compiles and serializes the blobs in Stage B. * encode() goes through encoding_forms(m); decoders are unchanged apart from x86's flattened 2-D index. Decode tables are byte-identical to the old ones. * build.lua: a LuaJIT driver for the metaprograms, validations, and tests, with cross-platform gating and a clear report. * Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md trimmed to what was actually built. * Attribution headers added to all rexcode source files; the generators emit them so generated files keep them.
83 lines
3.1 KiB
Odin
83 lines
3.1 KiB
Odin
// rexcode · Brendan Punsky (dotbmp@github), original author
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package rexcode_x86
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// =============================================================================
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// x86 RELOCATIONS
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// =============================================================================
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//
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// The Relocation struct shape (offset, label_id, addend, type, size,
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// inst_idx) mirrors ELF rela so a downstream object emitter can consume it
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// unchanged. Per the cross-arch design (§2.4) each arch owns its own
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// Relocation_Type values; nothing about the resolution semantics is
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// shared across architectures.
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Relocation_Type :: enum u8 {
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NONE = 0,
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REL8, // 8-bit PC-relative (short jump)
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REL32, // 32-bit PC-relative (call, jmp, RIP-relative)
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ABS32, // 32-bit absolute address
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ABS64, // 64-bit absolute address (movabs)
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}
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Relocation :: struct #packed {
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offset: u32, // byte offset in output where fixup needed
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label_id: u32, // label ID this references
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addend: i32, // addend for relocation calculation
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type: Relocation_Type,
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size: u8, // bytes to patch (1, 4, or 8)
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inst_idx: u16, // instruction index (for error reporting)
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}
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#assert(size_of(Relocation) == 16)
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// =============================================================================
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// Patch primitives
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// =============================================================================
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//
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// Byte-level write helpers for the four x86 relocation kinds. These are
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// `#force_inline` so the encoder's pass-2 dispatch collapses into one
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// straight-line block.
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// 8-bit signed PC-relative offset. Returns false if the resolved offset
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// falls outside [-128, 127]; the byte is still written (truncated) so the
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// caller can decide how to report.
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patch_pcrel_i8 :: #force_inline proc "contextless" (
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code: []u8, patch_offset: u32, target: u32, next_pc: u32, addend: i32,
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) -> bool {
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relative := i32(target) - i32(next_pc) + addend
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code[patch_offset] = u8(i8(relative))
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return relative >= -128 && relative <= 127
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}
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// 32-bit signed PC-relative offset.
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patch_pcrel_i32 :: #force_inline proc "contextless" (
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code: []u8, patch_offset: u32, target: u32, next_pc: u32, addend: i32,
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) {
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relative := i32(target) - i32(next_pc) + addend
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code[patch_offset] = u8(relative)
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code[patch_offset + 1] = u8(relative >> 8)
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code[patch_offset + 2] = u8(relative >> 16)
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code[patch_offset + 3] = u8(relative >> 24)
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}
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// 32-bit absolute address: base + target + addend.
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patch_abs32 :: #force_inline proc "contextless" (
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code: []u8, patch_offset: u32, target: u32, base_address: u64, addend: i32,
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) {
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absolute := u32(base_address) + target + u32(addend)
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code[patch_offset] = u8(absolute)
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code[patch_offset + 1] = u8(absolute >> 8)
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code[patch_offset + 2] = u8(absolute >> 16)
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code[patch_offset + 3] = u8(absolute >> 24)
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}
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// 64-bit absolute address: base + target + addend.
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patch_abs64 :: #force_inline proc "contextless" (
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code: []u8, patch_offset: u32, target: u32, base_address: u64, addend: i32,
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) {
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absolute := base_address + u64(target) + u64(addend)
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for j in u32(0)..<8 {
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code[patch_offset + j] = u8(absolute >> (j * 8))
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}
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}
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