Improve Android pause/resume behavior.

src/atomic/SDL_atomic.c

@@ -0,0 +1,118 @@
+/*
+  Simple DirectMedia Layer
+  Copyright (C) 1997-2013 Sam Lantinga <slouken@libsdl.org>
+
+  This software is provided 'as-is', without any express or implied
+  warranty.  In no event will the authors be held liable for any damages
+  arising from the use of this software.
+
+  Permission is granted to anyone to use this software for any purpose,
+  including commercial applications, and to alter it and redistribute it
+  freely, subject to the following restrictions:
+
+  1. The origin of this software must not be misrepresented; you must not
+     claim that you wrote the original software. If you use this software
+     in a product, an acknowledgment in the product documentation would be
+     appreciated but is not required.
+  2. Altered source versions must be plainly marked as such, and must not be
+     misrepresented as being the original software.
+  3. This notice may not be removed or altered from any source distribution.
+*/
+#include "SDL_config.h"
+
+#include "SDL_atomic.h"
+
+/* Note that we undefine the atomic operations here, in case they are
+   defined as compiler intrinsics while building SDL but the library user
+   doesn't have that compiler.  That way we always have a working set of
+   atomic operations built into the library.
+*/
+#undef SDL_AtomicCAS
+#undef SDL_AtomicCASPtr
+
+/*
+  If any of the operations are not provided then we must emulate some
+  of them. That means we need a nice implementation of spin locks
+  that avoids the "one big lock" problem. We use a vector of spin
+  locks and pick which one to use based on the address of the operand
+  of the function.
+
+  To generate the index of the lock we first shift by 3 bits to get
+  rid on the zero bits that result from 32 and 64 bit allignment of
+  data. We then mask off all but 5 bits and use those 5 bits as an
+  index into the table.
+
+  Picking the lock this way insures that accesses to the same data at
+  the same time will go to the same lock. OTOH, accesses to different
+  data have only a 1/32 chance of hitting the same lock. That should
+  pretty much eliminate the chances of several atomic operations on
+  different data from waiting on the same "big lock". If it isn't
+  then the table of locks can be expanded to a new size so long as
+  the new size is a power of two.
+
+  Contributed by Bob Pendleton, bob@pendleton.com
+*/
+
+static SDL_SpinLock locks[32];
+
+static SDL_INLINE void
+enterLock(void *a)
+{
+    uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
+
+    SDL_AtomicLock(&locks[index]);
+}
+
+static SDL_INLINE void
+leaveLock(void *a)
+{
+    uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
+
+    SDL_AtomicUnlock(&locks[index]);
+}
+
+DECLSPEC SDL_bool SDLCALL
+SDL_AtomicCAS(SDL_atomic_t *a, int oldval, int newval)
+{
+    SDL_bool retval = SDL_FALSE;
+
+    enterLock(a);
+    if (a->value == oldval) {
+        a->value = newval;
+        retval = SDL_TRUE;
+    }
+    leaveLock(a);
+
+    return retval;
+}
+
+DECLSPEC SDL_bool SDLCALL
+SDL_AtomicCASPtr(void **a, void *oldval, void *newval)
+{
+    SDL_bool retval = SDL_FALSE;
+
+    enterLock(a);
+    if (*a == oldval) {
+        *a = newval;
+        retval = SDL_TRUE;
+    }
+    leaveLock(a);
+
+    return retval;
+}
+
+#if defined(__GNUC__) && defined(__arm__) && \
+   (defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__))
+__asm__(
+"   .align 2\n"
+"   .globl _SDL_MemoryBarrierRelease\n"
+"   .globl _SDL_MemoryBarrierAcquire\n"
+"_SDL_MemoryBarrierRelease:\n"
+"_SDL_MemoryBarrierAcquire:\n"
+"   mov r0, #0\n"
+"   mcr p15, 0, r0, c7, c10, 5\n"
+"   bx lr\n"
+);
+#endif /* __GNUC__ && __arm__ && ARMV6 */
+
+/* vi: set ts=4 sw=4 expandtab: */

src/atomic/SDL_spinlock.c

@@ -0,0 +1,126 @@
+/*
+  Simple DirectMedia Layer
+  Copyright (C) 1997-2013 Sam Lantinga <slouken@libsdl.org>
+
+  This software is provided 'as-is', without any express or implied
+  warranty.  In no event will the authors be held liable for any damages
+  arising from the use of this software.
+
+  Permission is granted to anyone to use this software for any purpose,
+  including commercial applications, and to alter it and redistribute it
+  freely, subject to the following restrictions:
+
+  1. The origin of this software must not be misrepresented; you must not
+     claim that you wrote the original software. If you use this software
+     in a product, an acknowledgment in the product documentation would be
+     appreciated but is not required.
+  2. Altered source versions must be plainly marked as such, and must not be
+     misrepresented as being the original software.
+  3. This notice may not be removed or altered from any source distribution.
+*/
+#include "SDL_config.h"
+
+#ifdef __WIN32__
+#include "../core/windows/SDL_windows.h"
+#endif
+
+#include "SDL_atomic.h"
+#include "SDL_mutex.h"
+#include "SDL_timer.h"
+
+
+/* This function is where all the magic happens... */
+SDL_bool
+SDL_AtomicTryLock(SDL_SpinLock *lock)
+{
+#if SDL_ATOMIC_DISABLED
+    /* Terrible terrible damage */
+    static SDL_mutex *_spinlock_mutex;
+
+    if (!_spinlock_mutex) {
+        /* Race condition on first lock... */
+        _spinlock_mutex = SDL_CreateMutex();
+    }
+    SDL_LockMutex(_spinlock_mutex);
+    if (*lock == 0) {
+        *lock = 1;
+        SDL_UnlockMutex(_spinlock_mutex);
+        return SDL_TRUE;
+    } else {
+        SDL_UnlockMutex(_spinlock_mutex);
+        return SDL_FALSE;
+    }
+
+#elif defined(_MSC_VER)
+    SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long));
+    return (InterlockedExchange((long*)lock, 1) == 0);
+
+#elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
+    return (__sync_lock_test_and_set(lock, 1) == 0);
+
+#elif defined(__GNUC__) && defined(__arm__) && \
+        (defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) || \
+         defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5TE__) || \
+         defined(__ARM_ARCH_5TEJ__))
+    int result;
+    __asm__ __volatile__ (
+        "swp %0, %1, [%2]\n"
+        : "=&r,&r" (result) : "r,0" (1), "r,r" (lock) : "memory");
+    return (result == 0);
+
+#elif defined(__GNUC__) && defined(__arm__)
+    int result;
+    __asm__ __volatile__ (
+        "ldrex %0, [%2]\nteq   %0, #0\nstrexeq %0, %1, [%2]"
+        : "=&r" (result) : "r" (1), "r" (lock) : "cc", "memory");
+    return (result == 0);
+
+#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+    int result;
+    __asm__ __volatile__(
+        "lock ; xchgl %0, (%1)\n"
+        : "=r" (result) : "r" (lock), "0" (1) : "cc", "memory");
+    return (result == 0);
+
+#elif defined(__MACOSX__) || defined(__IPHONEOS__)
+    /* Maybe used for PowerPC, but the Intel asm or gcc atomics are favored. */
+    return OSAtomicCompareAndSwap32Barrier(0, 1, lock);
+
+#elif HAVE_PTHREAD_SPINLOCK
+    /* pthread instructions */
+    return (pthread_spin_trylock(lock) == 0);
+
+#else
+#error Please implement for your platform.
+    return SDL_FALSE;
+#endif
+}
+
+void
+SDL_AtomicLock(SDL_SpinLock *lock)
+{
+    /* FIXME: Should we have an eventual timeout? */
+    while (!SDL_AtomicTryLock(lock)) {
+        SDL_Delay(0);
+    }
+}
+
+void
+SDL_AtomicUnlock(SDL_SpinLock *lock)
+{
+#if defined(_MSC_VER)
+    _ReadWriteBarrier();
+    *lock = 0;
+
+#elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
+    __sync_lock_release(lock);
+
+#elif HAVE_PTHREAD_SPINLOCK
+    pthread_spin_unlock(lock);
+
+#else
+    *lock = 0;
+#endif
+}
+
+/* vi: set ts=4 sw=4 expandtab: */