mirror of
https://github.com/libsdl-org/SDL.git
synced 2026-03-01 06:38:20 +00:00
1271 lines
40 KiB
C
1271 lines
40 KiB
C
/*
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Simple DirectMedia Layer
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Copyright (C) 1997-2026 Sam Lantinga <slouken@libsdl.org>
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not
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claim that you wrote the original software. If you use this software
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in a product, an acknowledgment in the product documentation would be
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appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be
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misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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*/
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#include "SDL_internal.h"
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#include "SDL_cpuinfo_c.h"
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#if defined(SDL_PLATFORM_WINDOWS)
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#include "../core/windows/SDL_windows.h"
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#endif
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// CPU feature detection for SDL
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#if defined(HAVE_GETPAGESIZE) && !defined(SDL_PLATFORM_WINDOWS)
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#define USE_GETPAGESIZE
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#endif
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#if defined(HAVE_SYSCONF) || defined(USE_GETPAGESIZE)
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#include <unistd.h>
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#endif
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#ifdef HAVE_SYSCTLBYNAME
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#if defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))
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#include <sys/sysctl.h> // For AltiVec check
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#elif defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__) && !defined(HAVE_ELF_AUX_INFO)
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#include <sys/types.h>
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#include <sys/sysctl.h> // For AltiVec check
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#include <machine/cpu.h>
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#elif defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__) && defined(HAVE_ELF_AUX_INFO)
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#include <machine/cpu.h>
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#elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
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#include <signal.h>
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#include <setjmp.h>
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#endif
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#if (defined(SDL_PLATFORM_LINUX) || defined(SDL_PLATFORM_ANDROID)) && defined(__arm__)
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <elf.h>
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// #include <asm/hwcap.h>
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#ifndef AT_HWCAP
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#define AT_HWCAP 16
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#endif
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#ifndef AT_PLATFORM
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#define AT_PLATFORM 15
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#endif
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#ifndef HWCAP_NEON
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#define HWCAP_NEON (1 << 12)
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#endif
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#endif
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#if defined (SDL_PLATFORM_FREEBSD)
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#include <sys/param.h>
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#endif
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#if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO) || defined(SDL_PLATFORM_ANDROID)
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#include <sys/auxv.h>
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#endif
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#ifdef SDL_PLATFORM_RISCOS
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#include <kernel.h>
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#include <swis.h>
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#endif
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#ifdef SDL_PLATFORM_3DS
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#include <3ds.h>
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#endif
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#ifdef SDL_PLATFORM_PS2
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#include <kernel.h>
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#endif
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#ifdef SDL_PLATFORM_HAIKU
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#include <kernel/OS.h>
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#endif
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#define CPU_HAS_ALTIVEC (1 << 0)
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#define CPU_HAS_MMX (1 << 1)
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#define CPU_HAS_SSE (1 << 2)
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#define CPU_HAS_SSE2 (1 << 3)
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#define CPU_HAS_SSE3 (1 << 4)
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#define CPU_HAS_SSE41 (1 << 5)
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#define CPU_HAS_SSE42 (1 << 6)
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#define CPU_HAS_AVX (1 << 7)
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#define CPU_HAS_AVX2 (1 << 8)
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#define CPU_HAS_NEON (1 << 9)
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#define CPU_HAS_AVX512F (1 << 10)
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#define CPU_HAS_ARM_SIMD (1 << 11)
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#define CPU_HAS_LSX (1 << 12)
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#define CPU_HAS_LASX (1 << 13)
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#define CPU_CFG2 0x2
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#define CPU_CFG2_LSX (1 << 6)
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#define CPU_CFG2_LASX (1 << 7)
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#if !defined(SDL_CPUINFO_DISABLED) && \
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!((defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))) || (defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__))) && \
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!(defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__)) && \
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!(defined(SDL_PLATFORM_LINUX) && defined(__powerpc__) && defined(HAVE_GETAUXVAL)) && \
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defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
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/* This is the brute force way of detecting instruction sets...
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the idea is borrowed from the libmpeg2 library - thanks!
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*/
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static jmp_buf jmpbuf;
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static void illegal_instruction(int sig)
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{
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longjmp(jmpbuf, 1);
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}
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#endif // HAVE_SETJMP
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static int CPU_haveCPUID(void)
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{
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int has_CPUID = 0;
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/* *INDENT-OFF* */ // clang-format off
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#ifndef SDL_PLATFORM_EMSCRIPTEN
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#if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
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__asm__ (
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" pushfl # Get original EFLAGS \n"
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" popl %%eax \n"
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" movl %%eax,%%ecx \n"
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" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
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" pushl %%eax # Save new EFLAGS value on stack \n"
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" popfl # Replace current EFLAGS value \n"
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" pushfl # Get new EFLAGS \n"
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" popl %%eax # Store new EFLAGS in EAX \n"
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" xorl %%ecx,%%eax # Can not toggle ID bit, \n"
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" jz 1f # Processor=80486 \n"
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" movl $1,%0 # We have CPUID support \n"
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"1: \n"
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: "=m" (has_CPUID)
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:
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: "%eax", "%ecx"
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);
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#elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
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/* Technically, if this is being compiled under __x86_64__ then it has
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CPUid by definition. But it's nice to be able to prove it. :) */
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__asm__ (
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" pushfq # Get original EFLAGS \n"
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" popq %%rax \n"
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" movq %%rax,%%rcx \n"
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" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
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" pushq %%rax # Save new EFLAGS value on stack \n"
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" popfq # Replace current EFLAGS value \n"
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" pushfq # Get new EFLAGS \n"
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" popq %%rax # Store new EFLAGS in EAX \n"
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" xorl %%ecx,%%eax # Can not toggle ID bit, \n"
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" jz 1f # Processor=80486 \n"
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" movl $1,%0 # We have CPUID support \n"
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"1: \n"
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: "=m" (has_CPUID)
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:
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: "%rax", "%rcx"
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);
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#elif defined(_MSC_VER) && defined(_M_IX86)
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__asm {
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pushfd ; Get original EFLAGS
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pop eax
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mov ecx, eax
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xor eax, 200000h ; Flip ID bit in EFLAGS
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push eax ; Save new EFLAGS value on stack
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popfd ; Replace current EFLAGS value
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pushfd ; Get new EFLAGS
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pop eax ; Store new EFLAGS in EAX
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xor eax, ecx ; Can not toggle ID bit,
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jz done ; Processor=80486
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mov has_CPUID,1 ; We have CPUID support
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done:
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}
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#elif defined(_MSC_VER) && defined(_M_X64)
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has_CPUID = 1;
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#elif defined(__sun) && defined(__i386)
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__asm (
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" pushfl \n"
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" popl %eax \n"
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" movl %eax,%ecx \n"
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" xorl $0x200000,%eax \n"
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" pushl %eax \n"
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" popfl \n"
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" pushfl \n"
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" popl %eax \n"
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" xorl %ecx,%eax \n"
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" jz 1f \n"
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" movl $1,-8(%ebp) \n"
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"1: \n"
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);
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#elif defined(__sun) && defined(__amd64)
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__asm (
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" pushfq \n"
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" popq %rax \n"
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" movq %rax,%rcx \n"
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" xorl $0x200000,%eax \n"
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" pushq %rax \n"
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" popfq \n"
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" pushfq \n"
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" popq %rax \n"
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" xorl %ecx,%eax \n"
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" jz 1f \n"
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" movl $1,-8(%rbp) \n"
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"1: \n"
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);
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#endif
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#endif // !SDL_PLATFORM_EMSCRIPTEN
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/* *INDENT-ON* */ // clang-format on
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return has_CPUID;
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}
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#if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
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#define cpuid(func, a, b, c, d) \
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__asm__ __volatile__( \
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" pushl %%ebx \n" \
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" xorl %%ecx,%%ecx \n" \
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" cpuid \n" \
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" movl %%ebx, %%esi \n" \
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" popl %%ebx \n" \
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: "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
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: "a"(func))
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#elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
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#define cpuid(func, a, b, c, d) \
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__asm__ __volatile__( \
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" pushq %%rbx \n" \
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" xorq %%rcx,%%rcx \n" \
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" cpuid \n" \
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" movq %%rbx, %%rsi \n" \
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" popq %%rbx \n" \
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: "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
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: "a"(func))
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#elif defined(_MSC_VER) && defined(_M_IX86)
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#define cpuid(func, a, b, c, d) \
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__asm { \
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__asm mov eax, func \
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__asm xor ecx, ecx \
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__asm cpuid \
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__asm mov a, eax \
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__asm mov b, ebx \
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__asm mov c, ecx \
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__asm mov d, edx \
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}
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#elif (defined(_MSC_VER) && defined(_M_X64))
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// Use __cpuidex instead of __cpuid because ICL does not clear ecx register
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#define cpuid(func, a, b, c, d) \
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{ \
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int CPUInfo[4]; \
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__cpuidex(CPUInfo, func, 0); \
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a = CPUInfo[0]; \
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b = CPUInfo[1]; \
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c = CPUInfo[2]; \
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d = CPUInfo[3]; \
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}
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#else
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#define cpuid(func, a, b, c, d) \
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do { \
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a = b = c = d = 0; \
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(void)a; \
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(void)b; \
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(void)c; \
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(void)d; \
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} while (0)
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#endif
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static int CPU_CPUIDFeatures[4];
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static int CPU_CPUIDMaxFunction = 0;
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static bool CPU_OSSavesYMM = false;
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static bool CPU_OSSavesZMM = false;
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static void CPU_calcCPUIDFeatures(void)
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{
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static bool checked = false;
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if (!checked) {
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checked = true;
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if (CPU_haveCPUID()) {
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int a, b, c, d;
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cpuid(0, a, b, c, d);
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CPU_CPUIDMaxFunction = a;
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if (CPU_CPUIDMaxFunction >= 1) {
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cpuid(1, a, b, c, d);
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CPU_CPUIDFeatures[0] = a;
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CPU_CPUIDFeatures[1] = b;
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CPU_CPUIDFeatures[2] = c;
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CPU_CPUIDFeatures[3] = d;
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// Check to make sure we can call xgetbv
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if (c & 0x08000000) {
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// Call xgetbv to see if YMM (etc) register state is saved
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#if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
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__asm__(".byte 0x0f, 0x01, 0xd0"
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: "=a"(a)
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: "c"(0)
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: "%edx");
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#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) // VS2010 SP1
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a = (int)_xgetbv(0);
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#elif defined(_MSC_VER) && defined(_M_IX86)
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__asm
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{
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xor ecx, ecx
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_asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
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mov a, eax
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}
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#endif
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CPU_OSSavesYMM = ((a & 6) == 6) ? true : false;
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CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? true : false;
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}
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}
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}
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}
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}
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static int CPU_haveAltiVec(void)
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{
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volatile int altivec = 0;
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#ifndef SDL_CPUINFO_DISABLED
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#if (defined(SDL_PLATFORM_FREEBSD) || defined(SDL_PLATFORM_OPENBSD)) && defined(__powerpc__) && defined(HAVE_ELF_AUX_INFO)
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unsigned long cpufeatures = 0;
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elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
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altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
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return altivec;
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#elif (defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))) || (defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__))
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#ifdef SDL_PLATFORM_OPENBSD
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int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
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#else
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int selectors[2] = { CTL_HW, HW_VECTORUNIT };
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#endif
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int hasVectorUnit = 0;
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size_t length = sizeof(hasVectorUnit);
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int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
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if (0 == error) {
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altivec = (hasVectorUnit != 0);
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}
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#elif defined(SDL_PLATFORM_LINUX) && defined(__powerpc__) && defined(HAVE_GETAUXVAL)
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altivec = getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC;
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#elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
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void (*handler)(int sig);
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handler = signal(SIGILL, illegal_instruction);
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if (setjmp(jmpbuf) == 0) {
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asm volatile("mtspr 256, %0\n\t"
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"vand %%v0, %%v0, %%v0" ::"r"(-1));
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altivec = 1;
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}
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signal(SIGILL, handler);
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#endif
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#endif
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return altivec;
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}
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#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
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static int CPU_haveARMSIMD(void)
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{
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return 1;
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}
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#elif !defined(__arm__)
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static int CPU_haveARMSIMD(void)
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{
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return 0;
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}
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#elif defined(SDL_PLATFORM_LINUX)
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static int CPU_haveARMSIMD(void)
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{
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int arm_simd = 0;
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int fd;
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fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
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if (fd >= 0) {
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Elf32_auxv_t aux;
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while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
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if (aux.a_type == AT_PLATFORM) {
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const char *plat = (const char *)aux.a_un.a_val;
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if (plat) {
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arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
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SDL_strncmp(plat, "v7l", 3) == 0;
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}
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}
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}
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close(fd);
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}
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return arm_simd;
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}
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#elif defined(SDL_PLATFORM_RISCOS)
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static int CPU_haveARMSIMD(void)
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{
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_kernel_swi_regs regs;
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regs.r[0] = 0;
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if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) != NULL) {
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return 0;
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}
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if (!(regs.r[0] & (1 << 31))) {
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return 0;
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}
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regs.r[0] = 34;
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regs.r[1] = 29;
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if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) != NULL) {
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return 0;
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}
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return regs.r[0];
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}
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#elif defined(SDL_PLATFORM_NGAGE)
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static int CPU_haveARMSIMD(void)
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{
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// The RM920T is based on the ARMv4T architecture and doesn't have SIMD.
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return 0;
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}
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#else
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static int CPU_haveARMSIMD(void)
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{
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#warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
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return 0;
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}
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#endif
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#if defined(SDL_PLATFORM_LINUX) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
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static int readProcAuxvForNeon(void)
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{
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int neon = 0;
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int fd;
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fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
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if (fd >= 0) {
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Elf32_auxv_t aux;
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while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
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if (aux.a_type == AT_HWCAP) {
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neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
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break;
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}
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}
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close(fd);
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}
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return neon;
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}
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#endif
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static int CPU_haveNEON(void)
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{
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/* The way you detect NEON is a privileged instruction on ARM, so you have
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query the OS kernel in a platform-specific way. :/ */
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|
#if defined(SDL_PLATFORM_WINDOWS) && (defined(_M_ARM) || defined(_M_ARM64))
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|
// Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first.
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|
// Seems to have been removed
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|
#ifndef PF_ARM_NEON_INSTRUCTIONS_AVAILABLE
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|
#define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
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#endif
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|
// All WinRT ARM devices are required to support NEON, but just in case.
|
|
return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
|
|
#elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
|
|
return 1; // ARMv8 always has non-optional NEON support.
|
|
#elif defined(SDL_PLATFORM_VITA)
|
|
return 1;
|
|
#elif defined(SDL_PLATFORM_3DS)
|
|
return 0;
|
|
#elif defined(SDL_PLATFORM_NGAGE)
|
|
return 0; // The ARM920T is based on the ARMv4T architecture and doesn't have NEON.
|
|
#elif defined(SDL_PLATFORM_APPLE) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
|
|
// (note that sysctlbyname("hw.optional.neon") doesn't work!)
|
|
return 1; // all Apple ARMv7 chips and later have NEON.
|
|
#elif defined(SDL_PLATFORM_APPLE)
|
|
return 0; // assume anything else from Apple doesn't have NEON.
|
|
#elif !defined(__arm__)
|
|
return 0; // not an ARM CPU at all.
|
|
#elif defined(HAVE_ELF_AUX_INFO)
|
|
unsigned long hasneon = 0;
|
|
if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0) {
|
|
return 0;
|
|
}
|
|
return (hasneon & HWCAP_NEON) == HWCAP_NEON;
|
|
#elif (defined(SDL_PLATFORM_LINUX) && defined(HAVE_GETAUXVAL)) || defined(SDL_PLATFORM_ANDROID)
|
|
return (getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON;
|
|
#elif defined(SDL_PLATFORM_LINUX)
|
|
return readProcAuxvForNeon();
|
|
#elif defined(SDL_PLATFORM_RISCOS)
|
|
// Use the VFPSupport_Features SWI to access the MVFR registers
|
|
{
|
|
_kernel_swi_regs regs;
|
|
regs.r[0] = 0;
|
|
if (_kernel_swi(VFPSupport_Features, ®s, ®s) == NULL) {
|
|
if ((regs.r[2] & 0xFFF000) == 0x111000) {
|
|
return 1;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
#elif defined(SDL_PLATFORM_OPENBSD)
|
|
return 1; // OpenBSD only supports ARMv7 CPUs that have NEON.
|
|
#elif defined(SDL_PLATFORM_EMSCRIPTEN)
|
|
return 0;
|
|
#else
|
|
#warning SDL_HasNEON is not implemented for this ARM platform. Write me.
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
static int CPU_readCPUCFG(void)
|
|
{
|
|
uint32_t cfg2 = 0;
|
|
#if defined __loongarch__
|
|
__asm__ volatile(
|
|
"cpucfg %0, %1 \n\t"
|
|
: "+&r"(cfg2)
|
|
: "r"(CPU_CFG2));
|
|
#endif
|
|
return cfg2;
|
|
}
|
|
|
|
#define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
|
|
#define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
|
|
|
|
#ifdef __e2k__
|
|
#ifdef __MMX__
|
|
#define CPU_haveMMX() (1)
|
|
#else
|
|
#define CPU_haveMMX() (0)
|
|
#endif
|
|
#ifdef __SSE__
|
|
#define CPU_haveSSE() (1)
|
|
#else
|
|
#define CPU_haveSSE() (0)
|
|
#endif
|
|
#ifdef __SSE2__
|
|
#define CPU_haveSSE2() (1)
|
|
#else
|
|
#define CPU_haveSSE2() (0)
|
|
#endif
|
|
#ifdef __SSE3__
|
|
#define CPU_haveSSE3() (1)
|
|
#else
|
|
#define CPU_haveSSE3() (0)
|
|
#endif
|
|
#ifdef __SSE4_1__
|
|
#define CPU_haveSSE41() (1)
|
|
#else
|
|
#define CPU_haveSSE41() (0)
|
|
#endif
|
|
#ifdef __SSE4_2__
|
|
#define CPU_haveSSE42() (1)
|
|
#else
|
|
#define CPU_haveSSE42() (0)
|
|
#endif
|
|
#ifdef __AVX__
|
|
#define CPU_haveAVX() (1)
|
|
#else
|
|
#define CPU_haveAVX() (0)
|
|
#endif
|
|
#else
|
|
#define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
|
|
#define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
|
|
#define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
|
|
#define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
|
|
#define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
|
|
#define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
|
|
#define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
|
|
#endif
|
|
|
|
#ifdef __e2k__
|
|
inline int
|
|
CPU_haveAVX2(void)
|
|
{
|
|
#ifdef __AVX2__
|
|
return 1;
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
#else
|
|
static int CPU_haveAVX2(void)
|
|
{
|
|
if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
|
|
int a, b, c, d;
|
|
(void)a;
|
|
(void)b;
|
|
(void)c;
|
|
(void)d; // compiler warnings...
|
|
cpuid(7, a, b, c, d);
|
|
return b & 0x00000020;
|
|
}
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef __e2k__
|
|
inline int
|
|
CPU_haveAVX512F(void)
|
|
{
|
|
return 0;
|
|
}
|
|
#else
|
|
static int CPU_haveAVX512F(void)
|
|
{
|
|
if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
|
|
int a, b, c, d;
|
|
(void)a;
|
|
(void)b;
|
|
(void)c;
|
|
(void)d; // compiler warnings...
|
|
cpuid(7, a, b, c, d);
|
|
return b & 0x00010000;
|
|
}
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int SDL_NumLogicalCPUCores = 0;
|
|
|
|
int SDL_GetNumLogicalCPUCores(void)
|
|
{
|
|
if (!SDL_NumLogicalCPUCores) {
|
|
#if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
|
|
if (SDL_NumLogicalCPUCores <= 0) {
|
|
SDL_NumLogicalCPUCores = (int)sysconf(_SC_NPROCESSORS_ONLN);
|
|
}
|
|
#endif
|
|
#ifdef HAVE_SYSCTLBYNAME
|
|
if (SDL_NumLogicalCPUCores <= 0) {
|
|
size_t size = sizeof(SDL_NumLogicalCPUCores);
|
|
sysctlbyname("hw.ncpu", &SDL_NumLogicalCPUCores, &size, NULL, 0);
|
|
}
|
|
#endif
|
|
#if defined(SDL_PLATFORM_WINDOWS)
|
|
if (SDL_NumLogicalCPUCores <= 0) {
|
|
SYSTEM_INFO info;
|
|
GetSystemInfo(&info);
|
|
SDL_NumLogicalCPUCores = info.dwNumberOfProcessors;
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_3DS
|
|
if (SDL_NumLogicalCPUCores <= 0) {
|
|
bool isNew3DS = false;
|
|
APT_CheckNew3DS(&isNew3DS);
|
|
// 1 core is always dedicated to the OS
|
|
// Meaning that the New3DS has 3 available core, and the Old3DS only one.
|
|
SDL_NumLogicalCPUCores = isNew3DS ? 4 : 2;
|
|
}
|
|
#endif
|
|
// There has to be at least 1, right? :)
|
|
if (SDL_NumLogicalCPUCores <= 0) {
|
|
SDL_NumLogicalCPUCores = 1;
|
|
}
|
|
}
|
|
return SDL_NumLogicalCPUCores;
|
|
}
|
|
|
|
#ifdef __e2k__
|
|
inline const char *
|
|
SDL_GetCPUType(void)
|
|
{
|
|
static char SDL_CPUType[13];
|
|
|
|
SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
|
|
|
|
return SDL_CPUType;
|
|
}
|
|
#else
|
|
// Oh, such a sweet sweet trick, just not very useful. :)
|
|
static const char *SDL_GetCPUType(void)
|
|
{
|
|
static char SDL_CPUType[13];
|
|
|
|
if (!SDL_CPUType[0]) {
|
|
int i = 0;
|
|
|
|
CPU_calcCPUIDFeatures();
|
|
if (CPU_CPUIDMaxFunction > 0) { // do we have CPUID at all?
|
|
int a, b, c, d;
|
|
cpuid(0x00000000, a, b, c, d);
|
|
(void)a;
|
|
SDL_CPUType[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUType[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUType[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUType[i++] = (char)(b & 0xff);
|
|
|
|
SDL_CPUType[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUType[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUType[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUType[i++] = (char)(d & 0xff);
|
|
|
|
SDL_CPUType[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUType[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUType[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUType[i++] = (char)(c & 0xff);
|
|
}
|
|
if (!SDL_CPUType[0]) {
|
|
SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
|
|
}
|
|
}
|
|
return SDL_CPUType;
|
|
}
|
|
#endif
|
|
|
|
#if 0
|
|
!!! FIXME: Not used at the moment. */
|
|
#ifdef __e2k__
|
|
inline const char *
|
|
SDL_GetCPUName(void)
|
|
{
|
|
static char SDL_CPUName[48];
|
|
|
|
SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
|
|
|
|
return SDL_CPUName;
|
|
}
|
|
#else
|
|
static const char *SDL_GetCPUName(void)
|
|
{
|
|
static char SDL_CPUName[48];
|
|
|
|
if (!SDL_CPUName[0]) {
|
|
int i = 0;
|
|
int a, b, c, d;
|
|
|
|
CPU_calcCPUIDFeatures();
|
|
if (CPU_CPUIDMaxFunction > 0) { // do we have CPUID at all?
|
|
cpuid(0x80000000, a, b, c, d);
|
|
if (a >= 0x80000004) {
|
|
cpuid(0x80000002, a, b, c, d);
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
cpuid(0x80000003, a, b, c, d);
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
cpuid(0x80000004, a, b, c, d);
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(a & 0xff);
|
|
a >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(b & 0xff);
|
|
b >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(c & 0xff);
|
|
c >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
SDL_CPUName[i++] = (char)(d & 0xff);
|
|
d >>= 8;
|
|
}
|
|
}
|
|
if (!SDL_CPUName[0]) {
|
|
SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
|
|
}
|
|
}
|
|
return SDL_CPUName;
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
int SDL_GetCPUCacheLineSize(void)
|
|
{
|
|
const char *cpuType = SDL_GetCPUType();
|
|
int cacheline_size = SDL_CACHELINE_SIZE; // initial guess
|
|
int a, b, c, d;
|
|
(void)a;
|
|
(void)b;
|
|
(void)c;
|
|
(void)d;
|
|
if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
|
|
cpuid(0x00000001, a, b, c, d);
|
|
cacheline_size = ((b >> 8) & 0xff) * 8;
|
|
} else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
|
|
cpuid(0x80000005, a, b, c, d);
|
|
cacheline_size = c & 0xff;
|
|
} else {
|
|
#if defined(HAVE_SYSCONF) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
|
if ((cacheline_size = (int)sysconf(_SC_LEVEL1_DCACHE_LINESIZE)) > 0) {
|
|
return cacheline_size;
|
|
} else {
|
|
cacheline_size = SDL_CACHELINE_SIZE;
|
|
}
|
|
#endif
|
|
#if defined(SDL_PLATFORM_LINUX)
|
|
{
|
|
FILE *f = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
|
|
if (f) {
|
|
int size;
|
|
if (fscanf(f, "%d", &size) == 1) {
|
|
cacheline_size = size;
|
|
}
|
|
fclose(f);
|
|
}
|
|
}
|
|
#elif defined(__FREEBSD__) && defined(CACHE_LINE_SIZE)
|
|
cacheline_size = CACHE_LINE_SIZE;
|
|
#endif
|
|
}
|
|
return cacheline_size;
|
|
}
|
|
|
|
#define SDL_CPUFEATURES_RESET_VALUE 0xFFFFFFFF
|
|
|
|
static Uint32 SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
|
|
static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
|
|
|
|
static bool ref_string_equals(const char *ref, const char *test, const char *end_test) {
|
|
size_t len_test = end_test - test;
|
|
return SDL_strncmp(ref, test, len_test) == 0 && ref[len_test] == '\0' && (test[len_test] == '\0' || test[len_test] == ',');
|
|
}
|
|
|
|
static Uint32 SDLCALL SDL_CPUFeatureMaskFromHint(void)
|
|
{
|
|
Uint32 result_mask = SDL_CPUFEATURES_RESET_VALUE;
|
|
|
|
const char *hint = SDL_GetHint(SDL_HINT_CPU_FEATURE_MASK);
|
|
|
|
if (hint) {
|
|
for (const char *spot = hint, *next; *spot; spot = next) {
|
|
const char *end = SDL_strchr(spot, ',');
|
|
Uint32 spot_mask;
|
|
bool add_spot_mask = true;
|
|
if (end) {
|
|
next = end + 1;
|
|
} else {
|
|
size_t len = SDL_strlen(spot);
|
|
end = spot + len;
|
|
next = end;
|
|
}
|
|
if (spot[0] == '+') {
|
|
add_spot_mask = true;
|
|
spot += 1;
|
|
} else if (spot[0] == '-') {
|
|
add_spot_mask = false;
|
|
spot += 1;
|
|
}
|
|
if (ref_string_equals("all", spot, end)) {
|
|
spot_mask = SDL_CPUFEATURES_RESET_VALUE;
|
|
} else if (ref_string_equals("altivec", spot, end)) {
|
|
spot_mask= CPU_HAS_ALTIVEC;
|
|
} else if (ref_string_equals("mmx", spot, end)) {
|
|
spot_mask = CPU_HAS_MMX;
|
|
} else if (ref_string_equals("sse", spot, end)) {
|
|
spot_mask = CPU_HAS_SSE;
|
|
} else if (ref_string_equals("sse2", spot, end)) {
|
|
spot_mask = CPU_HAS_SSE2;
|
|
} else if (ref_string_equals("sse3", spot, end)) {
|
|
spot_mask = CPU_HAS_SSE3;
|
|
} else if (ref_string_equals("sse41", spot, end)) {
|
|
spot_mask = CPU_HAS_SSE41;
|
|
} else if (ref_string_equals("sse42", spot, end)) {
|
|
spot_mask = CPU_HAS_SSE42;
|
|
} else if (ref_string_equals("avx", spot, end)) {
|
|
spot_mask = CPU_HAS_AVX;
|
|
} else if (ref_string_equals("avx2", spot, end)) {
|
|
spot_mask = CPU_HAS_AVX2;
|
|
} else if (ref_string_equals("avx512f", spot, end)) {
|
|
spot_mask = CPU_HAS_AVX512F;
|
|
} else if (ref_string_equals("arm-simd", spot, end)) {
|
|
spot_mask = CPU_HAS_ARM_SIMD;
|
|
} else if (ref_string_equals("neon", spot, end)) {
|
|
spot_mask = CPU_HAS_NEON;
|
|
} else if (ref_string_equals("lsx", spot, end)) {
|
|
spot_mask = CPU_HAS_LSX;
|
|
} else if (ref_string_equals("lasx", spot, end)) {
|
|
spot_mask = CPU_HAS_LASX;
|
|
} else {
|
|
// Ignore unknown/incorrect cpu feature(s)
|
|
continue;
|
|
}
|
|
if (add_spot_mask) {
|
|
result_mask |= spot_mask;
|
|
} else {
|
|
result_mask &= ~spot_mask;
|
|
}
|
|
}
|
|
}
|
|
return result_mask;
|
|
}
|
|
|
|
static Uint32 SDL_GetCPUFeatures(void)
|
|
{
|
|
if (SDL_CPUFeatures == SDL_CPUFEATURES_RESET_VALUE) {
|
|
CPU_calcCPUIDFeatures();
|
|
SDL_CPUFeatures = 0;
|
|
SDL_SIMDAlignment = sizeof(void *); // a good safe base value
|
|
if (CPU_haveAltiVec()) {
|
|
SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveMMX()) {
|
|
SDL_CPUFeatures |= CPU_HAS_MMX;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
|
|
}
|
|
if (CPU_haveSSE()) {
|
|
SDL_CPUFeatures |= CPU_HAS_SSE;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveSSE2()) {
|
|
SDL_CPUFeatures |= CPU_HAS_SSE2;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveSSE3()) {
|
|
SDL_CPUFeatures |= CPU_HAS_SSE3;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveSSE41()) {
|
|
SDL_CPUFeatures |= CPU_HAS_SSE41;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveSSE42()) {
|
|
SDL_CPUFeatures |= CPU_HAS_SSE42;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveAVX()) {
|
|
SDL_CPUFeatures |= CPU_HAS_AVX;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
|
|
}
|
|
if (CPU_haveAVX2()) {
|
|
SDL_CPUFeatures |= CPU_HAS_AVX2;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
|
|
}
|
|
if (CPU_haveAVX512F()) {
|
|
SDL_CPUFeatures |= CPU_HAS_AVX512F;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
|
|
}
|
|
if (CPU_haveARMSIMD()) {
|
|
SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveNEON()) {
|
|
SDL_CPUFeatures |= CPU_HAS_NEON;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveLSX()) {
|
|
SDL_CPUFeatures |= CPU_HAS_LSX;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
}
|
|
if (CPU_haveLASX()) {
|
|
SDL_CPUFeatures |= CPU_HAS_LASX;
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
|
|
}
|
|
SDL_CPUFeatures &= SDL_CPUFeatureMaskFromHint();
|
|
}
|
|
return SDL_CPUFeatures;
|
|
}
|
|
|
|
void SDL_QuitCPUInfo(void) {
|
|
SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
|
|
}
|
|
|
|
#define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & (f)) ? true : false)
|
|
|
|
bool SDL_HasAltiVec(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
|
|
}
|
|
|
|
bool SDL_HasMMX(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
|
|
}
|
|
|
|
bool SDL_HasSSE(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
|
|
}
|
|
|
|
bool SDL_HasSSE2(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
|
|
}
|
|
|
|
bool SDL_HasSSE3(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
|
|
}
|
|
|
|
bool SDL_HasSSE41(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
|
|
}
|
|
|
|
bool SDL_HasSSE42(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
|
|
}
|
|
|
|
bool SDL_HasAVX(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
|
|
}
|
|
|
|
bool SDL_HasAVX2(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
|
|
}
|
|
|
|
bool SDL_HasAVX512F(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
|
|
}
|
|
|
|
bool SDL_HasARMSIMD(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
|
|
}
|
|
|
|
bool SDL_HasNEON(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
|
|
}
|
|
|
|
bool SDL_HasLSX(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
|
|
}
|
|
|
|
bool SDL_HasLASX(void)
|
|
{
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
|
|
}
|
|
|
|
static int SDL_SystemRAM = 0;
|
|
|
|
int SDL_GetSystemRAM(void)
|
|
{
|
|
if (!SDL_SystemRAM) {
|
|
#if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
|
|
if (SDL_SystemRAM <= 0) {
|
|
SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024 * 1024));
|
|
}
|
|
#endif
|
|
#ifdef HAVE_SYSCTLBYNAME
|
|
if (SDL_SystemRAM <= 0) {
|
|
#ifdef HW_PHYSMEM64
|
|
// (64-bit): NetBSD since 2003, OpenBSD
|
|
int mib[2] = { CTL_HW, HW_PHYSMEM64 };
|
|
#elif defined(HW_REALMEM)
|
|
// (64-bit): FreeBSD since 2005, DragonFly
|
|
int mib[2] = { CTL_HW, HW_REALMEM };
|
|
#elif defined(HW_MEMSIZE)
|
|
// (64-bit): Darwin
|
|
int mib[2] = { CTL_HW, HW_MEMSIZE };
|
|
#else
|
|
// (32-bit): very old BSD, might only report up to 2 GiB
|
|
int mib[2] = { CTL_HW, HW_PHYSMEM };
|
|
#endif // HW_PHYSMEM64
|
|
Uint64 memsize = 0;
|
|
size_t len = sizeof(memsize);
|
|
|
|
if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
|
|
SDL_SystemRAM = (int)(memsize / (1024 * 1024));
|
|
}
|
|
}
|
|
#endif
|
|
#if defined(SDL_PLATFORM_WINDOWS)
|
|
if (SDL_SystemRAM <= 0) {
|
|
MEMORYSTATUSEX stat;
|
|
stat.dwLength = sizeof(stat);
|
|
if (GlobalMemoryStatusEx(&stat)) {
|
|
SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
|
|
}
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_RISCOS
|
|
if (SDL_SystemRAM <= 0) {
|
|
_kernel_swi_regs regs;
|
|
regs.r[0] = 0x108;
|
|
if (_kernel_swi(OS_Memory, ®s, ®s) == NULL) {
|
|
SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
|
|
}
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_3DS
|
|
if (SDL_SystemRAM <= 0) {
|
|
// The New3DS has 255MiB, the Old3DS 127MiB
|
|
SDL_SystemRAM = (int)(osGetMemRegionSize(MEMREGION_ALL) / (1024 * 1024));
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_VITA
|
|
if (SDL_SystemRAM <= 0) {
|
|
/* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
|
|
+26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
|
|
SDL_SystemRAM = 536870912;
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_PS2
|
|
if (SDL_SystemRAM <= 0) {
|
|
// PlayStation 2 has 32MiB however there are some special models with 64 and 128
|
|
SDL_SystemRAM = GetMemorySize();
|
|
}
|
|
#endif
|
|
#ifdef SDL_PLATFORM_HAIKU
|
|
if (SDL_SystemRAM <= 0) {
|
|
system_info info;
|
|
if (get_system_info(&info) == B_OK) {
|
|
/* To have an accurate amount, we also take in account the inaccessible pages (aka ignored)
|
|
which is a bit handier compared to the legacy system's api (i.e. used_pages).*/
|
|
SDL_SystemRAM = (int)SDL_round((info.max_pages + info.ignored_pages > 0 ? info.ignored_pages : 0) * B_PAGE_SIZE / 1048576.0);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
return SDL_SystemRAM;
|
|
}
|
|
|
|
|
|
static int SDL_SystemPageSize = -1;
|
|
|
|
int SDL_GetSystemPageSize(void)
|
|
{
|
|
if (SDL_SystemPageSize == -1) {
|
|
#ifdef SDL_PLATFORM_SYSTEM_PAGE_SIZE_PRIVATE // consoles will define this in a platform-specific internal header.
|
|
SDL_SystemPageSize = SDL_PLATFORM_SYSTEM_PAGE_SIZE_PRIVATE;
|
|
#endif
|
|
#ifdef SDL_PLATFORM_3DS
|
|
SDL_SystemPageSize = 4096; // It's an ARM11 CPU; I assume this is 4K.
|
|
#endif
|
|
#ifdef SDL_PLATFORM_VITA
|
|
SDL_SystemPageSize = 4096; // It's an ARMv7 CPU; I assume this is 4K.
|
|
#endif
|
|
#ifdef SDL_PLATFORM_PS2
|
|
SDL_SystemPageSize = 4096; // It's a MIPS R5900 CPU; I assume this is 4K.
|
|
#endif
|
|
#if defined(HAVE_SYSCONF) && (defined(_SC_PAGESIZE) || defined(_SC_PAGE_SIZE))
|
|
if (SDL_SystemPageSize <= 0) {
|
|
#if defined(_SC_PAGE_SIZE)
|
|
SDL_SystemPageSize = (int)sysconf(_SC_PAGE_SIZE);
|
|
#else
|
|
SDL_SystemPageSize = (int)sysconf(_SC_PAGESIZE);
|
|
#endif
|
|
}
|
|
#endif
|
|
#if defined(HAVE_SYSCTLBYNAME) && defined(HW_PAGESIZE)
|
|
if (SDL_SystemPageSize <= 0) {
|
|
// NetBSD, OpenBSD, FreeBSD, Darwin...everything agrees to use HW_PAGESIZE.
|
|
int mib[2] = { CTL_HW, HW_PAGESIZE };
|
|
int pagesize = 0;
|
|
size_t len = sizeof(pagesize);
|
|
|
|
if (sysctl(mib, 2, &pagesize, &len, NULL, 0) == 0) {
|
|
SDL_SystemPageSize = pagesize;
|
|
}
|
|
}
|
|
#endif
|
|
#ifdef USE_GETPAGESIZE
|
|
if (SDL_SystemPageSize <= 0) {
|
|
SDL_SystemPageSize = getpagesize();
|
|
}
|
|
#endif
|
|
#if defined(SDL_PLATFORM_WINDOWS)
|
|
if (SDL_SystemPageSize <= 0) {
|
|
SYSTEM_INFO sysinfo;
|
|
GetSystemInfo(&sysinfo);
|
|
SDL_SystemPageSize = (int) sysinfo.dwPageSize;
|
|
}
|
|
#endif
|
|
if (SDL_SystemPageSize < 0) { // in case we got a weird result somewhere, or no better information, force it to 0.
|
|
SDL_SystemPageSize = 0; // unknown page size, sorry.
|
|
}
|
|
}
|
|
return SDL_SystemPageSize;
|
|
}
|
|
|
|
|
|
size_t SDL_GetSIMDAlignment(void)
|
|
{
|
|
if (SDL_SIMDAlignment == 0xFFFFFFFF) {
|
|
SDL_GetCPUFeatures(); // make sure this has been calculated
|
|
}
|
|
SDL_assert(SDL_SIMDAlignment != 0);
|
|
return SDL_SIMDAlignment;
|
|
}
|