10 Commits

Author	SHA1	Message	Date
Mitchell Hashimoto	a74e352726	bench: add --mode=gen-osc to generate synthetic OSC sequences ... This commit adds a few new mode flags to the `bench-stream` program to generator synthetic OSC sequences. The new modes are `gen-osc`, `gen-osc-valid`, and `gen-osc-invalid`. The `gen-osc` mode generates equal parts valid and invalid OSC sequences, while the suffixed variants are for generating only valid or invalid sequences, respectively. This commit also fixes our build system to actually be able to build the benchmarks. It turns out we were just rebuilding the main Ghostty binary for `-Demit-bench`. And, our benchmarks didn't run under Zig 0.14, which is now fixed. An important new design I'm working towards in this commit is to split out synthetic data generation to a dedicated package in `src/bench/synth` although I'm tempted to move it to `src/synth` since it may be useful outside of benchmarks. The synth package is a work-in-progress, but it contains a hint of what's to come. I ultimately want to able to generate all kinds of synthetic data with a lot of knobs to control dimensionality (e.g. in the case of OSC sequences: valid/invalid, length, operation types, etc.).	2025-05-14 12:26:31 -07:00
Qwerasd	58b925d4c3	fix(bench): update std options format	2024-02-10 22:20:24 -05:00
Mitchell Hashimoto	4834b8e925	remove utf8proc	2024-02-08 21:11:11 -08:00
Mitchell Hashimoto	f6e694bf80	bench: update codepoint-width	2024-02-08 21:10:06 -08:00
Mitchell Hashimoto	9755d0696e	unicode: generate our own lookup tables	2024-02-08 21:01:11 -08:00
Mitchell Hashimoto	4ae41579da	add utf8proc back for bench	2024-02-08 13:21:36 -08:00
Mitchell Hashimoto	3c31217f3c	simd: minor tweaks	2024-02-07 09:28:56 -08:00
Mitchell Hashimoto	5692d39067	bench/codepoint-width: add wcwidth	2024-02-07 09:17:26 -08:00
Mitchell Hashimoto	88d81602fa	simd/codepoint-width: wip	2024-02-06 22:28:26 -08:00
Mitchell Hashimoto	d4fa0fcabf	bench/codepoint-width	2024-02-06 17:11:11 -08:00