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https://github.com/nim-lang/Nim.git
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Refactored VM registerlayout. The size and location of the registers in (#12775)
the instructions are now all derived from a single definition, allowing the register layout to be changed.
This commit is contained in:
Ico Doornekamp
committed by
Andreas Rumpf
Andreas Rumpf
parent
0d022622e3
commit
6aade97fe8
@@ -12,17 +12,42 @@
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import ast, idents, options, modulegraphs, lineinfos
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type TInstrType* = uint32
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const
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regOBits = 8 # Opcode
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regABits = 8
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regBBits = 8
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regCBits = 8
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regBxBits = 16
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byteExcess* = 128 # we use excess-K for immediates
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wordExcess* = 32768
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MaxLoopIterations* = 10_000_000 # max iterations of all loops
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# Calculate register shifts, masks and ranges
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const
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regOShift* = 0.TInstrType
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regAShift* = (regOShift + regOBits)
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regBShift* = (regAShift + regABits)
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regCShift* = (regBShift + regBBits)
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regBxShift* = (regAShift + regABits)
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regOMask* = ((1.TInstrType shl regOBits) - 1)
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regAMask* = ((1.TInstrType shl regABits) - 1)
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regBMask* = ((1.TInstrType shl regBBits) - 1)
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regCMask* = ((1.TInstrType shl regCBits) - 1)
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regBxMask* = ((1.TInstrType shl regBxBits) - 1)
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wordExcess* = 1 shl (regBxBits-1)
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regBxMin* = -wordExcess+1
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regBxMax* = wordExcess-1
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type
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TRegister* = range[0..255]
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TDest* = range[-1..255]
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TInstr* = distinct uint32
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TRegister* = range[0..regAMask.int]
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TDest* = range[-1..regAMask.int]
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TInstr* = distinct TInstrType
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TOpcode* = enum
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opcEof, # end of code
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@@ -254,10 +279,10 @@ const
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# flag is used to signal opcSeqLen if node is NimNode.
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const nimNodeFlag* = 16
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template opcode*(x: TInstr): TOpcode = TOpcode(x.uint32 and 0xff'u32)
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template regA*(x: TInstr): TRegister = TRegister(x.uint32 shr 8'u32 and 0xff'u32)
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template regB*(x: TInstr): TRegister = TRegister(x.uint32 shr 16'u32 and 0xff'u32)
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template regC*(x: TInstr): TRegister = TRegister(x.uint32 shr 24'u32)
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template regBx*(x: TInstr): int = (x.uint32 shr 16'u32).int
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template opcode*(x: TInstr): TOpcode = TOpcode(x.TInstrType shr regOShift and regOMask)
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template regA*(x: TInstr): TRegister = TRegister(x.TInstrType shr regAShift and regAMask)
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template regB*(x: TInstr): TRegister = TRegister(x.TInstrType shr regBShift and regBMask)
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template regC*(x: TInstr): TRegister = TRegister(x.TInstrType shr regCShift and regCMask)
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template regBx*(x: TInstr): int = (x.TInstrType shr regBxShift and regBxMask).int
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template jmpDiff*(x: TInstr): int = regBx(x) - wordExcess
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@@ -116,9 +116,9 @@ proc gABC(ctx: PCtx; n: PNode; opc: TOpcode; a, b, c: TRegister = 0) =
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## stores the result into register `a`
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## The node is needed for debug information
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assert opc.ord < 255
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let ins = (opc.uint32 or (a.uint32 shl 8'u32) or
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(b.uint32 shl 16'u32) or
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(c.uint32 shl 24'u32)).TInstr
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let ins = (opc.TInstrType or (a.TInstrType shl regAShift) or
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(b.TInstrType shl regBShift) or
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(c.TInstrType shl regCShift)).TInstr
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when false:
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if ctx.code.len == 43:
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writeStackTrace()
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@@ -131,9 +131,9 @@ proc gABI(c: PCtx; n: PNode; opc: TOpcode; a, b: TRegister; imm: BiggestInt) =
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# and stores the output value into `a`.
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# `imm` is signed and must be within [-128, 127]
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if imm >= -128 and imm <= 127:
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let ins = (opc.uint32 or (a.uint32 shl 8'u32) or
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(b.uint32 shl 16'u32) or
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(imm+byteExcess).uint32 shl 24'u32).TInstr
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let ins = (opc.TInstrType or (a.TInstrType shl regAShift) or
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(b.TInstrType shl regBShift) or
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(imm+byteExcess).TInstrType shl regCShift).TInstr
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c.code.add(ins)
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c.debug.add(n.info)
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else:
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@@ -142,20 +142,20 @@ proc gABI(c: PCtx; n: PNode; opc: TOpcode; a, b: TRegister; imm: BiggestInt) =
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proc gABx(c: PCtx; n: PNode; opc: TOpcode; a: TRegister = 0; bx: int) =
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# Applies `opc` to `bx` and stores it into register `a`
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# `bx` must be signed and in the range [-32768, 32767]
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# `bx` must be signed and in the range [regBxMin, regBxMax]
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when false:
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if c.code.len == 43:
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writeStackTrace()
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echo "generating ", opc
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if bx >= -32768 and bx <= 32767:
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let ins = (opc.uint32 or a.uint32 shl 8'u32 or
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(bx+wordExcess).uint32 shl 16'u32).TInstr
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if bx >= regBxMin-1 and bx <= regBxMax:
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let ins = (opc.TInstrType or a.TInstrType shl regAShift or
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(bx+wordExcess).TInstrType shl regBxShift).TInstr
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c.code.add(ins)
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c.debug.add(n.info)
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else:
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localError(c.config, n.info,
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"VM: immediate value does not fit into an int16")
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"VM: immediate value does not fit into regBx")
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proc xjmp(c: PCtx; n: PNode; opc: TOpcode; a: TRegister = 0): TPosition =
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#assert opc in {opcJmp, opcFJmp, opcTJmp}
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@@ -168,7 +168,7 @@ proc genLabel(c: PCtx): TPosition =
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proc jmpBack(c: PCtx, n: PNode, p = TPosition(0)) =
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let dist = p.int - c.code.len
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internalAssert(c.config, -0x7fff < dist and dist < 0x7fff)
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internalAssert(c.config, regBxMin < dist and dist < regBxMax)
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gABx(c, n, opcJmpBack, 0, dist)
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proc patch(c: PCtx, p: TPosition) =
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@@ -176,11 +176,11 @@ proc patch(c: PCtx, p: TPosition) =
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let p = p.int
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let diff = c.code.len - p
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#c.jumpTargets.incl(c.code.len)
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internalAssert(c.config, -0x7fff < diff and diff < 0x7fff)
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internalAssert(c.config, regBxMin < diff and diff < regBxMax)
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let oldInstr = c.code[p]
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# opcode and regA stay the same:
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c.code[p] = ((oldInstr.uint32 and 0xffff'u32).uint32 or
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uint32(diff+wordExcess) shl 16'u32).TInstr
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c.code[p] = ((oldInstr.TInstrType and regBxMask).TInstrType or
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TInstrType(diff+wordExcess) shl regBxShift).TInstr
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proc getSlotKind(t: PType): TSlotKind =
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case t.skipTypes(abstractRange-{tyTypeDesc}).kind
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@@ -440,7 +440,7 @@ proc rawGenLiteral(c: PCtx; n: PNode): int =
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#assert(n.kind != nkCall)
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n.flags.incl nfAllConst
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c.constants.add n.canonValue
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internalAssert c.config, result < 0x7fff
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internalAssert c.config, result < regBxMax
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proc sameConstant*(a, b: PNode): bool =
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result = false
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@@ -513,7 +513,7 @@ proc genType(c: PCtx; typ: PType): int =
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if sameType(t, typ): return i
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result = c.types.len
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c.types.add(typ)
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internalAssert(c.config, result <= 0x7fff)
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internalAssert(c.config, result <= regBxMax)
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proc genTry(c: PCtx; n: PNode; dest: var TDest) =
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if dest < 0 and not isEmptyType(n.typ): dest = getTemp(c, n.typ)
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@@ -2179,11 +2179,11 @@ proc genParams(c: PCtx; params: PNode) =
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c.prc.maxSlots = max(params.len, 1)
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proc finalJumpTarget(c: PCtx; pc, diff: int) =
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internalAssert(c.config, -0x7fff < diff and diff < 0x7fff)
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internalAssert(c.config, regBxMin < diff and diff < regBxMax)
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let oldInstr = c.code[pc]
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# opcode and regA stay the same:
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c.code[pc] = ((oldInstr.uint32 and 0xffff'u32).uint32 or
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uint32(diff+wordExcess) shl 16'u32).TInstr
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c.code[pc] = ((oldInstr.TInstrType and ((regOMask shl regOShift) or (regAMask shl regAShift))).TInstrType or
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TInstrType(diff+wordExcess) shl regBxShift).TInstr
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proc genGenericParams(c: PCtx; gp: PNode) =
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var base = c.prc.maxSlots
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