rexcode/mips: R6 compact branches (BEQC/BNEC/BLTC/BGEC/.../BLTZC)

All ten two-/one-register R6 compact branches, byte-exact vs llvm-mc. The signed forms share POP26/POP27 (opcodes 22/23) with the pre-R6 BLEZL/BGTZL and with each other; the decode-entry mask sort tries the more-specific rt=0 / rs=0 forms first, and a small operand-aware hook in decode_one_inline recovers BGEZC/BLTZC (rs==rt) from the general BGEC/BLTC. Where R6 reuses a pre-R6/PSP major opcode (BEQC vs ADDI at opcode 8, etc.) decode is inherently ISA-mode-dependent and resolves to the legacy form; the R6 encode side is exact. 281 tests green.
2026-06-19 16:42:33 +00:00 · 2026-06-18 04:12:20 -04:00
parent ff2bf13121
commit 61a62185b8
12 changed files with 1103 additions and 1001 deletions
--- a/core/rexcode/mips/decoder.odin
+++ b/core/rexcode/mips/decoder.odin
@@ -147,6 +147,19 @@ decode_one_inline :: #force_inline proc "contextless" (
 	inst.length   = 4
 	inst.flags    = {}

+	// R6 POP26/POP27 compact branches share opcodes 22/23 and are distinguished
+	// only by the rs/rt relationship. The more-specific pre-R6 (rt=0) and the
+	// rs=0 forms already matched earlier; here we refine the remaining group so
+	// rs==rt decodes as BGEZC/BLTZC rather than the general BGEC/BLTC.
+	#partial switch inst.mnemonic {
+	case .BGEC, .BLEZC, .BGEZC:
+		rs := (word >> 21) & 0x1F; rt := (word >> 16) & 0x1F
+		inst.mnemonic = rs == 0 ? .BLEZC : (rs == rt ? .BGEZC : .BGEC)
+	case .BLTC, .BGTZC, .BLTZC:
+		rs := (word >> 21) & 0x1F; rt := (word >> 16) & 0x1F
+		inst.mnemonic = rs == 0 ? .BGTZC : (rs == rt ? .BLTZC : .BLTC)
+	}
+
 	cnt_used: u8 = 0
 	if entry.ops[0] != .NONE {
 		inst.ops[0] = extract_operand_inline(word, pc, entry.ops[0], entry.enc[0])
--- a/core/rexcode/mips/mnemonic_builders.odin
+++ b/core/rexcode/mips/mnemonic_builders.odin
@@ -346,6 +346,26 @@ inst_bc_rel26              :: #force_inline proc "contextless" (target: u32) ->
 emit_bc_rel26              :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_bc_rel26(target)) }
 inst_balc_rel26            :: #force_inline proc "contextless" (target: u32) -> Instruction { return Instruction{mnemonic = .BALC, operand_count = 1, length = 4, ops = {op_label(target), {}, {}, {}}} }
 emit_balc_rel26            :: #force_inline proc(instructions: ^[dynamic]Instruction, target: u32) { append(instructions, inst_balc_rel26(target)) }
+inst_beqc_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_beqc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_beqc_r_r_rel(dst, src, target)) }
+inst_bnec_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNEC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_bnec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bnec_r_r_rel(dst, src, target)) }
+inst_bltc_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_bltc_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bltc_r_r_rel(dst, src, target)) }
+inst_bgec_r_r_rel          :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_bgec_r_r_rel          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bgec_r_r_rel(dst, src, target)) }
+inst_bltuc_r_r_rel         :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTUC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_bltuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bltuc_r_r_rel(dst, src, target)) }
+inst_bgeuc_r_r_rel         :: #force_inline proc "contextless" (dst: GPR, src: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEUC, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_label(target), {}}} }
+emit_bgeuc_r_r_rel         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, target: u32) { append(instructions, inst_bgeuc_r_r_rel(dst, src, target)) }
+inst_blezc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
+emit_blezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_blezc_r_rel(dst, target)) }
+inst_bgezc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
+emit_bgezc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgezc_r_rel(dst, target)) }
+inst_bgtzc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BGTZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
+emit_bgtzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bgtzc_r_rel(dst, target)) }
+inst_bltzc_r_rel           :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BLTZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
+emit_bltzc_r_rel           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_bltzc_r_rel(dst, target)) }
 inst_beqzc_r_rel21         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BEQZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
 emit_beqzc_r_rel21         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, target: u32) { append(instructions, inst_beqzc_r_rel21(dst, target)) }
 inst_bnezc_r_rel21         :: #force_inline proc "contextless" (dst: GPR, target: u32) -> Instruction { return Instruction{mnemonic = .BNEZC, operand_count = 2, length = 4, ops = {op_gpr(dst), op_label(target), {}, {}}} }
@@ -2367,6 +2387,26 @@ inst_bc                    :: inst_bc_rel26
 emit_bc                    :: emit_bc_rel26
 inst_balc                  :: inst_balc_rel26
 emit_balc                  :: emit_balc_rel26
+inst_beqc                  :: inst_beqc_r_r_rel
+emit_beqc                  :: emit_beqc_r_r_rel
+inst_bnec                  :: inst_bnec_r_r_rel
+emit_bnec                  :: emit_bnec_r_r_rel
+inst_bltc                  :: inst_bltc_r_r_rel
+emit_bltc                  :: emit_bltc_r_r_rel
+inst_bgec                  :: inst_bgec_r_r_rel
+emit_bgec                  :: emit_bgec_r_r_rel
+inst_bltuc                 :: inst_bltuc_r_r_rel
+emit_bltuc                 :: emit_bltuc_r_r_rel
+inst_bgeuc                 :: inst_bgeuc_r_r_rel
+emit_bgeuc                 :: emit_bgeuc_r_r_rel
+inst_blezc                 :: inst_blezc_r_rel
+emit_blezc                 :: emit_blezc_r_rel
+inst_bgezc                 :: inst_bgezc_r_rel
+emit_bgezc                 :: emit_bgezc_r_rel
+inst_bgtzc                 :: inst_bgtzc_r_rel
+emit_bgtzc                 :: emit_bgtzc_r_rel
+inst_bltzc                 :: inst_bltzc_r_rel
+emit_bltzc                 :: emit_bltzc_r_rel
 inst_beqzc                 :: inst_beqzc_r_rel21
 emit_beqzc                 :: emit_beqzc_r_rel21
 inst_bnezc                 :: inst_bnezc_r_rel21
--- a/core/rexcode/mips/tablegen/encoding_table.odin
+++ b/core/rexcode/mips/tablegen/encoding_table.odin
@@ -173,6 +173,25 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
    .BNEL    = { {.BNEL,    {.GPR,.GPR,.REL16,.NONE},  {.RS,.RT,.BRANCH_16,.NONE},   0x54000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true}} },
    .BLEZL   = { {.BLEZL,   {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true}} },
    .BGTZL   = { {.BGTZL,   {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true}} },
+
+    // R6 two-register compact branches (no delay slot). Unique major opcodes
+    // for the EQ/NE/ordered-unsigned forms; the signed BGEC/BLTC share POP26/
+    // POP27 (opcodes 22/23) with the one-register compacts below and with the
+    // pre-R6 BLEZL/BGTZL -- the mask sort tries the more-specific rt=0 (BLEZL)
+    // and rs=0 (BLEZC) forms first, and decode_one_inline re-disambiguates the
+    // POP26/POP27 group by the rs/rt relationship.
+    .BEQC    = { {.BEQC,    {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x20000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BNEC    = { {.BNEC,    {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x60000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BGEUC   = { {.BGEUC,   {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x18000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BLTUC   = { {.BLTUC,   {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x1C000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BGEC    = { {.BGEC,    {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x58000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BLTC    = { {.BLTC,    {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x5C000000, 0xFC000000, .MIPS32_R6, {}} },
+    // One-register compacts: BLEZC/BGTZC set rs=0 (specific mask); BGEZC/BLTZC
+    // set rs=rt (encoded via RS_RT, general mask -- decode hook recovers them).
+    .BLEZC   = { {.BLEZC,   {.GPR,.REL16,.NONE,.NONE}, {.RT,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFFE00000, .MIPS32_R6, {}} },
+    .BGTZC   = { {.BGTZC,   {.GPR,.REL16,.NONE,.NONE}, {.RT,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFFE00000, .MIPS32_R6, {}} },
+    .BGEZC   = { {.BGEZC,   {.GPR,.REL16,.NONE,.NONE}, {.RS_RT,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC000000, .MIPS32_R6, {}} },
+    .BLTZC   = { {.BLTZC,   {.GPR,.REL16,.NONE,.NONE}, {.RS_RT,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFC000000, .MIPS32_R6, {}} },
    .BLTZL   = { {.BLTZL,   {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04020000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true}} },
    .BGEZL   = { {.BGEZL,   {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04030000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true}} },
    .BLTZALL = { {.BLTZALL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x04120000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true}} },
--- a/core/rexcode/mips/tablegen/generated/decode_tables.odin
+++ b/core/rexcode/mips/tablegen/generated/decode_tables.odin
@@ -8,7 +8,7 @@ package rexcode_mips_generated
 import lib "../.."

@(rodata)
-DECODE_ENTRIES := [1008]lib.Decode_Entry{
+DECODE_ENTRIES := [1018]lib.Decode_Entry{
 	{ .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} },
 	{ .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} },
 	{ .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} },
@@ -118,8 +118,11 @@ DECODE_ENTRIES := [1008]lib.Decode_Entry{
 	{ .BEQ, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x10000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
 	{ .BNE, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x14000000, 0xFC000000, .MIPS_I, {delay_slot=true} },
 	{ .BLEZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x18000000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
+	{ .BGEUC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x18000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .BGTZ, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x1C000000, 0xFC1F0000, .MIPS_I, {delay_slot=true} },
+	{ .BLTUC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x1C000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .ADDI, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x20000000, 0xFC000000, .MIPS_I, {} },
+	{ .BEQC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x20000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .ADDIU, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x24000000, 0xFC000000, .MIPS_I, {} },
 	{ .SLTI, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x28000000, 0xFC000000, .MIPS_I, {} },
 	{ .SLTIU, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x2C000000, 0xFC000000, .MIPS_I, {} },
@@ -345,7 +348,13 @@ DECODE_ENTRIES := [1008]lib.Decode_Entry{
 	{ .BEQL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x50000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} },
 	{ .BNEL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x54000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} },
 	{ .BLEZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
+	{ .BLEZC, {.GPR,.REL16,.NONE,.NONE}, {.RT,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFFE00000, .MIPS32_R6, {} },
+	{ .BGEC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x58000000, 0xFC000000, .MIPS32_R6, {} },
+	{ .BGEZC, {.GPR,.REL16,.NONE,.NONE}, {.RS_RT,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .BGTZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
+	{ .BGTZC, {.GPR,.REL16,.NONE,.NONE}, {.RT,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFFE00000, .MIPS32_R6, {} },
+	{ .BLTC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x5C000000, 0xFC000000, .MIPS32_R6, {} },
+	{ .BLTZC, {.GPR,.REL16,.NONE,.NONE}, {.RS_RT,.BRANCH_16,.NONE,.NONE}, 0x5C000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .VADD_S, {.VFPU_S,.VFPU_S,.VFPU_S,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x60000000, 0xFF808080, .VFPU_PSP, {} },
 	{ .VADD_P, {.VFPU_P,.VFPU_P,.VFPU_P,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x60000080, 0xFF808080, .VFPU_PSP, {} },
 	{ .VADD_T, {.VFPU_T,.VFPU_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x60008000, 0xFF808080, .VFPU_PSP, {} },
@@ -359,6 +368,7 @@ DECODE_ENTRIES := [1008]lib.Decode_Entry{
 	{ .VDIV_T, {.VFPU_T,.VFPU_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x63808000, 0xFF808080, .VFPU_PSP, {} },
 	{ .VDIV_Q, {.VFPU_Q,.VFPU_Q,.VFPU_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x63808080, 0xFF808080, .VFPU_PSP, {} },
 	{ .DADDI, {.GPR,.GPR,.IMM16S,.NONE}, {.RT,.RS,.IMM_16,.NONE}, 0x60000000, 0xFC000000, .MIPS_III, {only_64=true} },
+	{ .BNEC, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x60000000, 0xFC000000, .MIPS32_R6, {} },
 	{ .VMUL_S, {.VFPU_S,.VFPU_S,.VFPU_S,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x64000000, 0xFF808080, .VFPU_PSP, {} },
 	{ .VMUL_P, {.VFPU_P,.VFPU_P,.VFPU_P,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x64000080, 0xFF808080, .VFPU_PSP, {} },
 	{ .VMUL_T, {.VFPU_T,.VFPU_T,.VFPU_T,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x64008000, 0xFF808080, .VFPU_PSP, {} },
@@ -1027,64 +1037,64 @@ DECODE_INDEX_PRIMARY := [64]lib.Decode_Index{
 	0x03 = { 105,   1},
 	0x04 = { 106,   1},
 	0x05 = { 107,   1},
-	0x06 = { 108,   1},
-	0x07 = { 109,   1},
-	0x08 = { 110,   1},
-	0x09 = { 111,   1},
-	0x0A = { 112,   1},
-	0x0B = { 113,   1},
-	0x0C = { 114,   1},
-	0x0D = { 115,   1},
-	0x0E = { 116,   1},
-	0x0F = { 117,   2},
-	0x10 = { 119,  15},
-	0x11 = { 134, 146},
-	0x12 = { 280,  36},
-	0x13 = { 316,  17},
-	0x14 = { 333,   1},
-	0x15 = { 334,   1},
-	0x16 = { 335,   1},
-	0x17 = { 336,   1},
-	0x18 = { 337,  13},
-	0x19 = { 350,  15},
-	0x1A = { 365,   1},
-	0x1B = { 366,  13},
-	0x1C = { 379, 109},
-	0x1D = { 488,   1},
-	0x1E = { 489, 230},
-	0x1F = { 719, 141},
-	0x20 = { 860,   1},
-	0x21 = { 861,   1},
-	0x22 = { 862,   1},
-	0x23 = { 863,   1},
-	0x24 = { 864,   1},
-	0x25 = { 865,   1},
-	0x26 = { 866,   1},
-	0x27 = { 867,   1},
-	0x28 = { 868,   1},
-	0x29 = { 869,   1},
-	0x2A = { 870,   1},
-	0x2B = { 871,   1},
-	0x2C = { 872,   1},
-	0x2D = { 873,   1},
-	0x2E = { 874,   1},
-	0x2F = { 875,   1},
-	0x30 = { 876,   1},
-	0x31 = { 877,   1},
-	0x32 = { 878,   3},
-	0x33 = { 881,   1},
-	0x34 = { 882,  63},
-	0x35 = { 945,   3},
-	0x36 = { 948,   5},
-	0x37 = { 953,   6},
-	0x38 = { 959,   1},
-	0x39 = { 960,   1},
-	0x3A = { 961,   3},
-	0x3B = { 964,   5},
-	0x3C = { 969,  27},
-	0x3D = { 996,   3},
-	0x3E = { 999,   5},
-	0x3F = {1004,   4},
+	0x06 = { 108,   2},
+	0x07 = { 110,   2},
+	0x08 = { 112,   2},
+	0x09 = { 114,   1},
+	0x0A = { 115,   1},
+	0x0B = { 116,   1},
+	0x0C = { 117,   1},
+	0x0D = { 118,   1},
+	0x0E = { 119,   1},
+	0x0F = { 120,   2},
+	0x10 = { 122,  15},
+	0x11 = { 137, 146},
+	0x12 = { 283,  36},
+	0x13 = { 319,  17},
+	0x14 = { 336,   1},
+	0x15 = { 337,   1},
+	0x16 = { 338,   4},
+	0x17 = { 342,   4},
+	0x18 = { 346,  14},
+	0x19 = { 360,  15},
+	0x1A = { 375,   1},
+	0x1B = { 376,  13},
+	0x1C = { 389, 109},
+	0x1D = { 498,   1},
+	0x1E = { 499, 230},
+	0x1F = { 729, 141},
+	0x20 = { 870,   1},
+	0x21 = { 871,   1},
+	0x22 = { 872,   1},
+	0x23 = { 873,   1},
+	0x24 = { 874,   1},
+	0x25 = { 875,   1},
+	0x26 = { 876,   1},
+	0x27 = { 877,   1},
+	0x28 = { 878,   1},
+	0x29 = { 879,   1},
+	0x2A = { 880,   1},
+	0x2B = { 881,   1},
+	0x2C = { 882,   1},
+	0x2D = { 883,   1},
+	0x2E = { 884,   1},
+	0x2F = { 885,   1},
+	0x30 = { 886,   1},
+	0x31 = { 887,   1},
+	0x32 = { 888,   3},
+	0x33 = { 891,   1},
+	0x34 = { 892,  63},
+	0x35 = { 955,   3},
+	0x36 = { 958,   5},
+	0x37 = { 963,   6},
+	0x38 = { 969,   1},
+	0x39 = { 970,   1},
+	0x3A = { 971,   3},
+	0x3B = { 974,   5},
+	0x3C = { 979,  27},
+	0x3D = {1006,   3},
+	0x3E = {1009,   5},
+	0x3F = {1014,   4},
 }

@(rodata)
@@ -1178,88 +1188,88 @@ DECODE_INDEX_REGIMM := [32]lib.Decode_Index{

@(rodata)
 DECODE_INDEX_COP1 := [32]lib.Decode_Index{
-	0x00 = { 134,   1},
-	0x01 = { 135,   1},
-	0x02 = { 136,   1},
-	0x03 = { 137,   1},
-	0x04 = { 138,   1},
-	0x05 = { 139,   1},
-	0x06 = { 140,   1},
-	0x07 = { 141,   1},
-	0x08 = { 142,   4},
-	0x09 = { 146,   1},
-	0x0B = { 147,   1},
-	0x0D = { 148,   1},
-	0x0F = { 149,   1},
-	0x10 = { 150,  42},
-	0x11 = { 192,  42},
-	0x14 = { 234,   4},
-	0x15 = { 238,   2},
-	0x16 = { 240,  32},
-	0x18 = { 272,   1},
-	0x19 = { 273,   1},
-	0x1A = { 274,   1},
-	0x1B = { 275,   1},
-	0x1C = { 276,   1},
-	0x1D = { 277,   1},
-	0x1E = { 278,   1},
-	0x1F = { 279,   1},
+	0x00 = { 137,   1},
+	0x01 = { 138,   1},
+	0x02 = { 139,   1},
+	0x03 = { 140,   1},
+	0x04 = { 141,   1},
+	0x05 = { 142,   1},
+	0x06 = { 143,   1},
+	0x07 = { 144,   1},
+	0x08 = { 145,   4},
+	0x09 = { 149,   1},
+	0x0B = { 150,   1},
+	0x0D = { 151,   1},
+	0x0F = { 152,   1},
+	0x10 = { 153,  42},
+	0x11 = { 195,  42},
+	0x14 = { 237,   4},
+	0x15 = { 241,   2},
+	0x16 = { 243,  32},
+	0x18 = { 275,   1},
+	0x19 = { 276,   1},
+	0x1A = { 277,   1},
+	0x1B = { 278,   1},
+	0x1C = { 279,   1},
+	0x1D = { 280,   1},
+	0x1E = { 281,   1},
+	0x1F = { 282,   1},
 }

@(rodata)
 DECODE_INDEX_SPECIAL2 := [64]lib.Decode_Index{
-	0x00 = { 379,   1},
-	0x01 = { 380,   1},
-	0x02 = { 381,   1},
-	0x04 = { 382,   2},
-	0x05 = { 384,   1},
-	0x08 = { 385,  25},
-	0x09 = { 410,  26},
-	0x10 = { 436,   1},
-	0x11 = { 437,   1},
-	0x12 = { 438,   1},
-	0x13 = { 439,   1},
-	0x18 = { 440,   1},
-	0x19 = { 441,   1},
-	0x1A = { 442,   1},
-	0x1B = { 443,   1},
-	0x20 = { 444,   2},
-	0x21 = { 446,   2},
-	0x24 = { 448,   1},
-	0x25 = { 449,   1},
-	0x28 = { 450,  17},
-	0x29 = { 467,   8},
-	0x30 = { 475,   5},
-	0x31 = { 480,   1},
-	0x34 = { 481,   1},
-	0x36 = { 482,   1},
-	0x37 = { 483,   1},
-	0x3C = { 484,   1},
-	0x3E = { 485,   1},
-	0x3F = { 486,   2},
+	0x00 = { 389,   1},
+	0x01 = { 390,   1},
+	0x02 = { 391,   1},
+	0x04 = { 392,   2},
+	0x05 = { 394,   1},
+	0x08 = { 395,  25},
+	0x09 = { 420,  26},
+	0x10 = { 446,   1},
+	0x11 = { 447,   1},
+	0x12 = { 448,   1},
+	0x13 = { 449,   1},
+	0x18 = { 450,   1},
+	0x19 = { 451,   1},
+	0x1A = { 452,   1},
+	0x1B = { 453,   1},
+	0x20 = { 454,   2},
+	0x21 = { 456,   2},
+	0x24 = { 458,   1},
+	0x25 = { 459,   1},
+	0x28 = { 460,  17},
+	0x29 = { 477,   8},
+	0x30 = { 485,   5},
+	0x31 = { 490,   1},
+	0x34 = { 491,   1},
+	0x36 = { 492,   1},
+	0x37 = { 493,   1},
+	0x3C = { 494,   1},
+	0x3E = { 495,   1},
+	0x3F = { 496,   2},
 }

@(rodata)
 DECODE_INDEX_SPECIAL3 := [64]lib.Decode_Index{
-	0x00 = { 719,   2},
-	0x01 = { 721,   1},
-	0x02 = { 722,   1},
-	0x03 = { 723,   1},
-	0x04 = { 724,   1},
-	0x05 = { 725,   1},
-	0x06 = { 726,   1},
-	0x07 = { 727,   1},
-	0x0A = { 728,   3},
-	0x0C = { 731,   1},
-	0x0F = { 732,   8},
-	0x10 = { 740,  22},
-	0x11 = { 762,  15},
-	0x12 = { 777,  17},
-	0x13 = { 794,  22},
-	0x20 = { 816,   5},
-	0x24 = { 821,   4},
-	0x30 = { 825,  17},
-	0x38 = { 842,  17},
-	0x3B = { 859,   1},
+	0x00 = { 729,   2},
+	0x01 = { 731,   1},
+	0x02 = { 732,   1},
+	0x03 = { 733,   1},
+	0x04 = { 734,   1},
+	0x05 = { 735,   1},
+	0x06 = { 736,   1},
+	0x07 = { 737,   1},
+	0x0A = { 738,   3},
+	0x0C = { 741,   1},
+	0x0F = { 742,   8},
+	0x10 = { 750,  22},
+	0x11 = { 772,  15},
+	0x12 = { 787,  17},
+	0x13 = { 804,  22},
+	0x20 = { 826,   5},
+	0x24 = { 831,   4},
+	0x30 = { 835,  17},
+	0x38 = { 852,  17},
+	0x3B = { 869,   1},
 }

--- a/core/rexcode/mips/tablegen/generated/encode_tables.odin
+++ b/core/rexcode/mips/tablegen/generated/encode_tables.odin
--- a/core/rexcode/mips/tables/mips.encode_forms.bin
+++ b/core/rexcode/mips/tables/mips.encode_forms.bin
--- a/core/rexcode/mips/tables/mips.encode_runs.bin
+++ b/core/rexcode/mips/tables/mips.encode_runs.bin
--- a/core/rexcode/mips/tables/mips.entries.bin
+++ b/core/rexcode/mips/tables/mips.entries.bin
--- a/core/rexcode/mips/tables/mips.idx_cop1.bin
+++ b/core/rexcode/mips/tables/mips.idx_cop1.bin
--- a/core/rexcode/mips/tables/mips.idx_primary.bin
+++ b/core/rexcode/mips/tables/mips.idx_primary.bin
--- a/core/rexcode/mips/tables/mips.idx_special2.bin
+++ b/core/rexcode/mips/tables/mips.idx_special2.bin
--- a/core/rexcode/mips/tables/mips.idx_special3.bin
+++ b/core/rexcode/mips/tables/mips.idx_special3.bin