Add clobber table for x86

core/rexcode/isa/x86/clobber_types.odin

@@ -0,0 +1,50 @@
+package rexcode_x86
+
+Clobber_Flags :: distinct bit_set[Clobber_Flag; u16]
+Clobber_Flag :: enum u8 {
+	CF,
+	PF,
+	AF,
+	ZF,
+	SF,
+	OF,
+	DF,
+	IF,
+	TF,
+}
+
+Side_Effect :: enum u8 {
+	FENCE,        // memory-ordering barrier (LFENCE/SFENCE/MFENCE, LOCK)
+	SERIALIZING,  // architecturally serializing (drains pipeline)
+	HINT,         // microarchitectural hint, architecturally inert (PAUSE/PREFETCH*/ENDBR)
+	CACHE,        // cache-line maintenance with coherence effects (CLFLUSH/CLWB)
+	TRAP,         // may deliberately raise a fault (#UD/#BR): UD0-2, BOUND
+	INTERRUPT,    // software interrupt / syscall gate
+	HALT,         // stops execution until an external event
+	PRIVILEGED,   // requires CPL0 / reads-writes supervisor machine state
+	CONTROL,      // alters control flow (writes RIP): branches, calls, returns
+	CET,          // control-flow-enforcement: landing pads, shadow-stack ops
+}
+Side_Effects :: distinct bit_set[Side_Effect; u16]
+
+Clobber_Regs :: distinct bit_set[Clobber_Reg; u16]
+Clobber_Reg :: enum u8 {
+	RAX, RBX, RCX, RDX, RSI, RDI, RSP, RBP, R11,
+	XMM0, VECTOR, MXCSR, FPU_ST, FPU_SW,
+}
+
+Operand_Set  :: distinct bit_set[Operand_Slot; u8]
+Operand_Slot :: enum u8 { OP0, OP1, OP2, OP3 }
+
+Clobber :: struct {
+	written:      Operand_Set,
+	read:         Operand_Set,
+	implicit_wr:  Clobber_Regs,
+	implicit_rd:  Clobber_Regs,
+	flags_wr:     Clobber_Flags,
+	flags_undef:  Clobber_Flags,
+	flags_rd:     Clobber_Flags,
+	writes_mem:   bool,
+	reads_mem:    bool,
+	side_effects: Side_Effects,
+}

core/rexcode/isa/x86/tablegen/encoding_table.odin

@@ -3811,7 +3811,7 @@ ENCODING_TABLE: [Mnemonic][]Encoding = {
 		{.VPRORVQ, {.YMM, .YMM, .YMM_M256, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x14, 0, {esc=._0F38, prefix=PREFIX_66, vex_type=.EVEX, vex_l=.L1, vex_w=.W1}},
 		{.VPRORVQ, {.ZMM, .ZMM, .ZMM_M512, .NONE}, {.REG, .VVVV, .MR, .NONE}, 0x14, 0, {esc=._0F38, prefix=PREFIX_66, vex_type=.EVEX, vex_l=.L2, vex_w=.W1}},
 	},
-	// AVX-512 scatter instructions (use M for VSIB addressing)
+	// AVX-512 scatter instructions (u. M for VSIB addressing)
 	.VPSCATTERDD = {
 		{.VPSCATTERDD, {.M, .XMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, 0xA0, 0, {esc=._0F38, prefix=PREFIX_66, vex_type=.EVEX, vex_l=.L0, vex_w=.W0}},
 		{.VPSCATTERDD, {.M, .YMM, .NONE, .NONE}, {.MR, .REG, .NONE, .NONE}, 0xA0, 0, {esc=._0F38, prefix=PREFIX_66, vex_type=.EVEX, vex_l=.L1, vex_w=.W0}},

core/rexcode/isa/x86/tablegen/gen.odin

@@ -62,6 +62,7 @@ BLOBS := [?]Blob{
 	{"EVEX_INDEX_0F",         "x86.evex_idx_0f.bin",  "Decode_Index"},
 	{"EVEX_INDEX_0F38",       "x86.evex_idx_0f38.bin","Decode_Index"},
 	{"EVEX_INDEX_0F3A",       "x86.evex_idx_0f3a.bin","Decode_Index"},
+	{"CLOBBER_TABLE",         "x86.clobber_table.bin","Clobber"},
 }
 
 DIR_GEN     :: #directory + "/generated/"
@@ -456,6 +457,7 @@ emit_writer :: proc() {
 	strings.write_string(&sb, "// GENERATED by ../gen.odin -- DO NOT EDIT.\n")
 	strings.write_string(&sb, "// Stage B: serialize the typed tables above to raw blobs under ../../tables/.\n\n")
 	strings.write_string(&sb, "import \"core:os\"\nimport \"core:fmt\"\n\n")
+	strings.write_string(&sb, "import tablegen \"..\"\n\n")
 	strings.write_string(&sb, "TABLES :: #directory + \"/../../tables/\"\n\n")
 	strings.write_string(&sb, "raw :: #force_inline proc \"contextless\" (p: rawptr, n: int) -> []u8 {\n")
 	strings.write_string(&sb, "\treturn (cast([^]u8)p)[:n]\n}\n\n")
@@ -465,7 +467,11 @@ emit_writer :: proc() {
 	strings.write_string(&sb, "\t\tos.exit(1)\n\t}\n}\n\n")
 	strings.write_string(&sb, "main :: proc() {\n")
 	for b in BLOBS {
-		fmt.sbprintfln(&sb, "\tw(TABLES + \"%s\", raw(&%s, size_of(%s)))", b.file, b.global, b.global)
+		if b.global == "CLOBBER_TABLE" {
+			fmt.sbprintfln(&sb, "\tw(TABLES + \"%s\", raw(&tablegen.%s, size_of(tablegen.%s)))", b.file, b.global, b.global)
+		} else {
+			fmt.sbprintfln(&sb, "\tw(TABLES + \"%s\", raw(&%s, size_of(%s)))", b.file, b.global, b.global)
+		}
 	}
 	strings.write_string(&sb, "}\n")
 	emit_file(DIR_GEN + "writer.odin", &sb)

core/rexcode/isa/x86/tablegen/generated/writer.odin

@@ -8,6 +8,8 @@ package rexcode_x86_generated
 import "core:os"
 import "core:fmt"
 
+import tablegen ".."
+
 TABLES :: #directory + "/../../tables/"
 
 raw :: #force_inline proc "contextless" (p: rawptr, n: int) -> []u8 {
@@ -40,4 +42,5 @@ main :: proc() {
 	w(TABLES + "x86.evex_idx_0f.bin", raw(&EVEX_INDEX_0F, size_of(EVEX_INDEX_0F)))
 	w(TABLES + "x86.evex_idx_0f38.bin", raw(&EVEX_INDEX_0F38, size_of(EVEX_INDEX_0F38)))
 	w(TABLES + "x86.evex_idx_0f3a.bin", raw(&EVEX_INDEX_0F3A, size_of(EVEX_INDEX_0F3A)))
+	w(TABLES + "x86.clobber_table.bin", raw(&tablegen.CLOBBER_TABLE, size_of(tablegen.CLOBBER_TABLE)))
 }

core/rexcode/isa/x86/tables.odin

@@ -94,6 +94,7 @@ Decode_Index :: struct {
 @(rodata) EVEX_INDEX_0F         := #load("tables/x86.evex_idx_0f.bin",    []Decode_Index)
 @(rodata) EVEX_INDEX_0F38       := #load("tables/x86.evex_idx_0f38.bin",  []Decode_Index)
 @(rodata) EVEX_INDEX_0F3A       := #load("tables/x86.evex_idx_0f3a.bin",  []Decode_Index)
+@(rodata) CLOBBER_TABLE         := #load("tables/x86.clobber_table.bin",  []Clobber)
 
 // -----------------------------------------------------------------------------
 // Accessors