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Fix view-width testing for unpinned parameters in the lattice

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gingerBill
2026-08-24 23:12:38 +01:00
parent 032566714c
commit a9068261bf
1 changed files with 28 additions and 0 deletions
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28
src/check_asm.cpp
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@@ -1671,6 +1671,34 @@ gb_internal void check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm
if (cast(u16)clobber.written & (1u << slot)) {
array_add(&facts->gen_params, pe);
}
{ // View aliasing: a view decl shares its source's physical register.
auto const &decls = tmpl_entity->AsmTemplate.decls;
i32 di = -1;
check_asm_find_group(pe, decls, &di);
if (di >= 0 && decls[di].view_of >= 0) {
i32 src_i = decls[di].view_of;
Entity *src_e = decls[src_i].entity;
if (src_e != nullptr) {
GB_ASSERT_MSG(asm_decl_resolve_pin_bit(asm_ctx, decls, cast(i32)di) == 0 &&
asm_decl_resolve_pin_bit(asm_ctx, decls, src_i) == 0,
"view/source share a reg bit; fix the width gate on the reg-bit path, not gen_params");
// A read of the view is a read of the source
if (cast(u16)clobber.read & (1u << slot)) {
array_add(&facts->read_params, src_e);
}
// A write of the view defines the source only if it covers the parent
if (cast(u16)clobber.written & (1u << slot)) {
i32 parent_w = check_asm_operand_bit_width(src_e->type);
if (decls[di].view_bits == 32 || decls[di].view_bits == parent_w) {
array_add(&facts->gen_params, src_e);
}
}
}
}
}
}
{