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rexcode/mips: FPU FMA, MSA COPY/INSERT, DSP 2-register, DI/EI/RDHWR

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New FR (FP reg at 25:21) encoding for the COP1X 4-register fused
multiply-adds MADD/MSUB/NMADD/NMSUB.S/.D. New GPR_AT_6 / GPR_AT_11
encodings (GPR in a vector-register slot, with correct GPR decode) for
MSA COPY_S/U (lane->GPR) and INSERT (GPR->lane). DSP two-register
PRECEQU/PRECEU (.PH.QBLA/QBRA) and REPLV (.PH/.QB). Control ops DI/EI and
RDHWR. 25 forms; spot-checked byte-exact vs llvm-mc and decode-clean; 281
tests green.
This commit is contained in:
Brendan Punsky
2026-06-18 03:31:40 -04:00
committed by Flāvius
parent 930b988ebf
commit c2de507bb0
15 changed files with 1252 additions and 990 deletions
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6
core/rexcode/mips/decoder.odin
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@@ -200,6 +200,12 @@ extract_operand_inline :: #force_inline proc "contextless" (
return reg_operand(decode_reg(word, 11, ot), ot)
case .FD:
return reg_operand(decode_reg(word, 6, ot), ot)
case .FR:
return reg_operand(decode_reg(word, 21, ot), ot)
case .GPR_AT_6:
return reg_operand(decode_reg(word, 6, ot), ot)
case .GPR_AT_11:
return reg_operand(decode_reg(word, 11, ot), ot)
// Immediates ------------------------------------------------------------
case .IMM_16: