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rexcode/mips: R5900 MMI MADD/MSUB, RDPGPR/WRPGPR; drop BPOSGE64 -> 100%

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PS2 R5900 MMI: MSUB1/MSUBU1 (second-MAC, SPECIAL2 func +0x20 exactly like
the implemented MADD1/MADDU1) and the three-operand MADD_EE/MADDU_EE/
MSUB_EE/MSUBU_EE (write Rd as well as HI/LO; the Rd!=0 form selected by a
less-specific mask after the two-operand MADD/MSUB and PLZCW match).
RDPGPR/WRPGPR (COP0 shadow-GPR move, hand-encoded from the MIPS32r2 manual
since llvm-mc gates them). Drop BPOSGE64: not a real ISA instruction
(DSPControl.pos is 6-bit, only BPOSGE32 exists; llvm rejects it).

Every encodable mips Mnemonic now has an encode form (gap = 0). All
self-consistent and decode-clean; 281 tests green.
This commit is contained in:
Brendan Punsky
2026-06-18 04:17:50 -04:00
committed by Flāvius
parent 61a62185b8
commit c6edd6d5cd
12 changed files with 1072 additions and 1001 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
core/rexcode/mips/mnemonic_builders.odin
View File

@@ -332,6 +332,10 @@ inst_seh_r_r :: #force_inline proc "contextless" (dst: GPR, src: G
emit_seh_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_seh_r_r(dst, src)) }
inst_rdhwr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .RDHWR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_rdhwr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_rdhwr_r_r(dst, src)) }
inst_rdpgpr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .RDPGPR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_rdpgpr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_rdpgpr_r_r(dst, src)) }
inst_wrpgpr_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .WRPGPR, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_wrpgpr_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_wrpgpr_r_r(dst, src)) }
inst_di_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .DI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
emit_di_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_di_r(dst)) }
inst_ei_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .EI, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
@@ -860,10 +864,22 @@ inst_div1_r_r :: #force_inline proc "contextless" (dst: GPR, src: G
emit_div1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_div1_r_r(dst, src)) }
inst_divu1_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .DIVU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_divu1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_divu1_r_r(dst, src)) }
inst_madd_ee_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MADD_EE, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
emit_madd_ee_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_madd_ee_r_r_r(dst, src, src2)) }
inst_maddu_ee_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MADDU_EE, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
emit_maddu_ee_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_maddu_ee_r_r_r(dst, src, src2)) }
inst_msub_ee_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MSUB_EE, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
emit_msub_ee_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_msub_ee_r_r_r(dst, src, src2)) }
inst_msubu_ee_r_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MSUBU_EE, operand_count = 3, length = 4, ops = {op_gpr(dst), op_gpr(src), op_gpr(src2), {}}} }
emit_msubu_ee_r_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR, src2: GPR) { append(instructions, inst_msubu_ee_r_r_r(dst, src, src2)) }
inst_madd1_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADD1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_madd1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_madd1_r_r(dst, src)) }
inst_maddu1_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MADDU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_maddu1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_maddu1_r_r(dst, src)) }
inst_msub1_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUB1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_msub1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msub1_r_r(dst, src)) }
inst_msubu1_r_r :: #force_inline proc "contextless" (dst: GPR, src: GPR) -> Instruction { return Instruction{mnemonic = .MSUBU1, operand_count = 2, length = 4, ops = {op_gpr(dst), op_gpr(src), {}, {}}} }
emit_msubu1_r_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR, src: GPR) { append(instructions, inst_msubu1_r_r(dst, src)) }
inst_pmfhl_lw_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_LW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
emit_pmfhl_lw_r :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: GPR) { append(instructions, inst_pmfhl_lw_r(dst)) }
inst_pmfhl_uw_r :: #force_inline proc "contextless" (dst: GPR) -> Instruction { return Instruction{mnemonic = .PMFHL_UW, operand_count = 1, length = 4, ops = {op_gpr(dst), {}, {}, {}}} }
@@ -2373,6 +2389,10 @@ inst_seh :: inst_seh_r_r
emit_seh :: emit_seh_r_r
inst_rdhwr :: inst_rdhwr_r_r
emit_rdhwr :: emit_rdhwr_r_r
inst_rdpgpr :: inst_rdpgpr_r_r
emit_rdpgpr :: emit_rdpgpr_r_r
inst_wrpgpr :: inst_wrpgpr_r_r
emit_wrpgpr :: emit_wrpgpr_r_r
inst_di :: inst_di_r
emit_di :: emit_di_r
inst_ei :: inst_ei_r
@@ -2901,10 +2921,22 @@ inst_div1 :: inst_div1_r_r
emit_div1 :: emit_div1_r_r
inst_divu1 :: inst_divu1_r_r
emit_divu1 :: emit_divu1_r_r
inst_madd_ee :: inst_madd_ee_r_r_r
emit_madd_ee :: emit_madd_ee_r_r_r
inst_maddu_ee :: inst_maddu_ee_r_r_r
emit_maddu_ee :: emit_maddu_ee_r_r_r
inst_msub_ee :: inst_msub_ee_r_r_r
emit_msub_ee :: emit_msub_ee_r_r_r
inst_msubu_ee :: inst_msubu_ee_r_r_r
emit_msubu_ee :: emit_msubu_ee_r_r_r
inst_madd1 :: inst_madd1_r_r
emit_madd1 :: emit_madd1_r_r
inst_maddu1 :: inst_maddu1_r_r
emit_maddu1 :: emit_maddu1_r_r
inst_msub1 :: inst_msub1_r_r
emit_msub1 :: emit_msub1_r_r
inst_msubu1 :: inst_msubu1_r_r
emit_msubu1 :: emit_msubu1_r_r
inst_pmfhl_lw :: inst_pmfhl_lw_r
emit_pmfhl_lw :: emit_pmfhl_lw_r
inst_pmfhl_uw :: inst_pmfhl_uw_r

1
core/rexcode/mips/mnemonics.odin
View File

@@ -401,7 +401,6 @@ Mnemonic :: enum u16 {
// DSP control / branch
BPOSGE32, // branch if DSPControl.pos >= 32
BPOSGE64, // 64-bit variant (only MIPS64 DSP)
INSV, // insert variable position
BITREV, // R2 bit reversal
ABSQ_S_PH, ABSQ_S_W,

17
core/rexcode/mips/tablegen/encoding_table.odin
View File

@@ -590,6 +590,16 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
.DIVU1 = { {.DIVU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7000001B, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true}} },
.MADD1 = { {.MADD1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000020, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true}} },
.MADDU1 = { {.MADDU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000021, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true}} },
// Second-MAC subtract forms: same SPECIAL2 func + 0x20 as MADD1/MADDU1.
.MSUB1 = { {.MSUB1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000024, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true}} },
.MSUBU1 = { {.MSUBU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000025, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true}} },
// R5900 three-operand multiply-accumulate (writes Rd as well as HI/LO).
// Same SPECIAL2 funcs as the MIPS32 two-operand MADD/MADDU/MSUB/MSUBU; the
// Rd != 0 form is selected by the less-specific mask after those match.
.MADD_EE = { {.MADD_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000000, 0xFC0007FF, .MMI_PS2, {writes_hilo=true}} },
.MADDU_EE = { {.MADDU_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000001, 0xFC0007FF, .MMI_PS2, {writes_hilo=true}} },
.MSUB_EE = { {.MSUB_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000004, 0xFC0007FF, .MMI_PS2, {writes_hilo=true}} },
.MSUBU_EE = { {.MSUBU_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000005, 0xFC0007FF, .MMI_PS2, {writes_hilo=true}} },
// Pack/unpack HI:LO (PMFHL with 5-bit sub-op in sa slot).
.PMFHL_LW = { {.PMFHL_LW, {.GPR,.NONE,.NONE,.NONE}, {.RD,.NONE,.NONE,.NONE}, 0x70000030, 0xFFFF07FF, .MMI_PS2, {}} },
@@ -1484,6 +1494,13 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
.MOVF_PS = { {.MOVF_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C00011, 0xFFE3003F, .FPU, {}} },
.MOVT_PS = { {.MOVT_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C10011, 0xFFE3003F, .FPU, {}} },
// COP0 shadow-GPR move (MIPS32r2). llvm-mc gates these behind a feature it
// does not expose, so they are hand-encoded from the manual: COP0 (0x10),
// sub-opcode 0x0A (RDPGPR) / 0x0E (WRPGPR) at 25:21, rt at 20:16, rd at
// 15:11. Decode-clean.
.RDPGPR = { {.RDPGPR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x41400000, 0xFFE007FF, .MIPS32_R2, {}} },
.WRPGPR = { {.WRPGPR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x41C00000, 0xFFE007FF, .MIPS32_R2, {}} },
// SPECGEN:BEGIN
.FADD_W = { {.FADD_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800001B, 0xFFE0003F, .MSA, {}} },
.FADD_D = { {.FADD_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820001B, 0xFFE0003F, .MSA, {}} },

256
core/rexcode/mips/tablegen/generated/decode_tables.odin
View File

@@ -8,7 +8,7 @@ package rexcode_mips_generated
import lib "../.."
@(rodata)
DECODE_ENTRIES := [1018]lib.Decode_Entry{
DECODE_ENTRIES := [1026]lib.Decode_Entry{
{ .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} },
{ .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} },
{ .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} },
@@ -139,6 +139,8 @@ DECODE_ENTRIES := [1018]lib.Decode_Entry{
{ .TLBWR, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x42000006, 0xFFFFFFFF, .COP0, {} },
{ .DI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606000, 0xFFE0FFFF, .MIPS32_R2, {} },
{ .EI, {.GPR,.NONE,.NONE,.NONE}, {.RT,.NONE,.NONE,.NONE}, 0x41606020, 0xFFE0FFFF, .MIPS32_R2, {} },
{ .RDPGPR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x41400000, 0xFFE007FF, .MIPS32_R2, {} },
{ .WRPGPR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x41C00000, 0xFFE007FF, .MIPS32_R2, {} },
{ .MFC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40000000, 0xFFE007F8, .COP0, {} },
{ .MTC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40800000, 0xFFE007F8, .COP0, {} },
{ .DMFC0, {.GPR,.CP0_REG,.SEL,.NONE}, {.RT,.RD,.SEL,.NONE}, 0x40200000, 0xFFE007F8, .COP0, {only_64=true} },
@@ -399,11 +401,15 @@ DECODE_ENTRIES := [1018]lib.Decode_Entry{
{ .VMAX_Q, {.VFPU_Q,.VFPU_Q,.VFPU_Q,.NONE}, {.VFPU_VD,.VFPU_VS,.VFPU_VT,.NONE}, 0x6D808080, 0xFF808080, .VFPU_PSP, {} },
{ .LDR, {.GPR,.MEM,.NONE,.NONE}, {.RT,.OFFSET_BASE,.NONE,.NONE}, 0x6C000000, 0xFC000000, .MIPS_III, {only_64=true} },
{ .MADD, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000000, 0xFC00FFFF, .MIPS32_R1, {writes_hilo=true} },
{ .MADD_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000000, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
{ .MADDU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000001, 0xFC00FFFF, .MIPS32_R1, {writes_hilo=true} },
{ .MADDU_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000001, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
{ .MUL, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000002, 0xFC0007FF, .MIPS32_R1, {} },
{ .MSUB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000004, 0xFC00FFFF, .MIPS32_R1, {writes_hilo=true} },
{ .PLZCW, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000004, 0xFC1F07FF, .MMI_PS2, {} },
{ .MSUB_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000004, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
{ .MSUBU, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000005, 0xFC00FFFF, .MIPS32_R1, {writes_hilo=true} },
{ .MSUBU_EE, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000005, 0xFC0007FF, .MMI_PS2, {writes_hilo=true} },
{ .PADDB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000208, 0xFC0007FF, .MMI_PS2, {} },
{ .PADDH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000108, 0xFC0007FF, .MMI_PS2, {} },
{ .PADDW, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000008, 0xFC0007FF, .MMI_PS2, {} },
@@ -468,7 +474,9 @@ DECODE_ENTRIES := [1018]lib.Decode_Entry{
{ .CLO, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000021, 0xFC1F07FF, .MIPS32_R1, {} },
{ .MADDU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000021, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
{ .DCLZ, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000024, 0xFC1F07FF, .MIPS64_R1, {only_64=true} },
{ .MSUB1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000024, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
{ .DCLO, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RS,.NONE,.NONE}, 0x70000025, 0xFC1F07FF, .MIPS64_R1, {only_64=true} },
{ .MSUBU1, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x70000025, 0xFC00FFFF, .MMI_PS2, {writes_hilo=true} },
{ .PABSH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x70000168, 0xFC1F07FF, .MMI_PS2, {} },
{ .PABSW, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x70000068, 0xFC1F07FF, .MMI_PS2, {} },
{ .PADDUB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x70000628, 0xFC0007FF, .MMI_PS2, {} },
@@ -1047,54 +1055,54 @@ DECODE_INDEX_PRIMARY := [64]lib.Decode_Index{
0x0D = { 118, 1},
0x0E = { 119, 1},
0x0F = { 120, 2},
0x10 = { 122, 15},
0x11 = { 137, 146},
0x12 = { 283, 36},
0x13 = { 319, 17},
0x14 = { 336, 1},
0x15 = { 337, 1},
0x16 = { 338, 4},
0x17 = { 342, 4},
0x18 = { 346, 14},
0x19 = { 360, 15},
0x1A = { 375, 1},
0x1B = { 376, 13},
0x1C = { 389, 109},
0x1D = { 498, 1},
0x1E = { 499, 230},
0x1F = { 729, 141},
0x20 = { 870, 1},
0x21 = { 871, 1},
0x22 = { 872, 1},
0x23 = { 873, 1},
0x24 = { 874, 1},
0x25 = { 875, 1},
0x26 = { 876, 1},
0x27 = { 877, 1},
0x28 = { 878, 1},
0x29 = { 879, 1},
0x2A = { 880, 1},
0x2B = { 881, 1},
0x2C = { 882, 1},
0x2D = { 883, 1},
0x2E = { 884, 1},
0x2F = { 885, 1},
0x30 = { 886, 1},
0x31 = { 887, 1},
0x32 = { 888, 3},
0x33 = { 891, 1},
0x34 = { 892, 63},
0x35 = { 955, 3},
0x36 = { 958, 5},
0x37 = { 963, 6},
0x38 = { 969, 1},
0x39 = { 970, 1},
0x3A = { 971, 3},
0x3B = { 974, 5},
0x3C = { 979, 27},
0x3D = {1006, 3},
0x3E = {1009, 5},
0x3F = {1014, 4},
0x10 = { 122, 17},
0x11 = { 139, 146},
0x12 = { 285, 36},
0x13 = { 321, 17},
0x14 = { 338, 1},
0x15 = { 339, 1},
0x16 = { 340, 4},
0x17 = { 344, 4},
0x18 = { 348, 14},
0x19 = { 362, 15},
0x1A = { 377, 1},
0x1B = { 378, 13},
0x1C = { 391, 115},
0x1D = { 506, 1},
0x1E = { 507, 230},
0x1F = { 737, 141},
0x20 = { 878, 1},
0x21 = { 879, 1},
0x22 = { 880, 1},
0x23 = { 881, 1},
0x24 = { 882, 1},
0x25 = { 883, 1},
0x26 = { 884, 1},
0x27 = { 885, 1},
0x28 = { 886, 1},
0x29 = { 887, 1},
0x2A = { 888, 1},
0x2B = { 889, 1},
0x2C = { 890, 1},
0x2D = { 891, 1},
0x2E = { 892, 1},
0x2F = { 893, 1},
0x30 = { 894, 1},
0x31 = { 895, 1},
0x32 = { 896, 3},
0x33 = { 899, 1},
0x34 = { 900, 63},
0x35 = { 963, 3},
0x36 = { 966, 5},
0x37 = { 971, 6},
0x38 = { 977, 1},
0x39 = { 978, 1},
0x3A = { 979, 3},
0x3B = { 982, 5},
0x3C = { 987, 27},
0x3D = {1014, 3},
0x3E = {1017, 5},
0x3F = {1022, 4},
}
@(rodata)
@@ -1188,88 +1196,88 @@ DECODE_INDEX_REGIMM := [32]lib.Decode_Index{
@(rodata)
DECODE_INDEX_COP1 := [32]lib.Decode_Index{
0x00 = { 137, 1},
0x01 = { 138, 1},
0x02 = { 139, 1},
0x03 = { 140, 1},
0x04 = { 141, 1},
0x05 = { 142, 1},
0x06 = { 143, 1},
0x07 = { 144, 1},
0x08 = { 145, 4},
0x09 = { 149, 1},
0x0B = { 150, 1},
0x0D = { 151, 1},
0x0F = { 152, 1},
0x10 = { 153, 42},
0x11 = { 195, 42},
0x14 = { 237, 4},
0x15 = { 241, 2},
0x16 = { 243, 32},
0x18 = { 275, 1},
0x19 = { 276, 1},
0x1A = { 277, 1},
0x1B = { 278, 1},
0x1C = { 279, 1},
0x1D = { 280, 1},
0x1E = { 281, 1},
0x1F = { 282, 1},
0x00 = { 139, 1},
0x01 = { 140, 1},
0x02 = { 141, 1},
0x03 = { 142, 1},
0x04 = { 143, 1},
0x05 = { 144, 1},
0x06 = { 145, 1},
0x07 = { 146, 1},
0x08 = { 147, 4},
0x09 = { 151, 1},
0x0B = { 152, 1},
0x0D = { 153, 1},
0x0F = { 154, 1},
0x10 = { 155, 42},
0x11 = { 197, 42},
0x14 = { 239, 4},
0x15 = { 243, 2},
0x16 = { 245, 32},
0x18 = { 277, 1},
0x19 = { 278, 1},
0x1A = { 279, 1},
0x1B = { 280, 1},
0x1C = { 281, 1},
0x1D = { 282, 1},
0x1E = { 283, 1},
0x1F = { 284, 1},
}
@(rodata)
DECODE_INDEX_SPECIAL2 := [64]lib.Decode_Index{
0x00 = { 389, 1},
0x01 = { 390, 1},
0x02 = { 391, 1},
0x04 = { 392, 2},
0x05 = { 394, 1},
0x08 = { 395, 25},
0x09 = { 420, 26},
0x10 = { 446, 1},
0x11 = { 447, 1},
0x12 = { 448, 1},
0x13 = { 449, 1},
0x18 = { 450, 1},
0x19 = { 451, 1},
0x1A = { 452, 1},
0x1B = { 453, 1},
0x20 = { 454, 2},
0x21 = { 456, 2},
0x24 = { 458, 1},
0x25 = { 459, 1},
0x28 = { 460, 17},
0x29 = { 477, 8},
0x30 = { 485, 5},
0x31 = { 490, 1},
0x34 = { 491, 1},
0x36 = { 492, 1},
0x37 = { 493, 1},
0x3C = { 494, 1},
0x3E = { 495, 1},
0x3F = { 496, 2},
0x00 = { 391, 2},
0x01 = { 393, 2},
0x02 = { 395, 1},
0x04 = { 396, 3},
0x05 = { 399, 2},
0x08 = { 401, 25},
0x09 = { 426, 26},
0x10 = { 452, 1},
0x11 = { 453, 1},
0x12 = { 454, 1},
0x13 = { 455, 1},
0x18 = { 456, 1},
0x19 = { 457, 1},
0x1A = { 458, 1},
0x1B = { 459, 1},
0x20 = { 460, 2},
0x21 = { 462, 2},
0x24 = { 464, 2},
0x25 = { 466, 2},
0x28 = { 468, 17},
0x29 = { 485, 8},
0x30 = { 493, 5},
0x31 = { 498, 1},
0x34 = { 499, 1},
0x36 = { 500, 1},
0x37 = { 501, 1},
0x3C = { 502, 1},
0x3E = { 503, 1},
0x3F = { 504, 2},
}
@(rodata)
DECODE_INDEX_SPECIAL3 := [64]lib.Decode_Index{
0x00 = { 729, 2},
0x01 = { 731, 1},
0x02 = { 732, 1},
0x03 = { 733, 1},
0x04 = { 734, 1},
0x05 = { 735, 1},
0x06 = { 736, 1},
0x07 = { 737, 1},
0x0A = { 738, 3},
0x0C = { 741, 1},
0x0F = { 742, 8},
0x10 = { 750, 22},
0x11 = { 772, 15},
0x12 = { 787, 17},
0x13 = { 804, 22},
0x20 = { 826, 5},
0x24 = { 831, 4},
0x30 = { 835, 17},
0x38 = { 852, 17},
0x3B = { 869, 1},
0x00 = { 737, 2},
0x01 = { 739, 1},
0x02 = { 740, 1},
0x03 = { 741, 1},
0x04 = { 742, 1},
0x05 = { 743, 1},
0x06 = { 744, 1},
0x07 = { 745, 1},
0x0A = { 746, 3},
0x0C = { 749, 1},
0x0F = { 750, 8},
0x10 = { 758, 22},
0x11 = { 780, 15},
0x12 = { 795, 17},
0x13 = { 812, 22},
0x20 = { 834, 5},
0x24 = { 839, 4},
0x30 = { 843, 17},
0x38 = { 860, 17},
0x3B = { 877, 1},
}

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core/rexcode/mips/tablegen/generated/encode_tables.odin
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