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core/crypto/_aes/hw_intel: Use a constant for the PSHUFB indicies
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@@ -3,7 +3,7 @@ package aes_hw_intel
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import "core:sys/info"
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// is_supporte returns true iff hardware accelerated AES
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// is_supported returns true iff hardware accelerated AES
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// is supported.
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is_supported :: proc "contextless" () -> bool {
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features, ok := info.cpu_features.?
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@@ -25,7 +25,6 @@ package aes_hw_intel
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import "base:intrinsics"
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import "core:crypto/_aes"
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import "core:simd"
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import "core:simd/x86"
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@(private = "file")
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@@ -58,14 +57,11 @@ GHASH_STRIDE_BYTES_HW :: GHASH_STRIDE_HW * _aes.GHASH_BLOCK_SIZE
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// chunks. We number chunks from 0 to 3 in left to right order.
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@(private = "file")
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byteswap_index := transmute(x86.__m128i)simd.i8x16{
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// Note: simd.i8x16 is reverse order from x86._mm_set_epi8.
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15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
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}
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_BYTESWAP_INDEX: x86.__m128i : { 0x08090a0b0c0d0e0f, 0x0001020304050607 }
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@(private = "file", require_results, enable_target_feature = "sse2,ssse3")
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byteswap :: #force_inline proc "contextless" (x: x86.__m128i) -> x86.__m128i {
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return x86._mm_shuffle_epi8(x, byteswap_index)
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return x86._mm_shuffle_epi8(x, _BYTESWAP_INDEX)
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}
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// From a 128-bit value kw, compute kx as the XOR of the two 64-bit
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