rexcode/mips: paired-single FMA + conditional-move forms (spec-derived)

MADD/MSUB/NMADD/NMSUB.PS and MOVN/MOVZ/MOVF/MOVT.PS. This llvm-mc only knows the .S/.D variants, so these are derived from the llvm-verified single forms by switching the data-format field to PS (COP1X FMA fmt is bits 2:0, S=0 -> PS=6; COP1 conditional-move fmt is bits 25:21, S=16 -> PS=22), per the MIPS64 manual. Same operand slots/masks. Decode-clean and 281 tests green.
2026-08-29 08:21:32 +00:00 · 2026-06-18 03:59:04 -04:00
parent 09c1d5ba0f
commit eab483a527
11 changed files with 946 additions and 876 deletions
--- a/core/rexcode/mips/mnemonic_builders.odin
+++ b/core/rexcode/mips/mnemonic_builders.odin
@@ -514,34 +514,50 @@ inst_madd_s_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: F
 emit_madd_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_s_f_f_f_f(dst, src, src2, src3)) }
 inst_madd_d_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_madd_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_d_f_f_f_f(dst, src, src2, src3)) }
+inst_madd_ps_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MADD_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
+emit_madd_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_madd_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_msub_s_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_msub_s_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_s_f_f_f_f(dst, src, src2, src3)) }
 inst_msub_d_f_f_f_f        :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_msub_d_f_f_f_f        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_d_f_f_f_f(dst, src, src2, src3)) }
+inst_msub_ps_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .MSUB_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
+emit_msub_ps_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_msub_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_nmadd_s_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_nmadd_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_s_f_f_f_f(dst, src, src2, src3)) }
 inst_nmadd_d_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_nmadd_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_d_f_f_f_f(dst, src, src2, src3)) }
+inst_nmadd_ps_f_f_f_f      :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMADD_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
+emit_nmadd_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmadd_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_nmsub_s_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_S, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_nmsub_s_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_s_f_f_f_f(dst, src, src2, src3)) }
 inst_nmsub_d_f_f_f_f       :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_D, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
 emit_nmsub_d_f_f_f_f       :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_d_f_f_f_f(dst, src, src2, src3)) }
+inst_nmsub_ps_f_f_f_f      :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: FPR, src3: FPR) -> Instruction { return Instruction{mnemonic = .NMSUB_PS, operand_count = 4, length = 4, ops = {op_fpr(dst), op_fpr(src), op_fpr(src2), op_fpr(src3)}} }
+emit_nmsub_ps_f_f_f_f      :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: FPR, src3: FPR) { append(instructions, inst_nmsub_ps_f_f_f_f(dst, src, src2, src3)) }
 inst_movn_s_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
 emit_movn_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_s_f_f_r(dst, src, src2)) }
 inst_movn_d_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
 emit_movn_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_d_f_f_r(dst, src, src2)) }
+inst_movn_ps_f_f_r         :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVN_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
+emit_movn_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movn_ps_f_f_r(dst, src, src2)) }
 inst_movz_s_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
 emit_movz_s_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_s_f_f_r(dst, src, src2)) }
 inst_movz_d_f_f_r          :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
 emit_movz_d_f_f_r          :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_d_f_f_r(dst, src, src2)) }
+inst_movz_ps_f_f_r         :: #force_inline proc "contextless" (dst: FPR, src: FPR, src2: GPR) -> Instruction { return Instruction{mnemonic = .MOVZ_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_gpr(src2), {}}} }
+emit_movz_ps_f_f_r         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, src2: GPR) { append(instructions, inst_movz_ps_f_f_r(dst, src, src2)) }
 inst_movf_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
 emit_movf_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_s_f_f_cc(dst, src, imm)) }
 inst_movf_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
 emit_movf_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_d_f_f_cc(dst, src, imm)) }
+inst_movf_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVF_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
+emit_movf_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movf_ps_f_f_cc(dst, src, imm)) }
 inst_movt_s_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_S, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
 emit_movt_s_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_s_f_f_cc(dst, src, imm)) }
 inst_movt_d_f_f_cc         :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_D, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
 emit_movt_d_f_f_cc         :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_d_f_f_cc(dst, src, imm)) }
+inst_movt_ps_f_f_cc        :: #force_inline proc "contextless" (dst: FPR, src: FPR, imm: i64) -> Instruction { return Instruction{mnemonic = .MOVT_PS, operand_count = 3, length = 4, ops = {op_fpr(dst), op_fpr(src), op_imm(imm, 1), {}}} }
+emit_movt_ps_f_f_cc        :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR, imm: i64) { append(instructions, inst_movt_ps_f_f_cc(dst, src, imm)) }
 inst_cvt_s_d_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_D, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
 emit_cvt_s_d_f_f           :: #force_inline proc(instructions: ^[dynamic]Instruction, dst: FPR, src: FPR) { append(instructions, inst_cvt_s_d_f_f(dst, src)) }
 inst_cvt_s_w_f_f           :: #force_inline proc "contextless" (dst: FPR, src: FPR) -> Instruction { return Instruction{mnemonic = .CVT_S_W, operand_count = 2, length = 4, ops = {op_fpr(dst), op_fpr(src), {}, {}}} }
@@ -2513,34 +2529,50 @@ inst_madd_s                :: inst_madd_s_f_f_f_f
 emit_madd_s                :: emit_madd_s_f_f_f_f
 inst_madd_d                :: inst_madd_d_f_f_f_f
 emit_madd_d                :: emit_madd_d_f_f_f_f
+inst_madd_ps               :: inst_madd_ps_f_f_f_f
+emit_madd_ps               :: emit_madd_ps_f_f_f_f
 inst_msub_s                :: inst_msub_s_f_f_f_f
 emit_msub_s                :: emit_msub_s_f_f_f_f
 inst_msub_d                :: inst_msub_d_f_f_f_f
 emit_msub_d                :: emit_msub_d_f_f_f_f
+inst_msub_ps               :: inst_msub_ps_f_f_f_f
+emit_msub_ps               :: emit_msub_ps_f_f_f_f
 inst_nmadd_s               :: inst_nmadd_s_f_f_f_f
 emit_nmadd_s               :: emit_nmadd_s_f_f_f_f
 inst_nmadd_d               :: inst_nmadd_d_f_f_f_f
 emit_nmadd_d               :: emit_nmadd_d_f_f_f_f
+inst_nmadd_ps              :: inst_nmadd_ps_f_f_f_f
+emit_nmadd_ps              :: emit_nmadd_ps_f_f_f_f
 inst_nmsub_s               :: inst_nmsub_s_f_f_f_f
 emit_nmsub_s               :: emit_nmsub_s_f_f_f_f
 inst_nmsub_d               :: inst_nmsub_d_f_f_f_f
 emit_nmsub_d               :: emit_nmsub_d_f_f_f_f
+inst_nmsub_ps              :: inst_nmsub_ps_f_f_f_f
+emit_nmsub_ps              :: emit_nmsub_ps_f_f_f_f
 inst_movn_s                :: inst_movn_s_f_f_r
 emit_movn_s                :: emit_movn_s_f_f_r
 inst_movn_d                :: inst_movn_d_f_f_r
 emit_movn_d                :: emit_movn_d_f_f_r
+inst_movn_ps               :: inst_movn_ps_f_f_r
+emit_movn_ps               :: emit_movn_ps_f_f_r
 inst_movz_s                :: inst_movz_s_f_f_r
 emit_movz_s                :: emit_movz_s_f_f_r
 inst_movz_d                :: inst_movz_d_f_f_r
 emit_movz_d                :: emit_movz_d_f_f_r
+inst_movz_ps               :: inst_movz_ps_f_f_r
+emit_movz_ps               :: emit_movz_ps_f_f_r
 inst_movf_s                :: inst_movf_s_f_f_cc
 emit_movf_s                :: emit_movf_s_f_f_cc
 inst_movf_d                :: inst_movf_d_f_f_cc
 emit_movf_d                :: emit_movf_d_f_f_cc
+inst_movf_ps               :: inst_movf_ps_f_f_cc
+emit_movf_ps               :: emit_movf_ps_f_f_cc
 inst_movt_s                :: inst_movt_s_f_f_cc
 emit_movt_s                :: emit_movt_s_f_f_cc
 inst_movt_d                :: inst_movt_d_f_f_cc
 emit_movt_d                :: emit_movt_d_f_f_cc
+inst_movt_ps               :: inst_movt_ps_f_f_cc
+emit_movt_ps               :: emit_movt_ps_f_f_cc
 inst_cvt_s_d               :: inst_cvt_s_d_f_f
 emit_cvt_s_d               :: emit_cvt_s_d_f_f
 inst_cvt_s_w               :: inst_cvt_s_w_f_f
--- a/core/rexcode/mips/tablegen/encoding_table.odin
+++ b/core/rexcode/mips/tablegen/encoding_table.odin
@@ -1451,6 +1451,20 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
    .VIIM_S = { {.VIIM_S, {.VFPU_S, .IMM16S, .NONE, .NONE}, {.RT, .IMM_16, .NONE, .NONE}, 0xDF000000, 0xFF800000, .VFPU_PSP, {}} },
    .VFIM_S = { {.VFIM_S, {.VFPU_S, .IMM16S, .NONE, .NONE}, {.RT, .IMM_16, .NONE, .NONE}, 0xDF800000, 0xFF800000, .VFPU_PSP, {}} },

+    // Paired-single FP that this llvm-mc cannot assemble (it knows only .S/.D
+    // of these). Derived from the llvm-verified single forms by setting the
+    // data format to PS: COP1X fused-multiply-add fmt is bits 2:0 (S=0 -> PS=6),
+    // and the COP1 conditional-move fmt is bits 25:21 (S=16 -> PS=22, i.e.
+    // +0x00C00000). Same operand slots and masks as the .S forms. Decode-clean.
+    .MADD_PS  = { {.MADD_PS,  {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C000026, 0xFC00003F, .FPU, {}} },
+    .MSUB_PS  = { {.MSUB_PS,  {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C00002E, 0xFC00003F, .FPU, {}} },
+    .NMADD_PS = { {.NMADD_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C000036, 0xFC00003F, .FPU, {}} },
+    .NMSUB_PS = { {.NMSUB_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C00003E, 0xFC00003F, .FPU, {}} },
+    .MOVN_PS  = { {.MOVN_PS,  {.FPR_PS,.FPR_PS,.GPR,.NONE}, {.FD,.FS,.RT,.NONE}, 0x46C00013, 0xFFE0003F, .FPU, {}} },
+    .MOVZ_PS  = { {.MOVZ_PS,  {.FPR_PS,.FPR_PS,.GPR,.NONE}, {.FD,.FS,.RT,.NONE}, 0x46C00012, 0xFFE0003F, .FPU, {}} },
+    .MOVF_PS  = { {.MOVF_PS,  {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C00011, 0xFFE3003F, .FPU, {}} },
+    .MOVT_PS  = { {.MOVT_PS,  {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C10011, 0xFFE3003F, .FPU, {}} },
+
    // SPECGEN:BEGIN
    .FADD_W = { {.FADD_W, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800001B, 0xFFE0003F, .MSA, {}} },
    .FADD_D = { {.FADD_D, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7820001B, 0xFFE0003F, .MSA, {}} },
--- a/core/rexcode/mips/tablegen/generated/decode_tables.odin
+++ b/core/rexcode/mips/tablegen/generated/decode_tables.odin
@@ -8,7 +8,7 @@ package rexcode_mips_generated
 import lib "../.."

@(rodata)
-DECODE_ENTRIES := [997]lib.Decode_Entry{
+DECODE_ENTRIES := [1005]lib.Decode_Entry{
 	{ .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} },
 	{ .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} },
 	{ .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} },
@@ -254,6 +254,8 @@ DECODE_ENTRIES := [997]lib.Decode_Entry{
 	{ .MOV_PS, {.FPR_PS,.FPR_PS,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46C00006, 0xFFFF003F, .MIPS_V, {} },
 	{ .CVT_S_PU, {.FPR_S,.FPR_PS,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46C00020, 0xFFFF003F, .FPU, {} },
 	{ .CVT_S_PL, {.FPR_S,.FPR_PS,.NONE,.NONE}, {.FD,.FS,.NONE,.NONE}, 0x46C00028, 0xFFFF003F, .FPU, {} },
+	{ .MOVF_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C00011, 0xFFE3003F, .FPU, {} },
+	{ .MOVT_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FD,.FS,.FCC_BC,.NONE}, 0x46C10011, 0xFFE3003F, .FPU, {} },
 	{ .C_F_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FS,.FT,.FCC_CC,.NONE}, 0x46C00030, 0xFFE000FF, .MIPS_V, {} },
 	{ .C_UN_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FS,.FT,.FCC_CC,.NONE}, 0x46C00031, 0xFFE000FF, .MIPS_V, {} },
 	{ .C_EQ_PS, {.FPR_PS,.FPR_PS,.FCC,.NONE}, {.FS,.FT,.FCC_CC,.NONE}, 0x46C00032, 0xFFE000FF, .MIPS_V, {} },
@@ -273,6 +275,8 @@ DECODE_ENTRIES := [997]lib.Decode_Entry{
 	{ .ADD_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C00000, 0xFFE0003F, .MIPS_V, {} },
 	{ .SUB_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C00001, 0xFFE0003F, .MIPS_V, {} },
 	{ .MUL_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C00002, 0xFFE0003F, .MIPS_V, {} },
+	{ .MOVN_PS, {.FPR_PS,.FPR_PS,.GPR,.NONE}, {.FD,.FS,.RT,.NONE}, 0x46C00013, 0xFFE0003F, .FPU, {} },
+	{ .MOVZ_PS, {.FPR_PS,.FPR_PS,.GPR,.NONE}, {.FD,.FS,.RT,.NONE}, 0x46C00012, 0xFFE0003F, .FPU, {} },
 	{ .PLL_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C0002C, 0xFFE0003F, .FPU, {} },
 	{ .PLU_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C0002D, 0xFFE0003F, .FPU, {} },
 	{ .PUL_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.NONE}, {.FD,.FS,.FT,.NONE}, 0x46C0002E, 0xFFE0003F, .FPU, {} },
@@ -328,12 +332,16 @@ DECODE_ENTRIES := [997]lib.Decode_Entry{
 	{ .SDXC1, {.FPR_D,.GPR,.GPR,.NONE}, {.FS,.RS,.RT,.NONE}, 0x4C000009, 0xFC0007FF, .MIPS_IV, {} },
 	{ .MADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000020, 0xFC00003F, .FPU, {} },
 	{ .MADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000021, 0xFC00003F, .FPU, {} },
+	{ .MADD_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C000026, 0xFC00003F, .FPU, {} },
 	{ .MSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000028, 0xFC00003F, .FPU, {} },
 	{ .MSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000029, 0xFC00003F, .FPU, {} },
+	{ .MSUB_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C00002E, 0xFC00003F, .FPU, {} },
 	{ .NMADD_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000030, 0xFC00003F, .FPU, {} },
 	{ .NMADD_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000031, 0xFC00003F, .FPU, {} },
+	{ .NMADD_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C000036, 0xFC00003F, .FPU, {} },
 	{ .NMSUB_S, {.FPR_S,.FPR_S,.FPR_S,.FPR_S}, {.FD,.FR,.FS,.FT}, 0x4C000038, 0xFC00003F, .FPU, {} },
 	{ .NMSUB_D, {.FPR_D,.FPR_D,.FPR_D,.FPR_D}, {.FD,.FR,.FS,.FT}, 0x4C000039, 0xFC00003F, .FPU, {} },
+	{ .NMSUB_PS, {.FPR_PS,.FPR_PS,.FPR_PS,.FPR_PS}, {.FD,.FR,.FS,.FT}, 0x4C00003E, 0xFC00003F, .FPU, {} },
 	{ .BEQL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x50000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} },
 	{ .BNEL, {.GPR,.GPR,.REL16,.NONE}, {.RS,.RT,.BRANCH_16,.NONE}, 0x54000000, 0xFC000000, .MIPS_II, {delay_slot=true, likely=true} },
 	{ .BLEZL, {.GPR,.REL16,.NONE,.NONE}, {.RS,.BRANCH_16,.NONE,.NONE}, 0x58000000, 0xFC1F0000, .MIPS_II, {delay_slot=true, likely=true} },
@@ -1027,53 +1035,53 @@ DECODE_INDEX_PRIMARY := [64]lib.Decode_Index{
 	0x0E = { 116,   1},
 	0x0F = { 117,   2},
 	0x10 = { 119,  15},
-	0x11 = { 134, 142},
-	0x12 = { 276,  36},
-	0x13 = { 312,  13},
-	0x14 = { 325,   1},
-	0x15 = { 326,   1},
-	0x16 = { 327,   1},
-	0x17 = { 328,   1},
-	0x18 = { 329,  13},
-	0x19 = { 342,  15},
-	0x1A = { 357,   1},
-	0x1B = { 358,  13},
-	0x1C = { 371, 109},
-	0x1D = { 480,   1},
-	0x1E = { 481, 230},
-	0x1F = { 711, 141},
-	0x20 = { 852,   1},
-	0x21 = { 853,   1},
-	0x22 = { 854,   1},
-	0x23 = { 855,   1},
-	0x24 = { 856,   1},
-	0x25 = { 857,   1},
-	0x26 = { 858,   1},
-	0x27 = { 859,   1},
-	0x28 = { 860,   1},
-	0x29 = { 861,   1},
-	0x2A = { 862,   1},
-	0x2B = { 863,   1},
-	0x2C = { 864,   1},
-	0x2D = { 865,   1},
-	0x2E = { 866,   1},
-	0x2F = { 867,   1},
-	0x30 = { 868,   1},
-	0x31 = { 869,   1},
-	0x32 = { 870,   3},
-	0x33 = { 873,   1},
-	0x34 = { 874,  63},
-	0x35 = { 937,   3},
-	0x36 = { 940,   5},
-	0x37 = { 945,   6},
-	0x38 = { 951,   1},
-	0x39 = { 952,   1},
-	0x3A = { 953,   3},
-	0x3B = { 956,   2},
-	0x3C = { 958,  27},
-	0x3D = { 985,   3},
-	0x3E = { 988,   5},
-	0x3F = { 993,   4},
+	0x11 = { 134, 146},
+	0x12 = { 280,  36},
+	0x13 = { 316,  17},
+	0x14 = { 333,   1},
+	0x15 = { 334,   1},
+	0x16 = { 335,   1},
+	0x17 = { 336,   1},
+	0x18 = { 337,  13},
+	0x19 = { 350,  15},
+	0x1A = { 365,   1},
+	0x1B = { 366,  13},
+	0x1C = { 379, 109},
+	0x1D = { 488,   1},
+	0x1E = { 489, 230},
+	0x1F = { 719, 141},
+	0x20 = { 860,   1},
+	0x21 = { 861,   1},
+	0x22 = { 862,   1},
+	0x23 = { 863,   1},
+	0x24 = { 864,   1},
+	0x25 = { 865,   1},
+	0x26 = { 866,   1},
+	0x27 = { 867,   1},
+	0x28 = { 868,   1},
+	0x29 = { 869,   1},
+	0x2A = { 870,   1},
+	0x2B = { 871,   1},
+	0x2C = { 872,   1},
+	0x2D = { 873,   1},
+	0x2E = { 874,   1},
+	0x2F = { 875,   1},
+	0x30 = { 876,   1},
+	0x31 = { 877,   1},
+	0x32 = { 878,   3},
+	0x33 = { 881,   1},
+	0x34 = { 882,  63},
+	0x35 = { 945,   3},
+	0x36 = { 948,   5},
+	0x37 = { 953,   6},
+	0x38 = { 959,   1},
+	0x39 = { 960,   1},
+	0x3A = { 961,   3},
+	0x3B = { 964,   2},
+	0x3C = { 966,  27},
+	0x3D = { 993,   3},
+	0x3E = { 996,   5},
+	0x3F = {1001,   4},
 }

@(rodata)
@@ -1184,71 +1192,71 @@ DECODE_INDEX_COP1 := [32]lib.Decode_Index{
 	0x11 = { 192,  42},
 	0x14 = { 234,   4},
 	0x15 = { 238,   2},
-	0x16 = { 240,  28},
-	0x18 = { 268,   1},
-	0x19 = { 269,   1},
-	0x1A = { 270,   1},
-	0x1B = { 271,   1},
-	0x1C = { 272,   1},
-	0x1D = { 273,   1},
-	0x1E = { 274,   1},
-	0x1F = { 275,   1},
+	0x16 = { 240,  32},
+	0x18 = { 272,   1},
+	0x19 = { 273,   1},
+	0x1A = { 274,   1},
+	0x1B = { 275,   1},
+	0x1C = { 276,   1},
+	0x1D = { 277,   1},
+	0x1E = { 278,   1},
+	0x1F = { 279,   1},
 }

@(rodata)
 DECODE_INDEX_SPECIAL2 := [64]lib.Decode_Index{
-	0x00 = { 371,   1},
-	0x01 = { 372,   1},
-	0x02 = { 373,   1},
-	0x04 = { 374,   2},
-	0x05 = { 376,   1},
-	0x08 = { 377,  25},
-	0x09 = { 402,  26},
-	0x10 = { 428,   1},
-	0x11 = { 429,   1},
-	0x12 = { 430,   1},
-	0x13 = { 431,   1},
-	0x18 = { 432,   1},
-	0x19 = { 433,   1},
-	0x1A = { 434,   1},
-	0x1B = { 435,   1},
-	0x20 = { 436,   2},
-	0x21 = { 438,   2},
-	0x24 = { 440,   1},
-	0x25 = { 441,   1},
-	0x28 = { 442,  17},
-	0x29 = { 459,   8},
-	0x30 = { 467,   5},
-	0x31 = { 472,   1},
-	0x34 = { 473,   1},
-	0x36 = { 474,   1},
-	0x37 = { 475,   1},
-	0x3C = { 476,   1},
-	0x3E = { 477,   1},
-	0x3F = { 478,   2},
+	0x00 = { 379,   1},
+	0x01 = { 380,   1},
+	0x02 = { 381,   1},
+	0x04 = { 382,   2},
+	0x05 = { 384,   1},
+	0x08 = { 385,  25},
+	0x09 = { 410,  26},
+	0x10 = { 436,   1},
+	0x11 = { 437,   1},
+	0x12 = { 438,   1},
+	0x13 = { 439,   1},
+	0x18 = { 440,   1},
+	0x19 = { 441,   1},
+	0x1A = { 442,   1},
+	0x1B = { 443,   1},
+	0x20 = { 444,   2},
+	0x21 = { 446,   2},
+	0x24 = { 448,   1},
+	0x25 = { 449,   1},
+	0x28 = { 450,  17},
+	0x29 = { 467,   8},
+	0x30 = { 475,   5},
+	0x31 = { 480,   1},
+	0x34 = { 481,   1},
+	0x36 = { 482,   1},
+	0x37 = { 483,   1},
+	0x3C = { 484,   1},
+	0x3E = { 485,   1},
+	0x3F = { 486,   2},
 }

@(rodata)
 DECODE_INDEX_SPECIAL3 := [64]lib.Decode_Index{
-	0x00 = { 711,   2},
-	0x01 = { 713,   1},
-	0x02 = { 714,   1},
-	0x03 = { 715,   1},
-	0x04 = { 716,   1},
-	0x05 = { 717,   1},
-	0x06 = { 718,   1},
-	0x07 = { 719,   1},
-	0x0A = { 720,   3},
-	0x0C = { 723,   1},
-	0x0F = { 724,   8},
-	0x10 = { 732,  22},
-	0x11 = { 754,  15},
-	0x12 = { 769,  17},
-	0x13 = { 786,  22},
-	0x20 = { 808,   5},
-	0x24 = { 813,   4},
-	0x30 = { 817,  17},
-	0x38 = { 834,  17},
-	0x3B = { 851,   1},
+	0x00 = { 719,   2},
+	0x01 = { 721,   1},
+	0x02 = { 722,   1},
+	0x03 = { 723,   1},
+	0x04 = { 724,   1},
+	0x05 = { 725,   1},
+	0x06 = { 726,   1},
+	0x07 = { 727,   1},
+	0x0A = { 728,   3},
+	0x0C = { 731,   1},
+	0x0F = { 732,   8},
+	0x10 = { 740,  22},
+	0x11 = { 762,  15},
+	0x12 = { 777,  17},
+	0x13 = { 794,  22},
+	0x20 = { 816,   5},
+	0x24 = { 821,   4},
+	0x30 = { 825,  17},
+	0x38 = { 842,  17},
+	0x3B = { 859,   1},
 }

--- a/core/rexcode/mips/tablegen/generated/encode_tables.odin
+++ b/core/rexcode/mips/tablegen/generated/encode_tables.odin
--- a/core/rexcode/mips/tables/mips.encode_forms.bin
+++ b/core/rexcode/mips/tables/mips.encode_forms.bin
--- a/core/rexcode/mips/tables/mips.encode_runs.bin
+++ b/core/rexcode/mips/tables/mips.encode_runs.bin
--- a/core/rexcode/mips/tables/mips.entries.bin
+++ b/core/rexcode/mips/tables/mips.entries.bin
--- a/core/rexcode/mips/tables/mips.idx_cop1.bin
+++ b/core/rexcode/mips/tables/mips.idx_cop1.bin
--- a/core/rexcode/mips/tables/mips.idx_primary.bin
+++ b/core/rexcode/mips/tables/mips.idx_primary.bin
--- a/core/rexcode/mips/tables/mips.idx_special2.bin
+++ b/core/rexcode/mips/tables/mips.idx_special2.bin
--- a/core/rexcode/mips/tables/mips.idx_special3.bin
+++ b/core/rexcode/mips/tables/mips.idx_special3.bin