rename table_lookup to runtime_swizzle

This commit is contained in:
Jon Lipstate
2025-07-16 21:54:24 -07:00
parent fc78f6e83b
commit ecd41b155d
5 changed files with 18 additions and 18 deletions

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@@ -310,7 +310,7 @@ simd_indices :: proc($T: typeid/#simd[$N]$E) -> T where type_is_numeric(T) ---
simd_shuffle :: proc(a, b: #simd[N]T, indices: ..int) -> #simd[len(indices)]T ---
simd_select :: proc(cond: #simd[N]boolean_or_integer, true, false: #simd[N]T) -> #simd[N]T ---
simd_table_lookup :: proc(table: #simd[N]T, indices: #simd[N]T) -> #simd[N]T where type_is_integer(T) ---
simd_runtime_swizzle :: proc(table: #simd[N]T, indices: #simd[N]T) -> #simd[N]T where type_is_integer(T) ---
// Lane-wise operations
simd_ceil :: proc(a: #simd[N]any_float) -> #simd[N]any_float ---

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@@ -2481,15 +2481,15 @@ Example:
import "core:simd"
import "core:fmt"
table_lookup_example :: proc() {
runtime_swizzle_example :: proc() {
table := simd.u8x16{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
indices := simd.u8x16{15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}
result := simd.table_lookup(table, indices)
result := simd.runtime_swizzle(table, indices)
fmt.println(result) // Expected: {15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}
}
*/
table_lookup :: intrinsics.simd_table_lookup
runtime_swizzle :: intrinsics.simd_runtime_swizzle
/*
Compute the square root of each lane in a SIMD vector.

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@@ -1150,7 +1150,7 @@ gb_internal bool check_builtin_simd_operation(CheckerContext *c, Operand *operan
return true;
}
case BuiltinProc_simd_table_lookup:
case BuiltinProc_simd_runtime_swizzle:
{
if (ce->args.count != 2) {
error(call, "'%.*s' expected 2 arguments, got %td", LIT(builtin_name), ce->args.count);
@@ -1163,7 +1163,7 @@ gb_internal bool check_builtin_simd_operation(CheckerContext *c, Operand *operan
check_expr_with_type_hint(c, &indices, ce->args[1], table.type); if (indices.mode == Addressing_Invalid) return false;
if (!is_type_simd_vector(table.type)) {
error(table.expr, "'%.*s' expected a simd vector type for table", LIT(builtin_name));
error(table.expr, "'%.*s' expected a simd vector type for runtime swizzle", LIT(builtin_name));
return false;
}
if (!is_type_simd_vector(indices.type)) {

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@@ -191,7 +191,7 @@ BuiltinProc__simd_begin,
BuiltinProc_simd_shuffle,
BuiltinProc_simd_select,
BuiltinProc_simd_table_lookup,
BuiltinProc_simd_runtime_swizzle,
BuiltinProc_simd_ceil,
BuiltinProc_simd_floor,
@@ -551,7 +551,7 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
{STR_LIT("simd_shuffle"), 2, true, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_select"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_table_lookup"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_runtime_swizzle"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_ceil") , 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_floor"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},

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@@ -1721,7 +1721,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
return res;
}
case BuiltinProc_simd_table_lookup:
case BuiltinProc_simd_runtime_swizzle:
{
LLVMValueRef table = arg0.value;
LLVMValueRef indices = lb_build_expr(p, ce->args[1]).value;
@@ -1734,11 +1734,11 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
// Determine strategy based on element size and target architecture
char const *intrinsic_name = nullptr;
bool use_hardware_table_lookup = false;
bool use_hardware_runtime_swizzle = false;
// 8-bit elements: Use dedicated table lookup instructions
if (elem_size == 1) {
use_hardware_table_lookup = true;
use_hardware_runtime_swizzle = true;
if (build_context.metrics.arch == TargetArch_amd64 || build_context.metrics.arch == TargetArch_i386) {
// x86/x86-64: Use pshufb intrinsics
@@ -1753,7 +1753,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
intrinsic_name = "llvm.x86.avx512.pshuf.b.512";
break;
default:
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
break;
}
} else if (build_context.metrics.arch == TargetArch_arm64) {
@@ -1772,7 +1772,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
intrinsic_name = "llvm.aarch64.neon.tbl4";
break;
default:
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
break;
}
} else if (build_context.metrics.arch == TargetArch_arm32) {
@@ -1791,7 +1791,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
intrinsic_name = "llvm.arm.neon.vtbl4";
break;
default:
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
break;
}
} else if (build_context.metrics.arch == TargetArch_wasm32 || build_context.metrics.arch == TargetArch_wasm64p32) {
@@ -1799,14 +1799,14 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
if (count == 16) {
intrinsic_name = "llvm.wasm.swizzle";
} else {
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
}
} else {
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
}
}
if (use_hardware_table_lookup && intrinsic_name != nullptr) {
if (use_hardware_runtime_swizzle && intrinsic_name != nullptr) {
// Use dedicated hardware table lookup instruction
// Check if required target features are enabled
@@ -1932,7 +1932,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
return res;
} else {
// Features not enabled, fall back to emulation
use_hardware_table_lookup = false;
use_hardware_runtime_swizzle = false;
}
}