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asm: reenable riscv64

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This commit is contained in:
gingerBill
2026-08-25 19:30:38 +01:00
parent ee68d39c20
commit f7f3d3f198
5 changed files with 76 additions and 2 deletions
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4
src/check_asm.cpp
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@@ -1632,7 +1632,7 @@ gb_internal bool check_mnemonic(AsmCtx *asm_ctx, CheckerContext *ctx, Entity *tm
facts->gen_regs = produced | pinned_param_writes;
facts->gen_flags = cast(u16)clobber.flags_wr;
facts->read_flags = cast(u16)clobber.flags_rd;
facts->read_flags = cast(u16)clobber.flags_rd_call();
// NOTE(bill): mnemonics such as `xor r, r` / `sub r, r` act as zeroing the destination
// independent of its prior value: the read is architecturally dead, so it must not count as a use.
@@ -2813,7 +2813,7 @@ gb_internal void check_asm_template_from_entity(CheckerContext *c, Entity *e, De
if (build_context.metrics.arch == TargetArch_amd64) {
check_asm_template(&g_asm_amd64, c, e, d);
} else if (build_context.metrics.arch == TargetArch_riscv64) {
// check_asm_template(&g_asm_riscv, c, e, d);
check_asm_template(&g_asm_riscv, c, e, d);
} else {
error(e->token, "asm templates are not currently supported for this target");
}