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rexcode/arm64: drop vestigial/redundant mnemonics; alias redundant SME names
Remove from the Mnemonic enum: LDARB_X/LDARH_X/STLRB_X/STLRH_X (no
distinct byte/half acquire-release 'X' encoding exists -- LDARB/LDARH/
STLRB/STLRH already cover them), and the 12 redundant SME names
SME_LD1{B,H,W,D,Q}_ZA / SME_ST1{...}_ZA / SME_MOVA_TO_Z / SME_MOVA_TO_ZA
(same instructions as the canonical *_TILE / MOVA_*_FROM_* forms).
The builder generator now emits delegating aliases for the redundant SME
names (inst_sme_ld1b_za :: inst_sme_ld1b_tile, ...), so the convenient
names keep working and resolve to the canonical, decode-unambiguous
encodings. With XAR_Z landed, the arm64 Mnemonic enum is now 100%
covered: every entry has an encode form. 461 tests green.
This commit is contained in:
@@ -4446,3 +4446,29 @@ inst_cmn_imm :: inst_cmn_imm_r_i
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emit_cmn_imm :: emit_cmn_imm_r_i
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inst_tst_sr :: inst_tst_sr_r_sh
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emit_tst_sr :: emit_tst_sr_r_sh
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// Aliases: redundant SME names -> canonical tile/MOVA builders.
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inst_sme_ld1b_za :: inst_sme_ld1b_tile
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emit_sme_ld1b_za :: emit_sme_ld1b_tile
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inst_sme_ld1h_za :: inst_sme_ld1h_tile
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emit_sme_ld1h_za :: emit_sme_ld1h_tile
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inst_sme_ld1w_za :: inst_sme_ld1w_tile
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emit_sme_ld1w_za :: emit_sme_ld1w_tile
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inst_sme_ld1d_za :: inst_sme_ld1d_tile
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emit_sme_ld1d_za :: emit_sme_ld1d_tile
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inst_sme_ld1q_za :: inst_sme_ld1q_tile
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emit_sme_ld1q_za :: emit_sme_ld1q_tile
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inst_sme_st1b_za :: inst_sme_st1b_tile
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emit_sme_st1b_za :: emit_sme_st1b_tile
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inst_sme_st1h_za :: inst_sme_st1h_tile
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emit_sme_st1h_za :: emit_sme_st1h_tile
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inst_sme_st1w_za :: inst_sme_st1w_tile
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emit_sme_st1w_za :: emit_sme_st1w_tile
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inst_sme_st1d_za :: inst_sme_st1d_tile
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emit_sme_st1d_za :: emit_sme_st1d_tile
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inst_sme_st1q_za :: inst_sme_st1q_tile
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emit_sme_st1q_za :: emit_sme_st1q_tile
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inst_sme_mova_to_z :: inst_sme_mova_z_from_tile
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emit_sme_mova_to_z :: emit_sme_mova_z_from_tile
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inst_sme_mova_to_za :: inst_sme_mova_tile_from_z
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emit_sme_mova_to_za :: emit_sme_mova_tile_from_z
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@@ -160,7 +160,6 @@ Mnemonic :: enum u16 {
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LDXP, STXP, LDAXP, STLXP, // exclusive pair
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LDXRB, STXRB, LDAXRB, STLXRB, // exclusive byte
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LDXRH, STXRH, LDAXRH, STLXRH, // exclusive halfword
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LDARB_X, STLRB_X, LDARH_X, STLRH_X, // acquire/release byte/half (the existing LDARB/STLRB/LDARH/STLRH are unsigned)
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LDAPR, LDAPRB, LDAPRH, // load-acquire RCpc
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// -------------------------------------------------------------------------
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@@ -433,9 +432,6 @@ Mnemonic :: enum u16 {
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SME_BFMOPA, SME_BFMOPS,
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SME_SMOPA, SME_SMOPS, SME_UMOPA, SME_UMOPS,
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SME_USMOPA, SME_SUMOPA,
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SME_MOVA_TO_Z, SME_MOVA_TO_ZA,
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SME_LD1B_ZA, SME_LD1H_ZA, SME_LD1W_ZA, SME_LD1D_ZA, SME_LD1Q_ZA,
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SME_ST1B_ZA, SME_ST1H_ZA, SME_ST1W_ZA, SME_ST1D_ZA, SME_ST1Q_ZA,
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SME_LDR_ZA, SME_STR_ZA,
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// -------------------------------------------------------------------------
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@@ -3760,10 +3760,6 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{
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.STXRH = { 380, 1},
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.LDAXRH = { 381, 1},
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.STLXRH = { 382, 1},
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.LDARB_X = { 383, 0},
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.STLRB_X = { 383, 0},
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.LDARH_X = { 383, 0},
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.STLRH_X = { 383, 0},
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.LDAPR = { 383, 2},
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.LDAPRB = { 385, 1},
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.LDAPRH = { 386, 1},
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@@ -4415,18 +4411,6 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{
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.SME_UMOPS = { 2159, 2},
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.SME_USMOPA = { 2161, 1},
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.SME_SUMOPA = { 2162, 1},
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.SME_MOVA_TO_Z = { 2163, 0},
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.SME_MOVA_TO_ZA = { 2163, 0},
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.SME_LD1B_ZA = { 2163, 0},
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.SME_LD1H_ZA = { 2163, 0},
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.SME_LD1W_ZA = { 2163, 0},
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.SME_LD1D_ZA = { 2163, 0},
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.SME_LD1Q_ZA = { 2163, 0},
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.SME_ST1B_ZA = { 2163, 0},
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.SME_ST1H_ZA = { 2163, 0},
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.SME_ST1W_ZA = { 2163, 0},
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.SME_ST1D_ZA = { 2163, 0},
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.SME_ST1Q_ZA = { 2163, 0},
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.SME_LDR_ZA = { 2163, 1},
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.SME_STR_ZA = { 2164, 1},
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.SVE_FMLA_IDX_H = { 2165, 1},
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@@ -659,6 +659,22 @@ main :: proc() {
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}
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}
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// Builder aliases for redundant SME enum names that were removed from the
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// Mnemonic enum: they are the same instructions as the canonical *_TILE /
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// MOVA_*_FROM_* forms, so the convenient *_za / *_to_* names delegate to them.
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sme_aliases := [][2]string{
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{"sme_ld1b_za", "sme_ld1b_tile"}, {"sme_ld1h_za", "sme_ld1h_tile"},
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{"sme_ld1w_za", "sme_ld1w_tile"}, {"sme_ld1d_za", "sme_ld1d_tile"},
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{"sme_ld1q_za", "sme_ld1q_tile"}, {"sme_st1b_za", "sme_st1b_tile"},
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{"sme_st1h_za", "sme_st1h_tile"}, {"sme_st1w_za", "sme_st1w_tile"},
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{"sme_st1d_za", "sme_st1d_tile"}, {"sme_st1q_za", "sme_st1q_tile"},
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{"sme_mova_to_z", "sme_mova_z_from_tile"}, {"sme_mova_to_za", "sme_mova_tile_from_z"},
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}
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strings.write_string(&sb, "\n// Aliases: redundant SME names -> canonical tile/MOVA builders.\n")
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for al in sme_aliases {
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fmt.sbprintf(&sb, "inst_%s :: inst_%s\nemit_%s :: emit_%s\n", al[0], al[1], al[0], al[1])
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}
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output := strings.to_string(sb)
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err := os.write_entire_file(#directory + "/../mnemonic_builders.odin", transmute([]u8)strings.concatenate({GEN_ATTRIB, output}))
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if err == nil {
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