gingerBill
8956deb322
Check for implicitly read registers which have not be handled
2026-08-19 12:29:54 +01:00
gingerBill
4cf22b3efa
Merge pull request #7380 from dbriemann/dlb/vpdpwssd
...
Add AVX-512 VNNI VPDPWSSD support to inline assembly
2026-08-19 12:53:41 +02:00
gingerBill
8d0cc4d64b
Clobber implicit_wr and implicit_rd
2026-08-19 11:03:50 +01:00
David Linus Briemann
36af738347
core:rexcode: regenerate x86 encoding tables
2026-08-19 09:09:58 +02:00
David Linus Briemann
8370fdaf7c
core:rexcode: add AVX-512 VNNI VPDPWSSD
2026-08-19 09:09:50 +02:00
gingerBill
14184744ee
Add missing x86.clobber_forms.bin
2026-08-18 15:13:37 +01:00
gingerBill
6e17e7a2de
Add missing x86 instructions
2026-08-18 13:19:23 +01:00
gingerBill
8d33a47fab
Improve comment for the CLOBBER_TABLE
2026-08-18 11:54:45 +01:00
gingerBill
18df1ed23e
Correct clobber_table.odin
2026-08-18 11:44:35 +01:00
gingerBill
80d7f6462a
Minor clean up
2026-08-18 11:33:49 +01:00
gingerBill
35ae861ff6
Use number rather than enum
2026-08-18 11:28:54 +01:00
gingerBill
8e807fb7aa
Use new clobber forms in check_asm.cpp
2026-08-18 11:23:20 +01:00
gingerBill
b1b08c13c0
Update clobber table to encode the clobbering for each of the forms
2026-08-18 11:20:30 +01:00
gingerBill
a2bcf3177a
Improve error messages for register class printing
2026-08-17 21:10:24 +01:00
gingerBill
8f2a4346fc
Handle _SSE edge cases
2026-08-17 19:31:38 +01:00
gingerBill
e2e4a61003
Remove suffixes
2026-08-17 19:29:42 +01:00
gingerBill
db94c5a6cb
Begin work in %flags.zf et al
2026-08-17 12:25:17 +01:00
gingerBill
344e8afa36
#clobber cc -> #clobber flags
2026-08-17 12:10:08 +01:00
gingerBill
08f3be70cf
Add helper methods to the asm_tables_amd64.cpp
2026-08-12 21:18:10 +01:00
gingerBill
dbe5761bb0
Minor change
2026-08-12 16:19:58 +01:00
gingerBill
5eb0239474
Utilize triple quote strings within the C++ asm table generation
2026-08-12 16:09:18 +01:00
gingerBill
43f078aedc
Infer asm #side_effects where possible from the mnemonics
2026-08-12 14:52:37 +01:00
gingerBill
b32846bb35
Minor change to implies_side_effects
2026-08-12 14:16:10 +01:00
gingerBill
2300a48782
Infer #clobber memory and #clobber cc from the mnemonics directly
2026-08-12 12:45:48 +01:00
gingerBill
b9a7ed9942
Add amd64 clobber table to asm_tables_amd64.cpp
2026-08-12 11:33:07 +01:00
gingerBill
6bd2fd7e8b
Add clobber table for x86
2026-08-12 11:25:03 +01:00
gingerBill
21ad041232
Handle prefixes better
2026-08-11 17:44:55 +01:00
gingerBill
5621cbc85a
Improve scoring for operand error handling
2026-08-11 15:06:14 +01:00
gingerBill
ce6346a20f
Check immediates if they support the range or are not allowed (e.g. floats)
2026-08-11 14:52:21 +01:00
gingerBill
ed2bc91596
Add some missing vector instructions to the x86 encoding table
2026-08-11 14:18:37 +01:00
gingerBill
ef21ffa285
Templatize the check_asm.cpp code ready for other architectures
2026-08-11 14:00:41 +01:00
gingerBill
c717cb4ae9
Implement check_asm_operand_size_class
2026-08-11 13:08:39 +01:00
gingerBill
b0364d2c60
Improve error message for invalid operand kinds
2026-08-11 11:56:03 +01:00
gingerBill
400203c344
Verify the asm instruction operands against the Encoding.ops
2026-08-11 11:47:48 +01:00
gingerBill
5ca7638bb2
Check asm instruction operand count
2026-08-11 11:11:53 +01:00
gingerBill
70ca5c0936
Validate the names of mnemonics, prefixes, and registers for amd64
2026-08-11 10:44:34 +01:00
gingerBill
d827be77cd
Begin work on generating the AMD64 asm tables for C++
2026-08-11 10:15:41 +01:00
Flāvius
0f472409c4
rexcode/x86: label addressing for RIP-relative disp and movabs imm
...
Add mem_rip_label(label_id) so a RIP-relative memory operand can
reference a label: the encoder writes a placeholder disp32 and emits a
REL32 relocation (addend 0) at the field's byte offset, mirroring the
existing .RELATIVE jump/call path. This expresses lea reg, [rip + <label>]
(position-independent data addressing).
Add op_imm_label(label_id) for movabs reg, <label>: the imm stays kind
.IMMEDIATE (form matching unchanged) but is flagged so the encoder emits
an ABS64 relocation for the imm64 instead of a literal; imm_matches_inline
forces the full IMM64 form so a small id can't collapse to mov r64, imm32.
Both labeled forms bypass the contextless recipe fast-path (which cannot
append relocations) and fall back to the interpreter. Flags reuse spare
bits in Memory (disp_is_label) and Operand_Flags (imm_is_label) -- no
struct growth. Section 11 tests cover resolved/unresolved disp, the ABS64
movabs, and an end-to-end executed lea+load.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com >
2026-07-30 15:05:16 -04:00
gingerBill
8b7d1be601
Keep -vet happy
2026-07-14 13:28:12 +01:00
gingerBill
ee21677ac7
Begin work on the module encoder
2026-07-14 11:29:49 +01:00
gingerBill
1def2e3c66
Improve docs a little
2026-07-13 16:36:45 +01:00
gingerBill
fc17efdd0c
Add TODO in encode to make it actually write out the entire module and not just the functions
2026-07-13 16:28:57 +01:00
gingerBill
bfed392a0e
Improve printing for call
2026-07-13 16:15:41 +01:00
gingerBill
0696f46bfb
Add indentation for block, loop, if, else` constructs
2026-07-13 16:02:38 +01:00
gingerBill
ac5f5fe3ed
Add print_wat.odin
2026-07-13 15:56:25 +01:00
gingerBill
8cd5838112
wasm: parse custom sections
2026-07-13 15:30:00 +01:00
gingerBill
23c5c4e668
Add module parsing
2026-07-13 15:24:45 +01:00
gingerBill
fcc6b65ed4
Remove old wasm and wasm/module code
2026-07-13 14:17:27 +01:00
gingerBill
2478af9b1f
Minor alignment fix
2026-07-13 14:16:40 +01:00
gingerBill
27e5225730
Refactor core:rexcode/wasm to use the new ir structure and move to core:rexcode/ir/wasm
2026-07-13 14:16:27 +01:00
