gingerBill
7ef82c367c
Remove __copy_bits
2026-06-15 17:48:33 +01:00
gingerBill
0dec86b933
Improve lb_copy_bits
2026-06-15 17:46:54 +01:00
gingerBill
c91d3f120c
Fix shifting buf in lb_copy_bits
2026-06-15 17:13:33 +01:00
gingerBill
ee5d5d6882
Remove the now defunct __write_bits and __read_bits
2026-06-15 16:57:27 +01:00
gingerBill
6feb33a79b
Heavily improve reading and writing to bit fields
2026-06-15 16:53:15 +01:00
gingerBill
9ec6f3e378
Minimize Instruction and Operand across ISAs further with struct #raw_union #packed
2026-06-15 14:50:55 +01:00
gingerBill
693fc1ec18
Allow for struct #raw_union #packed
2026-06-15 14:42:38 +01:00
gingerBill
182f234ed2
Minimize rsp Instruction and Operand
2026-06-15 14:37:25 +01:00
gingerBill
4f96105520
Minimize riscv Instruction and Operand
2026-06-15 14:36:10 +01:00
gingerBill
a839f5e833
Minimize ppc_vle Instruction and Operand
2026-06-15 14:35:34 +01:00
gingerBill
7a17144aa1
Minimize ppc Instruction and Operand
2026-06-15 14:34:45 +01:00
gingerBill
b006a8853e
Minimize mos65816 Instruction and Operand
2026-06-15 14:32:42 +01:00
gingerBill
59c4292224
Minimize mos6502 Instruction and Operand
2026-06-15 14:30:32 +01:00
gingerBill
406dfbe86d
Minimize mips Instruction and Operand
2026-06-15 14:29:14 +01:00
gingerBill
6527f90181
MInimize arm64 Instruction and Operand
2026-06-15 14:27:49 +01:00
gingerBill
7aaef31bb3
Correct sizes of arm32 Instruction and Operand
2026-06-15 14:24:05 +01:00
gingerBill
f895e96bde
Add benchmark flag for x86 tests to just test that
2026-06-15 14:17:11 +01:00
gingerBill
2dd262ea10
x86: improve benchmark test do not run the code on Windows since it relies in SysV
2026-06-15 14:14:38 +01:00
gingerBill
61c869833e
Minimize x86.Instruction size to be 64-bytes rather than 72-bytes
2026-06-15 14:13:56 +01:00
gingerBill
b733f7d7a4
Use @(rodata) where appropriate for the table generation
2026-06-15 13:56:24 +01:00
gingerBill
5400b0f610
rexcode/x86: Add more @(rodata) usage
2026-06-15 13:49:57 +01:00
gingerBill
b7f585f448
Merge branch 'bill/rexcode' of https://github.com/odin-lang/Odin into bill/rexcode
2026-06-15 13:35:28 +01:00
Flāvius
fd7ee38f3b
Merge remote-tracking branch 'origin/bill/rexcode' into bill/rexcode
2026-06-15 08:05:38 -04:00
Flāvius
a4f08f8307
Load rexcode encode/decode tables from committed binary blobs
...
Each ISA's hand-written ENCODING_TABLE (the single source of truth) now lives
in a per-arch tablegen/ metaprogram that flattens it and serializes committed
binary blobs; the library #loads those into @(rodata) at compile time rather
than compiling a table body. No arch keeps encoding_table.odin or
decoding_tables.odin -- only a generated tables.odin loader and tables/*.bin.
* Two-stage, type-checked pipeline: tablegen Stage A emits human-readable
generated Odin, which compiles and serializes the blobs in Stage B.
* encode() goes through encoding_forms(m); decoders are unchanged apart from
x86's flattened 2-D index. Decode tables are byte-identical to the old ones.
* build.lua: a LuaJIT driver for the metaprograms, validations, and tests,
with cross-platform gating and a clear report.
* Docs refreshed; the obsolete forward-looking plan in cross_arch_design.md
trimmed to what was actually built.
* Attribution headers added to all rexcode source files; the generators emit
them so generated files keep them.
2026-06-15 07:43:29 -04:00
gingerBill
75a8639426
Make @(rodata)
2026-06-15 12:22:37 +01:00
gingerBill
829dd30b0b
doc_writer: String intern constant values expressions
2026-06-15 11:46:26 +01:00
gingerBill
28d17f0001
doc writer: Use string interning and minimize the size of the compound literal generation when it is HUGE
2026-06-15 11:44:12 +01:00
gingerBill
ecf9a305ee
Add @(require_results) to register procedures
2026-06-14 22:00:37 +01:00
gingerBill
5c9cd0146d
Add @(require_results) to operand procedures
2026-06-14 21:57:27 +01:00
gingerBill
611cc807cd
Add @(require_results) to instruction procedures
2026-06-14 21:54:24 +01:00
gingerBill
ced500fc94
Add fmt formatting to the Instruction.operands
2026-06-14 21:52:14 +01:00
gingerBill
c8ed0d89ed
Alignment fields in the decode entry type for ppc
2026-06-14 21:23:07 +01:00
gingerBill
695dd62b58
Align instruction helpers
2026-06-14 21:01:51 +01:00
gingerBill
15a426c6b3
Minor code style changes
2026-06-14 21:00:38 +01:00
gingerBill
2f0c1457e5
Make x86 decoding tables very uniform and orderly
2026-06-14 20:46:27 +01:00
gingerBill
19bc584a0d
Manually format the x86 encoding table
2026-06-14 20:05:10 +01:00
gingerBill
ce3ff285b6
Minor style improvement
2026-06-14 19:50:32 +01:00
gingerBill
efa535eec2
Minor clean up of the mnemonics code
2026-06-14 19:48:02 +01:00
gingerBill
d75624ccbd
Add @(require_results) where appropriate to isa
2026-06-14 19:41:05 +01:00
gingerBill
340fb4f697
Clean up x86 decoding tables
2026-06-14 19:39:34 +01:00
gingerBill
2f5d548471
Minimize rsp decoding tables
2026-06-14 19:35:30 +01:00
gingerBill
253c1570d8
Minimize riscv decoding tables
2026-06-14 19:34:16 +01:00
gingerBill
d74693eb0f
Minimize ppc_vle decoding tables
2026-06-14 19:32:53 +01:00
gingerBill
dacb5e3a17
Minimize PPC decoding tables
2026-06-14 19:30:42 +01:00
gingerBill
cd4b4e1f36
Minimize mos65816 decoding tables
2026-06-14 19:24:16 +01:00
gingerBill
70e92d2a4d
Minimize mos6502 decoder table
2026-06-14 19:23:21 +01:00
gingerBill
c8de23f678
Minimize arm64 decoding table
2026-06-14 19:22:31 +01:00
gingerBill
67dfa25696
Minimize MIPS decode table
2026-06-14 19:22:17 +01:00
gingerBill
176ee8c68d
Minimize arm32 decode table size
2026-06-14 19:19:11 +01:00
gingerBill
1adbd0dcb4
Improve formatting for x86 tables and minimize outputting "zero" entries
2026-06-14 19:16:53 +01:00
