Brendan Punsky 55463b6719 rexcode/arm32: VMOV (ARM core register to scalar) Dd[lane], Rt ...

New VMOV_LANE_8/16/32 encodings: Dd at bits 19:16+bit7, lane bits per
element size (.8 = bit21:bit6:bit5 with bit22 size marker; .16 =
bit21:bit6 with bit5 marker; .32 = bit21). Verify round-trips all three
sizes; spot-checked .8 byte-exact incl. max lane; 600 tests green.

2026-06-18 01:34:48 -04:00

..

arm32

rexcode/arm32: VMOV (ARM core register to scalar) Dd[lane], Rt

2026-06-18 01:34:48 -04:00

arm64

rexcode/arm64: drop vestigial/redundant mnemonics; alias redundant SME names

2026-06-18 00:42:37 -04:00

docs

Load rexcode encode/decode tables from committed binary blobs

2026-06-15 07:43:29 -04:00

isa

Load rexcode encode/decode tables from committed binary blobs

2026-06-15 07:43:29 -04:00

mips

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

mos6502

rexcode: 100% generated mnemonic-builder coverage; drop hand-written collisions

2026-06-15 12:52:10 -04:00

mos65816

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

ppc

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

ppc_vle

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

riscv

rexcode: 100% generated mnemonic-builder coverage; drop hand-written collisions

2026-06-15 12:52:10 -04:00

rsp

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

x86

rexcode: 100% generated mnemonic-builder coverage; drop hand-written collisions

2026-06-15 12:52:10 -04:00

build.lua

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00

doc.odin

rexcode: add typed per-mnemonic builders for all arches; CWD-independent regen

2026-06-15 12:52:10 -04:00