Files
Odin/core/rexcode/isa
Flāvius 55da0990e7 rexcode/arm64: restore the four SVE encodings the tests already asserted
The tests said one thing and the table another: WHILELT and the three SVE
scatter stores. The tests were right and had been right for a while -- the
table edit that went with them was never committed, and the branch looked
green only because the tests read a stale generated blob that still carried
the fix. Regenerating the blobs (which merging upstream forced, since its 35
new mnemonics overflowed the old ones) made the disagreement visible.

  WHILELT     mask 0xFF20FC10 -> 0xFFE0FC10
  ST1B scatter Zt.S  0xE4008000 -> 0xE4408000, mask 0xFFA0E000 -> 0xFFE0A000
  ST1W scatter Zt.S  0xE5008000 -> 0xE5408000, mask 0xFFA0E000 -> 0xFFE0A000
  ST1D scatter Zt.D  bits unchanged,           mask 0xFFA0E000 -> 0xFFE0A000

ST1B and ST1W carried the SAME bits for their Zt.S and Zt.D forms, so the
32-bit scatter was encoding as the 64-bit one; the S rows now differ from the
D rows beside them, which is what tells them apart.

Values taken from the committed test expectations and independently
corroborated by the pre-regeneration blob -- two sources that agree.

arm64: 330 passed 0 failed, 133 passed 0 failed.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01Riok9vMpkLmo78wsVKJHhz
2026-08-28 18:19:26 -04:00
..
2026-08-18 18:23:42 +01:00