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The last of the A32 sweep's disagreements, and they were mostly the same shape: an operand the syntax names but no field encodes, left printing as `#0`. MRS names APSR or SPSR by the R bit; VMRS and VMSR name FPSCR and its neighbours out of bits 19:16, which their masks had pinned shut so the register could not vary at all; SETEND names LE or BE by the E bit. Those are bare tokens in the syntax, which is what the special-register classes already model, so the endian pair joins them as a register class of its own. DBG read the whole eight-bit hint field where its option is only the low four, so it printed the fixed bits above it. RFE and SRS name their addressing mode the way LDM and STM do, so they are four mnemonics each rather than one, and the P and U bits that pick the mode are fixed bits of each form -- they had been left out of the mask entirely, so every one of the eight words decoded as the DA form. The writeback bit rides in the base register for RFE and in the implicit SP for SRS. VORR and VBIC against a modified immediate had no forms at all. Those words fell through to the shift-by-immediate family that sits beside them, and decoded as VSRA, VQSHRN and VQRSHRN with a shift of zero -- which is not a shift any of them can take. The register field in an operand was fifteen bits, on the reasoning that a register's raw value never passes 0x401F. Two classes do: the coprocessor registers at 0x8000, and now the endian tokens at 0x9000. Both were truncating silently. The field is sixteen bits, which fills the word exactly. A memory base or index is always a GPR, so those stay as they are. The A32 sweep now round-trips 984 of its 1183 entries byte-exact through llvm-mc, with nothing left that llvm and this disagree on: 159 are words llvm's own disassembly cannot assemble back, 38 are reserved encodings, and the last two are PSB CSYNC and TSB CSYNC, which llvm does not implement for AArch32 at all. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_018UmHLRF11EoWwNWCJ7JGaA