Brendan Punsky 808716517e rexcode/arm32: Branch Future BF/BFL/BFLX/BFI_BR encode forms ...

Reverse-engineered the ARMv8.1-M Branch Future T32 encoding from llvm-mc:
bf-point imm4 = (label-(PC+4))/2 at hw0[10:7]; branch target val =
(label-(PC+4))/2 with J at hw1[11] and imm10 at hw1[10:1]; BFLX/BFX target
is Rm at hw0[3:0]. New REL_BF operand + BF_BOFF/BF_BLOC/BF_RM encodings +
BF_BOFF_T32/BF_BLOC_T32 relocations with resolver. BF=0xF040E001,
BFL=0xF000C001, BFLX=0xF070E001, BFI_BR=0xF060E001.

Tightened the WLSTP/DLSTP masks to mark hw0[6] static (it is always 0 for
valid B/H/W/D sizes) so they no longer shadow the BF register forms.
Byte-exact vs llvm-mc with resolved bf-point/target offsets; 600 tests
green. (BFCSEL still pending -- it adds an else-target + condition.)

2026-06-18 04:47:03 -04:00

..

dump_verify_input.odin

Load rexcode encode/decode tables from committed binary blobs

2026-06-15 07:43:29 -04:00

gen_mnemonic_builders.odin

rexcode/arm32: Branch Future BF/BFL/BFLX/BFI_BR encode forms

2026-06-18 04:47:03 -04:00

llvm_per_line.sh

Load rexcode encode/decode tables from committed binary blobs

2026-06-15 07:43:29 -04:00

verify_against_llvm.odin

Load rexcode encode/decode tables from committed binary blobs

2026-06-15 07:43:29 -04:00