gingerBill de8c0dc4fe Fix register width test for risc-v, and improve operand slot type inference for risc-v

2026-08-21 00:38:34 +01:00

..

tablegen

Fix register width test for risc-v, and improve operand slot type inference for risc-v

2026-08-21 00:38:34 +01:00

tables

Begin work on pseudo-aliases

2026-08-20 17:51:47 +01:00

tests

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

tools

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

clobber_types.odin

rexcode: riscv INSTRUCTION_TABLE which includes the clobber information

2026-08-20 11:43:26 +01:00

decoder.odin

rexcode: buffer-sizing helpers across all ISAs + naming-contract doc

2026-06-19 04:11:30 -04:00

encoder.odin

Mockout inline asm for riscv

2026-08-20 14:42:42 +01:00

encoding_types.odin

Begin work on pseudo-aliases

2026-08-20 17:51:47 +01:00

instructions.odin

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

mnemonic_builders.odin

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

mnemonics.odin

Begin work on pseudo-aliases

2026-08-20 17:51:47 +01:00

operands.odin

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

printer.odin

rexcode/isa: display-side label naming — address order, offset-keyed names

2026-08-03 20:52:11 -04:00

pseudo_aliases.odin

Begin work on pseudo-aliases

2026-08-20 17:51:47 +01:00

registers.odin

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

reloc.odin

rexcode: re-house ISA packages under core:rexcode/isa/<arch>

2026-06-18 19:03:27 -04:00

tables.odin

Begin work on pseudo-aliases

2026-08-20 17:51:47 +01:00