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CRC32 and its castagnoli variants are unconditional-only: the condition field is fixed at AL. Their entries left bits 31:28 free, so every condition decoded as a CRC32 that cannot exist. VDUP from a lane packs the element size and the lane index into one four-bit field -- `xxx1` is a byte lane, `xx10` a halfword, `x100` a word -- and the two forms it had read that field as though it were an ordinary by-scalar operand, which is a different layout entirely. The word they named, with the field zero, is not an encoding at all. Six forms now, two per element size, each with the size in its data type. A coprocessor number is written `p15`. It had been printing as a plain `#15`, which is not what an assembler takes, and it is a different kind of thing from the CRn and CRm registers that were already spelled `c0` -- so it gets a class of its own rather than sharing theirs. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_018UmHLRF11EoWwNWCJ7JGaA