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rexcode/arm32: drop 15 duplicate forms the mnemonic merges introduced

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Collapsing the encoding-shaped mnemonics into their assembler names merged
several form lists that already overlapped, leaving byte-identical Encoding
rows inside one mnemonic. The matcher takes the first form that matches, so
every duplicate was dead weight -- unreachable, and inflating both tables.

VMUL, VMLA and VMLS each gained two from the *_LANE merge; VSHR, VSRA and
VRSHR two each, VQSHRN, VQRSHRN and VSHLL one each.

The branch base had none, so these are mine: the collision check I ran before
each merge compared operand signatures, which is the right test for "can the
matcher tell these apart", but says nothing about two forms being wholly
identical. Comparing the full Encoding would have caught them.

1680 -> 1665 forms. Removing an unreachable exact duplicate cannot change
behaviour, and does not: the load/store, LDM/STM and NEON data-type encode
checks are byte-for-byte what they were, and the decode sweep still round-trips
every form.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
This commit is contained in:
Brendan Punsky
2026-08-27 03:04:31 -04:00
committed by Flāvius
parent db2c234607
commit 378938775d
12 changed files with 1462 additions and 1521 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
core/rexcode/isa/arm32/tablegen/encoding_table.odin
View File

@@ -1743,9 +1743,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
// Integer Q-form .I16/.I32 (bit 24 = 1)
{.VMUL, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900840, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VMUL, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00840, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// FP .F32 D-form / Q-form (F=1, size=10)
{.VMUL, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00840, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VMUL, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00840, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
},
// ---- VMLA / VMLS (integer + F32) ----
.VMLA = {
@@ -1769,9 +1766,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
{.VMLA, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00040, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VMLA, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900040, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VMLA, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00040, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// FP .F32 (F=1)
{.VMLA, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00040, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VMLA, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00040, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
},
.VMLS = {
{.VMLS, {.SPR, .SPR, .SPR, .NONE}, {.VD_S, .VN_S, .VM_S, .NONE}, 0x0E000A40, 0x0FB00B50, .VFPV2, .A32, {}, {.F32, .NONE}},
@@ -1792,9 +1786,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
{.VMLS, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00440, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VMLS, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3900440, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VMLS, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00440, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// FP .F32
{.VMLS, {.DPR, .DPR, .DPR_ELEM, .NONE}, {.VD_D, .VN_D, .VM_D, .NONE}, 0xF2A00440, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VMLS, {.QPR, .QPR, .DPR_ELEM, .NONE}, {.VD_Q, .VN_Q, .VM_D, .NONE}, 0xF3A00440, 0xFFB00F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
},
// ---- VAND / VBIC / VORR / VORN / VEOR (bitwise, no size variants) ----
.VAND = {
@@ -2087,9 +2078,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
},
// VSHR immediate (signed/unsigned, .I8/.I16/.I32/.I64)
.VSHR = {
{.VSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800010, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800050, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// unsigned
{.VSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800010, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800050, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// MVE imm form (imm6 at bits 21:16)
@@ -2097,8 +2085,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
},
// VSRA imm
.VSRA = {
{.VSRA, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800110, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VSRA, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800150, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VSRA, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800110, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VSRA, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800150, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// MVE (imm6 at bits 21:16)
@@ -2129,8 +2115,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
},
// VRSHR (rounding shift right immediate)
.VRSHR = {
{.VRSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800210, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VRSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800250, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VRSHR, {.DPR, .DPR, .IMM, .NONE}, {.VD_D, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800210, 0xFE800F10, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
{.VRSHR, {.QPR, .QPR, .IMM, .NONE}, {.VD_Q, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800250, 0xFE800F50, .NEON, .A32, {cond_in_28=false}, {.I32, .NONE}},
// MVE
@@ -2536,7 +2520,6 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
// VSHLL.S<sz> Q, D, #imm: 1111 0010 1 D imm6 Vd 1010 0 0 M 1 Vm
// imm6 encodes sh + size: 001sss for sh<8, 01sss for sh<16, 1sss for sh<32
{.VSHLL, {.QPR, .DPR, .IMM, .NONE}, {.VD_Q, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800A10, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VSHLL, {.QPR, .DPR, .IMM, .NONE}, {.VD_Q, .VM_D, .NEON_SHIFT_IMM6, .NONE}, 0xF2800A10, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}}, // U=1
// VSHLL by max (#size) variant: 1111 0011 1 D 11 size 10 Vd 0011 0 0 M 0 Vm
{.VSHLL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3B20300, 0xFFB30FD0, .NEON, .A32, {cond_in_28=false}, {.I8, .NONE}},
{.VSHLL, {.QPR, .DPR, .NONE, .NONE}, {.VD_Q, .VM_D, .NONE, .NONE}, 0xF3B60300, 0xFFB30FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
@@ -2553,12 +2536,10 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
.VQSHRN = {
// signed: 1111 0010 1 D imm6 Vd 1001 0 0 M 1 Vm; unsigned: U=1
{.VQSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800910, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VQSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800910, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
},
.VQRSHRN = {
// 1111 0010 1 D imm6 Vd 1001 0 1 M 1 Vm
{.VQRSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800950, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
{.VQRSHRN, {.DPR, .QPR, .IMM, .NONE}, {.VD_D, .VM_Q, .NEON_SHIFT_IMM6, .NONE}, 0xF2800950, 0xFE800FD0, .NEON, .A32, {cond_in_28=false}, {.I16, .NONE}},
},
.VQSHRUN = {
// signed input, unsigned saturating shift right narrow:

2271
core/rexcode/isa/arm32/tablegen/generated/decode_tables.odin
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File diff suppressed because it is too large Load Diff

693
core/rexcode/isa/arm32/tablegen/generated/encode_tables.odin
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@@ -8,7 +8,7 @@ package rexcode_arm32_generated
import lib "../.."
@(rodata)
ENCODE_FORMS := [1680]lib.Encoding{
ENCODE_FORMS := [1665]lib.Encoding{
// .AND
{ .AND, {.GPR,.GPR,.IMM_MOD,.NONE}, {.RD,.RN_A32,.A32_IMM_MOD,.NONE}, 0x02000000, 0x0FE00000, .BASE, .A32, {}, {.NONE,.NONE} },
{ .AND, {.GPR,.GPR,.GPR_SHIFTED,.NONE}, {.RD,.RN_A32,.RM_A32,.NONE}, 0x00000000, 0x0FE00010, .BASE, .A32, {}, {.NONE,.NONE} },
@@ -939,8 +939,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VMUL, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00840, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMUL, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3900840, 0xFFB00F50, .NEON, .A32, {}, {.I16,.NONE} },
{ .VMUL, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00840, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMUL, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00840, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMUL, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00840, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
// .VDIV
{ .VDIV, {.SPR,.SPR,.SPR,.NONE}, {.VD_S,.VN_S,.VM_S,.NONE}, 0x0E800A00, 0x0FB00B50, .VFPV2, .A32, {}, {.F32,.NONE} },
{ .VDIV, {.DPR,.DPR,.DPR,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0x0E800B00, 0x0FB00B50, .VFPV2, .A32, {}, {.F64,.NONE} },
@@ -962,8 +960,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VMLA, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00040, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLA, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3900040, 0xFFB00F50, .NEON, .A32, {}, {.I16,.NONE} },
{ .VMLA, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00040, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLA, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00040, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLA, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00040, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
// .VMLS
{ .VMLS, {.SPR,.SPR,.SPR,.NONE}, {.VD_S,.VN_S,.VM_S,.NONE}, 0x0E000A40, 0x0FB00B50, .VFPV2, .A32, {}, {.F32,.NONE} },
{ .VMLS, {.DPR,.DPR,.DPR,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0x0E000B40, 0x0FB00B50, .VFPV2, .A32, {}, {.F64,.NONE} },
@@ -980,8 +976,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VMLS, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00440, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLS, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3900440, 0xFFB00F50, .NEON, .A32, {}, {.I16,.NONE} },
{ .VMLS, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00440, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLS, {.DPR,.DPR,.DPR_ELEM,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0xF2A00440, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VMLS, {.QPR,.QPR,.DPR_ELEM,.NONE}, {.VD_Q,.VN_Q,.VM_D,.NONE}, 0xF3A00440, 0xFFB00F50, .NEON, .A32, {}, {.I32,.NONE} },
// .VNMUL
{ .VNMUL, {.SPR,.SPR,.SPR,.NONE}, {.VD_S,.VN_S,.VM_S,.NONE}, 0x0E200A40, 0x0FB00B50, .VFPV2, .A32, {}, {.F32,.NONE} },
{ .VNMUL, {.DPR,.DPR,.DPR,.NONE}, {.VD_D,.VN_D,.VM_D,.NONE}, 0x0E200B40, 0x0FB00B50, .VFPV2, .A32, {}, {.F64,.NONE} },
@@ -1650,14 +1644,10 @@ ENCODE_FORMS := [1680]lib.Encoding{
// .VSHR
{ .VSHR, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800010, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSHR, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800050, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSHR, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800010, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSHR, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800050, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSHR, {.QPR,.QPR,.IMM5,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xEF800050, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}, {.I32,.NONE} },
// .VSRA
{ .VSRA, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800110, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSRA, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800150, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSRA, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800110, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSRA, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800150, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VSRA, {.QPR,.QPR,.IMM5,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xEF800150, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}, {.I32,.NONE} },
// .VRSHL
{ .VRSHL, {.DPR,.DPR,.DPR,.NONE}, {.VD_D,.VM_D,.VN_D,.NONE}, 0xF2000500, 0xFFB00F10, .NEON, .A32, {}, {.S8,.NONE} },
@@ -1668,8 +1658,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
// .VRSHR
{ .VRSHR, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800210, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VRSHR, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800250, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VRSHR, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800210, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
{ .VRSHR, {.QPR,.QPR,.IMM,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800250, 0xFE800F50, .NEON, .A32, {}, {.I32,.NONE} },
{ .VRSHR, {.QPR,.QPR,.IMM5,.NONE}, {.VD_Q,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xEF800250, 0xEF800F51, .MVE_INT, .T32, {thumb32=true}, {.I32,.NONE} },
// .VRSRA
{ .VRSRA, {.DPR,.DPR,.IMM,.NONE}, {.VD_D,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800310, 0xFE800F10, .NEON, .A32, {}, {.I32,.NONE} },
@@ -1690,7 +1678,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VQSHL, {.QPR,.QPR,.QPR,.NONE}, {.VD_Q,.VN_Q,.VM_Q,.NONE}, 0xEF000450, 0xEF810F51, .MVE_INT, .T32, {thumb32=true}, {.S8,.NONE} },
// .VQSHRN
{ .VQSHRN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800910, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
{ .VQSHRN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800910, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
// .VQSHRUN
{ .VQSHRUN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF3800810, 0xFF800FD0, .NEON, .A32, {}, {.I16,.NONE} },
// .VQRSHL
@@ -1712,7 +1699,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VQRSHL, {.QPR,.QPR,.QPR,.NONE}, {.VD_Q,.VM_Q,.VN_Q,.NONE}, 0xF3300550, 0xFFB11F51, .NEON, .A32, {}, {.U64,.NONE} },
// .VQRSHRN
{ .VQRSHRN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800950, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
{ .VQRSHRN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800950, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
// .VQRSHRUN
{ .VQRSHRUN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF3800850, 0xFF800FD0, .NEON, .A32, {}, {.I16,.NONE} },
// .VSHRN
@@ -1721,7 +1707,6 @@ ENCODE_FORMS := [1680]lib.Encoding{
{ .VRSHRN, {.DPR,.QPR,.IMM,.NONE}, {.VD_D,.VM_Q,.NEON_SHIFT_IMM6,.NONE}, 0xF2800850, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
// .VSHLL
{ .VSHLL, {.QPR,.DPR,.IMM,.NONE}, {.VD_Q,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800A10, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
{ .VSHLL, {.QPR,.DPR,.IMM,.NONE}, {.VD_Q,.VM_D,.NEON_SHIFT_IMM6,.NONE}, 0xF2800A10, 0xFE800FD0, .NEON, .A32, {}, {.I16,.NONE} },
{ .VSHLL, {.QPR,.DPR,.NONE,.NONE}, {.VD_Q,.VM_D,.NONE,.NONE}, 0xF3B20300, 0xFFB30FD0, .NEON, .A32, {}, {.I8,.NONE} },
{ .VSHLL, {.QPR,.DPR,.NONE,.NONE}, {.VD_Q,.VM_D,.NONE,.NONE}, 0xF3B60300, 0xFFB30FD0, .NEON, .A32, {}, {.I16,.NONE} },
{ .VSHLL, {.QPR,.DPR,.NONE,.NONE}, {.VD_Q,.VM_D,.NONE,.NONE}, 0xF3BA0300, 0xFFB30FD0, .NEON, .A32, {}, {.I32,.NONE} },
@@ -2548,342 +2533,342 @@ ENCODE_RUNS := [lib.Mnemonic]lib.Encode_Run{
.CRC32CW = { 611, 1},
.VADD = { 612, 18},
.VSUB = { 630, 18},
.VMUL = { 648, 24},
.VDIV = { 672, 3},
.VMLA = { 675, 18},
.VMLS = { 693, 17},
.VNMUL = { 710, 2},
.VNMLA = { 712, 2},
.VNMLS = { 714, 2},
.VFMA = { 716, 10},
.VFMS = { 726, 8},
.VFNMA = { 734, 3},
.VFNMS = { 737, 3},
.VABS = { 740, 12},
.VNEG = { 752, 12},
.VSQRT = { 764, 3},
.VCMP = { 767, 8},
.VCMPE = { 775, 4},
.VCVT = { 779, 21},
.VCVTB = { 800, 2},
.VCVTT = { 802, 2},
.VCVTA = { 804, 2},
.VCVTN = { 806, 2},
.VCVTP = { 808, 2},
.VCVTM = { 810, 2},
.VCVTR = { 812, 4},
.VMOV = { 816, 31},
.VMRS = { 847, 1},
.VMSR = { 848, 1},
.VLDR = { 849, 2},
.VSTR = { 851, 2},
.VLDM = { 853, 2},
.VSTM = { 855, 2},
.VPUSH = { 857, 2},
.VPOP = { 859, 2},
.VSEL = { 861, 2},
.VMAXNM = { 863, 2},
.VMINNM = { 865, 2},
.VRINTA = { 867, 3},
.VRINTN = { 870, 3},
.VRINTP = { 873, 3},
.VRINTM = { 876, 3},
.VRINTR = { 879, 2},
.VRINTZ = { 881, 3},
.VRINTX = { 884, 3},
.VADDL = { 887, 6},
.VADDW = { 893, 6},
.VSUBL = { 899, 6},
.VSUBW = { 905, 6},
.VHADD = { 911, 9},
.VHSUB = { 920, 9},
.VRHADD = { 929, 3},
.VQADD = { 932, 11},
.VQSUB = { 943, 11},
.VMULL = { 954, 11},
.VMLAL = { 965, 10},
.VMLSL = { 975, 10},
.VQDMULL = { 985, 4},
.VQDMLAL = { 989, 4},
.VQDMLSL = { 993, 4},
.VQDMULH = { 997, 8},
.VQRDMULH = { 1005, 8},
.VQRDMLAH = { 1013, 8},
.VQRDMLSH = { 1021, 8},
.VABA = { 1029, 8},
.VABAL = { 1037, 6},
.VABD = { 1043, 10},
.VABDL = { 1053, 6},
.VAND = { 1059, 3},
.VBIC = { 1062, 3},
.VORR = { 1065, 3},
.VORN = { 1068, 3},
.VEOR = { 1071, 3},
.VBSL = { 1074, 2},
.VBIT = { 1076, 2},
.VBIF = { 1078, 2},
.VMVN = { 1080, 13},
.VMOVN = { 1093, 3},
.VQMOVN = { 1096, 6},
.VQMOVUN = { 1102, 3},
.VMOVL = { 1105, 6},
.VTST = { 1111, 6},
.VCEQ = { 1117, 14},
.VCGE = { 1131, 16},
.VCGT = { 1147, 16},
.VCLE = { 1163, 18},
.VCLT = { 1181, 18},
.VACGE = { 1199, 2},
.VACGT = { 1201, 2},
.VACLE = { 1203, 2},
.VACLT = { 1205, 2},
.VMAX = { 1207, 13},
.VMIN = { 1220, 13},
.VPMAX = { 1233, 5},
.VPMIN = { 1238, 5},
.VPADD = { 1243, 4},
.VPADDL = { 1247, 6},
.VPADAL = { 1253, 4},
.VRECPE = { 1257, 4},
.VRECPS = { 1261, 2},
.VRSQRTE = { 1263, 4},
.VRSQRTS = { 1267, 2},
.VSHL = { 1269, 9},
.VSHR = { 1278, 5},
.VSRA = { 1283, 5},
.VRSHL = { 1288, 5},
.VRSHR = { 1293, 5},
.VRSRA = { 1298, 2},
.VSLI = { 1300, 2},
.VSRI = { 1302, 2},
.VQSHL = { 1304, 7},
.VQSHRN = { 1311, 2},
.VQSHRUN = { 1313, 1},
.VQRSHL = { 1314, 16},
.VQRSHRN = { 1330, 2},
.VQRSHRUN = { 1332, 1},
.VSHRN = { 1333, 1},
.VRSHRN = { 1334, 1},
.VSHLL = { 1335, 5},
.VCLS = { 1340, 6},
.VCLZ = { 1346, 6},
.VCNT = { 1352, 2},
.VPADD_F = { 1354, 2},
.VRECPE_F = { 1356, 2},
.VRSQRTE_F = { 1358, 2},
.VREV16 = { 1360, 2},
.VREV32 = { 1362, 4},
.VREV64 = { 1366, 6},
.VEXT = { 1372, 2},
.VTBL = { 1374, 4},
.VTBX = { 1378, 4},
.VTRN = { 1382, 6},
.VUZP = { 1388, 5},
.VZIP = { 1393, 5},
.VDUP = { 1398, 5},
.VSWP = { 1403, 2},
.VMOV_LANE = { 1405, 3},
.VLD1 = { 1408, 8},
.VLD2 = { 1416, 3},
.VLD3 = { 1419, 2},
.VLD4 = { 1421, 2},
.VST1 = { 1423, 7},
.VST2 = { 1430, 3},
.VST3 = { 1433, 2},
.VST4 = { 1435, 2},
.AESE = { 1437, 1},
.AESD = { 1438, 1},
.AESMC = { 1439, 1},
.AESIMC = { 1440, 1},
.SHA1H = { 1441, 1},
.SHA1SU0 = { 1442, 1},
.SHA1SU1 = { 1443, 1},
.SHA1C = { 1444, 1},
.SHA1M = { 1445, 1},
.SHA1P = { 1446, 1},
.SHA256H = { 1447, 1},
.SHA256H2 = { 1448, 1},
.SHA256SU0 = { 1449, 1},
.SHA256SU1 = { 1450, 1},
.VJCVT = { 1451, 1},
.VSDOT = { 1452, 4},
.VUDOT = { 1456, 4},
.VDOT = { 1460, 2},
.VMMLA = { 1462, 1},
.VFMAL = { 1463, 2},
.VFMSL = { 1465, 2},
.VCMLA = { 1467, 5},
.VCADD = { 1472, 2},
.VSMMLA = { 1474, 1},
.VUMMLA = { 1475, 1},
.VUSMMLA = { 1476, 1},
.VSUDOT = { 1477, 2},
.VUSDOT = { 1479, 4},
.VQABS = { 1483, 1},
.VQNEG = { 1484, 1},
.VMOVX = { 1485, 1},
.VINS = { 1486, 1},
.VLD2R = { 1487, 1},
.VLD3R = { 1488, 1},
.VLD4R = { 1489, 1},
.VLD1_LANE = { 1490, 3},
.VLD2_LANE = { 1493, 3},
.VLD3_LANE = { 1496, 3},
.VLD4_LANE = { 1499, 3},
.VST1_LANE = { 1502, 3},
.VST2_LANE = { 1505, 3},
.VST3_LANE = { 1508, 3},
.VST4_LANE = { 1511, 3},
.IT = { 1514, 1},
.TT = { 1515, 1},
.TTT = { 1516, 1},
.TTA = { 1517, 1},
.TTAT = { 1518, 1},
.SG = { 1519, 1},
.BXNS = { 1520, 1},
.BLXNS = { 1521, 1},
.PAC = { 1522, 1},
.PACBTI = { 1523, 1},
.AUT = { 1524, 1},
.AUTG = { 1525, 1},
.BTI = { 1526, 1},
.WLS = { 1527, 1},
.WLSTP = { 1528, 1},
.DLS = { 1529, 1},
.DLSTP = { 1530, 1},
.LE = { 1531, 1},
.LETP = { 1532, 1},
.LCTP = { 1533, 1},
.BF = { 1534, 1},
.BFX = { 1535, 1},
.BFL = { 1536, 1},
.BFLX = { 1537, 1},
.BFCSEL = { 1538, 1},
.CX1 = { 1539, 1},
.CX1A = { 1540, 1},
.CX1D = { 1541, 1},
.CX1DA = { 1542, 1},
.CX2 = { 1543, 1},
.CX2A = { 1544, 1},
.CX2D = { 1545, 1},
.CX2DA = { 1546, 1},
.CX3 = { 1547, 1},
.CX3A = { 1548, 1},
.CX3D = { 1549, 1},
.CX3DA = { 1550, 1},
.VCX1 = { 1551, 2},
.VCX1A = { 1553, 2},
.VCX2 = { 1555, 2},
.VCX2A = { 1557, 2},
.VCX3 = { 1559, 2},
.VCX3A = { 1561, 2},
.VPT = { 1563, 1},
.VPST = { 1564, 1},
.VPSEL = { 1565, 1},
.VPNOT = { 1566, 1},
.VCTP = { 1567, 1},
.VADDV = { 1568, 1},
.VADDVA = { 1569, 1},
.VADDLV = { 1570, 1},
.VADDLVA = { 1571, 1},
.VMAXV = { 1572, 1},
.VMAXAV = { 1573, 1},
.VMINV = { 1574, 1},
.VMINAV = { 1575, 1},
.VMAXNMV = { 1576, 1},
.VMAXNMAV = { 1577, 1},
.VMINNMV = { 1578, 1},
.VMINNMAV = { 1579, 1},
.VABAV = { 1580, 1},
.VMLADAV = { 1581, 1},
.VMLADAVA = { 1582, 1},
.VMLADAVX = { 1583, 1},
.VMLADAVAX = { 1584, 1},
.VMLALDAV = { 1585, 1},
.VMLALDAVA = { 1586, 1},
.VMLALDAVX = { 1587, 1},
.VMLALDAVAX = { 1588, 1},
.VMLSDAV = { 1589, 1},
.VMLSDAVA = { 1590, 1},
.VMLSDAVX = { 1591, 1},
.VMLSDAVAX = { 1592, 1},
.VMLSLDAV = { 1593, 1},
.VMLSLDAVA = { 1594, 1},
.VMLSLDAVX = { 1595, 1},
.VMLSLDAVAX = { 1596, 1},
.VRMLALDAVH = { 1597, 1},
.VRMLALDAVHA = { 1598, 1},
.VRMLALDAVHX = { 1599, 1},
.VRMLALDAVHAX = { 1600, 1},
.VRMLSLDAVH = { 1601, 1},
.VRMLSLDAVHA = { 1602, 1},
.VRMLSLDAVHX = { 1603, 1},
.VRMLSLDAVHAX = { 1604, 1},
.VMLAV = { 1605, 1},
.VMLAVA = { 1606, 1},
.VMLSV = { 1607, 1},
.VMLSVA = { 1608, 1},
.VCMUL = { 1609, 1},
.VHCADD = { 1610, 2},
.VBRSR = { 1612, 1},
.VSHLC = { 1613, 1},
.VDDUP = { 1614, 1},
.VIDUP = { 1615, 1},
.VDWDUP = { 1616, 1},
.VIWDUP = { 1617, 1},
.VMOVNB = { 1618, 1},
.VMOVNT = { 1619, 1},
.VQMOVNB = { 1620, 1},
.VQMOVNT = { 1621, 1},
.VQMOVUNB = { 1622, 1},
.VQMOVUNT = { 1623, 1},
.VSHLLB = { 1624, 1},
.VSHLLT = { 1625, 1},
.VMULLB = { 1626, 1},
.VMULLT = { 1627, 1},
.VMLALB = { 1628, 1},
.VMLALT = { 1629, 1},
.VMLSLB = { 1630, 1},
.VMLSLT = { 1631, 1},
.VSHRNB = { 1632, 1},
.VSHRNT = { 1633, 1},
.VRSHRNB = { 1634, 1},
.VRSHRNT = { 1635, 1},
.VQSHRNB = { 1636, 1},
.VQSHRNT = { 1637, 1},
.VQRSHRNB = { 1638, 1},
.VQRSHRNT = { 1639, 1},
.VQSHRUNB = { 1640, 1},
.VQSHRUNT = { 1641, 1},
.VQRSHRUNB = { 1642, 1},
.VQRSHRUNT = { 1643, 1},
.VQDMLADH = { 1644, 1},
.VQDMLADHX = { 1645, 1},
.VQDMLSDH = { 1646, 1},
.VQDMLSDHX = { 1647, 1},
.VQRDMLADH = { 1648, 1},
.VQRDMLADHX = { 1649, 1},
.VQRDMLSDH = { 1650, 1},
.VQRDMLSDHX = { 1651, 1},
.VLDRB = { 1652, 2},
.VLDRH = { 1654, 2},
.VLDRW = { 1656, 2},
.VLDRD = { 1658, 2},
.VSTRB = { 1660, 2},
.VSTRH = { 1662, 2},
.VSTRW = { 1664, 2},
.VSTRD = { 1666, 2},
.VLD20 = { 1668, 1},
.VLD21 = { 1669, 1},
.VLD40 = { 1670, 1},
.VLD41 = { 1671, 1},
.VLD42 = { 1672, 1},
.VLD43 = { 1673, 1},
.VST20 = { 1674, 1},
.VST21 = { 1675, 1},
.VST40 = { 1676, 1},
.VST41 = { 1677, 1},
.VST42 = { 1678, 1},
.VST43 = { 1679, 1},
._COUNT = { 1680, 0},
.VMUL = { 648, 22},
.VDIV = { 670, 3},
.VMLA = { 673, 16},
.VMLS = { 689, 15},
.VNMUL = { 704, 2},
.VNMLA = { 706, 2},
.VNMLS = { 708, 2},
.VFMA = { 710, 10},
.VFMS = { 720, 8},
.VFNMA = { 728, 3},
.VFNMS = { 731, 3},
.VABS = { 734, 12},
.VNEG = { 746, 12},
.VSQRT = { 758, 3},
.VCMP = { 761, 8},
.VCMPE = { 769, 4},
.VCVT = { 773, 21},
.VCVTB = { 794, 2},
.VCVTT = { 796, 2},
.VCVTA = { 798, 2},
.VCVTN = { 800, 2},
.VCVTP = { 802, 2},
.VCVTM = { 804, 2},
.VCVTR = { 806, 4},
.VMOV = { 810, 31},
.VMRS = { 841, 1},
.VMSR = { 842, 1},
.VLDR = { 843, 2},
.VSTR = { 845, 2},
.VLDM = { 847, 2},
.VSTM = { 849, 2},
.VPUSH = { 851, 2},
.VPOP = { 853, 2},
.VSEL = { 855, 2},
.VMAXNM = { 857, 2},
.VMINNM = { 859, 2},
.VRINTA = { 861, 3},
.VRINTN = { 864, 3},
.VRINTP = { 867, 3},
.VRINTM = { 870, 3},
.VRINTR = { 873, 2},
.VRINTZ = { 875, 3},
.VRINTX = { 878, 3},
.VADDL = { 881, 6},
.VADDW = { 887, 6},
.VSUBL = { 893, 6},
.VSUBW = { 899, 6},
.VHADD = { 905, 9},
.VHSUB = { 914, 9},
.VRHADD = { 923, 3},
.VQADD = { 926, 11},
.VQSUB = { 937, 11},
.VMULL = { 948, 11},
.VMLAL = { 959, 10},
.VMLSL = { 969, 10},
.VQDMULL = { 979, 4},
.VQDMLAL = { 983, 4},
.VQDMLSL = { 987, 4},
.VQDMULH = { 991, 8},
.VQRDMULH = { 999, 8},
.VQRDMLAH = { 1007, 8},
.VQRDMLSH = { 1015, 8},
.VABA = { 1023, 8},
.VABAL = { 1031, 6},
.VABD = { 1037, 10},
.VABDL = { 1047, 6},
.VAND = { 1053, 3},
.VBIC = { 1056, 3},
.VORR = { 1059, 3},
.VORN = { 1062, 3},
.VEOR = { 1065, 3},
.VBSL = { 1068, 2},
.VBIT = { 1070, 2},
.VBIF = { 1072, 2},
.VMVN = { 1074, 13},
.VMOVN = { 1087, 3},
.VQMOVN = { 1090, 6},
.VQMOVUN = { 1096, 3},
.VMOVL = { 1099, 6},
.VTST = { 1105, 6},
.VCEQ = { 1111, 14},
.VCGE = { 1125, 16},
.VCGT = { 1141, 16},
.VCLE = { 1157, 18},
.VCLT = { 1175, 18},
.VACGE = { 1193, 2},
.VACGT = { 1195, 2},
.VACLE = { 1197, 2},
.VACLT = { 1199, 2},
.VMAX = { 1201, 13},
.VMIN = { 1214, 13},
.VPMAX = { 1227, 5},
.VPMIN = { 1232, 5},
.VPADD = { 1237, 4},
.VPADDL = { 1241, 6},
.VPADAL = { 1247, 4},
.VRECPE = { 1251, 4},
.VRECPS = { 1255, 2},
.VRSQRTE = { 1257, 4},
.VRSQRTS = { 1261, 2},
.VSHL = { 1263, 9},
.VSHR = { 1272, 3},
.VSRA = { 1275, 3},
.VRSHL = { 1278, 5},
.VRSHR = { 1283, 3},
.VRSRA = { 1286, 2},
.VSLI = { 1288, 2},
.VSRI = { 1290, 2},
.VQSHL = { 1292, 7},
.VQSHRN = { 1299, 1},
.VQSHRUN = { 1300, 1},
.VQRSHL = { 1301, 16},
.VQRSHRN = { 1317, 1},
.VQRSHRUN = { 1318, 1},
.VSHRN = { 1319, 1},
.VRSHRN = { 1320, 1},
.VSHLL = { 1321, 4},
.VCLS = { 1325, 6},
.VCLZ = { 1331, 6},
.VCNT = { 1337, 2},
.VPADD_F = { 1339, 2},
.VRECPE_F = { 1341, 2},
.VRSQRTE_F = { 1343, 2},
.VREV16 = { 1345, 2},
.VREV32 = { 1347, 4},
.VREV64 = { 1351, 6},
.VEXT = { 1357, 2},
.VTBL = { 1359, 4},
.VTBX = { 1363, 4},
.VTRN = { 1367, 6},
.VUZP = { 1373, 5},
.VZIP = { 1378, 5},
.VDUP = { 1383, 5},
.VSWP = { 1388, 2},
.VMOV_LANE = { 1390, 3},
.VLD1 = { 1393, 8},
.VLD2 = { 1401, 3},
.VLD3 = { 1404, 2},
.VLD4 = { 1406, 2},
.VST1 = { 1408, 7},
.VST2 = { 1415, 3},
.VST3 = { 1418, 2},
.VST4 = { 1420, 2},
.AESE = { 1422, 1},
.AESD = { 1423, 1},
.AESMC = { 1424, 1},
.AESIMC = { 1425, 1},
.SHA1H = { 1426, 1},
.SHA1SU0 = { 1427, 1},
.SHA1SU1 = { 1428, 1},
.SHA1C = { 1429, 1},
.SHA1M = { 1430, 1},
.SHA1P = { 1431, 1},
.SHA256H = { 1432, 1},
.SHA256H2 = { 1433, 1},
.SHA256SU0 = { 1434, 1},
.SHA256SU1 = { 1435, 1},
.VJCVT = { 1436, 1},
.VSDOT = { 1437, 4},
.VUDOT = { 1441, 4},
.VDOT = { 1445, 2},
.VMMLA = { 1447, 1},
.VFMAL = { 1448, 2},
.VFMSL = { 1450, 2},
.VCMLA = { 1452, 5},
.VCADD = { 1457, 2},
.VSMMLA = { 1459, 1},
.VUMMLA = { 1460, 1},
.VUSMMLA = { 1461, 1},
.VSUDOT = { 1462, 2},
.VUSDOT = { 1464, 4},
.VQABS = { 1468, 1},
.VQNEG = { 1469, 1},
.VMOVX = { 1470, 1},
.VINS = { 1471, 1},
.VLD2R = { 1472, 1},
.VLD3R = { 1473, 1},
.VLD4R = { 1474, 1},
.VLD1_LANE = { 1475, 3},
.VLD2_LANE = { 1478, 3},
.VLD3_LANE = { 1481, 3},
.VLD4_LANE = { 1484, 3},
.VST1_LANE = { 1487, 3},
.VST2_LANE = { 1490, 3},
.VST3_LANE = { 1493, 3},
.VST4_LANE = { 1496, 3},
.IT = { 1499, 1},
.TT = { 1500, 1},
.TTT = { 1501, 1},
.TTA = { 1502, 1},
.TTAT = { 1503, 1},
.SG = { 1504, 1},
.BXNS = { 1505, 1},
.BLXNS = { 1506, 1},
.PAC = { 1507, 1},
.PACBTI = { 1508, 1},
.AUT = { 1509, 1},
.AUTG = { 1510, 1},
.BTI = { 1511, 1},
.WLS = { 1512, 1},
.WLSTP = { 1513, 1},
.DLS = { 1514, 1},
.DLSTP = { 1515, 1},
.LE = { 1516, 1},
.LETP = { 1517, 1},
.LCTP = { 1518, 1},
.BF = { 1519, 1},
.BFX = { 1520, 1},
.BFL = { 1521, 1},
.BFLX = { 1522, 1},
.BFCSEL = { 1523, 1},
.CX1 = { 1524, 1},
.CX1A = { 1525, 1},
.CX1D = { 1526, 1},
.CX1DA = { 1527, 1},
.CX2 = { 1528, 1},
.CX2A = { 1529, 1},
.CX2D = { 1530, 1},
.CX2DA = { 1531, 1},
.CX3 = { 1532, 1},
.CX3A = { 1533, 1},
.CX3D = { 1534, 1},
.CX3DA = { 1535, 1},
.VCX1 = { 1536, 2},
.VCX1A = { 1538, 2},
.VCX2 = { 1540, 2},
.VCX2A = { 1542, 2},
.VCX3 = { 1544, 2},
.VCX3A = { 1546, 2},
.VPT = { 1548, 1},
.VPST = { 1549, 1},
.VPSEL = { 1550, 1},
.VPNOT = { 1551, 1},
.VCTP = { 1552, 1},
.VADDV = { 1553, 1},
.VADDVA = { 1554, 1},
.VADDLV = { 1555, 1},
.VADDLVA = { 1556, 1},
.VMAXV = { 1557, 1},
.VMAXAV = { 1558, 1},
.VMINV = { 1559, 1},
.VMINAV = { 1560, 1},
.VMAXNMV = { 1561, 1},
.VMAXNMAV = { 1562, 1},
.VMINNMV = { 1563, 1},
.VMINNMAV = { 1564, 1},
.VABAV = { 1565, 1},
.VMLADAV = { 1566, 1},
.VMLADAVA = { 1567, 1},
.VMLADAVX = { 1568, 1},
.VMLADAVAX = { 1569, 1},
.VMLALDAV = { 1570, 1},
.VMLALDAVA = { 1571, 1},
.VMLALDAVX = { 1572, 1},
.VMLALDAVAX = { 1573, 1},
.VMLSDAV = { 1574, 1},
.VMLSDAVA = { 1575, 1},
.VMLSDAVX = { 1576, 1},
.VMLSDAVAX = { 1577, 1},
.VMLSLDAV = { 1578, 1},
.VMLSLDAVA = { 1579, 1},
.VMLSLDAVX = { 1580, 1},
.VMLSLDAVAX = { 1581, 1},
.VRMLALDAVH = { 1582, 1},
.VRMLALDAVHA = { 1583, 1},
.VRMLALDAVHX = { 1584, 1},
.VRMLALDAVHAX = { 1585, 1},
.VRMLSLDAVH = { 1586, 1},
.VRMLSLDAVHA = { 1587, 1},
.VRMLSLDAVHX = { 1588, 1},
.VRMLSLDAVHAX = { 1589, 1},
.VMLAV = { 1590, 1},
.VMLAVA = { 1591, 1},
.VMLSV = { 1592, 1},
.VMLSVA = { 1593, 1},
.VCMUL = { 1594, 1},
.VHCADD = { 1595, 2},
.VBRSR = { 1597, 1},
.VSHLC = { 1598, 1},
.VDDUP = { 1599, 1},
.VIDUP = { 1600, 1},
.VDWDUP = { 1601, 1},
.VIWDUP = { 1602, 1},
.VMOVNB = { 1603, 1},
.VMOVNT = { 1604, 1},
.VQMOVNB = { 1605, 1},
.VQMOVNT = { 1606, 1},
.VQMOVUNB = { 1607, 1},
.VQMOVUNT = { 1608, 1},
.VSHLLB = { 1609, 1},
.VSHLLT = { 1610, 1},
.VMULLB = { 1611, 1},
.VMULLT = { 1612, 1},
.VMLALB = { 1613, 1},
.VMLALT = { 1614, 1},
.VMLSLB = { 1615, 1},
.VMLSLT = { 1616, 1},
.VSHRNB = { 1617, 1},
.VSHRNT = { 1618, 1},
.VRSHRNB = { 1619, 1},
.VRSHRNT = { 1620, 1},
.VQSHRNB = { 1621, 1},
.VQSHRNT = { 1622, 1},
.VQRSHRNB = { 1623, 1},
.VQRSHRNT = { 1624, 1},
.VQSHRUNB = { 1625, 1},
.VQSHRUNT = { 1626, 1},
.VQRSHRUNB = { 1627, 1},
.VQRSHRUNT = { 1628, 1},
.VQDMLADH = { 1629, 1},
.VQDMLADHX = { 1630, 1},
.VQDMLSDH = { 1631, 1},
.VQDMLSDHX = { 1632, 1},
.VQRDMLADH = { 1633, 1},
.VQRDMLADHX = { 1634, 1},
.VQRDMLSDH = { 1635, 1},
.VQRDMLSDHX = { 1636, 1},
.VLDRB = { 1637, 2},
.VLDRH = { 1639, 2},
.VLDRW = { 1641, 2},
.VLDRD = { 1643, 2},
.VSTRB = { 1645, 2},
.VSTRH = { 1647, 2},
.VSTRW = { 1649, 2},
.VSTRD = { 1651, 2},
.VLD20 = { 1653, 1},
.VLD21 = { 1654, 1},
.VLD40 = { 1655, 1},
.VLD41 = { 1656, 1},
.VLD42 = { 1657, 1},
.VLD43 = { 1658, 1},
.VST20 = { 1659, 1},
.VST21 = { 1660, 1},
.VST40 = { 1661, 1},
.VST41 = { 1662, 1},
.VST42 = { 1663, 1},
.VST43 = { 1664, 1},
._COUNT = { 1665, 0},
}

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