mirrors/Odin
1
0
Fork 0
mirror of https://github.com/odin-lang/Odin.git synced 2026-06-19 08:32:33 +00:00
Code Issues Packages Projects Releases Wiki Activity

rexcode/mips: MSA INSVE + DSP ASE 3-register/compare/shift forms

Browse Source 
MSA INSVE (.B/.H/.W/.D element insert). DSP ASE three-register ops
(ADDU/SUBU/MULEQ/MULEU/MULQ/PRECRQ*/PICK/CMPGU, enc {RD,RS,RT}), the
variable shifts SHLLV/SHRAV/SHRLV (enc {RD,RT,RS} -- value is Rt, shift is
Rs), and the compares CMP/CMPU (.PH/.QB, {RS,RT}). 38 forms reusing the
existing GPR R-type slots. Spot-checked byte-exact vs llvm-mc; 281 tests
green.
This commit is contained in:
Brendan Punsky
2026-06-18 03:24:20 -04:00
committed by Flāvius
parent 4ab24007b7
commit 5b47f0ca29
10 changed files with 4432 additions and 4083 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7208
core/rexcode/mips/mnemonic_builders.odin
View File

File diff suppressed because it is too large Load Diff

38
core/rexcode/mips/tablegen/encoding_table.odin
View File

@@ -1551,5 +1551,43 @@ ENCODING_TABLE := #partial [Mnemonic][]Encoding{
.SHF_B = { {.SHF_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_I8,.NONE}, 0x78000002, 0xFF00003F, .MSA, {}} },
.SHF_H = { {.SHF_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_I8,.NONE}, 0x79000002, 0xFF00003F, .MSA, {}} },
.SHF_W = { {.SHF_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_I8,.NONE}, 0x7A000002, 0xFF00003F, .MSA, {}} },
.INSVE_B = { {.INSVE_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79400019, 0xFFF0003F, .MSA, {}} },
.INSVE_H = { {.INSVE_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79600019, 0xFFF8003F, .MSA, {}} },
.INSVE_W = { {.INSVE_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79700019, 0xFFFC003F, .MSA, {}} },
.INSVE_D = { {.INSVE_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79780019, 0xFFFE003F, .MSA, {}} },
.ADDU_PH = { {.ADDU_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000210, 0xFC0007FF, .DSP_R2, {}} },
.ADDU_S_PH = { {.ADDU_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000310, 0xFC0007FF, .DSP_R2, {}} },
.SUBU_PH = { {.SUBU_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000250, 0xFC0007FF, .DSP_R2, {}} },
.SUBU_S_PH = { {.SUBU_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000350, 0xFC0007FF, .DSP_R2, {}} },
.MULEQ_S_W_PHL = { {.MULEQ_S_W_PHL, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000710, 0xFC0007FF, .DSP_R2, {}} },
.MULEQ_S_W_PHR = { {.MULEQ_S_W_PHR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000750, 0xFC0007FF, .DSP_R2, {}} },
.MULEU_S_PH_QBL = { {.MULEU_S_PH_QBL, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000190, 0xFC0007FF, .DSP_R2, {}} },
.MULEU_S_PH_QBR = { {.MULEU_S_PH_QBR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0001D0, 0xFC0007FF, .DSP_R2, {}} },
.MULQ_RS_PH = { {.MULQ_RS_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0007D0, 0xFC0007FF, .DSP_R2, {}} },
.MULQ_S_PH = { {.MULQ_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000790, 0xFC0007FF, .DSP_R2, {}} },
.PRECRQ_PH_W = { {.PRECRQ_PH_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000511, 0xFC0007FF, .DSP_R2, {}} },
.PRECRQ_QB_PH = { {.PRECRQ_QB_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000311, 0xFC0007FF, .DSP_R2, {}} },
.PRECRQ_RS_PH_W = { {.PRECRQ_RS_PH_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000551, 0xFC0007FF, .DSP_R2, {}} },
.PRECRQU_S_QB_PH = { {.PRECRQU_S_QB_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0003D1, 0xFC0007FF, .DSP_R2, {}} },
.PICK_PH = { {.PICK_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0002D1, 0xFC0007FF, .DSP_R2, {}} },
.PICK_QB = { {.PICK_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0000D1, 0xFC0007FF, .DSP_R2, {}} },
.CMPGU_EQ_QB = { {.CMPGU_EQ_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000111, 0xFC0007FF, .DSP_R2, {}} },
.CMPGU_LE_QB = { {.CMPGU_LE_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000191, 0xFC0007FF, .DSP_R2, {}} },
.CMPGU_LT_QB = { {.CMPGU_LT_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000151, 0xFC0007FF, .DSP_R2, {}} },
.SHLLV_PH = { {.SHLLV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000293, 0xFC0007FF, .DSP_R2, {}} },
.SHLLV_S_PH = { {.SHLLV_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000393, 0xFC0007FF, .DSP_R2, {}} },
.SHLLV_S_W = { {.SHLLV_S_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000593, 0xFC0007FF, .DSP_R2, {}} },
.SHRAV_PH = { {.SHRAV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0002D3, 0xFC0007FF, .DSP_R2, {}} },
.SHRAV_QB = { {.SHRAV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000193, 0xFC0007FF, .DSP_R2, {}} },
.SHRAV_R_PH = { {.SHRAV_R_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0003D3, 0xFC0007FF, .DSP_R2, {}} },
.SHRAV_R_QB = { {.SHRAV_R_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0001D3, 0xFC0007FF, .DSP_R2, {}} },
.SHRAV_R_W = { {.SHRAV_R_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0005D3, 0xFC0007FF, .DSP_R2, {}} },
.SHRLV_PH = { {.SHRLV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0006D3, 0xFC0007FF, .DSP_R2, {}} },
.CMP_EQ_PH = { {.CMP_EQ_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000211, 0xFC00FFFF, .DSP_R2, {}} },
.CMP_LE_PH = { {.CMP_LE_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000291, 0xFC00FFFF, .DSP_R2, {}} },
.CMP_LT_PH = { {.CMP_LT_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000251, 0xFC00FFFF, .DSP_R2, {}} },
.CMPU_EQ_QB = { {.CMPU_EQ_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000011, 0xFC00FFFF, .DSP_R2, {}} },
.CMPU_LE_QB = { {.CMPU_LE_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000091, 0xFC00FFFF, .DSP_R2, {}} },
.CMPU_LT_QB = { {.CMPU_LT_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000051, 0xFC00FFFF, .DSP_R2, {}} },
// SPECGEN:END
}

145
core/rexcode/mips/tablegen/generated/decode_tables.odin
View File

@@ -8,7 +8,7 @@ package rexcode_mips_generated
import lib "../.."
@(rodata)
DECODE_ENTRIES := [882]lib.Decode_Entry{
DECODE_ENTRIES := [920]lib.Decode_Entry{
{ .NOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000000, 0xFFFFFFFF, .MIPS_I, {} },
{ .SSNOP, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x00000040, 0xFFFFFFFF, .MIPS32_R1, {} },
{ .EHB, {.NONE,.NONE,.NONE,.NONE}, {.NONE,.NONE,.NONE,.NONE}, 0x000000C0, 0xFFFFFFFF, .MIPS32_R2, {} },
@@ -480,18 +480,22 @@ DECODE_ENTRIES := [882]lib.Decode_Entry{
{ .PCNT_H, {.MSA_VEC,.MSA_VEC,.NONE,.NONE}, {.WD,.WS,.NONE,.NONE}, 0x7B05001E, 0xFFFF003F, .MSA, {} },
{ .PCNT_W, {.MSA_VEC,.MSA_VEC,.NONE,.NONE}, {.WD,.WS,.NONE,.NONE}, 0x7B06001E, 0xFFFF003F, .MSA, {} },
{ .PCNT_D, {.MSA_VEC,.MSA_VEC,.NONE,.NONE}, {.WD,.WS,.NONE,.NONE}, 0x7B07001E, 0xFFFF003F, .MSA, {} },
{ .INSVE_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79780019, 0xFFFE003F, .MSA, {} },
{ .SLDI_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78380019, 0xFFFE003F, .MSA, {} },
{ .SPLATI_D, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78780019, 0xFFFE003F, .MSA, {} },
{ .INSVE_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79700019, 0xFFFC003F, .MSA, {} },
{ .SLDI_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78300019, 0xFFFC003F, .MSA, {} },
{ .SPLATI_W, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78700019, 0xFFFC003F, .MSA, {} },
{ .SLLI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78700009, 0xFFF8003F, .MSA, {} },
{ .SRLI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x79700009, 0xFFF8003F, .MSA, {} },
{ .SRAI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78F00009, 0xFFF8003F, .MSA, {} },
{ .INSVE_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79600019, 0xFFF8003F, .MSA, {} },
{ .SLDI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78200019, 0xFFF8003F, .MSA, {} },
{ .SPLATI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78600019, 0xFFF8003F, .MSA, {} },
{ .SLLI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78600009, 0xFFF0003F, .MSA, {} },
{ .SRLI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x79600009, 0xFFF0003F, .MSA, {} },
{ .SRAI_H, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_BIT_SHIFT,.NONE}, 0x78E00009, 0xFFF0003F, .MSA, {} },
{ .INSVE_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x79400019, 0xFFF0003F, .MSA, {} },
{ .SLDI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78000019, 0xFFF0003F, .MSA, {} },
{ .SPLATI_B, {.MSA_VEC,.MSA_VEC,.IMM5,.NONE}, {.WD,.WS,.MSA_ELM_IDX,.NONE}, 0x78400019, 0xFFF0003F, .MSA, {} },
{ .ADDV_B, {.MSA_VEC,.MSA_VEC,.MSA_VEC,.NONE}, {.WD,.WS,.WT,.NONE}, 0x7800000E, 0xFFE0003F, .MSA, {} },
@@ -697,10 +701,35 @@ DECODE_ENTRIES := [882]lib.Decode_Entry{
{ .SUBQ_S_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0005D0, 0xFC0007FF, .DSP_R1, {} },
{ .ADDU_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000010, 0xFC0007FF, .DSP_R1, {} },
{ .ADDU_S_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000110, 0xFC0007FF, .DSP_R1, {} },
{ .ADDU_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000210, 0xFC0007FF, .DSP_R2, {} },
{ .ADDU_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000310, 0xFC0007FF, .DSP_R2, {} },
{ .SUBU_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000050, 0xFC0007FF, .DSP_R1, {} },
{ .SUBU_S_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000150, 0xFC0007FF, .DSP_R1, {} },
{ .SUBU_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000250, 0xFC0007FF, .DSP_R2, {} },
{ .SUBU_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000350, 0xFC0007FF, .DSP_R2, {} },
{ .ADDSC, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000410, 0xFC0007FF, .DSP_R1, {} },
{ .ADDWC, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000450, 0xFC0007FF, .DSP_R1, {} },
{ .MULEU_S_PH_QBL, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000190, 0xFC0007FF, .DSP_R2, {} },
{ .MULEU_S_PH_QBR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0001D0, 0xFC0007FF, .DSP_R2, {} },
{ .MULEQ_S_W_PHL, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000710, 0xFC0007FF, .DSP_R2, {} },
{ .MULEQ_S_W_PHR, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000750, 0xFC0007FF, .DSP_R2, {} },
{ .MULQ_RS_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0007D0, 0xFC0007FF, .DSP_R2, {} },
{ .MULQ_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000790, 0xFC0007FF, .DSP_R2, {} },
{ .CMPU_EQ_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000011, 0xFC00FFFF, .DSP_R2, {} },
{ .CMPU_LT_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000051, 0xFC00FFFF, .DSP_R2, {} },
{ .CMPU_LE_QB, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000091, 0xFC00FFFF, .DSP_R2, {} },
{ .CMP_EQ_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000211, 0xFC00FFFF, .DSP_R2, {} },
{ .CMP_LT_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000251, 0xFC00FFFF, .DSP_R2, {} },
{ .CMP_LE_PH, {.GPR,.GPR,.NONE,.NONE}, {.RS,.RT,.NONE,.NONE}, 0x7C000291, 0xFC00FFFF, .DSP_R2, {} },
{ .PRECRQ_QB_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000311, 0xFC0007FF, .DSP_R2, {} },
{ .PRECRQ_PH_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000511, 0xFC0007FF, .DSP_R2, {} },
{ .PRECRQU_S_QB_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0003D1, 0xFC0007FF, .DSP_R2, {} },
{ .PRECRQ_RS_PH_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000551, 0xFC0007FF, .DSP_R2, {} },
{ .CMPGU_EQ_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000111, 0xFC0007FF, .DSP_R2, {} },
{ .CMPGU_LT_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000151, 0xFC0007FF, .DSP_R2, {} },
{ .CMPGU_LE_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C000191, 0xFC0007FF, .DSP_R2, {} },
{ .PICK_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0000D1, 0xFC0007FF, .DSP_R2, {} },
{ .PICK_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RS,.RT,.NONE}, 0x7C0002D1, 0xFC0007FF, .DSP_R2, {} },
{ .PRECEQ_W_PHL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000312, 0xFFE007FF, .DSP_R1, {} },
{ .PRECEQ_W_PHR, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000352, 0xFFE007FF, .DSP_R1, {} },
{ .PRECEQU_PH_QBL, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000112, 0xFFE007FF, .DSP_R1, {} },
@@ -718,7 +747,16 @@ DECODE_ENTRIES := [882]lib.Decode_Entry{
{ .SHRA_PH, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000253, 0xFFE0073F, .DSP_R1, {} },
{ .SHRA_R_W, {.GPR,.GPR,.IMM5,.NONE}, {.RD,.RT,.IMM_5,.NONE}, 0x7C000553, 0xFFE0073F, .DSP_R1, {} },
{ .SHLLV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000093, 0xFC0007FF, .DSP_R1, {} },
{ .SHLLV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000293, 0xFC0007FF, .DSP_R2, {} },
{ .SHLLV_S_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000393, 0xFC0007FF, .DSP_R2, {} },
{ .SHLLV_S_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000593, 0xFC0007FF, .DSP_R2, {} },
{ .SHRLV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0000D3, 0xFC0007FF, .DSP_R1, {} },
{ .SHRLV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0006D3, 0xFC0007FF, .DSP_R2, {} },
{ .SHRAV_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C000193, 0xFC0007FF, .DSP_R2, {} },
{ .SHRAV_R_QB, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0001D3, 0xFC0007FF, .DSP_R2, {} },
{ .SHRAV_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0002D3, 0xFC0007FF, .DSP_R2, {} },
{ .SHRAV_R_PH, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0003D3, 0xFC0007FF, .DSP_R2, {} },
{ .SHRAV_R_W, {.GPR,.GPR,.GPR,.NONE}, {.RD,.RT,.RS,.NONE}, 0x7C0005D3, 0xFC0007FF, .DSP_R2, {} },
{ .WSBH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C0000A0, 0xFFE007FF, .MIPS32_R2, {} },
{ .SEB, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000420, 0xFFE007FF, .MIPS32_R2, {} },
{ .SEH, {.GPR,.GPR,.NONE,.NONE}, {.RD,.RT,.NONE,.NONE}, 0x7C000620, 0xFFE007FF, .MIPS32_R2, {} },
@@ -925,40 +963,40 @@ DECODE_INDEX_PRIMARY := [64]lib.Decode_Index{
0x1B = { 320, 13},
0x1C = { 333, 109},
0x1D = { 442, 1},
0x1E = { 443, 216},
0x1F = { 659, 78},
0x20 = { 737, 1},
0x21 = { 738, 1},
0x22 = { 739, 1},
0x23 = { 740, 1},
0x24 = { 741, 1},
0x25 = { 742, 1},
0x26 = { 743, 1},
0x27 = { 744, 1},
0x28 = { 745, 1},
0x29 = { 746, 1},
0x2A = { 747, 1},
0x2B = { 748, 1},
0x2C = { 749, 1},
0x2D = { 750, 1},
0x2E = { 751, 1},
0x2F = { 752, 1},
0x30 = { 753, 1},
0x31 = { 754, 1},
0x32 = { 755, 3},
0x33 = { 758, 1},
0x34 = { 759, 63},
0x35 = { 822, 3},
0x36 = { 825, 5},
0x37 = { 830, 6},
0x38 = { 836, 1},
0x39 = { 837, 1},
0x3A = { 838, 3},
0x3B = { 841, 2},
0x3C = { 843, 27},
0x3D = { 870, 3},
0x3E = { 873, 5},
0x3F = { 878, 4},
0x1E = { 443, 220},
0x1F = { 663, 112},
0x20 = { 775, 1},
0x21 = { 776, 1},
0x22 = { 777, 1},
0x23 = { 778, 1},
0x24 = { 779, 1},
0x25 = { 780, 1},
0x26 = { 781, 1},
0x27 = { 782, 1},
0x28 = { 783, 1},
0x29 = { 784, 1},
0x2A = { 785, 1},
0x2B = { 786, 1},
0x2C = { 787, 1},
0x2D = { 788, 1},
0x2E = { 789, 1},
0x2F = { 790, 1},
0x30 = { 791, 1},
0x31 = { 792, 1},
0x32 = { 793, 3},
0x33 = { 796, 1},
0x34 = { 797, 63},
0x35 = { 860, 3},
0x36 = { 863, 5},
0x37 = { 868, 6},
0x38 = { 874, 1},
0x39 = { 875, 1},
0x3A = { 876, 3},
0x3B = { 879, 2},
0x3C = { 881, 27},
0x3D = { 908, 3},
0x3E = { 911, 5},
0x3F = { 916, 4},
}
@(rodata)
@@ -1105,23 +1143,24 @@ DECODE_INDEX_SPECIAL2 := [64]lib.Decode_Index{
@(rodata)
DECODE_INDEX_SPECIAL3 := [64]lib.Decode_Index{
0x00 = { 659, 2},
0x01 = { 661, 1},
0x02 = { 662, 1},
0x03 = { 663, 1},
0x04 = { 664, 1},
0x05 = { 665, 1},
0x06 = { 666, 1},
0x07 = { 667, 1},
0x0A = { 668, 3},
0x0C = { 671, 1},
0x0F = { 672, 8},
0x10 = { 680, 12},
0x12 = { 692, 9},
0x13 = { 701, 9},
0x20 = { 710, 5},
0x24 = { 715, 4},
0x30 = { 719, 9},
0x38 = { 728, 9},
0x00 = { 663, 2},
0x01 = { 665, 1},
0x02 = { 666, 1},
0x03 = { 667, 1},
0x04 = { 668, 1},
0x05 = { 669, 1},
0x06 = { 670, 1},
0x07 = { 671, 1},
0x0A = { 672, 3},
0x0C = { 675, 1},
0x0F = { 676, 8},
0x10 = { 684, 22},
0x11 = { 706, 15},
0x12 = { 721, 9},
0x13 = { 730, 18},
0x20 = { 748, 5},
0x24 = { 753, 4},
0x30 = { 757, 9},
0x38 = { 766, 9},
}

1078
core/rexcode/mips/tablegen/generated/encode_tables.odin
View File

File diff suppressed because it is too large Load Diff

46
core/rexcode/mips/tablegen/specgen.lua
View File

@@ -13,7 +13,7 @@
-- Run: luajit tablegen/specgen.lua (from mips/, or with a full path)
local bit = require("bit")
local LLVM = "llvm-mc --assemble --triple=mips --mattr=+msa --show-encoding"
local LLVM = "llvm-mc --assemble --triple=mips --mattr=+msa,+dsp,+dspr2 --show-encoding"
local DIR = (arg[0]:match("^(.*)/[^/]*$")) or "."
local TABLE = DIR .. "/encoding_table.odin"
@@ -152,6 +152,50 @@ for _, d in ipairs({{"B","b"},{"H","h"},{"W","w"}}) do
if r then sections[#sections+1]=r end
end
-- ---- INSVE: element insert from Ws[0] into Wd[idx] -------------------------
for _, d in ipairs(BHWD) do
local r = entry("INSVE_"..d[1], "{.MSA_VEC,.MSA_VEC,.IMM5,.NONE}", "{.WD,.WS,.MSA_ELM_IDX,.NONE}", "MSA",
function(v) return string.format("insve.%s $w%d[%d],$w%d[0]", d[2], v[1], v[3], v[2]) end, {31,31,ELM_IDX[d[2]]})
if r then sections[#sections+1]=r end
end
-- ---- DSP ASE three-register (Rd, Rs, Rt) -----------------------------------
local GPR3 = "{.GPR,.GPR,.GPR,.NONE}"
local ENC_RDST = "{.RD,.RS,.RT,.NONE}"
for _, b in ipairs({
{"ADDU_PH","addu.ph"},{"ADDU_S_PH","addu_s.ph"},{"SUBU_PH","subu.ph"},{"SUBU_S_PH","subu_s.ph"},
{"MULEQ_S_W_PHL","muleq_s.w.phl"},{"MULEQ_S_W_PHR","muleq_s.w.phr"},
{"MULEU_S_PH_QBL","muleu_s.ph.qbl"},{"MULEU_S_PH_QBR","muleu_s.ph.qbr"},
{"MULQ_RS_PH","mulq_rs.ph"},{"MULQ_S_PH","mulq_s.ph"},
{"PRECRQ_PH_W","precrq.ph.w"},{"PRECRQ_QB_PH","precrq.qb.ph"},
{"PRECRQ_RS_PH_W","precrq_rs.ph.w"},{"PRECRQU_S_QB_PH","precrqu_s.qb.ph"},
{"PICK_PH","pick.ph"},{"PICK_QB","pick.qb"},
{"CMPGU_EQ_QB","cmpgu.eq.qb"},{"CMPGU_LE_QB","cmpgu.le.qb"},{"CMPGU_LT_QB","cmpgu.lt.qb"},
}) do
local r = entry(b[1], GPR3, ENC_RDST, "DSP_R2", function(v) return string.format("%s $%d,$%d,$%d", b[2], v[1], v[2], v[3]) end, {31,31,31})
if r then sections[#sections+1]=r end
end
-- ---- DSP ASE variable shifts: Rd, Rt (value), Rs (shift) -> enc {RD,RT,RS} --
for _, b in ipairs({
{"SHLLV_PH","shllv.ph"},{"SHLLV_S_PH","shllv_s.ph"},{"SHLLV_S_W","shllv_s.w"},
{"SHRAV_PH","shrav.ph"},{"SHRAV_QB","shrav.qb"},{"SHRAV_R_PH","shrav_r.ph"},
{"SHRAV_R_QB","shrav_r.qb"},{"SHRAV_R_W","shrav_r.w"},{"SHRLV_PH","shrlv.ph"},
}) do
local r = entry(b[1], GPR3, "{.RD,.RT,.RS,.NONE}", "DSP_R2", function(v) return string.format("%s $%d,$%d,$%d", b[2], v[1], v[2], v[3]) end, {31,31,31})
if r then sections[#sections+1]=r end
end
-- ---- DSP ASE compare (Rs, Rt -> DSP flags) ---------------------------------
for _, b in ipairs({
{"CMP_EQ_PH","cmp.eq.ph"},{"CMP_LE_PH","cmp.le.ph"},{"CMP_LT_PH","cmp.lt.ph"},
{"CMPU_EQ_QB","cmpu.eq.qb"},{"CMPU_LE_QB","cmpu.le.qb"},{"CMPU_LT_QB","cmpu.lt.qb"},
}) do
local r = entry(b[1], "{.GPR,.GPR,.NONE,.NONE}", "{.RS,.RT,.NONE,.NONE}", "DSP_R2",
function(v) return string.format("%s $%d,$%d", b[2], v[1], v[2]) end, {31,31})
if r then sections[#sections+1]=r end
end
-- ---- splice into the SoT ---------------------------------------------------
local region = " // SPECGEN:BEGIN\n" .. table.concat(sections, "\n") .. "\n // SPECGEN:END"
local fh = assert(io.open(TABLE, "r")); local src = fh:read("*a"); fh:close()

BIN
core/rexcode/mips/tables/mips.encode_forms.bin
View File

Binary file not shown.

BIN
core/rexcode/mips/tables/mips.encode_runs.bin
View File

Binary file not shown.

BIN
core/rexcode/mips/tables/mips.entries.bin
View File

Binary file not shown.

BIN
core/rexcode/mips/tables/mips.idx_primary.bin
View File

Binary file not shown.

BIN
core/rexcode/mips/tables/mips.idx_special3.bin
View File

Binary file not shown.